1 #ifndef _ASM_IA64_IA32_H
2 #define _ASM_IA64_IA32_H
4 #include <linux/config.h>
8 #ifdef CONFIG_IA32_SUPPORT
10 #include <linux/binfmts.h>
11 #include <linux/compat.h>
14 * 32 bit structures for IA32 support.
17 #define IA32_PAGE_SHIFT 12 /* 4KB pages */
18 #define IA32_PAGE_SIZE (1UL << IA32_PAGE_SHIFT)
19 #define IA32_PAGE_MASK (~(IA32_PAGE_SIZE - 1))
20 #define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK)
21 #define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */
25 * As documented in the iBCS2 standard..
27 * The first part of "struct _fpstate" is just the
28 * normal i387 hardware setup, the extra "status"
29 * word is used to save the coprocessor status word
30 * before entering the handler.
33 unsigned short significand[4];
34 unsigned short exponent;
38 unsigned short significand[4];
39 unsigned short exponent;
40 unsigned short padding[3];
44 unsigned int element[4];
48 struct _fpstate_ia32 {
56 struct _fpreg_ia32 _st[8];
57 unsigned short status;
58 unsigned short magic; /* 0xffff = regular FPU data only */
60 /* FXSR FPU environment */
61 unsigned int _fxsr_env[6]; /* FXSR FPU env is ignored */
63 unsigned int reserved;
64 struct _fpxreg_ia32 _fxsr_st[8]; /* FXSR FPU reg data is ignored */
65 struct _xmmreg_ia32 _xmm[8];
66 unsigned int padding[56];
69 struct sigcontext_ia32 {
70 unsigned short gs, __gsh;
71 unsigned short fs, __fsh;
72 unsigned short es, __esh;
73 unsigned short ds, __dsh;
85 unsigned short cs, __csh;
87 unsigned int esp_at_signal;
88 unsigned short ss, __ssh;
89 unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
96 * IA32 (Pentium III/4) FXSR, SSE support
98 * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
99 * interacting with the FXSR-format floating point environment. Floating
100 * point data can be accessed in the regular format in the usual manner,
101 * and both the standard and SIMD floating point data can be accessed via
102 * the new ptrace requests. In either case, changes to the FPU environment
103 * will be reflected in the task's state as expected.
105 struct ia32_user_i387_struct {
113 /* 8*10 bytes for each FP-reg = 80 bytes */
114 struct _fpreg_ia32 st_space[8];
117 struct ia32_user_fxsr_struct {
128 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
129 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
134 #define IA32_SET_SA_HANDLER(ka,handler,restorer) \
135 ((ka)->sa.sa_handler = (__sighandler_t) \
136 (((unsigned long)(restorer) << 32) \
137 | ((handler) & 0xffffffff)))
138 #define IA32_SA_HANDLER(ka) ((unsigned long) (ka)->sa.sa_handler & 0xffffffff)
139 #define IA32_SA_RESTORER(ka) ((unsigned long) (ka)->sa.sa_handler >> 32)
142 unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */
143 unsigned int sa_flags;
144 unsigned int sa_restorer; /* Another 32 bit pointer */
145 compat_sigset_t sa_mask; /* A 32 bit mask */
148 struct old_sigaction32 {
149 unsigned int sa_handler; /* Really a pointer, but need to deal
151 compat_old_sigset_t sa_mask; /* A 32 bit mask */
152 unsigned int sa_flags;
153 unsigned int sa_restorer; /* Another 32 bit pointer */
156 typedef struct sigaltstack_ia32 {
159 unsigned int ss_size;
162 struct ucontext_ia32 {
163 unsigned int uc_flags;
164 unsigned int uc_link;
165 stack_ia32_t uc_stack;
166 struct sigcontext_ia32 uc_mcontext;
167 sigset_t uc_sigmask; /* mask last for extensibility */
171 unsigned short st_dev;
172 unsigned char __pad0[10];
173 unsigned int __st_ino;
174 unsigned int st_mode;
175 unsigned int st_nlink;
178 unsigned short st_rdev;
179 unsigned char __pad3[10];
180 unsigned int st_size_lo;
181 unsigned int st_size_hi;
182 unsigned int st_blksize;
183 unsigned int st_blocks; /* Number 512-byte blocks allocated. */
184 unsigned int __pad4; /* future possible st_blocks high bits */
185 unsigned int st_atime;
186 unsigned int st_atime_nsec;
187 unsigned int st_mtime;
188 unsigned int st_mtime_nsec;
189 unsigned int st_ctime;
190 unsigned int st_ctime_nsec;
191 unsigned int st_ino_lo;
192 unsigned int st_ino_hi;
195 typedef union sigval32 {
197 unsigned int sival_ptr;
200 typedef struct siginfo32 {
206 int _pad[((128/sizeof(int)) - 3)];
210 unsigned int _pid; /* sender's pid */
211 unsigned int _uid; /* sender's uid */
214 /* POSIX.1b timers */
216 timer_t _tid; /* timer id */
217 int _overrun; /* overrun count */
218 char _pad[sizeof(unsigned int) - sizeof(int)];
219 sigval_t32 _sigval; /* same as below */
220 int _sys_private; /* not to be passed to user */
223 /* POSIX.1b signals */
225 unsigned int _pid; /* sender's pid */
226 unsigned int _uid; /* sender's uid */
232 unsigned int _pid; /* which child */
233 unsigned int _uid; /* sender's uid */
234 int _status; /* exit code */
235 compat_clock_t _utime;
236 compat_clock_t _stime;
239 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
241 unsigned int _addr; /* faulting insn/memory ref. */
246 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
252 struct linux32_dirent {
259 struct old_linux32_dirent {
267 * IA-32 ELF specific definitions for IA-64.
270 #define _ASM_IA64_ELF_H /* Don't include elf.h */
272 #include <linux/sched.h>
273 #include <asm/processor.h>
276 * This is used to ensure we don't load something for the wrong architecture.
278 #define elf_check_arch(x) ((x)->e_machine == EM_386)
281 * These are used to set parameters in the core dumps.
283 #define ELF_CLASS ELFCLASS32
284 #define ELF_DATA ELFDATA2LSB
285 #define ELF_ARCH EM_386
287 #define IA32_PAGE_OFFSET 0xc0000000
288 #define IA32_STACK_TOP IA32_PAGE_OFFSET
291 * The system segments (GDT, TSS, LDT) have to be mapped below 4GB so the IA-32 engine can
294 #define IA32_GDT_OFFSET (IA32_PAGE_OFFSET)
295 #define IA32_TSS_OFFSET (IA32_PAGE_OFFSET + PAGE_SIZE)
296 #define IA32_LDT_OFFSET (IA32_PAGE_OFFSET + 2*PAGE_SIZE)
298 #define USE_ELF_CORE_DUMP
299 #define ELF_EXEC_PAGESIZE IA32_PAGE_SIZE
302 * This is the location that an ET_DYN program is loaded if exec'ed.
303 * Typical use of this is to invoke "./ld.so someprog" to test out a
304 * new version of the loader. We need to make sure that it is out of
305 * the way of the program that it will "exec", and that there is
306 * sufficient room for the brk.
308 #define ELF_ET_DYN_BASE (IA32_PAGE_OFFSET/3 + 0x1000000)
310 void ia64_elf32_init(struct pt_regs *regs);
311 #define ELF_PLAT_INIT(_r, load_addr) ia64_elf32_init(_r)
313 #define elf_addr_t u32
315 /* ELF register definitions. This is needed for core dump support. */
317 #define ELF_NGREG 128 /* XXX fix me */
318 #define ELF_NFPREG 128 /* XXX fix me */
320 typedef unsigned long elf_greg_t;
321 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
327 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
329 /* This macro yields a bitmask that programs can use to figure out
330 what instruction set this CPU supports. */
333 /* This macro yields a string that ld.so will use to load
334 implementation specific libraries for optimization. Not terribly
335 relevant until we have real hardware to play with... */
336 #define ELF_PLATFORM 0
339 # define SET_PERSONALITY(EX,IBCS2) \
340 (current->personality = (IBCS2) ? PER_SVR4 : PER_LINUX)
343 #define IA32_EFLAG 0x200
346 * IA-32 ELF specific definitions for IA-64.
349 #define __USER_CS 0x23
350 #define __USER_DS 0x2B
352 #define FIRST_TSS_ENTRY 6
353 #define FIRST_LDT_ENTRY (FIRST_TSS_ENTRY+1)
354 #define _TSS(n) ((((unsigned long) n)<<4)+(FIRST_TSS_ENTRY<<3))
355 #define _LDT(n) ((((unsigned long) n)<<4)+(FIRST_LDT_ENTRY<<3))
357 #define IA32_SEGSEL_RPL (0x3 << 0)
358 #define IA32_SEGSEL_TI (0x1 << 2)
359 #define IA32_SEGSEL_INDEX_SHIFT 3
361 #define IA32_SEG_BASE 16
362 #define IA32_SEG_TYPE 40
363 #define IA32_SEG_SYS 44
364 #define IA32_SEG_DPL 45
365 #define IA32_SEG_P 47
366 #define IA32_SEG_HIGH_LIMIT 48
367 #define IA32_SEG_AVL 52
368 #define IA32_SEG_DB 54
369 #define IA32_SEG_G 55
370 #define IA32_SEG_HIGH_BASE 56
372 #define IA32_SEG_DESCRIPTOR(base, limit, segtype, nonsysseg, dpl, segpresent, avl, segdb, gran) \
373 (((limit) & 0xffff) \
374 | (((unsigned long) (base) & 0xffffff) << IA32_SEG_BASE) \
375 | ((unsigned long) (segtype) << IA32_SEG_TYPE) \
376 | ((unsigned long) (nonsysseg) << IA32_SEG_SYS) \
377 | ((unsigned long) (dpl) << IA32_SEG_DPL) \
378 | ((unsigned long) (segpresent) << IA32_SEG_P) \
379 | ((((unsigned long) (limit) >> 16) & 0xf) << IA32_SEG_HIGH_LIMIT) \
380 | ((unsigned long) (avl) << IA32_SEG_AVL) \
381 | ((unsigned long) (segdb) << IA32_SEG_DB) \
382 | ((unsigned long) (gran) << IA32_SEG_G) \
383 | ((((unsigned long) (base) >> 24) & 0xff) << IA32_SEG_HIGH_BASE))
394 /* Unscramble an IA-32 segment descriptor into the IA-64 format. */
395 #define IA32_SEG_UNSCRAMBLE(sd) \
396 ( (((sd) >> IA32_SEG_BASE) & 0xffffff) | ((((sd) >> IA32_SEG_HIGH_BASE) & 0xff) << 24) \
397 | ((((sd) & 0xffff) | ((((sd) >> IA32_SEG_HIGH_LIMIT) & 0xf) << 16)) << SEG_LIM) \
398 | ((((sd) >> IA32_SEG_TYPE) & 0xf) << SEG_TYPE) \
399 | ((((sd) >> IA32_SEG_SYS) & 0x1) << SEG_SYS) \
400 | ((((sd) >> IA32_SEG_DPL) & 0x3) << SEG_DPL) \
401 | ((((sd) >> IA32_SEG_P) & 0x1) << SEG_P) \
402 | ((((sd) >> IA32_SEG_AVL) & 0x1) << SEG_AVL) \
403 | ((((sd) >> IA32_SEG_DB) & 0x1) << SEG_DB) \
404 | ((((sd) >> IA32_SEG_G) & 0x1) << SEG_G))
406 #define IA32_IOBASE 0x2000000000000000 /* Virtual address for I/O space */
408 #define IA32_CR0 0x80000001 /* Enable PG and PE bits */
409 #define IA32_CR4 0x600 /* MMXEX and FXSR on */
412 * IA32 floating point control registers starting values
415 #define IA32_FSR_DEFAULT 0x55550000 /* set all tag bits */
416 #define IA32_FCR_DEFAULT 0x17800000037fUL /* extended precision, all masks */
418 #define IA32_PTRACE_GETREGS 12
419 #define IA32_PTRACE_SETREGS 13
420 #define IA32_PTRACE_GETFPREGS 14
421 #define IA32_PTRACE_SETFPREGS 15
422 #define IA32_PTRACE_GETFPXREGS 18
423 #define IA32_PTRACE_SETFPXREGS 19
425 #define ia32_start_thread(regs,new_ip,new_sp) do { \
427 ia64_psr(regs)->cpl = 3; /* set user mode */ \
428 ia64_psr(regs)->ri = 0; /* clear return slot number */ \
429 ia64_psr(regs)->is = 1; /* IA-32 instruction set */ \
430 regs->cr_iip = new_ip; \
431 regs->ar_rsc = 0xc; /* enforced lazy mode, priv. level 3 */ \
434 regs->r12 = new_sp; \
438 * Local Descriptor Table (LDT) related declarations.
441 #define IA32_LDT_ENTRIES 8192 /* Maximum number of LDT entries supported. */
442 #define IA32_LDT_ENTRY_SIZE 8 /* The size of each LDT entry. */
444 struct ia32_modify_ldt_ldt_s {
445 unsigned int entry_number;
446 unsigned int base_addr;
448 unsigned int seg_32bit:1;
449 unsigned int contents:2;
450 unsigned int read_exec_only:1;
451 unsigned int limit_in_pages:1;
452 unsigned int seg_not_present:1;
453 unsigned int useable:1;
458 extern void ia32_init_addr_space (struct pt_regs *regs);
459 extern int ia32_setup_arg_pages (struct linux_binprm *bprm);
460 extern unsigned long ia32_do_mmap (struct file *, unsigned long, unsigned long, int, int, loff_t);
461 extern void ia32_load_segment_descriptors (struct task_struct *task);
463 #define ia32f2ia64f(dst,src) \
465 register double f6 asm ("f6"); \
466 asm volatile ("ldfe f6=[%2];; stf.spill [%1]=f6" : "=f"(f6): "r"(dst), "r"(src) : "memory"); \
469 #define ia64f2ia32f(dst,src) \
471 register double f6 asm ("f6"); \
472 asm volatile ("ldf.fill f6=[%2];; stfe [%1]=f6" : "=f"(f6): "r"(dst), "r"(src) : "memory"); \
475 #endif /* !CONFIG_IA32_SUPPORT */
477 #endif /* _ASM_IA64_IA32_H */