arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 351
 352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 353 {
 354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 356         else
 357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 358 }
 359
 360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 361 {
 362         kvm_make_request(KVM_REQ_EVENT, vcpu);
 363         vcpu->arch.nmi_pending = 1;
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 366
 367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 368 {
 369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 372
 373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 378
 379 /*
 380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 381  * a #GP and return false.
 382  */
 383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 384 {
 385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 386                 return true;
 387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 388         return false;
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 391
 392 /*
 393  * This function will be used to read from the physical memory of the currently
 394  * running guest. The difference to kvm_read_guest_page is that this function
 395  * can read from guest physical or from the guest's guest physical memory.
 396  */
 397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 398                             gfn_t ngfn, void *data, int offset, int len,
 399                             u32 access)
 400 {
 401         gfn_t real_gfn;
 402         gpa_t ngpa;
 403
 404         ngpa     = gfn_to_gpa(ngfn);
 405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 406         if (real_gfn == UNMAPPED_GVA)
 407                 return -EFAULT;
 408
 409         real_gfn = gpa_to_gfn(real_gfn);
 410
 411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 414
 415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 416                                void *data, int offset, int len, u32 access)
 417 {
 418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 419                                        data, offset, len, access);
 420 }
 421
 422 /*
 423  * Load the pae pdptrs.  Return true is they are all valid.
 424  */
 425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 426 {
 427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 429         int i;
 430         int ret;
 431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 432
 433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 434                                       offset * sizeof(u64), sizeof(pdpte),
 435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 436         if (ret < 0) {
 437                 ret = 0;
 438                 goto out;
 439         }
 440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 441                 if (is_present_gpte(pdpte[i]) &&
 442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 443                         ret = 0;
 444                         goto out;
 445                 }
 446         }
 447         ret = 1;
 448
 449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 450         __set_bit(VCPU_EXREG_PDPTR,
 451                   (unsigned long *)&vcpu->arch.regs_avail);
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_dirty);
 454 out:
 455
 456         return ret;
 457 }
 458 EXPORT_SYMBOL_GPL(load_pdptrs);
 459
 460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 461 {
 462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 463         bool changed = true;
 464         int offset;
 465         gfn_t gfn;
 466         int r;
 467
 468         if (is_long_mode(vcpu) || !is_pae(vcpu))
 469                 return false;
 470
 471         if (!test_bit(VCPU_EXREG_PDPTR,
 472                       (unsigned long *)&vcpu->arch.regs_avail))
 473                 return true;
 474
 475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 479         if (r < 0)
 480                 goto out;
 481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 482 out:
 483
 484         return changed;
 485 }
 486
 487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 488 {
 489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 491                                     X86_CR0_CD | X86_CR0_NW;
 492
 493         cr0 |= X86_CR0_ET;
 494
 495 #ifdef CONFIG_X86_64
 496         if (cr0 & 0xffffffff00000000UL)
 497                 return 1;
 498 #endif
 499
 500         cr0 &= ~CR0_RESERVED_BITS;
 501
 502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 503                 return 1;
 504
 505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 506                 return 1;
 507
 508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 509 #ifdef CONFIG_X86_64
 510                 if ((vcpu->arch.efer & EFER_LME)) {
 511                         int cs_db, cs_l;
 512
 513                         if (!is_pae(vcpu))
 514                                 return 1;
 515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 516                         if (cs_l)
 517                                 return 1;
 518                 } else
 519 #endif
 520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 521                                                  kvm_read_cr3(vcpu)))
 522                         return 1;
 523         }
 524
 525         kvm_x86_ops->set_cr0(vcpu, cr0);
 526
 527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 528                 kvm_clear_async_pf_completion_queue(vcpu);
 529                 kvm_async_pf_hash_reset(vcpu);
 530         }
 531
 532         if ((cr0 ^ old_cr0) & update_bits)
 533                 kvm_mmu_reset_context(vcpu);
 534         return 0;
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 537
 538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 539 {
 540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 541 }
 542 EXPORT_SYMBOL_GPL(kvm_lmsw);
 543
 544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 545 {
 546         u64 xcr0;
 547
 548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 549         if (index != XCR_XFEATURE_ENABLED_MASK)
 550                 return 1;
 551         xcr0 = xcr;
 552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 553                 return 1;
 554         if (!(xcr0 & XSTATE_FP))
 555                 return 1;
 556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 557                 return 1;
 558         if (xcr0 & ~host_xcr0)
 559                 return 1;
 560         vcpu->arch.xcr0 = xcr0;
 561         vcpu->guest_xcr0_loaded = 0;
 562         return 0;
 563 }
 564
 565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 566 {
 567         if (__kvm_set_xcr(vcpu, index, xcr)) {
 568                 kvm_inject_gp(vcpu, 0);
 569                 return 1;
 570         }
 571         return 0;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 574
 575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 576 {
 577         struct kvm_cpuid_entry2 *best;
 578
 579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 581 }
 582
 583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 584 {
 585         struct kvm_cpuid_entry2 *best;
 586
 587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 589 }
 590
 591 static void update_cpuid(struct kvm_vcpu *vcpu)
 592 {
 593         struct kvm_cpuid_entry2 *best;
 594
 595         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 596         if (!best)
 597                 return;
 598
 599         /* Update OSXSAVE bit */
 600         if (cpu_has_xsave && best->function == 0x1) {
 601                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 602                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 603                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 604         }
 605 }
 606
 607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 608 {
 609         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 610         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 611                                    X86_CR4_PAE | X86_CR4_SMEP;
 612         if (cr4 & CR4_RESERVED_BITS)
 613                 return 1;
 614
 615         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 616                 return 1;
 617
 618         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 619                 return 1;
 620
 621         if (is_long_mode(vcpu)) {
 622                 if (!(cr4 & X86_CR4_PAE))
 623                         return 1;
 624         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 625                    && ((cr4 ^ old_cr4) & pdptr_bits)
 626                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 627                                    kvm_read_cr3(vcpu)))
 628                 return 1;
 629
 630         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 631                 return 1;
 632
 633         if ((cr4 ^ old_cr4) & pdptr_bits)
 634                 kvm_mmu_reset_context(vcpu);
 635
 636         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 637                 update_cpuid(vcpu);
 638
 639         return 0;
 640 }
 641 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 642
 643 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 644 {
 645         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 646                 kvm_mmu_sync_roots(vcpu);
 647                 kvm_mmu_flush_tlb(vcpu);
 648                 return 0;
 649         }
 650
 651         if (is_long_mode(vcpu)) {
 652                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 653                         return 1;
 654         } else {
 655                 if (is_pae(vcpu)) {
 656                         if (cr3 & CR3_PAE_RESERVED_BITS)
 657                                 return 1;
 658                         if (is_paging(vcpu) &&
 659                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 660                                 return 1;
 661                 }
 662                 /*
 663                  * We don't check reserved bits in nonpae mode, because
 664                  * this isn't enforced, and VMware depends on this.
 665                  */
 666         }
 667
 668         /*
 669          * Does the new cr3 value map to physical memory? (Note, we
 670          * catch an invalid cr3 even in real-mode, because it would
 671          * cause trouble later on when we turn on paging anyway.)
 672          *
 673          * A real CPU would silently accept an invalid cr3 and would
 674          * attempt to use it - with largely undefined (and often hard
 675          * to debug) behavior on the guest side.
 676          */
 677         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 678                 return 1;
 679         vcpu->arch.cr3 = cr3;
 680         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 681         vcpu->arch.mmu.new_cr3(vcpu);
 682         return 0;
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 685
 686 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 687 {
 688         if (cr8 & CR8_RESERVED_BITS)
 689                 return 1;
 690         if (irqchip_in_kernel(vcpu->kvm))
 691                 kvm_lapic_set_tpr(vcpu, cr8);
 692         else
 693                 vcpu->arch.cr8 = cr8;
 694         return 0;
 695 }
 696 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 697
 698 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 699 {
 700         if (irqchip_in_kernel(vcpu->kvm))
 701                 return kvm_lapic_get_cr8(vcpu);
 702         else
 703                 return vcpu->arch.cr8;
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 706
 707 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 708 {
 709         switch (dr) {
 710         case 0 ... 3:
 711                 vcpu->arch.db[dr] = val;
 712                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 713                         vcpu->arch.eff_db[dr] = val;
 714                 break;
 715         case 4:
 716                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 717                         return 1; /* #UD */
 718                 /* fall through */
 719         case 6:
 720                 if (val & 0xffffffff00000000ULL)
 721                         return -1; /* #GP */
 722                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 723                 break;
 724         case 5:
 725                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 726                         return 1; /* #UD */
 727                 /* fall through */
 728         default: /* 7 */
 729                 if (val & 0xffffffff00000000ULL)
 730                         return -1; /* #GP */
 731                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 732                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 733                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 734                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 735                 }
 736                 break;
 737         }
 738
 739         return 0;
 740 }
 741
 742 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 743 {
 744         int res;
 745
 746         res = __kvm_set_dr(vcpu, dr, val);
 747         if (res > 0)
 748                 kvm_queue_exception(vcpu, UD_VECTOR);
 749         else if (res < 0)
 750                 kvm_inject_gp(vcpu, 0);
 751
 752         return res;
 753 }
 754 EXPORT_SYMBOL_GPL(kvm_set_dr);
 755
 756 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 757 {
 758         switch (dr) {
 759         case 0 ... 3:
 760                 *val = vcpu->arch.db[dr];
 761                 break;
 762         case 4:
 763                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 764                         return 1;
 765                 /* fall through */
 766         case 6:
 767                 *val = vcpu->arch.dr6;
 768                 break;
 769         case 5:
 770                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 771                         return 1;
 772                 /* fall through */
 773         default: /* 7 */
 774                 *val = vcpu->arch.dr7;
 775                 break;
 776         }
 777
 778         return 0;
 779 }
 780
 781 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 782 {
 783         if (_kvm_get_dr(vcpu, dr, val)) {
 784                 kvm_queue_exception(vcpu, UD_VECTOR);
 785                 return 1;
 786         }
 787         return 0;
 788 }
 789 EXPORT_SYMBOL_GPL(kvm_get_dr);
 790
 791 /*
 792  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 793  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 794  *
 795  * This list is modified at module load time to reflect the
 796  * capabilities of the host cpu. This capabilities test skips MSRs that are
 797  * kvm-specific. Those are put in the beginning of the list.
 798  */
 799
 800 #define KVM_SAVE_MSRS_BEGIN     8
 801 static u32 msrs_to_save[] = {
 802         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 803         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 804         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 805         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 806         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 807         MSR_STAR,
 808 #ifdef CONFIG_X86_64
 809         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 810 #endif
 811         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 812 };
 813
 814 static unsigned num_msrs_to_save;
 815
 816 static u32 emulated_msrs[] = {
 817         MSR_IA32_MISC_ENABLE,
 818         MSR_IA32_MCG_STATUS,
 819         MSR_IA32_MCG_CTL,
 820 };
 821
 822 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 823 {
 824         u64 old_efer = vcpu->arch.efer;
 825
 826         if (efer & efer_reserved_bits)
 827                 return 1;
 828
 829         if (is_paging(vcpu)
 830             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 831                 return 1;
 832
 833         if (efer & EFER_FFXSR) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 838                         return 1;
 839         }
 840
 841         if (efer & EFER_SVME) {
 842                 struct kvm_cpuid_entry2 *feat;
 843
 844                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 845                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 846                         return 1;
 847         }
 848
 849         efer &= ~EFER_LMA;
 850         efer |= vcpu->arch.efer & EFER_LMA;
 851
 852         kvm_x86_ops->set_efer(vcpu, efer);
 853
 854         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 855
 856         /* Update reserved bits */
 857         if ((efer ^ old_efer) & EFER_NX)
 858                 kvm_mmu_reset_context(vcpu);
 859
 860         return 0;
 861 }
 862
 863 void kvm_enable_efer_bits(u64 mask)
 864 {
 865        efer_reserved_bits &= ~mask;
 866 }
 867 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 868
 869
 870 /*
 871  * Writes msr value into into the appropriate "register".
 872  * Returns 0 on success, non-0 otherwise.
 873  * Assumes vcpu_load() was already called.
 874  */
 875 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 876 {
 877         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 878 }
 879
 880 /*
 881  * Adapt set_msr() to msr_io()'s calling convention
 882  */
 883 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 884 {
 885         return kvm_set_msr(vcpu, index, *data);
 886 }
 887
 888 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 889 {
 890         int version;
 891         int r;
 892         struct pvclock_wall_clock wc;
 893         struct timespec boot;
 894
 895         if (!wall_clock)
 896                 return;
 897
 898         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 899         if (r)
 900                 return;
 901
 902         if (version & 1)
 903                 ++version;  /* first time write, random junk */
 904
 905         ++version;
 906
 907         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 908
 909         /*
 910          * The guest calculates current wall clock time by adding
 911          * system time (updated by kvm_guest_time_update below) to the
 912          * wall clock specified here.  guest system time equals host
 913          * system time for us, thus we must fill in host boot time here.
 914          */
 915         getboottime(&boot);
 916
 917         wc.sec = boot.tv_sec;
 918         wc.nsec = boot.tv_nsec;
 919         wc.version = version;
 920
 921         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 922
 923         version++;
 924         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 925 }
 926
 927 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 928 {
 929         uint32_t quotient, remainder;
 930
 931         /* Don't try to replace with do_div(), this one calculates
 932          * "(dividend << 32) / divisor" */
 933         __asm__ ( "divl %4"
 934                   : "=a" (quotient), "=d" (remainder)
 935                   : "0" (0), "1" (dividend), "r" (divisor) );
 936         return quotient;
 937 }
 938
 939 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 940                                s8 *pshift, u32 *pmultiplier)
 941 {
 942         uint64_t scaled64;
 943         int32_t  shift = 0;
 944         uint64_t tps64;
 945         uint32_t tps32;
 946
 947         tps64 = base_khz * 1000LL;
 948         scaled64 = scaled_khz * 1000LL;
 949         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 950                 tps64 >>= 1;
 951                 shift--;
 952         }
 953
 954         tps32 = (uint32_t)tps64;
 955         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 956                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 957                         scaled64 >>= 1;
 958                 else
 959                         tps32 <<= 1;
 960                 shift++;
 961         }
 962
 963         *pshift = shift;
 964         *pmultiplier = div_frac(scaled64, tps32);
 965
 966         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 967                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 968 }
 969
 970 static inline u64 get_kernel_ns(void)
 971 {
 972         struct timespec ts;
 973
 974         WARN_ON(preemptible());
 975         ktime_get_ts(&ts);
 976         monotonic_to_bootbased(&ts);
 977         return timespec_to_ns(&ts);
 978 }
 979
 980 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 981 unsigned long max_tsc_khz;
 982
 983 static inline int kvm_tsc_changes_freq(void)
 984 {
 985         int cpu = get_cpu();
 986         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 987                   cpufreq_quick_get(cpu) != 0;
 988         put_cpu();
 989         return ret;
 990 }
 991
 992 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 993 {
 994         if (vcpu->arch.virtual_tsc_khz)
 995                 return vcpu->arch.virtual_tsc_khz;
 996         else
 997                 return __this_cpu_read(cpu_tsc_khz);
 998 }
 999
1000 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1001 {
1002         u64 ret;
1003
1004         WARN_ON(preemptible());
1005         if (kvm_tsc_changes_freq())
1006                 printk_once(KERN_WARNING
1007                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1008         ret = nsec * vcpu_tsc_khz(vcpu);
1009         do_div(ret, USEC_PER_SEC);
1010         return ret;
1011 }
1012
1013 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1014 {
1015         /* Compute a scale to convert nanoseconds in TSC cycles */
1016         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1017                            &vcpu->arch.tsc_catchup_shift,
1018                            &vcpu->arch.tsc_catchup_mult);
1019 }
1020
1021 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1022 {
1023         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1024                                       vcpu->arch.tsc_catchup_mult,
1025                                       vcpu->arch.tsc_catchup_shift);
1026         tsc += vcpu->arch.last_tsc_write;
1027         return tsc;
1028 }
1029
1030 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1031 {
1032         struct kvm *kvm = vcpu->kvm;
1033         u64 offset, ns, elapsed;
1034         unsigned long flags;
1035         s64 sdiff;
1036
1037         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1038         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1039         ns = get_kernel_ns();
1040         elapsed = ns - kvm->arch.last_tsc_nsec;
1041         sdiff = data - kvm->arch.last_tsc_write;
1042         if (sdiff < 0)
1043                 sdiff = -sdiff;
1044
1045         /*
1046          * Special case: close write to TSC within 5 seconds of
1047          * another CPU is interpreted as an attempt to synchronize
1048          * The 5 seconds is to accommodate host load / swapping as
1049          * well as any reset of TSC during the boot process.
1050          *
1051          * In that case, for a reliable TSC, we can match TSC offsets,
1052          * or make a best guest using elapsed value.
1053          */
1054         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1055             elapsed < 5ULL * NSEC_PER_SEC) {
1056                 if (!check_tsc_unstable()) {
1057                         offset = kvm->arch.last_tsc_offset;
1058                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1059                 } else {
1060                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1061                         offset += delta;
1062                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1063                 }
1064                 ns = kvm->arch.last_tsc_nsec;
1065         }
1066         kvm->arch.last_tsc_nsec = ns;
1067         kvm->arch.last_tsc_write = data;
1068         kvm->arch.last_tsc_offset = offset;
1069         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1070         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1071
1072         /* Reset of TSC must disable overshoot protection below */
1073         vcpu->arch.hv_clock.tsc_timestamp = 0;
1074         vcpu->arch.last_tsc_write = data;
1075         vcpu->arch.last_tsc_nsec = ns;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1078
1079 static int kvm_guest_time_update(struct kvm_vcpu *v)
1080 {
1081         unsigned long flags;
1082         struct kvm_vcpu_arch *vcpu = &v->arch;
1083         void *shared_kaddr;
1084         unsigned long this_tsc_khz;
1085         s64 kernel_ns, max_kernel_ns;
1086         u64 tsc_timestamp;
1087
1088         /* Keep irq disabled to prevent changes to the clock */
1089         local_irq_save(flags);
1090         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1091         kernel_ns = get_kernel_ns();
1092         this_tsc_khz = vcpu_tsc_khz(v);
1093         if (unlikely(this_tsc_khz == 0)) {
1094                 local_irq_restore(flags);
1095                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1096                 return 1;
1097         }
1098
1099         /*
1100          * We may have to catch up the TSC to match elapsed wall clock
1101          * time for two reasons, even if kvmclock is used.
1102          *   1) CPU could have been running below the maximum TSC rate
1103          *   2) Broken TSC compensation resets the base at each VCPU
1104          *      entry to avoid unknown leaps of TSC even when running
1105          *      again on the same CPU.  This may cause apparent elapsed
1106          *      time to disappear, and the guest to stand still or run
1107          *      very slowly.
1108          */
1109         if (vcpu->tsc_catchup) {
1110                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1111                 if (tsc > tsc_timestamp) {
1112                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1113                         tsc_timestamp = tsc;
1114                 }
1115         }
1116
1117         local_irq_restore(flags);
1118
1119         if (!vcpu->time_page)
1120                 return 0;
1121
1122         /*
1123          * Time as measured by the TSC may go backwards when resetting the base
1124          * tsc_timestamp.  The reason for this is that the TSC resolution is
1125          * higher than the resolution of the other clock scales.  Thus, many
1126          * possible measurments of the TSC correspond to one measurement of any
1127          * other clock, and so a spread of values is possible.  This is not a
1128          * problem for the computation of the nanosecond clock; with TSC rates
1129          * around 1GHZ, there can only be a few cycles which correspond to one
1130          * nanosecond value, and any path through this code will inevitably
1131          * take longer than that.  However, with the kernel_ns value itself,
1132          * the precision may be much lower, down to HZ granularity.  If the
1133          * first sampling of TSC against kernel_ns ends in the low part of the
1134          * range, and the second in the high end of the range, we can get:
1135          *
1136          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1137          *
1138          * As the sampling errors potentially range in the thousands of cycles,
1139          * it is possible such a time value has already been observed by the
1140          * guest.  To protect against this, we must compute the system time as
1141          * observed by the guest and ensure the new system time is greater.
1142          */
1143         max_kernel_ns = 0;
1144         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1145                 max_kernel_ns = vcpu->last_guest_tsc -
1146                                 vcpu->hv_clock.tsc_timestamp;
1147                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1148                                     vcpu->hv_clock.tsc_to_system_mul,
1149                                     vcpu->hv_clock.tsc_shift);
1150                 max_kernel_ns += vcpu->last_kernel_ns;
1151         }
1152
1153         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1154                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1155                                    &vcpu->hv_clock.tsc_shift,
1156                                    &vcpu->hv_clock.tsc_to_system_mul);
1157                 vcpu->hw_tsc_khz = this_tsc_khz;
1158         }
1159
1160         if (max_kernel_ns > kernel_ns)
1161                 kernel_ns = max_kernel_ns;
1162
1163         /* With all the info we got, fill in the values */
1164         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1165         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1166         vcpu->last_kernel_ns = kernel_ns;
1167         vcpu->last_guest_tsc = tsc_timestamp;
1168         vcpu->hv_clock.flags = 0;
1169
1170         /*
1171          * The interface expects us to write an even number signaling that the
1172          * update is finished. Since the guest won't see the intermediate
1173          * state, we just increase by 2 at the end.
1174          */
1175         vcpu->hv_clock.version += 2;
1176
1177         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1178
1179         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1180                sizeof(vcpu->hv_clock));
1181
1182         kunmap_atomic(shared_kaddr, KM_USER0);
1183
1184         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1185         return 0;
1186 }
1187
1188 static bool msr_mtrr_valid(unsigned msr)
1189 {
1190         switch (msr) {
1191         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1192         case MSR_MTRRfix64K_00000:
1193         case MSR_MTRRfix16K_80000:
1194         case MSR_MTRRfix16K_A0000:
1195         case MSR_MTRRfix4K_C0000:
1196         case MSR_MTRRfix4K_C8000:
1197         case MSR_MTRRfix4K_D0000:
1198         case MSR_MTRRfix4K_D8000:
1199         case MSR_MTRRfix4K_E0000:
1200         case MSR_MTRRfix4K_E8000:
1201         case MSR_MTRRfix4K_F0000:
1202         case MSR_MTRRfix4K_F8000:
1203         case MSR_MTRRdefType:
1204         case MSR_IA32_CR_PAT:
1205                 return true;
1206         case 0x2f8:
1207                 return true;
1208         }
1209         return false;
1210 }
1211
1212 static bool valid_pat_type(unsigned t)
1213 {
1214         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1215 }
1216
1217 static bool valid_mtrr_type(unsigned t)
1218 {
1219         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1220 }
1221
1222 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1223 {
1224         int i;
1225
1226         if (!msr_mtrr_valid(msr))
1227                 return false;
1228
1229         if (msr == MSR_IA32_CR_PAT) {
1230                 for (i = 0; i < 8; i++)
1231                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1232                                 return false;
1233                 return true;
1234         } else if (msr == MSR_MTRRdefType) {
1235                 if (data & ~0xcff)
1236                         return false;
1237                 return valid_mtrr_type(data & 0xff);
1238         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1239                 for (i = 0; i < 8 ; i++)
1240                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1241                                 return false;
1242                 return true;
1243         }
1244
1245         /* variable MTRRs */
1246         return valid_mtrr_type(data & 0xff);
1247 }
1248
1249 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1250 {
1251         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1252
1253         if (!mtrr_valid(vcpu, msr, data))
1254                 return 1;
1255
1256         if (msr == MSR_MTRRdefType) {
1257                 vcpu->arch.mtrr_state.def_type = data;
1258                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1259         } else if (msr == MSR_MTRRfix64K_00000)
1260                 p[0] = data;
1261         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1262                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1263         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1264                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1265         else if (msr == MSR_IA32_CR_PAT)
1266                 vcpu->arch.pat = data;
1267         else {  /* Variable MTRRs */
1268                 int idx, is_mtrr_mask;
1269                 u64 *pt;
1270
1271                 idx = (msr - 0x200) / 2;
1272                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1273                 if (!is_mtrr_mask)
1274                         pt =
1275                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1276                 else
1277                         pt =
1278                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1279                 *pt = data;
1280         }
1281
1282         kvm_mmu_reset_context(vcpu);
1283         return 0;
1284 }
1285
1286 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1287 {
1288         u64 mcg_cap = vcpu->arch.mcg_cap;
1289         unsigned bank_num = mcg_cap & 0xff;
1290
1291         switch (msr) {
1292         case MSR_IA32_MCG_STATUS:
1293                 vcpu->arch.mcg_status = data;
1294                 break;
1295         case MSR_IA32_MCG_CTL:
1296                 if (!(mcg_cap & MCG_CTL_P))
1297                         return 1;
1298                 if (data != 0 && data != ~(u64)0)
1299                         return -1;
1300                 vcpu->arch.mcg_ctl = data;
1301                 break;
1302         default:
1303                 if (msr >= MSR_IA32_MC0_CTL &&
1304                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1305                         u32 offset = msr - MSR_IA32_MC0_CTL;
1306                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1307                          * some Linux kernels though clear bit 10 in bank 4 to
1308                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1309                          * this to avoid an uncatched #GP in the guest
1310                          */
1311                         if ((offset & 0x3) == 0 &&
1312                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1313                                 return -1;
1314                         vcpu->arch.mce_banks[offset] = data;
1315                         break;
1316                 }
1317                 return 1;
1318         }
1319         return 0;
1320 }
1321
1322 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1323 {
1324         struct kvm *kvm = vcpu->kvm;
1325         int lm = is_long_mode(vcpu);
1326         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1327                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1328         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1329                 : kvm->arch.xen_hvm_config.blob_size_32;
1330         u32 page_num = data & ~PAGE_MASK;
1331         u64 page_addr = data & PAGE_MASK;
1332         u8 *page;
1333         int r;
1334
1335         r = -E2BIG;
1336         if (page_num >= blob_size)
1337                 goto out;
1338         r = -ENOMEM;
1339         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1340         if (!page)
1341                 goto out;
1342         r = -EFAULT;
1343         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1344                 goto out_free;
1345         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1346                 goto out_free;
1347         r = 0;
1348 out_free:
1349         kfree(page);
1350 out:
1351         return r;
1352 }
1353
1354 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1355 {
1356         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1357 }
1358
1359 static bool kvm_hv_msr_partition_wide(u32 msr)
1360 {
1361         bool r = false;
1362         switch (msr) {
1363         case HV_X64_MSR_GUEST_OS_ID:
1364         case HV_X64_MSR_HYPERCALL:
1365                 r = true;
1366                 break;
1367         }
1368
1369         return r;
1370 }
1371
1372 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1373 {
1374         struct kvm *kvm = vcpu->kvm;
1375
1376         switch (msr) {
1377         case HV_X64_MSR_GUEST_OS_ID:
1378                 kvm->arch.hv_guest_os_id = data;
1379                 /* setting guest os id to zero disables hypercall page */
1380                 if (!kvm->arch.hv_guest_os_id)
1381                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1382                 break;
1383         case HV_X64_MSR_HYPERCALL: {
1384                 u64 gfn;
1385                 unsigned long addr;
1386                 u8 instructions[4];
1387
1388                 /* if guest os id is not set hypercall should remain disabled */
1389                 if (!kvm->arch.hv_guest_os_id)
1390                         break;
1391                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1392                         kvm->arch.hv_hypercall = data;
1393                         break;
1394                 }
1395                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1396                 addr = gfn_to_hva(kvm, gfn);
1397                 if (kvm_is_error_hva(addr))
1398                         return 1;
1399                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1400                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1401                 if (__copy_to_user((void __user *)addr, instructions, 4))
1402                         return 1;
1403                 kvm->arch.hv_hypercall = data;
1404                 break;
1405         }
1406         default:
1407                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1408                           "data 0x%llx\n", msr, data);
1409                 return 1;
1410         }
1411         return 0;
1412 }
1413
1414 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1415 {
1416         switch (msr) {
1417         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1418                 unsigned long addr;
1419
1420                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1421                         vcpu->arch.hv_vapic = data;
1422                         break;
1423                 }
1424                 addr = gfn_to_hva(vcpu->kvm, data >>
1425                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1426                 if (kvm_is_error_hva(addr))
1427                         return 1;
1428                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1429                         return 1;
1430                 vcpu->arch.hv_vapic = data;
1431                 break;
1432         }
1433         case HV_X64_MSR_EOI:
1434                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1435         case HV_X64_MSR_ICR:
1436                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1437         case HV_X64_MSR_TPR:
1438                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1439         default:
1440                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1441                           "data 0x%llx\n", msr, data);
1442                 return 1;
1443         }
1444
1445         return 0;
1446 }
1447
1448 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1449 {
1450         gpa_t gpa = data & ~0x3f;
1451
1452         /* Bits 2:5 are resrved, Should be zero */
1453         if (data & 0x3c)
1454                 return 1;
1455
1456         vcpu->arch.apf.msr_val = data;
1457
1458         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1459                 kvm_clear_async_pf_completion_queue(vcpu);
1460                 kvm_async_pf_hash_reset(vcpu);
1461                 return 0;
1462         }
1463
1464         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1465                 return 1;
1466
1467         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1468         kvm_async_pf_wakeup_all(vcpu);
1469         return 0;
1470 }
1471
1472 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1473 {
1474         if (vcpu->arch.time_page) {
1475                 kvm_release_page_dirty(vcpu->arch.time_page);
1476                 vcpu->arch.time_page = NULL;
1477         }
1478 }
1479
1480 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1481 {
1482         switch (msr) {
1483         case MSR_EFER:
1484                 return set_efer(vcpu, data);
1485         case MSR_K7_HWCR:
1486                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1487                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1488                 if (data != 0) {
1489                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1490                                 data);
1491                         return 1;
1492                 }
1493                 break;
1494         case MSR_FAM10H_MMIO_CONF_BASE:
1495                 if (data != 0) {
1496                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1497                                 "0x%llx\n", data);
1498                         return 1;
1499                 }
1500                 break;
1501         case MSR_AMD64_NB_CFG:
1502                 break;
1503         case MSR_IA32_DEBUGCTLMSR:
1504                 if (!data) {
1505                         /* We support the non-activated case already */
1506                         break;
1507                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1508                         /* Values other than LBR and BTF are vendor-specific,
1509                            thus reserved and should throw a #GP */
1510                         return 1;
1511                 }
1512                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1513                         __func__, data);
1514                 break;
1515         case MSR_IA32_UCODE_REV:
1516         case MSR_IA32_UCODE_WRITE:
1517         case MSR_VM_HSAVE_PA:
1518         case MSR_AMD64_PATCH_LOADER:
1519                 break;
1520         case 0x200 ... 0x2ff:
1521                 return set_msr_mtrr(vcpu, msr, data);
1522         case MSR_IA32_APICBASE:
1523                 kvm_set_apic_base(vcpu, data);
1524                 break;
1525         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1526                 return kvm_x2apic_msr_write(vcpu, msr, data);
1527         case MSR_IA32_MISC_ENABLE:
1528                 vcpu->arch.ia32_misc_enable_msr = data;
1529                 break;
1530         case MSR_KVM_WALL_CLOCK_NEW:
1531         case MSR_KVM_WALL_CLOCK:
1532                 vcpu->kvm->arch.wall_clock = data;
1533                 kvm_write_wall_clock(vcpu->kvm, data);
1534                 break;
1535         case MSR_KVM_SYSTEM_TIME_NEW:
1536         case MSR_KVM_SYSTEM_TIME: {
1537                 kvmclock_reset(vcpu);
1538
1539                 vcpu->arch.time = data;
1540                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1541
1542                 /* we verify if the enable bit is set... */
1543                 if (!(data & 1))
1544                         break;
1545
1546                 /* ...but clean it before doing the actual write */
1547                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1548
1549                 vcpu->arch.time_page =
1550                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1551
1552                 if (is_error_page(vcpu->arch.time_page)) {
1553                         kvm_release_page_clean(vcpu->arch.time_page);
1554                         vcpu->arch.time_page = NULL;
1555                 }
1556                 break;
1557         }
1558         case MSR_KVM_ASYNC_PF_EN:
1559                 if (kvm_pv_enable_async_pf(vcpu, data))
1560                         return 1;
1561                 break;
1562         case MSR_IA32_MCG_CTL:
1563         case MSR_IA32_MCG_STATUS:
1564         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1565                 return set_msr_mce(vcpu, msr, data);
1566
1567         /* Performance counters are not protected by a CPUID bit,
1568          * so we should check all of them in the generic path for the sake of
1569          * cross vendor migration.
1570          * Writing a zero into the event select MSRs disables them,
1571          * which we perfectly emulate ;-). Any other value should be at least
1572          * reported, some guests depend on them.
1573          */
1574         case MSR_P6_EVNTSEL0:
1575         case MSR_P6_EVNTSEL1:
1576         case MSR_K7_EVNTSEL0:
1577         case MSR_K7_EVNTSEL1:
1578         case MSR_K7_EVNTSEL2:
1579         case MSR_K7_EVNTSEL3:
1580                 if (data != 0)
1581                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1582                                 "0x%x data 0x%llx\n", msr, data);
1583                 break;
1584         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1585          * so we ignore writes to make it happy.
1586          */
1587         case MSR_P6_PERFCTR0:
1588         case MSR_P6_PERFCTR1:
1589         case MSR_K7_PERFCTR0:
1590         case MSR_K7_PERFCTR1:
1591         case MSR_K7_PERFCTR2:
1592         case MSR_K7_PERFCTR3:
1593                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1594                         "0x%x data 0x%llx\n", msr, data);
1595                 break;
1596         case MSR_K7_CLK_CTL:
1597                 /*
1598                  * Ignore all writes to this no longer documented MSR.
1599                  * Writes are only relevant for old K7 processors,
1600                  * all pre-dating SVM, but a recommended workaround from
1601                  * AMD for these chips. It is possible to speicify the
1602                  * affected processor models on the command line, hence
1603                  * the need to ignore the workaround.
1604                  */
1605                 break;
1606         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1607                 if (kvm_hv_msr_partition_wide(msr)) {
1608                         int r;
1609                         mutex_lock(&vcpu->kvm->lock);
1610                         r = set_msr_hyperv_pw(vcpu, msr, data);
1611                         mutex_unlock(&vcpu->kvm->lock);
1612                         return r;
1613                 } else
1614                         return set_msr_hyperv(vcpu, msr, data);
1615                 break;
1616         case MSR_IA32_BBL_CR_CTL3:
1617                 /* Drop writes to this legacy MSR -- see rdmsr
1618                  * counterpart for further detail.
1619                  */
1620                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1621                 break;
1622         default:
1623                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1624                         return xen_hvm_config(vcpu, data);
1625                 if (!ignore_msrs) {
1626                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1627                                 msr, data);
1628                         return 1;
1629                 } else {
1630                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1631                                 msr, data);
1632                         break;
1633                 }
1634         }
1635         return 0;
1636 }
1637 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1638
1639
1640 /*
1641  * Reads an msr value (of 'msr_index') into 'pdata'.
1642  * Returns 0 on success, non-0 otherwise.
1643  * Assumes vcpu_load() was already called.
1644  */
1645 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1646 {
1647         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1648 }
1649
1650 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1651 {
1652         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1653
1654         if (!msr_mtrr_valid(msr))
1655                 return 1;
1656
1657         if (msr == MSR_MTRRdefType)
1658                 *pdata = vcpu->arch.mtrr_state.def_type +
1659                          (vcpu->arch.mtrr_state.enabled << 10);
1660         else if (msr == MSR_MTRRfix64K_00000)
1661                 *pdata = p[0];
1662         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1663                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1664         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1665                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1666         else if (msr == MSR_IA32_CR_PAT)
1667                 *pdata = vcpu->arch.pat;
1668         else {  /* Variable MTRRs */
1669                 int idx, is_mtrr_mask;
1670                 u64 *pt;
1671
1672                 idx = (msr - 0x200) / 2;
1673                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1674                 if (!is_mtrr_mask)
1675                         pt =
1676                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1677                 else
1678                         pt =
1679                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1680                 *pdata = *pt;
1681         }
1682
1683         return 0;
1684 }
1685
1686 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1687 {
1688         u64 data;
1689         u64 mcg_cap = vcpu->arch.mcg_cap;
1690         unsigned bank_num = mcg_cap & 0xff;
1691
1692         switch (msr) {
1693         case MSR_IA32_P5_MC_ADDR:
1694         case MSR_IA32_P5_MC_TYPE:
1695                 data = 0;
1696                 break;
1697         case MSR_IA32_MCG_CAP:
1698                 data = vcpu->arch.mcg_cap;
1699                 break;
1700         case MSR_IA32_MCG_CTL:
1701                 if (!(mcg_cap & MCG_CTL_P))
1702                         return 1;
1703                 data = vcpu->arch.mcg_ctl;
1704                 break;
1705         case MSR_IA32_MCG_STATUS:
1706                 data = vcpu->arch.mcg_status;
1707                 break;
1708         default:
1709                 if (msr >= MSR_IA32_MC0_CTL &&
1710                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1711                         u32 offset = msr - MSR_IA32_MC0_CTL;
1712                         data = vcpu->arch.mce_banks[offset];
1713                         break;
1714                 }
1715                 return 1;
1716         }
1717         *pdata = data;
1718         return 0;
1719 }
1720
1721 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1722 {
1723         u64 data = 0;
1724         struct kvm *kvm = vcpu->kvm;
1725
1726         switch (msr) {
1727         case HV_X64_MSR_GUEST_OS_ID:
1728                 data = kvm->arch.hv_guest_os_id;
1729                 break;
1730         case HV_X64_MSR_HYPERCALL:
1731                 data = kvm->arch.hv_hypercall;
1732                 break;
1733         default:
1734                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1735                 return 1;
1736         }
1737
1738         *pdata = data;
1739         return 0;
1740 }
1741
1742 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1743 {
1744         u64 data = 0;
1745
1746         switch (msr) {
1747         case HV_X64_MSR_VP_INDEX: {
1748                 int r;
1749                 struct kvm_vcpu *v;
1750                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1751                         if (v == vcpu)
1752                                 data = r;
1753                 break;
1754         }
1755         case HV_X64_MSR_EOI:
1756                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1757         case HV_X64_MSR_ICR:
1758                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1759         case HV_X64_MSR_TPR:
1760                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1761         default:
1762                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1763                 return 1;
1764         }
1765         *pdata = data;
1766         return 0;
1767 }
1768
1769 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1770 {
1771         u64 data;
1772
1773         switch (msr) {
1774         case MSR_IA32_PLATFORM_ID:
1775         case MSR_IA32_UCODE_REV:
1776         case MSR_IA32_EBL_CR_POWERON:
1777         case MSR_IA32_DEBUGCTLMSR:
1778         case MSR_IA32_LASTBRANCHFROMIP:
1779         case MSR_IA32_LASTBRANCHTOIP:
1780         case MSR_IA32_LASTINTFROMIP:
1781         case MSR_IA32_LASTINTTOIP:
1782         case MSR_K8_SYSCFG:
1783         case MSR_K7_HWCR:
1784         case MSR_VM_HSAVE_PA:
1785         case MSR_P6_PERFCTR0:
1786         case MSR_P6_PERFCTR1:
1787         case MSR_P6_EVNTSEL0:
1788         case MSR_P6_EVNTSEL1:
1789         case MSR_K7_EVNTSEL0:
1790         case MSR_K7_PERFCTR0:
1791         case MSR_K8_INT_PENDING_MSG:
1792         case MSR_AMD64_NB_CFG:
1793         case MSR_FAM10H_MMIO_CONF_BASE:
1794                 data = 0;
1795                 break;
1796         case MSR_MTRRcap:
1797                 data = 0x500 | KVM_NR_VAR_MTRR;
1798                 break;
1799         case 0x200 ... 0x2ff:
1800                 return get_msr_mtrr(vcpu, msr, pdata);
1801         case 0xcd: /* fsb frequency */
1802                 data = 3;
1803                 break;
1804                 /*
1805                  * MSR_EBC_FREQUENCY_ID
1806                  * Conservative value valid for even the basic CPU models.
1807                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1808                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1809                  * and 266MHz for model 3, or 4. Set Core Clock
1810                  * Frequency to System Bus Frequency Ratio to 1 (bits
1811                  * 31:24) even though these are only valid for CPU
1812                  * models > 2, however guests may end up dividing or
1813                  * multiplying by zero otherwise.
1814                  */
1815         case MSR_EBC_FREQUENCY_ID:
1816                 data = 1 << 24;
1817                 break;
1818         case MSR_IA32_APICBASE:
1819                 data = kvm_get_apic_base(vcpu);
1820                 break;
1821         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1822                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1823                 break;
1824         case MSR_IA32_MISC_ENABLE:
1825                 data = vcpu->arch.ia32_misc_enable_msr;
1826                 break;
1827         case MSR_IA32_PERF_STATUS:
1828                 /* TSC increment by tick */
1829                 data = 1000ULL;
1830                 /* CPU multiplier */
1831                 data |= (((uint64_t)4ULL) << 40);
1832                 break;
1833         case MSR_EFER:
1834                 data = vcpu->arch.efer;
1835                 break;
1836         case MSR_KVM_WALL_CLOCK:
1837         case MSR_KVM_WALL_CLOCK_NEW:
1838                 data = vcpu->kvm->arch.wall_clock;
1839                 break;
1840         case MSR_KVM_SYSTEM_TIME:
1841         case MSR_KVM_SYSTEM_TIME_NEW:
1842                 data = vcpu->arch.time;
1843                 break;
1844         case MSR_KVM_ASYNC_PF_EN:
1845                 data = vcpu->arch.apf.msr_val;
1846                 break;
1847         case MSR_IA32_P5_MC_ADDR:
1848         case MSR_IA32_P5_MC_TYPE:
1849         case MSR_IA32_MCG_CAP:
1850         case MSR_IA32_MCG_CTL:
1851         case MSR_IA32_MCG_STATUS:
1852         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1853                 return get_msr_mce(vcpu, msr, pdata);
1854         case MSR_K7_CLK_CTL:
1855                 /*
1856                  * Provide expected ramp-up count for K7. All other
1857                  * are set to zero, indicating minimum divisors for
1858                  * every field.
1859                  *
1860                  * This prevents guest kernels on AMD host with CPU
1861                  * type 6, model 8 and higher from exploding due to
1862                  * the rdmsr failing.
1863                  */
1864                 data = 0x20000000;
1865                 break;
1866         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1867                 if (kvm_hv_msr_partition_wide(msr)) {
1868                         int r;
1869                         mutex_lock(&vcpu->kvm->lock);
1870                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1871                         mutex_unlock(&vcpu->kvm->lock);
1872                         return r;
1873                 } else
1874                         return get_msr_hyperv(vcpu, msr, pdata);
1875                 break;
1876         case MSR_IA32_BBL_CR_CTL3:
1877                 /* This legacy MSR exists but isn't fully documented in current
1878                  * silicon.  It is however accessed by winxp in very narrow
1879                  * scenarios where it sets bit #19, itself documented as
1880                  * a "reserved" bit.  Best effort attempt to source coherent
1881                  * read data here should the balance of the register be
1882                  * interpreted by the guest:
1883                  *
1884                  * L2 cache control register 3: 64GB range, 256KB size,
1885                  * enabled, latency 0x1, configured
1886                  */
1887                 data = 0xbe702111;
1888                 break;
1889         default:
1890                 if (!ignore_msrs) {
1891                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1892                         return 1;
1893                 } else {
1894                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1895                         data = 0;
1896                 }
1897                 break;
1898         }
1899         *pdata = data;
1900         return 0;
1901 }
1902 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1903
1904 /*
1905  * Read or write a bunch of msrs. All parameters are kernel addresses.
1906  *
1907  * @return number of msrs set successfully.
1908  */
1909 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1910                     struct kvm_msr_entry *entries,
1911                     int (*do_msr)(struct kvm_vcpu *vcpu,
1912                                   unsigned index, u64 *data))
1913 {
1914         int i, idx;
1915
1916         idx = srcu_read_lock(&vcpu->kvm->srcu);
1917         for (i = 0; i < msrs->nmsrs; ++i)
1918                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1919                         break;
1920         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1921
1922         return i;
1923 }
1924
1925 /*
1926  * Read or write a bunch of msrs. Parameters are user addresses.
1927  *
1928  * @return number of msrs set successfully.
1929  */
1930 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1931                   int (*do_msr)(struct kvm_vcpu *vcpu,
1932                                 unsigned index, u64 *data),
1933                   int writeback)
1934 {
1935         struct kvm_msrs msrs;
1936         struct kvm_msr_entry *entries;
1937         int r, n;
1938         unsigned size;
1939
1940         r = -EFAULT;
1941         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1942                 goto out;
1943
1944         r = -E2BIG;
1945         if (msrs.nmsrs >= MAX_IO_MSRS)
1946                 goto out;
1947
1948         r = -ENOMEM;
1949         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1950         entries = kmalloc(size, GFP_KERNEL);
1951         if (!entries)
1952                 goto out;
1953
1954         r = -EFAULT;
1955         if (copy_from_user(entries, user_msrs->entries, size))
1956                 goto out_free;
1957
1958         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1959         if (r < 0)
1960                 goto out_free;
1961
1962         r = -EFAULT;
1963         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1964                 goto out_free;
1965
1966         r = n;
1967
1968 out_free:
1969         kfree(entries);
1970 out:
1971         return r;
1972 }
1973
1974 int kvm_dev_ioctl_check_extension(long ext)
1975 {
1976         int r;
1977
1978         switch (ext) {
1979         case KVM_CAP_IRQCHIP:
1980         case KVM_CAP_HLT:
1981         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1982         case KVM_CAP_SET_TSS_ADDR:
1983         case KVM_CAP_EXT_CPUID:
1984         case KVM_CAP_CLOCKSOURCE:
1985         case KVM_CAP_PIT:
1986         case KVM_CAP_NOP_IO_DELAY:
1987         case KVM_CAP_MP_STATE:
1988         case KVM_CAP_SYNC_MMU:
1989         case KVM_CAP_USER_NMI:
1990         case KVM_CAP_REINJECT_CONTROL:
1991         case KVM_CAP_IRQ_INJECT_STATUS:
1992         case KVM_CAP_ASSIGN_DEV_IRQ:
1993         case KVM_CAP_IRQFD:
1994         case KVM_CAP_IOEVENTFD:
1995         case KVM_CAP_PIT2:
1996         case KVM_CAP_PIT_STATE2:
1997         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1998         case KVM_CAP_XEN_HVM:
1999         case KVM_CAP_ADJUST_CLOCK:
2000         case KVM_CAP_VCPU_EVENTS:
2001         case KVM_CAP_HYPERV:
2002         case KVM_CAP_HYPERV_VAPIC:
2003         case KVM_CAP_HYPERV_SPIN:
2004         case KVM_CAP_PCI_SEGMENT:
2005         case KVM_CAP_DEBUGREGS:
2006         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2007         case KVM_CAP_XSAVE:
2008         case KVM_CAP_ASYNC_PF:
2009         case KVM_CAP_GET_TSC_KHZ:
2010                 r = 1;
2011                 break;
2012         case KVM_CAP_COALESCED_MMIO:
2013                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2014                 break;
2015         case KVM_CAP_VAPIC:
2016                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2017                 break;
2018         case KVM_CAP_NR_VCPUS:
2019                 r = KVM_MAX_VCPUS;
2020                 break;
2021         case KVM_CAP_NR_MEMSLOTS:
2022                 r = KVM_MEMORY_SLOTS;
2023                 break;
2024         case KVM_CAP_PV_MMU:    /* obsolete */
2025                 r = 0;
2026                 break;
2027         case KVM_CAP_IOMMU:
2028                 r = iommu_found();
2029                 break;
2030         case KVM_CAP_MCE:
2031                 r = KVM_MAX_MCE_BANKS;
2032                 break;
2033         case KVM_CAP_XCRS:
2034                 r = cpu_has_xsave;
2035                 break;
2036         case KVM_CAP_TSC_CONTROL:
2037                 r = kvm_has_tsc_control;
2038                 break;
2039         default:
2040                 r = 0;
2041                 break;
2042         }
2043         return r;
2044
2045 }
2046
2047 long kvm_arch_dev_ioctl(struct file *filp,
2048                         unsigned int ioctl, unsigned long arg)
2049 {
2050         void __user *argp = (void __user *)arg;
2051         long r;
2052
2053         switch (ioctl) {
2054         case KVM_GET_MSR_INDEX_LIST: {
2055                 struct kvm_msr_list __user *user_msr_list = argp;
2056                 struct kvm_msr_list msr_list;
2057                 unsigned n;
2058
2059                 r = -EFAULT;
2060                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2061                         goto out;
2062                 n = msr_list.nmsrs;
2063                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2064                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2065                         goto out;
2066                 r = -E2BIG;
2067                 if (n < msr_list.nmsrs)
2068                         goto out;
2069                 r = -EFAULT;
2070                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2071                                  num_msrs_to_save * sizeof(u32)))
2072                         goto out;
2073                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2074                                  &emulated_msrs,
2075                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2076                         goto out;
2077                 r = 0;
2078                 break;
2079         }
2080         case KVM_GET_SUPPORTED_CPUID: {
2081                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2082                 struct kvm_cpuid2 cpuid;
2083
2084                 r = -EFAULT;
2085                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2086                         goto out;
2087                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2088                                                       cpuid_arg->entries);
2089                 if (r)
2090                         goto out;
2091
2092                 r = -EFAULT;
2093                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2094                         goto out;
2095                 r = 0;
2096                 break;
2097         }
2098         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2099                 u64 mce_cap;
2100
2101                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2102                 r = -EFAULT;
2103                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2104                         goto out;
2105                 r = 0;
2106                 break;
2107         }
2108         default:
2109                 r = -EINVAL;
2110         }
2111 out:
2112         return r;
2113 }
2114
2115 static void wbinvd_ipi(void *garbage)
2116 {
2117         wbinvd();
2118 }
2119
2120 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2121 {
2122         return vcpu->kvm->arch.iommu_domain &&
2123                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2124 }
2125
2126 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2127 {
2128         /* Address WBINVD may be executed by guest */
2129         if (need_emulate_wbinvd(vcpu)) {
2130                 if (kvm_x86_ops->has_wbinvd_exit())
2131                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2132                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2133                         smp_call_function_single(vcpu->cpu,
2134                                         wbinvd_ipi, NULL, 1);
2135         }
2136
2137         kvm_x86_ops->vcpu_load(vcpu, cpu);
2138         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2139                 /* Make sure TSC doesn't go backwards */
2140                 s64 tsc_delta;
2141                 u64 tsc;
2142
2143                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2144                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2145                              tsc - vcpu->arch.last_guest_tsc;
2146
2147                 if (tsc_delta < 0)
2148                         mark_tsc_unstable("KVM discovered backwards TSC");
2149                 if (check_tsc_unstable()) {
2150                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2151                         vcpu->arch.tsc_catchup = 1;
2152                 }
2153                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2154                 if (vcpu->cpu != cpu)
2155                         kvm_migrate_timers(vcpu);
2156                 vcpu->cpu = cpu;
2157         }
2158 }
2159
2160 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2161 {
2162         kvm_x86_ops->vcpu_put(vcpu);
2163         kvm_put_guest_fpu(vcpu);
2164         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2165 }
2166
2167 static int is_efer_nx(void)
2168 {
2169         unsigned long long efer = 0;
2170
2171         rdmsrl_safe(MSR_EFER, &efer);
2172         return efer & EFER_NX;
2173 }
2174
2175 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2176 {
2177         int i;
2178         struct kvm_cpuid_entry2 *e, *entry;
2179
2180         entry = NULL;
2181         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2182                 e = &vcpu->arch.cpuid_entries[i];
2183                 if (e->function == 0x80000001) {
2184                         entry = e;
2185                         break;
2186                 }
2187         }
2188         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2189                 entry->edx &= ~(1 << 20);
2190                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2191         }
2192 }
2193
2194 /* when an old userspace process fills a new kernel module */
2195 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2196                                     struct kvm_cpuid *cpuid,
2197                                     struct kvm_cpuid_entry __user *entries)
2198 {
2199         int r, i;
2200         struct kvm_cpuid_entry *cpuid_entries;
2201
2202         r = -E2BIG;
2203         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2204                 goto out;
2205         r = -ENOMEM;
2206         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2207         if (!cpuid_entries)
2208                 goto out;
2209         r = -EFAULT;
2210         if (copy_from_user(cpuid_entries, entries,
2211                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2212                 goto out_free;
2213         for (i = 0; i < cpuid->nent; i++) {
2214                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2215                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2216                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2217                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2218                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2219                 vcpu->arch.cpuid_entries[i].index = 0;
2220                 vcpu->arch.cpuid_entries[i].flags = 0;
2221                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2222                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2223                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2224         }
2225         vcpu->arch.cpuid_nent = cpuid->nent;
2226         cpuid_fix_nx_cap(vcpu);
2227         r = 0;
2228         kvm_apic_set_version(vcpu);
2229         kvm_x86_ops->cpuid_update(vcpu);
2230         update_cpuid(vcpu);
2231
2232 out_free:
2233         vfree(cpuid_entries);
2234 out:
2235         return r;
2236 }
2237
2238 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2239                                      struct kvm_cpuid2 *cpuid,
2240                                      struct kvm_cpuid_entry2 __user *entries)
2241 {
2242         int r;
2243
2244         r = -E2BIG;
2245         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2246                 goto out;
2247         r = -EFAULT;
2248         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2249                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2250                 goto out;
2251         vcpu->arch.cpuid_nent = cpuid->nent;
2252         kvm_apic_set_version(vcpu);
2253         kvm_x86_ops->cpuid_update(vcpu);
2254         update_cpuid(vcpu);
2255         return 0;
2256
2257 out:
2258         return r;
2259 }
2260
2261 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2262                                      struct kvm_cpuid2 *cpuid,
2263                                      struct kvm_cpuid_entry2 __user *entries)
2264 {
2265         int r;
2266
2267         r = -E2BIG;
2268         if (cpuid->nent < vcpu->arch.cpuid_nent)
2269                 goto out;
2270         r = -EFAULT;
2271         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2272                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2273                 goto out;
2274         return 0;
2275
2276 out:
2277         cpuid->nent = vcpu->arch.cpuid_nent;
2278         return r;
2279 }
2280
2281 static void cpuid_mask(u32 *word, int wordnum)
2282 {
2283         *word &= boot_cpu_data.x86_capability[wordnum];
2284 }
2285
2286 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2287                            u32 index)
2288 {
2289         entry->function = function;
2290         entry->index = index;
2291         cpuid_count(entry->function, entry->index,
2292                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2293         entry->flags = 0;
2294 }
2295
2296 static bool supported_xcr0_bit(unsigned bit)
2297 {
2298         u64 mask = ((u64)1 << bit);
2299
2300         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2301 }
2302
2303 #define F(x) bit(X86_FEATURE_##x)
2304
2305 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2306                          u32 index, int *nent, int maxnent)
2307 {
2308         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2309 #ifdef CONFIG_X86_64
2310         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2311                                 ? F(GBPAGES) : 0;
2312         unsigned f_lm = F(LM);
2313 #else
2314         unsigned f_gbpages = 0;
2315         unsigned f_lm = 0;
2316 #endif
2317         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2318
2319         /* cpuid 1.edx */
2320         const u32 kvm_supported_word0_x86_features =
2321                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2322                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2323                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2324                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2325                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2326                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2327                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2328                 0 /* HTT, TM, Reserved, PBE */;
2329         /* cpuid 0x80000001.edx */
2330         const u32 kvm_supported_word1_x86_features =
2331                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2332                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2333                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2334                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2335                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2336                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2337                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2338                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2339         /* cpuid 1.ecx */
2340         const u32 kvm_supported_word4_x86_features =
2341                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2342                 0 /* DS-CPL, VMX, SMX, EST */ |
2343                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2344                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2345                 0 /* Reserved, DCA */ | F(XMM4_1) |
2346                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2347                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2348                 F(F16C) | F(RDRAND);
2349         /* cpuid 0x80000001.ecx */
2350         const u32 kvm_supported_word6_x86_features =
2351                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2352                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2353                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2354                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2355
2356         /* cpuid 0xC0000001.edx */
2357         const u32 kvm_supported_word5_x86_features =
2358                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2359                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2360                 F(PMM) | F(PMM_EN);
2361
2362         /* cpuid 7.0.ebx */
2363         const u32 kvm_supported_word9_x86_features =
2364                 F(SMEP);
2365
2366         /* all calls to cpuid_count() should be made on the same cpu */
2367         get_cpu();
2368         do_cpuid_1_ent(entry, function, index);
2369         ++*nent;
2370
2371         switch (function) {
2372         case 0:
2373                 entry->eax = min(entry->eax, (u32)0xd);
2374                 break;
2375         case 1:
2376                 entry->edx &= kvm_supported_word0_x86_features;
2377                 cpuid_mask(&entry->edx, 0);
2378                 entry->ecx &= kvm_supported_word4_x86_features;
2379                 cpuid_mask(&entry->ecx, 4);
2380                 /* we support x2apic emulation even if host does not support
2381                  * it since we emulate x2apic in software */
2382                 entry->ecx |= F(X2APIC);
2383                 break;
2384         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2385          * may return different values. This forces us to get_cpu() before
2386          * issuing the first command, and also to emulate this annoying behavior
2387          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2388         case 2: {
2389                 int t, times = entry->eax & 0xff;
2390
2391                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2392                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2393                 for (t = 1; t < times && *nent < maxnent; ++t) {
2394                         do_cpuid_1_ent(&entry[t], function, 0);
2395                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2396                         ++*nent;
2397                 }
2398                 break;
2399         }
2400         /* function 4 has additional index. */
2401         case 4: {
2402                 int i, cache_type;
2403
2404                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2405                 /* read more entries until cache_type is zero */
2406                 for (i = 1; *nent < maxnent; ++i) {
2407                         cache_type = entry[i - 1].eax & 0x1f;
2408                         if (!cache_type)
2409                                 break;
2410                         do_cpuid_1_ent(&entry[i], function, i);
2411                         entry[i].flags |=
2412                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2413                         ++*nent;
2414                 }
2415                 break;
2416         }
2417         case 7: {
2418                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2419                 /* Mask ebx against host capbability word 9 */
2420                 if (index == 0) {
2421                         entry->ebx &= kvm_supported_word9_x86_features;
2422                         cpuid_mask(&entry->ebx, 9);
2423                 } else
2424                         entry->ebx = 0;
2425                 entry->eax = 0;
2426                 entry->ecx = 0;
2427                 entry->edx = 0;
2428                 break;
2429         }
2430         case 9:
2431                 break;
2432         /* function 0xb has additional index. */
2433         case 0xb: {
2434                 int i, level_type;
2435
2436                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2437                 /* read more entries until level_type is zero */
2438                 for (i = 1; *nent < maxnent; ++i) {
2439                         level_type = entry[i - 1].ecx & 0xff00;
2440                         if (!level_type)
2441                                 break;
2442                         do_cpuid_1_ent(&entry[i], function, i);
2443                         entry[i].flags |=
2444                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2445                         ++*nent;
2446                 }
2447                 break;
2448         }
2449         case 0xd: {
2450                 int idx, i;
2451
2452                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2453                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2454                         do_cpuid_1_ent(&entry[i], function, idx);
2455                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2456                                 continue;
2457                         entry[i].flags |=
2458                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2459                         ++*nent;
2460                         ++i;
2461                 }
2462                 break;
2463         }
2464         case KVM_CPUID_SIGNATURE: {
2465                 char signature[12] = "KVMKVMKVM\0\0";
2466                 u32 *sigptr = (u32 *)signature;
2467                 entry->eax = 0;
2468                 entry->ebx = sigptr[0];
2469                 entry->ecx = sigptr[1];
2470                 entry->edx = sigptr[2];
2471                 break;
2472         }
2473         case KVM_CPUID_FEATURES:
2474                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2475                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2476                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2477                              (1 << KVM_FEATURE_ASYNC_PF) |
2478                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2479                 entry->ebx = 0;
2480                 entry->ecx = 0;
2481                 entry->edx = 0;
2482                 break;
2483         case 0x80000000:
2484                 entry->eax = min(entry->eax, 0x8000001a);
2485                 break;
2486         case 0x80000001:
2487                 entry->edx &= kvm_supported_word1_x86_features;
2488                 cpuid_mask(&entry->edx, 1);
2489                 entry->ecx &= kvm_supported_word6_x86_features;
2490                 cpuid_mask(&entry->ecx, 6);
2491                 break;
2492         case 0x80000008: {
2493                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2494                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2495                 unsigned phys_as = entry->eax & 0xff;
2496
2497                 if (!g_phys_as)
2498                         g_phys_as = phys_as;
2499                 entry->eax = g_phys_as | (virt_as << 8);
2500                 entry->ebx = entry->edx = 0;
2501                 break;
2502         }
2503         case 0x80000019:
2504                 entry->ecx = entry->edx = 0;
2505                 break;
2506         case 0x8000001a:
2507                 break;
2508         case 0x8000001d:
2509                 break;
2510         /*Add support for Centaur's CPUID instruction*/
2511         case 0xC0000000:
2512                 /*Just support up to 0xC0000004 now*/
2513                 entry->eax = min(entry->eax, 0xC0000004);
2514                 break;
2515         case 0xC0000001:
2516                 entry->edx &= kvm_supported_word5_x86_features;
2517                 cpuid_mask(&entry->edx, 5);
2518                 break;
2519         case 3: /* Processor serial number */
2520         case 5: /* MONITOR/MWAIT */
2521         case 6: /* Thermal management */
2522         case 0xA: /* Architectural Performance Monitoring */
2523         case 0x80000007: /* Advanced power management */
2524         case 0xC0000002:
2525         case 0xC0000003:
2526         case 0xC0000004:
2527         default:
2528                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2529                 break;
2530         }
2531
2532         kvm_x86_ops->set_supported_cpuid(function, entry);
2533
2534         put_cpu();
2535 }
2536
2537 #undef F
2538
2539 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2540                                      struct kvm_cpuid_entry2 __user *entries)
2541 {
2542         struct kvm_cpuid_entry2 *cpuid_entries;
2543         int limit, nent = 0, r = -E2BIG;
2544         u32 func;
2545
2546         if (cpuid->nent < 1)
2547                 goto out;
2548         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2549                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2550         r = -ENOMEM;
2551         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2552         if (!cpuid_entries)
2553                 goto out;
2554
2555         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2556         limit = cpuid_entries[0].eax;
2557         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2558                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2559                              &nent, cpuid->nent);
2560         r = -E2BIG;
2561         if (nent >= cpuid->nent)
2562                 goto out_free;
2563
2564         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2565         limit = cpuid_entries[nent - 1].eax;
2566         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2567                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2568                              &nent, cpuid->nent);
2569
2570
2571
2572         r = -E2BIG;
2573         if (nent >= cpuid->nent)
2574                 goto out_free;
2575
2576         /* Add support for Centaur's CPUID instruction. */
2577         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2578                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2579                                 &nent, cpuid->nent);
2580
2581                 r = -E2BIG;
2582                 if (nent >= cpuid->nent)
2583                         goto out_free;
2584
2585                 limit = cpuid_entries[nent - 1].eax;
2586                 for (func = 0xC0000001;
2587                         func <= limit && nent < cpuid->nent; ++func)
2588                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2589                                         &nent, cpuid->nent);
2590
2591                 r = -E2BIG;
2592                 if (nent >= cpuid->nent)
2593                         goto out_free;
2594         }
2595
2596         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2597                      cpuid->nent);
2598
2599         r = -E2BIG;
2600         if (nent >= cpuid->nent)
2601                 goto out_free;
2602
2603         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2604                      cpuid->nent);
2605
2606         r = -E2BIG;
2607         if (nent >= cpuid->nent)
2608                 goto out_free;
2609
2610         r = -EFAULT;
2611         if (copy_to_user(entries, cpuid_entries,
2612                          nent * sizeof(struct kvm_cpuid_entry2)))
2613                 goto out_free;
2614         cpuid->nent = nent;
2615         r = 0;
2616
2617 out_free:
2618         vfree(cpuid_entries);
2619 out:
2620         return r;
2621 }
2622
2623 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2624                                     struct kvm_lapic_state *s)
2625 {
2626         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2627
2628         return 0;
2629 }
2630
2631 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2632                                     struct kvm_lapic_state *s)
2633 {
2634         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2635         kvm_apic_post_state_restore(vcpu);
2636         update_cr8_intercept(vcpu);
2637
2638         return 0;
2639 }
2640
2641 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2642                                     struct kvm_interrupt *irq)
2643 {
2644         if (irq->irq < 0 || irq->irq >= 256)
2645                 return -EINVAL;
2646         if (irqchip_in_kernel(vcpu->kvm))
2647                 return -ENXIO;
2648
2649         kvm_queue_interrupt(vcpu, irq->irq, false);
2650         kvm_make_request(KVM_REQ_EVENT, vcpu);
2651
2652         return 0;
2653 }
2654
2655 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2656 {
2657         kvm_inject_nmi(vcpu);
2658
2659         return 0;
2660 }
2661
2662 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2663                                            struct kvm_tpr_access_ctl *tac)
2664 {
2665         if (tac->flags)
2666                 return -EINVAL;
2667         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2668         return 0;
2669 }
2670
2671 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2672                                         u64 mcg_cap)
2673 {
2674         int r;
2675         unsigned bank_num = mcg_cap & 0xff, bank;
2676
2677         r = -EINVAL;
2678         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2679                 goto out;
2680         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2681                 goto out;
2682         r = 0;
2683         vcpu->arch.mcg_cap = mcg_cap;
2684         /* Init IA32_MCG_CTL to all 1s */
2685         if (mcg_cap & MCG_CTL_P)
2686                 vcpu->arch.mcg_ctl = ~(u64)0;
2687         /* Init IA32_MCi_CTL to all 1s */
2688         for (bank = 0; bank < bank_num; bank++)
2689                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2690 out:
2691         return r;
2692 }
2693
2694 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2695                                       struct kvm_x86_mce *mce)
2696 {
2697         u64 mcg_cap = vcpu->arch.mcg_cap;
2698         unsigned bank_num = mcg_cap & 0xff;
2699         u64 *banks = vcpu->arch.mce_banks;
2700
2701         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2702                 return -EINVAL;
2703         /*
2704          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2705          * reporting is disabled
2706          */
2707         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2708             vcpu->arch.mcg_ctl != ~(u64)0)
2709                 return 0;
2710         banks += 4 * mce->bank;
2711         /*
2712          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2713          * reporting is disabled for the bank
2714          */
2715         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2716                 return 0;
2717         if (mce->status & MCI_STATUS_UC) {
2718                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2719                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2720                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2721                         return 0;
2722                 }
2723                 if (banks[1] & MCI_STATUS_VAL)
2724                         mce->status |= MCI_STATUS_OVER;
2725                 banks[2] = mce->addr;
2726                 banks[3] = mce->misc;
2727                 vcpu->arch.mcg_status = mce->mcg_status;
2728                 banks[1] = mce->status;
2729                 kvm_queue_exception(vcpu, MC_VECTOR);
2730         } else if (!(banks[1] & MCI_STATUS_VAL)
2731                    || !(banks[1] & MCI_STATUS_UC)) {
2732                 if (banks[1] & MCI_STATUS_VAL)
2733                         mce->status |= MCI_STATUS_OVER;
2734                 banks[2] = mce->addr;
2735                 banks[3] = mce->misc;
2736                 banks[1] = mce->status;
2737         } else
2738                 banks[1] |= MCI_STATUS_OVER;
2739         return 0;
2740 }
2741
2742 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2743                                                struct kvm_vcpu_events *events)
2744 {
2745         events->exception.injected =
2746                 vcpu->arch.exception.pending &&
2747                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2748         events->exception.nr = vcpu->arch.exception.nr;
2749         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2750         events->exception.pad = 0;
2751         events->exception.error_code = vcpu->arch.exception.error_code;
2752
2753         events->interrupt.injected =
2754                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2755         events->interrupt.nr = vcpu->arch.interrupt.nr;
2756         events->interrupt.soft = 0;
2757         events->interrupt.shadow =
2758                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2759                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2760
2761         events->nmi.injected = vcpu->arch.nmi_injected;
2762         events->nmi.pending = vcpu->arch.nmi_pending;
2763         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2764         events->nmi.pad = 0;
2765
2766         events->sipi_vector = vcpu->arch.sipi_vector;
2767
2768         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2769                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2770                          | KVM_VCPUEVENT_VALID_SHADOW);
2771         memset(&events->reserved, 0, sizeof(events->reserved));
2772 }
2773
2774 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2775                                               struct kvm_vcpu_events *events)
2776 {
2777         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2778                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2779                               | KVM_VCPUEVENT_VALID_SHADOW))
2780                 return -EINVAL;
2781
2782         vcpu->arch.exception.pending = events->exception.injected;
2783         vcpu->arch.exception.nr = events->exception.nr;
2784         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2785         vcpu->arch.exception.error_code = events->exception.error_code;
2786
2787         vcpu->arch.interrupt.pending = events->interrupt.injected;
2788         vcpu->arch.interrupt.nr = events->interrupt.nr;
2789         vcpu->arch.interrupt.soft = events->interrupt.soft;
2790         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2791                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2792                                                   events->interrupt.shadow);
2793
2794         vcpu->arch.nmi_injected = events->nmi.injected;
2795         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2796                 vcpu->arch.nmi_pending = events->nmi.pending;
2797         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2798
2799         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2800                 vcpu->arch.sipi_vector = events->sipi_vector;
2801
2802         kvm_make_request(KVM_REQ_EVENT, vcpu);
2803
2804         return 0;
2805 }
2806
2807 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2808                                              struct kvm_debugregs *dbgregs)
2809 {
2810         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2811         dbgregs->dr6 = vcpu->arch.dr6;
2812         dbgregs->dr7 = vcpu->arch.dr7;
2813         dbgregs->flags = 0;
2814         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2815 }
2816
2817 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2818                                             struct kvm_debugregs *dbgregs)
2819 {
2820         if (dbgregs->flags)
2821                 return -EINVAL;
2822
2823         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2824         vcpu->arch.dr6 = dbgregs->dr6;
2825         vcpu->arch.dr7 = dbgregs->dr7;
2826
2827         return 0;
2828 }
2829
2830 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2831                                          struct kvm_xsave *guest_xsave)
2832 {
2833         if (cpu_has_xsave)
2834                 memcpy(guest_xsave->region,
2835                         &vcpu->arch.guest_fpu.state->xsave,
2836                         xstate_size);
2837         else {
2838                 memcpy(guest_xsave->region,
2839                         &vcpu->arch.guest_fpu.state->fxsave,
2840                         sizeof(struct i387_fxsave_struct));
2841                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2842                         XSTATE_FPSSE;
2843         }
2844 }
2845
2846 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2847                                         struct kvm_xsave *guest_xsave)
2848 {
2849         u64 xstate_bv =
2850                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2851
2852         if (cpu_has_xsave)
2853                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2854                         guest_xsave->region, xstate_size);
2855         else {
2856                 if (xstate_bv & ~XSTATE_FPSSE)
2857                         return -EINVAL;
2858                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2859                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2860         }
2861         return 0;
2862 }
2863
2864 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2865                                         struct kvm_xcrs *guest_xcrs)
2866 {
2867         if (!cpu_has_xsave) {
2868                 guest_xcrs->nr_xcrs = 0;
2869                 return;
2870         }
2871
2872         guest_xcrs->nr_xcrs = 1;
2873         guest_xcrs->flags = 0;
2874         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2875         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2876 }
2877
2878 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2879                                        struct kvm_xcrs *guest_xcrs)
2880 {
2881         int i, r = 0;
2882
2883         if (!cpu_has_xsave)
2884                 return -EINVAL;
2885
2886         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2887                 return -EINVAL;
2888
2889         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2890                 /* Only support XCR0 currently */
2891                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2892                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2893                                 guest_xcrs->xcrs[0].value);
2894                         break;
2895                 }
2896         if (r)
2897                 r = -EINVAL;
2898         return r;
2899 }
2900
2901 long kvm_arch_vcpu_ioctl(struct file *filp,
2902                          unsigned int ioctl, unsigned long arg)
2903 {
2904         struct kvm_vcpu *vcpu = filp->private_data;
2905         void __user *argp = (void __user *)arg;
2906         int r;
2907         union {
2908                 struct kvm_lapic_state *lapic;
2909                 struct kvm_xsave *xsave;
2910                 struct kvm_xcrs *xcrs;
2911                 void *buffer;
2912         } u;
2913
2914         u.buffer = NULL;
2915         switch (ioctl) {
2916         case KVM_GET_LAPIC: {
2917                 r = -EINVAL;
2918                 if (!vcpu->arch.apic)
2919                         goto out;
2920                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2921
2922                 r = -ENOMEM;
2923                 if (!u.lapic)
2924                         goto out;
2925                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2926                 if (r)
2927                         goto out;
2928                 r = -EFAULT;
2929                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2930                         goto out;
2931                 r = 0;
2932                 break;
2933         }
2934         case KVM_SET_LAPIC: {
2935                 r = -EINVAL;
2936                 if (!vcpu->arch.apic)
2937                         goto out;
2938                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2939                 r = -ENOMEM;
2940                 if (!u.lapic)
2941                         goto out;
2942                 r = -EFAULT;
2943                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2944                         goto out;
2945                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2946                 if (r)
2947                         goto out;
2948                 r = 0;
2949                 break;
2950         }
2951         case KVM_INTERRUPT: {
2952                 struct kvm_interrupt irq;
2953
2954                 r = -EFAULT;
2955                 if (copy_from_user(&irq, argp, sizeof irq))
2956                         goto out;
2957                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2958                 if (r)
2959                         goto out;
2960                 r = 0;
2961                 break;
2962         }
2963         case KVM_NMI: {
2964                 r = kvm_vcpu_ioctl_nmi(vcpu);
2965                 if (r)
2966                         goto out;
2967                 r = 0;
2968                 break;
2969         }
2970         case KVM_SET_CPUID: {
2971                 struct kvm_cpuid __user *cpuid_arg = argp;
2972                 struct kvm_cpuid cpuid;
2973
2974                 r = -EFAULT;
2975                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2976                         goto out;
2977                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2978                 if (r)
2979                         goto out;
2980                 break;
2981         }
2982         case KVM_SET_CPUID2: {
2983                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2984                 struct kvm_cpuid2 cpuid;
2985
2986                 r = -EFAULT;
2987                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2988                         goto out;
2989                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2990                                               cpuid_arg->entries);
2991                 if (r)
2992                         goto out;
2993                 break;
2994         }
2995         case KVM_GET_CPUID2: {
2996                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2997                 struct kvm_cpuid2 cpuid;
2998
2999                 r = -EFAULT;
3000                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3001                         goto out;
3002                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3003                                               cpuid_arg->entries);
3004                 if (r)
3005                         goto out;
3006                 r = -EFAULT;
3007                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3008                         goto out;
3009                 r = 0;
3010                 break;
3011         }
3012         case KVM_GET_MSRS:
3013                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3014                 break;
3015         case KVM_SET_MSRS:
3016                 r = msr_io(vcpu, argp, do_set_msr, 0);
3017                 break;
3018         case KVM_TPR_ACCESS_REPORTING: {
3019                 struct kvm_tpr_access_ctl tac;
3020
3021                 r = -EFAULT;
3022                 if (copy_from_user(&tac, argp, sizeof tac))
3023                         goto out;
3024                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3025                 if (r)
3026                         goto out;
3027                 r = -EFAULT;
3028                 if (copy_to_user(argp, &tac, sizeof tac))
3029                         goto out;
3030                 r = 0;
3031                 break;
3032         };
3033         case KVM_SET_VAPIC_ADDR: {
3034                 struct kvm_vapic_addr va;
3035
3036                 r = -EINVAL;
3037                 if (!irqchip_in_kernel(vcpu->kvm))
3038                         goto out;
3039                 r = -EFAULT;
3040                 if (copy_from_user(&va, argp, sizeof va))
3041                         goto out;
3042                 r = 0;
3043                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3044                 break;
3045         }
3046         case KVM_X86_SETUP_MCE: {
3047                 u64 mcg_cap;
3048
3049                 r = -EFAULT;
3050                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3051                         goto out;
3052                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3053                 break;
3054         }
3055         case KVM_X86_SET_MCE: {
3056                 struct kvm_x86_mce mce;
3057
3058                 r = -EFAULT;
3059                 if (copy_from_user(&mce, argp, sizeof mce))
3060                         goto out;
3061                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3062                 break;
3063         }
3064         case KVM_GET_VCPU_EVENTS: {
3065                 struct kvm_vcpu_events events;
3066
3067                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3068
3069                 r = -EFAULT;
3070                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3071                         break;
3072                 r = 0;
3073                 break;
3074         }
3075         case KVM_SET_VCPU_EVENTS: {
3076                 struct kvm_vcpu_events events;
3077
3078                 r = -EFAULT;
3079                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3080                         break;
3081
3082                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3083                 break;
3084         }
3085         case KVM_GET_DEBUGREGS: {
3086                 struct kvm_debugregs dbgregs;
3087
3088                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3089
3090                 r = -EFAULT;
3091                 if (copy_to_user(argp, &dbgregs,
3092                                  sizeof(struct kvm_debugregs)))
3093                         break;
3094                 r = 0;
3095                 break;
3096         }
3097         case KVM_SET_DEBUGREGS: {
3098                 struct kvm_debugregs dbgregs;
3099
3100                 r = -EFAULT;
3101                 if (copy_from_user(&dbgregs, argp,
3102                                    sizeof(struct kvm_debugregs)))
3103                         break;
3104
3105                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3106                 break;
3107         }
3108         case KVM_GET_XSAVE: {
3109                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3110                 r = -ENOMEM;
3111                 if (!u.xsave)
3112                         break;
3113
3114                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3115
3116                 r = -EFAULT;
3117                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3118                         break;
3119                 r = 0;
3120                 break;
3121         }
3122         case KVM_SET_XSAVE: {
3123                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3124                 r = -ENOMEM;
3125                 if (!u.xsave)
3126                         break;
3127
3128                 r = -EFAULT;
3129                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3130                         break;
3131
3132                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3133                 break;
3134         }
3135         case KVM_GET_XCRS: {
3136                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3137                 r = -ENOMEM;
3138                 if (!u.xcrs)
3139                         break;
3140
3141                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3142
3143                 r = -EFAULT;
3144                 if (copy_to_user(argp, u.xcrs,
3145                                  sizeof(struct kvm_xcrs)))
3146                         break;
3147                 r = 0;
3148                 break;
3149         }
3150         case KVM_SET_XCRS: {
3151                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3152                 r = -ENOMEM;
3153                 if (!u.xcrs)
3154                         break;
3155
3156                 r = -EFAULT;
3157                 if (copy_from_user(u.xcrs, argp,
3158                                    sizeof(struct kvm_xcrs)))
3159                         break;
3160
3161                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3162                 break;
3163         }
3164         case KVM_SET_TSC_KHZ: {
3165                 u32 user_tsc_khz;
3166
3167                 r = -EINVAL;
3168                 if (!kvm_has_tsc_control)
3169                         break;
3170
3171                 user_tsc_khz = (u32)arg;
3172
3173                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3174                         goto out;
3175
3176                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3177
3178                 r = 0;
3179                 goto out;
3180         }
3181         case KVM_GET_TSC_KHZ: {
3182                 r = -EIO;
3183                 if (check_tsc_unstable())
3184                         goto out;
3185
3186                 r = vcpu_tsc_khz(vcpu);
3187
3188                 goto out;
3189         }
3190         default:
3191                 r = -EINVAL;
3192         }
3193 out:
3194         kfree(u.buffer);
3195         return r;
3196 }
3197
3198 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3199 {
3200         int ret;
3201
3202         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3203                 return -1;
3204         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3205         return ret;
3206 }
3207
3208 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3209                                               u64 ident_addr)
3210 {
3211         kvm->arch.ept_identity_map_addr = ident_addr;
3212         return 0;
3213 }
3214
3215 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3216                                           u32 kvm_nr_mmu_pages)
3217 {
3218         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3219                 return -EINVAL;
3220
3221         mutex_lock(&kvm->slots_lock);
3222         spin_lock(&kvm->mmu_lock);
3223
3224         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3225         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3226
3227         spin_unlock(&kvm->mmu_lock);
3228         mutex_unlock(&kvm->slots_lock);
3229         return 0;
3230 }
3231
3232 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3233 {
3234         return kvm->arch.n_max_mmu_pages;
3235 }
3236
3237 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3238 {
3239         int r;
3240
3241         r = 0;
3242         switch (chip->chip_id) {
3243         case KVM_IRQCHIP_PIC_MASTER:
3244                 memcpy(&chip->chip.pic,
3245                         &pic_irqchip(kvm)->pics[0],
3246                         sizeof(struct kvm_pic_state));
3247                 break;
3248         case KVM_IRQCHIP_PIC_SLAVE:
3249                 memcpy(&chip->chip.pic,
3250                         &pic_irqchip(kvm)->pics[1],
3251                         sizeof(struct kvm_pic_state));
3252                 break;
3253         case KVM_IRQCHIP_IOAPIC:
3254                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3255                 break;
3256         default:
3257                 r = -EINVAL;
3258                 break;
3259         }
3260         return r;
3261 }
3262
3263 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3264 {
3265         int r;
3266
3267         r = 0;
3268         switch (chip->chip_id) {
3269         case KVM_IRQCHIP_PIC_MASTER:
3270                 spin_lock(&pic_irqchip(kvm)->lock);
3271                 memcpy(&pic_irqchip(kvm)->pics[0],
3272                         &chip->chip.pic,
3273                         sizeof(struct kvm_pic_state));
3274                 spin_unlock(&pic_irqchip(kvm)->lock);
3275                 break;
3276         case KVM_IRQCHIP_PIC_SLAVE:
3277                 spin_lock(&pic_irqchip(kvm)->lock);
3278                 memcpy(&pic_irqchip(kvm)->pics[1],
3279                         &chip->chip.pic,
3280                         sizeof(struct kvm_pic_state));
3281                 spin_unlock(&pic_irqchip(kvm)->lock);
3282                 break;
3283         case KVM_IRQCHIP_IOAPIC:
3284                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3285                 break;
3286         default:
3287                 r = -EINVAL;
3288                 break;
3289         }
3290         kvm_pic_update_irq(pic_irqchip(kvm));
3291         return r;
3292 }
3293
3294 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3295 {
3296         int r = 0;
3297
3298         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3299         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3300         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3301         return r;
3302 }
3303
3304 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3305 {
3306         int r = 0;
3307
3308         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3309         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3310         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3311         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3312         return r;
3313 }
3314
3315 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3316 {
3317         int r = 0;
3318
3319         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3320         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3321                 sizeof(ps->channels));
3322         ps->flags = kvm->arch.vpit->pit_state.flags;
3323         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3324         memset(&ps->reserved, 0, sizeof(ps->reserved));
3325         return r;
3326 }
3327
3328 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3329 {
3330         int r = 0, start = 0;
3331         u32 prev_legacy, cur_legacy;
3332         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3333         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3334         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3335         if (!prev_legacy && cur_legacy)
3336                 start = 1;
3337         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3338                sizeof(kvm->arch.vpit->pit_state.channels));
3339         kvm->arch.vpit->pit_state.flags = ps->flags;
3340         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3341         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3342         return r;
3343 }
3344
3345 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3346                                  struct kvm_reinject_control *control)
3347 {
3348         if (!kvm->arch.vpit)
3349                 return -ENXIO;
3350         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3351         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3352         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3353         return 0;
3354 }
3355
3356 /*
3357  * Get (and clear) the dirty memory log for a memory slot.
3358  */
3359 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3360                                       struct kvm_dirty_log *log)
3361 {
3362         int r, i;
3363         struct kvm_memory_slot *memslot;
3364         unsigned long n;
3365         unsigned long is_dirty = 0;
3366
3367         mutex_lock(&kvm->slots_lock);
3368
3369         r = -EINVAL;
3370         if (log->slot >= KVM_MEMORY_SLOTS)
3371                 goto out;
3372
3373         memslot = &kvm->memslots->memslots[log->slot];
3374         r = -ENOENT;
3375         if (!memslot->dirty_bitmap)
3376                 goto out;
3377
3378         n = kvm_dirty_bitmap_bytes(memslot);
3379
3380         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3381                 is_dirty = memslot->dirty_bitmap[i];
3382
3383         /* If nothing is dirty, don't bother messing with page tables. */
3384         if (is_dirty) {
3385                 struct kvm_memslots *slots, *old_slots;
3386                 unsigned long *dirty_bitmap;
3387
3388                 dirty_bitmap = memslot->dirty_bitmap_head;
3389                 if (memslot->dirty_bitmap == dirty_bitmap)
3390                         dirty_bitmap += n / sizeof(long);
3391                 memset(dirty_bitmap, 0, n);
3392
3393                 r = -ENOMEM;
3394                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3395                 if (!slots)
3396                         goto out;
3397                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3398                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3399                 slots->generation++;
3400
3401                 old_slots = kvm->memslots;
3402                 rcu_assign_pointer(kvm->memslots, slots);
3403                 synchronize_srcu_expedited(&kvm->srcu);
3404                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3405                 kfree(old_slots);
3406
3407                 spin_lock(&kvm->mmu_lock);
3408                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3409                 spin_unlock(&kvm->mmu_lock);
3410
3411                 r = -EFAULT;
3412                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3413                         goto out;
3414         } else {
3415                 r = -EFAULT;
3416                 if (clear_user(log->dirty_bitmap, n))
3417                         goto out;
3418         }
3419
3420         r = 0;
3421 out:
3422         mutex_unlock(&kvm->slots_lock);
3423         return r;
3424 }
3425
3426 long kvm_arch_vm_ioctl(struct file *filp,
3427                        unsigned int ioctl, unsigned long arg)
3428 {
3429         struct kvm *kvm = filp->private_data;
3430         void __user *argp = (void __user *)arg;
3431         int r = -ENOTTY;
3432         /*
3433          * This union makes it completely explicit to gcc-3.x
3434          * that these two variables' stack usage should be
3435          * combined, not added together.
3436          */
3437         union {
3438                 struct kvm_pit_state ps;
3439                 struct kvm_pit_state2 ps2;
3440                 struct kvm_pit_config pit_config;
3441         } u;
3442
3443         switch (ioctl) {
3444         case KVM_SET_TSS_ADDR:
3445                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3446                 if (r < 0)
3447                         goto out;
3448                 break;
3449         case KVM_SET_IDENTITY_MAP_ADDR: {
3450                 u64 ident_addr;
3451
3452                 r = -EFAULT;
3453                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3454                         goto out;
3455                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3456                 if (r < 0)
3457                         goto out;
3458                 break;
3459         }
3460         case KVM_SET_NR_MMU_PAGES:
3461                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3462                 if (r)
3463                         goto out;
3464                 break;
3465         case KVM_GET_NR_MMU_PAGES:
3466                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3467                 break;
3468         case KVM_CREATE_IRQCHIP: {
3469                 struct kvm_pic *vpic;
3470
3471                 mutex_lock(&kvm->lock);
3472                 r = -EEXIST;
3473                 if (kvm->arch.vpic)
3474                         goto create_irqchip_unlock;
3475                 r = -ENOMEM;
3476                 vpic = kvm_create_pic(kvm);
3477                 if (vpic) {
3478                         r = kvm_ioapic_init(kvm);
3479                         if (r) {
3480                                 mutex_lock(&kvm->slots_lock);
3481                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3482                                                           &vpic->dev);
3483                                 mutex_unlock(&kvm->slots_lock);
3484                                 kfree(vpic);
3485                                 goto create_irqchip_unlock;
3486                         }
3487                 } else
3488                         goto create_irqchip_unlock;
3489                 smp_wmb();
3490                 kvm->arch.vpic = vpic;
3491                 smp_wmb();
3492                 r = kvm_setup_default_irq_routing(kvm);
3493                 if (r) {
3494                         mutex_lock(&kvm->slots_lock);
3495                         mutex_lock(&kvm->irq_lock);
3496                         kvm_ioapic_destroy(kvm);
3497                         kvm_destroy_pic(kvm);
3498                         mutex_unlock(&kvm->irq_lock);
3499                         mutex_unlock(&kvm->slots_lock);
3500                 }
3501         create_irqchip_unlock:
3502                 mutex_unlock(&kvm->lock);
3503                 break;
3504         }
3505         case KVM_CREATE_PIT:
3506                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3507                 goto create_pit;
3508         case KVM_CREATE_PIT2:
3509                 r = -EFAULT;
3510                 if (copy_from_user(&u.pit_config, argp,
3511                                    sizeof(struct kvm_pit_config)))
3512                         goto out;
3513         create_pit:
3514                 mutex_lock(&kvm->slots_lock);
3515                 r = -EEXIST;
3516                 if (kvm->arch.vpit)
3517                         goto create_pit_unlock;
3518                 r = -ENOMEM;
3519                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3520                 if (kvm->arch.vpit)
3521                         r = 0;
3522         create_pit_unlock:
3523                 mutex_unlock(&kvm->slots_lock);
3524                 break;
3525         case KVM_IRQ_LINE_STATUS:
3526         case KVM_IRQ_LINE: {
3527                 struct kvm_irq_level irq_event;
3528
3529                 r = -EFAULT;
3530                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3531                         goto out;
3532                 r = -ENXIO;
3533                 if (irqchip_in_kernel(kvm)) {
3534                         __s32 status;
3535                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3536                                         irq_event.irq, irq_event.level);
3537                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3538                                 r = -EFAULT;
3539                                 irq_event.status = status;
3540                                 if (copy_to_user(argp, &irq_event,
3541                                                         sizeof irq_event))
3542                                         goto out;
3543                         }
3544                         r = 0;
3545                 }
3546                 break;
3547         }
3548         case KVM_GET_IRQCHIP: {
3549                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3550                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3551
3552                 r = -ENOMEM;
3553                 if (!chip)
3554                         goto out;
3555                 r = -EFAULT;
3556                 if (copy_from_user(chip, argp, sizeof *chip))
3557                         goto get_irqchip_out;
3558                 r = -ENXIO;
3559                 if (!irqchip_in_kernel(kvm))
3560                         goto get_irqchip_out;
3561                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3562                 if (r)
3563                         goto get_irqchip_out;
3564                 r = -EFAULT;
3565                 if (copy_to_user(argp, chip, sizeof *chip))
3566                         goto get_irqchip_out;
3567                 r = 0;
3568         get_irqchip_out:
3569                 kfree(chip);
3570                 if (r)
3571                         goto out;
3572                 break;
3573         }
3574         case KVM_SET_IRQCHIP: {
3575                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3576                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3577
3578                 r = -ENOMEM;
3579                 if (!chip)
3580                         goto out;
3581                 r = -EFAULT;
3582                 if (copy_from_user(chip, argp, sizeof *chip))
3583                         goto set_irqchip_out;
3584                 r = -ENXIO;
3585                 if (!irqchip_in_kernel(kvm))
3586                         goto set_irqchip_out;
3587                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3588                 if (r)
3589                         goto set_irqchip_out;
3590                 r = 0;
3591         set_irqchip_out:
3592                 kfree(chip);
3593                 if (r)
3594                         goto out;
3595                 break;
3596         }
3597         case KVM_GET_PIT: {
3598                 r = -EFAULT;
3599                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3600                         goto out;
3601                 r = -ENXIO;
3602                 if (!kvm->arch.vpit)
3603                         goto out;
3604                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3605                 if (r)
3606                         goto out;
3607                 r = -EFAULT;
3608                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3609                         goto out;
3610                 r = 0;
3611                 break;
3612         }
3613         case KVM_SET_PIT: {
3614                 r = -EFAULT;
3615                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3616                         goto out;
3617                 r = -ENXIO;
3618                 if (!kvm->arch.vpit)
3619                         goto out;
3620                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3621                 if (r)
3622                         goto out;
3623                 r = 0;
3624                 break;
3625         }
3626         case KVM_GET_PIT2: {
3627                 r = -ENXIO;
3628                 if (!kvm->arch.vpit)
3629                         goto out;
3630                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3631                 if (r)
3632                         goto out;
3633                 r = -EFAULT;
3634                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3635                         goto out;
3636                 r = 0;
3637                 break;
3638         }
3639         case KVM_SET_PIT2: {
3640                 r = -EFAULT;
3641                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3642                         goto out;
3643                 r = -ENXIO;
3644                 if (!kvm->arch.vpit)
3645                         goto out;
3646                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3647                 if (r)
3648                         goto out;
3649                 r = 0;
3650                 break;
3651         }
3652         case KVM_REINJECT_CONTROL: {
3653                 struct kvm_reinject_control control;
3654                 r =  -EFAULT;
3655                 if (copy_from_user(&control, argp, sizeof(control)))
3656                         goto out;
3657                 r = kvm_vm_ioctl_reinject(kvm, &control);
3658                 if (r)
3659                         goto out;
3660                 r = 0;
3661                 break;
3662         }
3663         case KVM_XEN_HVM_CONFIG: {
3664                 r = -EFAULT;
3665                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3666                                    sizeof(struct kvm_xen_hvm_config)))
3667                         goto out;
3668                 r = -EINVAL;
3669                 if (kvm->arch.xen_hvm_config.flags)
3670                         goto out;
3671                 r = 0;
3672                 break;
3673         }
3674         case KVM_SET_CLOCK: {
3675                 struct kvm_clock_data user_ns;
3676                 u64 now_ns;
3677                 s64 delta;
3678
3679                 r = -EFAULT;
3680                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3681                         goto out;
3682
3683                 r = -EINVAL;
3684                 if (user_ns.flags)
3685                         goto out;
3686
3687                 r = 0;
3688                 local_irq_disable();
3689                 now_ns = get_kernel_ns();
3690                 delta = user_ns.clock - now_ns;
3691                 local_irq_enable();
3692                 kvm->arch.kvmclock_offset = delta;
3693                 break;
3694         }
3695         case KVM_GET_CLOCK: {
3696                 struct kvm_clock_data user_ns;
3697                 u64 now_ns;
3698
3699                 local_irq_disable();
3700                 now_ns = get_kernel_ns();
3701                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3702                 local_irq_enable();
3703                 user_ns.flags = 0;
3704                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3705
3706                 r = -EFAULT;
3707                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3708                         goto out;
3709                 r = 0;
3710                 break;
3711         }
3712
3713         default:
3714                 ;
3715         }
3716 out:
3717         return r;
3718 }
3719
3720 static void kvm_init_msr_list(void)
3721 {
3722         u32 dummy[2];
3723         unsigned i, j;
3724
3725         /* skip the first msrs in the list. KVM-specific */
3726         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3727                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3728                         continue;
3729                 if (j < i)
3730                         msrs_to_save[j] = msrs_to_save[i];
3731                 j++;
3732         }
3733         num_msrs_to_save = j;
3734 }
3735
3736 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3737                            const void *v)
3738 {
3739         int handled = 0;
3740         int n;
3741
3742         do {
3743                 n = min(len, 8);
3744                 if (!(vcpu->arch.apic &&
3745                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3746                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3747                         break;
3748                 handled += n;
3749                 addr += n;
3750                 len -= n;
3751                 v += n;
3752         } while (len);
3753
3754         return handled;
3755 }
3756
3757 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3758 {
3759         int handled = 0;
3760         int n;
3761
3762         do {
3763                 n = min(len, 8);
3764                 if (!(vcpu->arch.apic &&
3765                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3766                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3767                         break;
3768                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3769                 handled += n;
3770                 addr += n;
3771                 len -= n;
3772                 v += n;
3773         } while (len);
3774
3775         return handled;
3776 }
3777
3778 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3779                         struct kvm_segment *var, int seg)
3780 {
3781         kvm_x86_ops->set_segment(vcpu, var, seg);
3782 }
3783
3784 void kvm_get_segment(struct kvm_vcpu *vcpu,
3785                      struct kvm_segment *var, int seg)
3786 {
3787         kvm_x86_ops->get_segment(vcpu, var, seg);
3788 }
3789
3790 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3791 {
3792         return gpa;
3793 }
3794
3795 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3796 {
3797         gpa_t t_gpa;
3798         struct x86_exception exception;
3799
3800         BUG_ON(!mmu_is_nested(vcpu));
3801
3802         /* NPT walks are always user-walks */
3803         access |= PFERR_USER_MASK;
3804         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3805
3806         return t_gpa;
3807 }
3808
3809 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3810                               struct x86_exception *exception)
3811 {
3812         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3813         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3814 }
3815
3816  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3817                                 struct x86_exception *exception)
3818 {
3819         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3820         access |= PFERR_FETCH_MASK;
3821         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3822 }
3823
3824 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3825                                struct x86_exception *exception)
3826 {
3827         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3828         access |= PFERR_WRITE_MASK;
3829         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3830 }
3831
3832 /* uses this to access any guest's mapped memory without checking CPL */
3833 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3834                                 struct x86_exception *exception)
3835 {
3836         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3837 }
3838
3839 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3840                                       struct kvm_vcpu *vcpu, u32 access,
3841                                       struct x86_exception *exception)
3842 {
3843         void *data = val;
3844         int r = X86EMUL_CONTINUE;
3845
3846         while (bytes) {
3847                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3848                                                             exception);
3849                 unsigned offset = addr & (PAGE_SIZE-1);
3850                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3851                 int ret;
3852
3853                 if (gpa == UNMAPPED_GVA)
3854                         return X86EMUL_PROPAGATE_FAULT;
3855                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3856                 if (ret < 0) {
3857                         r = X86EMUL_IO_NEEDED;
3858                         goto out;
3859                 }
3860
3861                 bytes -= toread;
3862                 data += toread;
3863                 addr += toread;
3864         }
3865 out:
3866         return r;
3867 }
3868
3869 /* used for instruction fetching */
3870 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3871                                 gva_t addr, void *val, unsigned int bytes,
3872                                 struct x86_exception *exception)
3873 {
3874         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3875         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3876
3877         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3878                                           access | PFERR_FETCH_MASK,
3879                                           exception);
3880 }
3881
3882 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3883                                gva_t addr, void *val, unsigned int bytes,
3884                                struct x86_exception *exception)
3885 {
3886         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3887         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3888
3889         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3890                                           exception);
3891 }
3892 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3893
3894 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3895                                       gva_t addr, void *val, unsigned int bytes,
3896                                       struct x86_exception *exception)
3897 {
3898         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3899         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3900 }
3901
3902 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3903                                        gva_t addr, void *val,
3904                                        unsigned int bytes,
3905                                        struct x86_exception *exception)
3906 {
3907         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3908         void *data = val;
3909         int r = X86EMUL_CONTINUE;
3910
3911         while (bytes) {
3912                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3913                                                              PFERR_WRITE_MASK,
3914                                                              exception);
3915                 unsigned offset = addr & (PAGE_SIZE-1);
3916                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3917                 int ret;
3918
3919                 if (gpa == UNMAPPED_GVA)
3920                         return X86EMUL_PROPAGATE_FAULT;
3921                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3922                 if (ret < 0) {
3923                         r = X86EMUL_IO_NEEDED;
3924                         goto out;
3925                 }
3926
3927                 bytes -= towrite;
3928                 data += towrite;
3929                 addr += towrite;
3930         }
3931 out:
3932         return r;
3933 }
3934 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3935
3936 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3937                                   unsigned long addr,
3938                                   void *val,
3939                                   unsigned int bytes,
3940                                   struct x86_exception *exception)
3941 {
3942         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3943         gpa_t                 gpa;
3944         int handled;
3945
3946         if (vcpu->mmio_read_completed) {
3947                 memcpy(val, vcpu->mmio_data, bytes);
3948                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3949                                vcpu->mmio_phys_addr, *(u64 *)val);
3950                 vcpu->mmio_read_completed = 0;
3951                 return X86EMUL_CONTINUE;
3952         }
3953
3954         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3955
3956         if (gpa == UNMAPPED_GVA)
3957                 return X86EMUL_PROPAGATE_FAULT;
3958
3959         /* For APIC access vmexit */
3960         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3961                 goto mmio;
3962
3963         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3964             == X86EMUL_CONTINUE)
3965                 return X86EMUL_CONTINUE;
3966
3967 mmio:
3968         /*
3969          * Is this MMIO handled locally?
3970          */
3971         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3972
3973         if (handled == bytes)
3974                 return X86EMUL_CONTINUE;
3975
3976         gpa += handled;
3977         bytes -= handled;
3978         val += handled;
3979
3980         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3981
3982         vcpu->mmio_needed = 1;
3983         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3984         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3985         vcpu->mmio_size = bytes;
3986         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3987         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3988         vcpu->mmio_index = 0;
3989
3990         return X86EMUL_IO_NEEDED;
3991 }
3992
3993 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3994                         const void *val, int bytes)
3995 {
3996         int ret;
3997
3998         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3999         if (ret < 0)
4000                 return 0;
4001         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4002         return 1;
4003 }
4004
4005 static int emulator_write_emulated_onepage(unsigned long addr,
4006                                            const void *val,
4007                                            unsigned int bytes,
4008                                            struct x86_exception *exception,
4009                                            struct kvm_vcpu *vcpu)
4010 {
4011         gpa_t                 gpa;
4012         int handled;
4013
4014         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
4015
4016         if (gpa == UNMAPPED_GVA)
4017                 return X86EMUL_PROPAGATE_FAULT;
4018
4019         /* For APIC access vmexit */
4020         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4021                 goto mmio;
4022
4023         if (emulator_write_phys(vcpu, gpa, val, bytes))
4024                 return X86EMUL_CONTINUE;
4025
4026 mmio:
4027         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4028         /*
4029          * Is this MMIO handled locally?
4030          */
4031         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4032         if (handled == bytes)
4033                 return X86EMUL_CONTINUE;
4034
4035         gpa += handled;
4036         bytes -= handled;
4037         val += handled;
4038
4039         vcpu->mmio_needed = 1;
4040         memcpy(vcpu->mmio_data, val, bytes);
4041         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4042         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4043         vcpu->mmio_size = bytes;
4044         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4045         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4046         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4047         vcpu->mmio_index = 0;
4048
4049         return X86EMUL_CONTINUE;
4050 }
4051
4052 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4053                             unsigned long addr,
4054                             const void *val,
4055                             unsigned int bytes,
4056                             struct x86_exception *exception)
4057 {
4058         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4059
4060         /* Crossing a page boundary? */
4061         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4062                 int rc, now;
4063
4064                 now = -addr & ~PAGE_MASK;
4065                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4066                                                      vcpu);
4067                 if (rc != X86EMUL_CONTINUE)
4068                         return rc;
4069                 addr += now;
4070                 val += now;
4071                 bytes -= now;
4072         }
4073         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4074                                                vcpu);
4075 }
4076
4077 #define CMPXCHG_TYPE(t, ptr, old, new) \
4078         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4079
4080 #ifdef CONFIG_X86_64
4081 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4082 #else
4083 #  define CMPXCHG64(ptr, old, new) \
4084         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4085 #endif
4086
4087 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4088                                      unsigned long addr,
4089                                      const void *old,
4090                                      const void *new,
4091                                      unsigned int bytes,
4092                                      struct x86_exception *exception)
4093 {
4094         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4095         gpa_t gpa;
4096         struct page *page;
4097         char *kaddr;
4098         bool exchanged;
4099
4100         /* guests cmpxchg8b have to be emulated atomically */
4101         if (bytes > 8 || (bytes & (bytes - 1)))
4102                 goto emul_write;
4103
4104         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4105
4106         if (gpa == UNMAPPED_GVA ||
4107             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4108                 goto emul_write;
4109
4110         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4111                 goto emul_write;
4112
4113         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4114         if (is_error_page(page)) {
4115                 kvm_release_page_clean(page);
4116                 goto emul_write;
4117         }
4118
4119         kaddr = kmap_atomic(page, KM_USER0);
4120         kaddr += offset_in_page(gpa);
4121         switch (bytes) {
4122         case 1:
4123                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4124                 break;
4125         case 2:
4126                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4127                 break;
4128         case 4:
4129                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4130                 break;
4131         case 8:
4132                 exchanged = CMPXCHG64(kaddr, old, new);
4133                 break;
4134         default:
4135                 BUG();
4136         }
4137         kunmap_atomic(kaddr, KM_USER0);
4138         kvm_release_page_dirty(page);
4139
4140         if (!exchanged)
4141                 return X86EMUL_CMPXCHG_FAILED;
4142
4143         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4144
4145         return X86EMUL_CONTINUE;
4146
4147 emul_write:
4148         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4149
4150         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4151 }
4152
4153 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4154 {
4155         /* TODO: String I/O for in kernel device */
4156         int r;
4157
4158         if (vcpu->arch.pio.in)
4159                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4160                                     vcpu->arch.pio.size, pd);
4161         else
4162                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4163                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4164                                      pd);
4165         return r;
4166 }
4167
4168
4169 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4170                                     int size, unsigned short port, void *val,
4171                                     unsigned int count)
4172 {
4173         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4174
4175         if (vcpu->arch.pio.count)
4176                 goto data_avail;
4177
4178         trace_kvm_pio(0, port, size, count);
4179
4180         vcpu->arch.pio.port = port;
4181         vcpu->arch.pio.in = 1;
4182         vcpu->arch.pio.count  = count;
4183         vcpu->arch.pio.size = size;
4184
4185         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4186         data_avail:
4187                 memcpy(val, vcpu->arch.pio_data, size * count);
4188                 vcpu->arch.pio.count = 0;
4189                 return 1;
4190         }
4191
4192         vcpu->run->exit_reason = KVM_EXIT_IO;
4193         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4194         vcpu->run->io.size = size;
4195         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4196         vcpu->run->io.count = count;
4197         vcpu->run->io.port = port;
4198
4199         return 0;
4200 }
4201
4202 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4203                                      int size, unsigned short port,
4204                                      const void *val, unsigned int count)
4205 {
4206         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4207
4208         trace_kvm_pio(1, port, size, count);
4209
4210         vcpu->arch.pio.port = port;
4211         vcpu->arch.pio.in = 0;
4212         vcpu->arch.pio.count = count;
4213         vcpu->arch.pio.size = size;
4214
4215         memcpy(vcpu->arch.pio_data, val, size * count);
4216
4217         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4218                 vcpu->arch.pio.count = 0;
4219                 return 1;
4220         }
4221
4222         vcpu->run->exit_reason = KVM_EXIT_IO;
4223         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4224         vcpu->run->io.size = size;
4225         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4226         vcpu->run->io.count = count;
4227         vcpu->run->io.port = port;
4228
4229         return 0;
4230 }
4231
4232 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4233 {
4234         return kvm_x86_ops->get_segment_base(vcpu, seg);
4235 }
4236
4237 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4238 {
4239         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4240 }
4241
4242 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4243 {
4244         if (!need_emulate_wbinvd(vcpu))
4245                 return X86EMUL_CONTINUE;
4246
4247         if (kvm_x86_ops->has_wbinvd_exit()) {
4248                 int cpu = get_cpu();
4249
4250                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4251                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4252                                 wbinvd_ipi, NULL, 1);
4253                 put_cpu();
4254                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4255         } else
4256                 wbinvd();
4257         return X86EMUL_CONTINUE;
4258 }
4259 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4260
4261 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4262 {
4263         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4264 }
4265
4266 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4267 {
4268         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4269 }
4270
4271 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4272 {
4273
4274         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4275 }
4276
4277 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4278 {
4279         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4280 }
4281
4282 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4283 {
4284         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4285         unsigned long value;
4286
4287         switch (cr) {
4288         case 0:
4289                 value = kvm_read_cr0(vcpu);
4290                 break;
4291         case 2:
4292                 value = vcpu->arch.cr2;
4293                 break;
4294         case 3:
4295                 value = kvm_read_cr3(vcpu);
4296                 break;
4297         case 4:
4298                 value = kvm_read_cr4(vcpu);
4299                 break;
4300         case 8:
4301                 value = kvm_get_cr8(vcpu);
4302                 break;
4303         default:
4304                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4305                 return 0;
4306         }
4307
4308         return value;
4309 }
4310
4311 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4312 {
4313         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4314         int res = 0;
4315
4316         switch (cr) {
4317         case 0:
4318                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4319                 break;
4320         case 2:
4321                 vcpu->arch.cr2 = val;
4322                 break;
4323         case 3:
4324                 res = kvm_set_cr3(vcpu, val);
4325                 break;
4326         case 4:
4327                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4328                 break;
4329         case 8:
4330                 res = kvm_set_cr8(vcpu, val);
4331                 break;
4332         default:
4333                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4334                 res = -1;
4335         }
4336
4337         return res;
4338 }
4339
4340 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4341 {
4342         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4343 }
4344
4345 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4346 {
4347         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4348 }
4349
4350 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4351 {
4352         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4353 }
4354
4355 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4356 {
4357         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4358 }
4359
4360 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4361 {
4362         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4363 }
4364
4365 static unsigned long emulator_get_cached_segment_base(
4366         struct x86_emulate_ctxt *ctxt, int seg)
4367 {
4368         return get_segment_base(emul_to_vcpu(ctxt), seg);
4369 }
4370
4371 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4372                                  struct desc_struct *desc, u32 *base3,
4373                                  int seg)
4374 {
4375         struct kvm_segment var;
4376
4377         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4378         *selector = var.selector;
4379
4380         if (var.unusable)
4381                 return false;
4382
4383         if (var.g)
4384                 var.limit >>= 12;
4385         set_desc_limit(desc, var.limit);
4386         set_desc_base(desc, (unsigned long)var.base);
4387 #ifdef CONFIG_X86_64
4388         if (base3)
4389                 *base3 = var.base >> 32;
4390 #endif
4391         desc->type = var.type;
4392         desc->s = var.s;
4393         desc->dpl = var.dpl;
4394         desc->p = var.present;
4395         desc->avl = var.avl;
4396         desc->l = var.l;
4397         desc->d = var.db;
4398         desc->g = var.g;
4399
4400         return true;
4401 }
4402
4403 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4404                                  struct desc_struct *desc, u32 base3,
4405                                  int seg)
4406 {
4407         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4408         struct kvm_segment var;
4409
4410         var.selector = selector;
4411         var.base = get_desc_base(desc);
4412 #ifdef CONFIG_X86_64
4413         var.base |= ((u64)base3) << 32;
4414 #endif
4415         var.limit = get_desc_limit(desc);
4416         if (desc->g)
4417                 var.limit = (var.limit << 12) | 0xfff;
4418         var.type = desc->type;
4419         var.present = desc->p;
4420         var.dpl = desc->dpl;
4421         var.db = desc->d;
4422         var.s = desc->s;
4423         var.l = desc->l;
4424         var.g = desc->g;
4425         var.avl = desc->avl;
4426         var.present = desc->p;
4427         var.unusable = !var.present;
4428         var.padding = 0;
4429
4430         kvm_set_segment(vcpu, &var, seg);
4431         return;
4432 }
4433
4434 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4435                             u32 msr_index, u64 *pdata)
4436 {
4437         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4438 }
4439
4440 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4441                             u32 msr_index, u64 data)
4442 {
4443         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4444 }
4445
4446 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4447 {
4448         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4449 }
4450
4451 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4452 {
4453         preempt_disable();
4454         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4455         /*
4456          * CR0.TS may reference the host fpu state, not the guest fpu state,
4457          * so it may be clear at this point.
4458          */
4459         clts();
4460 }
4461
4462 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4463 {
4464         preempt_enable();
4465 }
4466
4467 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4468                               struct x86_instruction_info *info,
4469                               enum x86_intercept_stage stage)
4470 {
4471         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4472 }
4473
4474 static struct x86_emulate_ops emulate_ops = {
4475         .read_std            = kvm_read_guest_virt_system,
4476         .write_std           = kvm_write_guest_virt_system,
4477         .fetch               = kvm_fetch_guest_virt,
4478         .read_emulated       = emulator_read_emulated,
4479         .write_emulated      = emulator_write_emulated,
4480         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4481         .invlpg              = emulator_invlpg,
4482         .pio_in_emulated     = emulator_pio_in_emulated,
4483         .pio_out_emulated    = emulator_pio_out_emulated,
4484         .get_segment         = emulator_get_segment,
4485         .set_segment         = emulator_set_segment,
4486         .get_cached_segment_base = emulator_get_cached_segment_base,
4487         .get_gdt             = emulator_get_gdt,
4488         .get_idt             = emulator_get_idt,
4489         .set_gdt             = emulator_set_gdt,
4490         .set_idt             = emulator_set_idt,
4491         .get_cr              = emulator_get_cr,
4492         .set_cr              = emulator_set_cr,
4493         .cpl                 = emulator_get_cpl,
4494         .get_dr              = emulator_get_dr,
4495         .set_dr              = emulator_set_dr,
4496         .set_msr             = emulator_set_msr,
4497         .get_msr             = emulator_get_msr,
4498         .halt                = emulator_halt,
4499         .wbinvd              = emulator_wbinvd,
4500         .fix_hypercall       = emulator_fix_hypercall,
4501         .get_fpu             = emulator_get_fpu,
4502         .put_fpu             = emulator_put_fpu,
4503         .intercept           = emulator_intercept,
4504 };
4505
4506 static void cache_all_regs(struct kvm_vcpu *vcpu)
4507 {
4508         kvm_register_read(vcpu, VCPU_REGS_RAX);
4509         kvm_register_read(vcpu, VCPU_REGS_RSP);
4510         kvm_register_read(vcpu, VCPU_REGS_RIP);
4511         vcpu->arch.regs_dirty = ~0;
4512 }
4513
4514 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4515 {
4516         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4517         /*
4518          * an sti; sti; sequence only disable interrupts for the first
4519          * instruction. So, if the last instruction, be it emulated or
4520          * not, left the system with the INT_STI flag enabled, it
4521          * means that the last instruction is an sti. We should not
4522          * leave the flag on in this case. The same goes for mov ss
4523          */
4524         if (!(int_shadow & mask))
4525                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4526 }
4527
4528 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4529 {
4530         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4531         if (ctxt->exception.vector == PF_VECTOR)
4532                 kvm_propagate_fault(vcpu, &ctxt->exception);
4533         else if (ctxt->exception.error_code_valid)
4534                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4535                                       ctxt->exception.error_code);
4536         else
4537                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4538 }
4539
4540 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4541                               const unsigned long *regs)
4542 {
4543         memset(&ctxt->twobyte, 0,
4544                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4545         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4546
4547         ctxt->fetch.start = 0;
4548         ctxt->fetch.end = 0;
4549         ctxt->io_read.pos = 0;
4550         ctxt->io_read.end = 0;
4551         ctxt->mem_read.pos = 0;
4552         ctxt->mem_read.end = 0;
4553 }
4554
4555 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4556 {
4557         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4558         int cs_db, cs_l;
4559
4560         /*
4561          * TODO: fix emulate.c to use guest_read/write_register
4562          * instead of direct ->regs accesses, can save hundred cycles
4563          * on Intel for instructions that don't read/change RSP, for
4564          * for example.
4565          */
4566         cache_all_regs(vcpu);
4567
4568         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4569
4570         ctxt->eflags = kvm_get_rflags(vcpu);
4571         ctxt->eip = kvm_rip_read(vcpu);
4572         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4573                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4574                      cs_l                               ? X86EMUL_MODE_PROT64 :
4575                      cs_db                              ? X86EMUL_MODE_PROT32 :
4576                                                           X86EMUL_MODE_PROT16;
4577         ctxt->guest_mode = is_guest_mode(vcpu);
4578
4579         init_decode_cache(ctxt, vcpu->arch.regs);
4580         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4581 }
4582
4583 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4584 {
4585         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4586         int ret;
4587
4588         init_emulate_ctxt(vcpu);
4589
4590         ctxt->op_bytes = 2;
4591         ctxt->ad_bytes = 2;
4592         ctxt->_eip = ctxt->eip + inc_eip;
4593         ret = emulate_int_real(ctxt, irq);
4594
4595         if (ret != X86EMUL_CONTINUE)
4596                 return EMULATE_FAIL;
4597
4598         ctxt->eip = ctxt->_eip;
4599         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4600         kvm_rip_write(vcpu, ctxt->eip);
4601         kvm_set_rflags(vcpu, ctxt->eflags);
4602
4603         if (irq == NMI_VECTOR)
4604                 vcpu->arch.nmi_pending = false;
4605         else
4606                 vcpu->arch.interrupt.pending = false;
4607
4608         return EMULATE_DONE;
4609 }
4610 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4611
4612 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4613 {
4614         int r = EMULATE_DONE;
4615
4616         ++vcpu->stat.insn_emulation_fail;
4617         trace_kvm_emulate_insn_failed(vcpu);
4618         if (!is_guest_mode(vcpu)) {
4619                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4620                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4621                 vcpu->run->internal.ndata = 0;
4622                 r = EMULATE_FAIL;
4623         }
4624         kvm_queue_exception(vcpu, UD_VECTOR);
4625
4626         return r;
4627 }
4628
4629 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4630 {
4631         gpa_t gpa;
4632
4633         if (tdp_enabled)
4634                 return false;
4635
4636         /*
4637          * if emulation was due to access to shadowed page table
4638          * and it failed try to unshadow page and re-entetr the
4639          * guest to let CPU execute the instruction.
4640          */
4641         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4642                 return true;
4643
4644         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4645
4646         if (gpa == UNMAPPED_GVA)
4647                 return true; /* let cpu generate fault */
4648
4649         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4650                 return true;
4651
4652         return false;
4653 }
4654
4655 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4656                             unsigned long cr2,
4657                             int emulation_type,
4658                             void *insn,
4659                             int insn_len)
4660 {
4661         int r;
4662         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4663         bool writeback = true;
4664
4665         kvm_clear_exception_queue(vcpu);
4666
4667         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4668                 init_emulate_ctxt(vcpu);
4669                 ctxt->interruptibility = 0;
4670                 ctxt->have_exception = false;
4671                 ctxt->perm_ok = false;
4672
4673                 ctxt->only_vendor_specific_insn
4674                         = emulation_type & EMULTYPE_TRAP_UD;
4675
4676                 r = x86_decode_insn(ctxt, insn, insn_len);
4677
4678                 trace_kvm_emulate_insn_start(vcpu);
4679                 ++vcpu->stat.insn_emulation;
4680                 if (r)  {
4681                         if (emulation_type & EMULTYPE_TRAP_UD)
4682                                 return EMULATE_FAIL;
4683                         if (reexecute_instruction(vcpu, cr2))
4684                                 return EMULATE_DONE;
4685                         if (emulation_type & EMULTYPE_SKIP)
4686                                 return EMULATE_FAIL;
4687                         return handle_emulation_failure(vcpu);
4688                 }
4689         }
4690
4691         if (emulation_type & EMULTYPE_SKIP) {
4692                 kvm_rip_write(vcpu, ctxt->_eip);
4693                 return EMULATE_DONE;
4694         }
4695
4696         /* this is needed for vmware backdoor interface to work since it
4697            changes registers values  during IO operation */
4698         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4699                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4700                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4701         }
4702
4703 restart:
4704         r = x86_emulate_insn(ctxt);
4705
4706         if (r == EMULATION_INTERCEPTED)
4707                 return EMULATE_DONE;
4708
4709         if (r == EMULATION_FAILED) {
4710                 if (reexecute_instruction(vcpu, cr2))
4711                         return EMULATE_DONE;
4712
4713                 return handle_emulation_failure(vcpu);
4714         }
4715
4716         if (ctxt->have_exception) {
4717                 inject_emulated_exception(vcpu);
4718                 r = EMULATE_DONE;
4719         } else if (vcpu->arch.pio.count) {
4720                 if (!vcpu->arch.pio.in)
4721                         vcpu->arch.pio.count = 0;
4722                 else
4723                         writeback = false;
4724                 r = EMULATE_DO_MMIO;
4725         } else if (vcpu->mmio_needed) {
4726                 if (!vcpu->mmio_is_write)
4727                         writeback = false;
4728                 r = EMULATE_DO_MMIO;
4729         } else if (r == EMULATION_RESTART)
4730                 goto restart;
4731         else
4732                 r = EMULATE_DONE;
4733
4734         if (writeback) {
4735                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4736                 kvm_set_rflags(vcpu, ctxt->eflags);
4737                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4738                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4739                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4740                 kvm_rip_write(vcpu, ctxt->eip);
4741         } else
4742                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4743
4744         return r;
4745 }
4746 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4747
4748 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4749 {
4750         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4751         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4752                                             size, port, &val, 1);
4753         /* do not return to emulator after return from userspace */
4754         vcpu->arch.pio.count = 0;
4755         return ret;
4756 }
4757 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4758
4759 static void tsc_bad(void *info)
4760 {
4761         __this_cpu_write(cpu_tsc_khz, 0);
4762 }
4763
4764 static void tsc_khz_changed(void *data)
4765 {
4766         struct cpufreq_freqs *freq = data;
4767         unsigned long khz = 0;
4768
4769         if (data)
4770                 khz = freq->new;
4771         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4772                 khz = cpufreq_quick_get(raw_smp_processor_id());
4773         if (!khz)
4774                 khz = tsc_khz;
4775         __this_cpu_write(cpu_tsc_khz, khz);
4776 }
4777
4778 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4779                                      void *data)
4780 {
4781         struct cpufreq_freqs *freq = data;
4782         struct kvm *kvm;
4783         struct kvm_vcpu *vcpu;
4784         int i, send_ipi = 0;
4785
4786         /*
4787          * We allow guests to temporarily run on slowing clocks,
4788          * provided we notify them after, or to run on accelerating
4789          * clocks, provided we notify them before.  Thus time never
4790          * goes backwards.
4791          *
4792          * However, we have a problem.  We can't atomically update
4793          * the frequency of a given CPU from this function; it is
4794          * merely a notifier, which can be called from any CPU.
4795          * Changing the TSC frequency at arbitrary points in time
4796          * requires a recomputation of local variables related to
4797          * the TSC for each VCPU.  We must flag these local variables
4798          * to be updated and be sure the update takes place with the
4799          * new frequency before any guests proceed.
4800          *
4801          * Unfortunately, the combination of hotplug CPU and frequency
4802          * change creates an intractable locking scenario; the order
4803          * of when these callouts happen is undefined with respect to
4804          * CPU hotplug, and they can race with each other.  As such,
4805          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4806          * undefined; you can actually have a CPU frequency change take
4807          * place in between the computation of X and the setting of the
4808          * variable.  To protect against this problem, all updates of
4809          * the per_cpu tsc_khz variable are done in an interrupt
4810          * protected IPI, and all callers wishing to update the value
4811          * must wait for a synchronous IPI to complete (which is trivial
4812          * if the caller is on the CPU already).  This establishes the
4813          * necessary total order on variable updates.
4814          *
4815          * Note that because a guest time update may take place
4816          * anytime after the setting of the VCPU's request bit, the
4817          * correct TSC value must be set before the request.  However,
4818          * to ensure the update actually makes it to any guest which
4819          * starts running in hardware virtualization between the set
4820          * and the acquisition of the spinlock, we must also ping the
4821          * CPU after setting the request bit.
4822          *
4823          */
4824
4825         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4826                 return 0;
4827         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4828                 return 0;
4829
4830         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4831
4832         raw_spin_lock(&kvm_lock);
4833         list_for_each_entry(kvm, &vm_list, vm_list) {
4834                 kvm_for_each_vcpu(i, vcpu, kvm) {
4835                         if (vcpu->cpu != freq->cpu)
4836                                 continue;
4837                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4838                         if (vcpu->cpu != smp_processor_id())
4839                                 send_ipi = 1;
4840                 }
4841         }
4842         raw_spin_unlock(&kvm_lock);
4843
4844         if (freq->old < freq->new && send_ipi) {
4845                 /*
4846                  * We upscale the frequency.  Must make the guest
4847                  * doesn't see old kvmclock values while running with
4848                  * the new frequency, otherwise we risk the guest sees
4849                  * time go backwards.
4850                  *
4851                  * In case we update the frequency for another cpu
4852                  * (which might be in guest context) send an interrupt
4853                  * to kick the cpu out of guest context.  Next time
4854                  * guest context is entered kvmclock will be updated,
4855                  * so the guest will not see stale values.
4856                  */
4857                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4858         }
4859         return 0;
4860 }
4861
4862 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4863         .notifier_call  = kvmclock_cpufreq_notifier
4864 };
4865
4866 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4867                                         unsigned long action, void *hcpu)
4868 {
4869         unsigned int cpu = (unsigned long)hcpu;
4870
4871         switch (action) {
4872                 case CPU_ONLINE:
4873                 case CPU_DOWN_FAILED:
4874                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4875                         break;
4876                 case CPU_DOWN_PREPARE:
4877                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4878                         break;
4879         }
4880         return NOTIFY_OK;
4881 }
4882
4883 static struct notifier_block kvmclock_cpu_notifier_block = {
4884         .notifier_call  = kvmclock_cpu_notifier,
4885         .priority = -INT_MAX
4886 };
4887
4888 static void kvm_timer_init(void)
4889 {
4890         int cpu;
4891
4892         max_tsc_khz = tsc_khz;
4893         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4894         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4895 #ifdef CONFIG_CPU_FREQ
4896                 struct cpufreq_policy policy;
4897                 memset(&policy, 0, sizeof(policy));
4898                 cpu = get_cpu();
4899                 cpufreq_get_policy(&policy, cpu);
4900                 if (policy.cpuinfo.max_freq)
4901                         max_tsc_khz = policy.cpuinfo.max_freq;
4902                 put_cpu();
4903 #endif
4904                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4905                                           CPUFREQ_TRANSITION_NOTIFIER);
4906         }
4907         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4908         for_each_online_cpu(cpu)
4909                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4910 }
4911
4912 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4913
4914 static int kvm_is_in_guest(void)
4915 {
4916         return percpu_read(current_vcpu) != NULL;
4917 }
4918
4919 static int kvm_is_user_mode(void)
4920 {
4921         int user_mode = 3;
4922
4923         if (percpu_read(current_vcpu))
4924                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4925
4926         return user_mode != 0;
4927 }
4928
4929 static unsigned long kvm_get_guest_ip(void)
4930 {
4931         unsigned long ip = 0;
4932
4933         if (percpu_read(current_vcpu))
4934                 ip = kvm_rip_read(percpu_read(current_vcpu));
4935
4936         return ip;
4937 }
4938
4939 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4940         .is_in_guest            = kvm_is_in_guest,
4941         .is_user_mode           = kvm_is_user_mode,
4942         .get_guest_ip           = kvm_get_guest_ip,
4943 };
4944
4945 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4946 {
4947         percpu_write(current_vcpu, vcpu);
4948 }
4949 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4950
4951 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4952 {
4953         percpu_write(current_vcpu, NULL);
4954 }
4955 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4956
4957 int kvm_arch_init(void *opaque)
4958 {
4959         int r;
4960         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4961
4962         if (kvm_x86_ops) {
4963                 printk(KERN_ERR "kvm: already loaded the other module\n");
4964                 r = -EEXIST;
4965                 goto out;
4966         }
4967
4968         if (!ops->cpu_has_kvm_support()) {
4969                 printk(KERN_ERR "kvm: no hardware support\n");
4970                 r = -EOPNOTSUPP;
4971                 goto out;
4972         }
4973         if (ops->disabled_by_bios()) {
4974                 printk(KERN_ERR "kvm: disabled by bios\n");
4975                 r = -EOPNOTSUPP;
4976                 goto out;
4977         }
4978
4979         r = kvm_mmu_module_init();
4980         if (r)
4981                 goto out;
4982
4983         kvm_init_msr_list();
4984
4985         kvm_x86_ops = ops;
4986         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4987         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4988                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4989
4990         kvm_timer_init();
4991
4992         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4993
4994         if (cpu_has_xsave)
4995                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4996
4997         return 0;
4998
4999 out:
5000         return r;
5001 }
5002
5003 void kvm_arch_exit(void)
5004 {
5005         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5006
5007         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5008                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5009                                             CPUFREQ_TRANSITION_NOTIFIER);
5010         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5011         kvm_x86_ops = NULL;
5012         kvm_mmu_module_exit();
5013 }
5014
5015 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5016 {
5017         ++vcpu->stat.halt_exits;
5018         if (irqchip_in_kernel(vcpu->kvm)) {
5019                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5020                 return 1;
5021         } else {
5022                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5023                 return 0;
5024         }
5025 }
5026 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5027
5028 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5029                            unsigned long a1)
5030 {
5031         if (is_long_mode(vcpu))
5032                 return a0;
5033         else
5034                 return a0 | ((gpa_t)a1 << 32);
5035 }
5036
5037 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5038 {
5039         u64 param, ingpa, outgpa, ret;
5040         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5041         bool fast, longmode;
5042         int cs_db, cs_l;
5043
5044         /*
5045          * hypercall generates UD from non zero cpl and real mode
5046          * per HYPER-V spec
5047          */
5048         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5049                 kvm_queue_exception(vcpu, UD_VECTOR);
5050                 return 0;
5051         }
5052
5053         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5054         longmode = is_long_mode(vcpu) && cs_l == 1;
5055
5056         if (!longmode) {
5057                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5058                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5059                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5060                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5061                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5062                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5063         }
5064 #ifdef CONFIG_X86_64
5065         else {
5066                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5067                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5068                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5069         }
5070 #endif
5071
5072         code = param & 0xffff;
5073         fast = (param >> 16) & 0x1;
5074         rep_cnt = (param >> 32) & 0xfff;
5075         rep_idx = (param >> 48) & 0xfff;
5076
5077         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5078
5079         switch (code) {
5080         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5081                 kvm_vcpu_on_spin(vcpu);
5082                 break;
5083         default:
5084                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5085                 break;
5086         }
5087
5088         ret = res | (((u64)rep_done & 0xfff) << 32);
5089         if (longmode) {
5090                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5091         } else {
5092                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5093                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5094         }
5095
5096         return 1;
5097 }
5098
5099 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5100 {
5101         unsigned long nr, a0, a1, a2, a3, ret;
5102         int r = 1;
5103
5104         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5105                 return kvm_hv_hypercall(vcpu);
5106
5107         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5108         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5109         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5110         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5111         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5112
5113         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5114
5115         if (!is_long_mode(vcpu)) {
5116                 nr &= 0xFFFFFFFF;
5117                 a0 &= 0xFFFFFFFF;
5118                 a1 &= 0xFFFFFFFF;
5119                 a2 &= 0xFFFFFFFF;
5120                 a3 &= 0xFFFFFFFF;
5121         }
5122
5123         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5124                 ret = -KVM_EPERM;
5125                 goto out;
5126         }
5127
5128         switch (nr) {
5129         case KVM_HC_VAPIC_POLL_IRQ:
5130                 ret = 0;
5131                 break;
5132         case KVM_HC_MMU_OP:
5133                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5134                 break;
5135         default:
5136                 ret = -KVM_ENOSYS;
5137                 break;
5138         }
5139 out:
5140         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5141         ++vcpu->stat.hypercalls;
5142         return r;
5143 }
5144 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5145
5146 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5147 {
5148         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5149         char instruction[3];
5150         unsigned long rip = kvm_rip_read(vcpu);
5151
5152         /*
5153          * Blow out the MMU to ensure that no other VCPU has an active mapping
5154          * to ensure that the updated hypercall appears atomically across all
5155          * VCPUs.
5156          */
5157         kvm_mmu_zap_all(vcpu->kvm);
5158
5159         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5160
5161         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5162 }
5163
5164 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5165 {
5166         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5167         int j, nent = vcpu->arch.cpuid_nent;
5168
5169         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5170         /* when no next entry is found, the current entry[i] is reselected */
5171         for (j = i + 1; ; j = (j + 1) % nent) {
5172                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5173                 if (ej->function == e->function) {
5174                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5175                         return j;
5176                 }
5177         }
5178         return 0; /* silence gcc, even though control never reaches here */
5179 }
5180
5181 /* find an entry with matching function, matching index (if needed), and that
5182  * should be read next (if it's stateful) */
5183 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5184         u32 function, u32 index)
5185 {
5186         if (e->function != function)
5187                 return 0;
5188         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5189                 return 0;
5190         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5191             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5192                 return 0;
5193         return 1;
5194 }
5195
5196 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5197                                               u32 function, u32 index)
5198 {
5199         int i;
5200         struct kvm_cpuid_entry2 *best = NULL;
5201
5202         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5203                 struct kvm_cpuid_entry2 *e;
5204
5205                 e = &vcpu->arch.cpuid_entries[i];
5206                 if (is_matching_cpuid_entry(e, function, index)) {
5207                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5208                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5209                         best = e;
5210                         break;
5211                 }
5212         }
5213         return best;
5214 }
5215 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5216
5217 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5218 {
5219         struct kvm_cpuid_entry2 *best;
5220
5221         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5222         if (!best || best->eax < 0x80000008)
5223                 goto not_found;
5224         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5225         if (best)
5226                 return best->eax & 0xff;
5227 not_found:
5228         return 36;
5229 }
5230
5231 /*
5232  * If no match is found, check whether we exceed the vCPU's limit
5233  * and return the content of the highest valid _standard_ leaf instead.
5234  * This is to satisfy the CPUID specification.
5235  */
5236 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5237                                                   u32 function, u32 index)
5238 {
5239         struct kvm_cpuid_entry2 *maxlevel;
5240
5241         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5242         if (!maxlevel || maxlevel->eax >= function)
5243                 return NULL;
5244         if (function & 0x80000000) {
5245                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5246                 if (!maxlevel)
5247                         return NULL;
5248         }
5249         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5250 }
5251
5252 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5253 {
5254         u32 function, index;
5255         struct kvm_cpuid_entry2 *best;
5256
5257         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5258         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5259         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5260         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5261         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5262         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5263         best = kvm_find_cpuid_entry(vcpu, function, index);
5264
5265         if (!best)
5266                 best = check_cpuid_limit(vcpu, function, index);
5267
5268         if (best) {
5269                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5270                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5271                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5272                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5273         }
5274         kvm_x86_ops->skip_emulated_instruction(vcpu);
5275         trace_kvm_cpuid(function,
5276                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5277                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5278                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5279                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5280 }
5281 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5282
5283 /*
5284  * Check if userspace requested an interrupt window, and that the
5285  * interrupt window is open.
5286  *
5287  * No need to exit to userspace if we already have an interrupt queued.
5288  */
5289 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5290 {
5291         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5292                 vcpu->run->request_interrupt_window &&
5293                 kvm_arch_interrupt_allowed(vcpu));
5294 }
5295
5296 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5297 {
5298         struct kvm_run *kvm_run = vcpu->run;
5299
5300         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5301         kvm_run->cr8 = kvm_get_cr8(vcpu);
5302         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5303         if (irqchip_in_kernel(vcpu->kvm))
5304                 kvm_run->ready_for_interrupt_injection = 1;
5305         else
5306                 kvm_run->ready_for_interrupt_injection =
5307                         kvm_arch_interrupt_allowed(vcpu) &&
5308                         !kvm_cpu_has_interrupt(vcpu) &&
5309                         !kvm_event_needs_reinjection(vcpu);
5310 }
5311
5312 static void vapic_enter(struct kvm_vcpu *vcpu)
5313 {
5314         struct kvm_lapic *apic = vcpu->arch.apic;
5315         struct page *page;
5316
5317         if (!apic || !apic->vapic_addr)
5318                 return;
5319
5320         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5321
5322         vcpu->arch.apic->vapic_page = page;
5323 }
5324
5325 static void vapic_exit(struct kvm_vcpu *vcpu)
5326 {
5327         struct kvm_lapic *apic = vcpu->arch.apic;
5328         int idx;
5329
5330         if (!apic || !apic->vapic_addr)
5331                 return;
5332
5333         idx = srcu_read_lock(&vcpu->kvm->srcu);
5334         kvm_release_page_dirty(apic->vapic_page);
5335         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5336         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5337 }
5338
5339 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5340 {
5341         int max_irr, tpr;
5342
5343         if (!kvm_x86_ops->update_cr8_intercept)
5344                 return;
5345
5346         if (!vcpu->arch.apic)
5347                 return;
5348
5349         if (!vcpu->arch.apic->vapic_addr)
5350                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5351         else
5352                 max_irr = -1;
5353
5354         if (max_irr != -1)
5355                 max_irr >>= 4;
5356
5357         tpr = kvm_lapic_get_cr8(vcpu);
5358
5359         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5360 }
5361
5362 static void inject_pending_event(struct kvm_vcpu *vcpu)
5363 {
5364         /* try to reinject previous events if any */
5365         if (vcpu->arch.exception.pending) {
5366                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5367                                         vcpu->arch.exception.has_error_code,
5368                                         vcpu->arch.exception.error_code);
5369                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5370                                           vcpu->arch.exception.has_error_code,
5371                                           vcpu->arch.exception.error_code,
5372                                           vcpu->arch.exception.reinject);
5373                 return;
5374         }
5375
5376         if (vcpu->arch.nmi_injected) {
5377                 kvm_x86_ops->set_nmi(vcpu);
5378                 return;
5379         }
5380
5381         if (vcpu->arch.interrupt.pending) {
5382                 kvm_x86_ops->set_irq(vcpu);
5383                 return;
5384         }
5385
5386         /* try to inject new event if pending */
5387         if (vcpu->arch.nmi_pending) {
5388                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5389                         vcpu->arch.nmi_pending = false;
5390                         vcpu->arch.nmi_injected = true;
5391                         kvm_x86_ops->set_nmi(vcpu);
5392                 }
5393         } else if (kvm_cpu_has_interrupt(vcpu)) {
5394                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5395                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5396                                             false);
5397                         kvm_x86_ops->set_irq(vcpu);
5398                 }
5399         }
5400 }
5401
5402 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5403 {
5404         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5405                         !vcpu->guest_xcr0_loaded) {
5406                 /* kvm_set_xcr() also depends on this */
5407                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5408                 vcpu->guest_xcr0_loaded = 1;
5409         }
5410 }
5411
5412 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5413 {
5414         if (vcpu->guest_xcr0_loaded) {
5415                 if (vcpu->arch.xcr0 != host_xcr0)
5416                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5417                 vcpu->guest_xcr0_loaded = 0;
5418         }
5419 }
5420
5421 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5422 {
5423         int r;
5424         bool nmi_pending;
5425         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5426                 vcpu->run->request_interrupt_window;
5427
5428         if (vcpu->requests) {
5429                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5430                         kvm_mmu_unload(vcpu);
5431                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5432                         __kvm_migrate_timers(vcpu);
5433                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5434                         r = kvm_guest_time_update(vcpu);
5435                         if (unlikely(r))
5436                                 goto out;
5437                 }
5438                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5439                         kvm_mmu_sync_roots(vcpu);
5440                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5441                         kvm_x86_ops->tlb_flush(vcpu);
5442                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5443                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5444                         r = 0;
5445                         goto out;
5446                 }
5447                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5448                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5449                         r = 0;
5450                         goto out;
5451                 }
5452                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5453                         vcpu->fpu_active = 0;
5454                         kvm_x86_ops->fpu_deactivate(vcpu);
5455                 }
5456                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5457                         /* Page is swapped out. Do synthetic halt */
5458                         vcpu->arch.apf.halted = true;
5459                         r = 1;
5460                         goto out;
5461                 }
5462         }
5463
5464         r = kvm_mmu_reload(vcpu);
5465         if (unlikely(r))
5466                 goto out;
5467
5468         /*
5469          * An NMI can be injected between local nmi_pending read and
5470          * vcpu->arch.nmi_pending read inside inject_pending_event().
5471          * But in that case, KVM_REQ_EVENT will be set, which makes
5472          * the race described above benign.
5473          */
5474         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5475
5476         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5477                 inject_pending_event(vcpu);
5478
5479                 /* enable NMI/IRQ window open exits if needed */
5480                 if (nmi_pending)
5481                         kvm_x86_ops->enable_nmi_window(vcpu);
5482                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5483                         kvm_x86_ops->enable_irq_window(vcpu);
5484
5485                 if (kvm_lapic_enabled(vcpu)) {
5486                         update_cr8_intercept(vcpu);
5487                         kvm_lapic_sync_to_vapic(vcpu);
5488                 }
5489         }
5490
5491         preempt_disable();
5492
5493         kvm_x86_ops->prepare_guest_switch(vcpu);
5494         if (vcpu->fpu_active)
5495                 kvm_load_guest_fpu(vcpu);
5496         kvm_load_guest_xcr0(vcpu);
5497
5498         vcpu->mode = IN_GUEST_MODE;
5499
5500         /* We should set ->mode before check ->requests,
5501          * see the comment in make_all_cpus_request.
5502          */
5503         smp_mb();
5504
5505         local_irq_disable();
5506
5507         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5508             || need_resched() || signal_pending(current)) {
5509                 vcpu->mode = OUTSIDE_GUEST_MODE;
5510                 smp_wmb();
5511                 local_irq_enable();
5512                 preempt_enable();
5513                 kvm_x86_ops->cancel_injection(vcpu);
5514                 r = 1;
5515                 goto out;
5516         }
5517
5518         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5519
5520         kvm_guest_enter();
5521
5522         if (unlikely(vcpu->arch.switch_db_regs)) {
5523                 set_debugreg(0, 7);
5524                 set_debugreg(vcpu->arch.eff_db[0], 0);
5525                 set_debugreg(vcpu->arch.eff_db[1], 1);
5526                 set_debugreg(vcpu->arch.eff_db[2], 2);
5527                 set_debugreg(vcpu->arch.eff_db[3], 3);
5528         }
5529
5530         trace_kvm_entry(vcpu->vcpu_id);
5531         kvm_x86_ops->run(vcpu);
5532
5533         /*
5534          * If the guest has used debug registers, at least dr7
5535          * will be disabled while returning to the host.
5536          * If we don't have active breakpoints in the host, we don't
5537          * care about the messed up debug address registers. But if
5538          * we have some of them active, restore the old state.
5539          */
5540         if (hw_breakpoint_active())
5541                 hw_breakpoint_restore();
5542
5543         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5544
5545         vcpu->mode = OUTSIDE_GUEST_MODE;
5546         smp_wmb();
5547         local_irq_enable();
5548
5549         ++vcpu->stat.exits;
5550
5551         /*
5552          * We must have an instruction between local_irq_enable() and
5553          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5554          * the interrupt shadow.  The stat.exits increment will do nicely.
5555          * But we need to prevent reordering, hence this barrier():
5556          */
5557         barrier();
5558
5559         kvm_guest_exit();
5560
5561         preempt_enable();
5562
5563         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5564
5565         /*
5566          * Profile KVM exit RIPs:
5567          */
5568         if (unlikely(prof_on == KVM_PROFILING)) {
5569                 unsigned long rip = kvm_rip_read(vcpu);
5570                 profile_hit(KVM_PROFILING, (void *)rip);
5571         }
5572
5573
5574         kvm_lapic_sync_from_vapic(vcpu);
5575
5576         r = kvm_x86_ops->handle_exit(vcpu);
5577 out:
5578         return r;
5579 }
5580
5581
5582 static int __vcpu_run(struct kvm_vcpu *vcpu)
5583 {
5584         int r;
5585         struct kvm *kvm = vcpu->kvm;
5586
5587         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5588                 pr_debug("vcpu %d received sipi with vector # %x\n",
5589                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5590                 kvm_lapic_reset(vcpu);
5591                 r = kvm_arch_vcpu_reset(vcpu);
5592                 if (r)
5593                         return r;
5594                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5595         }
5596
5597         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5598         vapic_enter(vcpu);
5599
5600         r = 1;
5601         while (r > 0) {
5602                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5603                     !vcpu->arch.apf.halted)
5604                         r = vcpu_enter_guest(vcpu);
5605                 else {
5606                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5607                         kvm_vcpu_block(vcpu);
5608                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5609                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5610                         {
5611                                 switch(vcpu->arch.mp_state) {
5612                                 case KVM_MP_STATE_HALTED:
5613                                         vcpu->arch.mp_state =
5614                                                 KVM_MP_STATE_RUNNABLE;
5615                                 case KVM_MP_STATE_RUNNABLE:
5616                                         vcpu->arch.apf.halted = false;
5617                                         break;
5618                                 case KVM_MP_STATE_SIPI_RECEIVED:
5619                                 default:
5620                                         r = -EINTR;
5621                                         break;
5622                                 }
5623                         }
5624                 }
5625
5626                 if (r <= 0)
5627                         break;
5628
5629                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5630                 if (kvm_cpu_has_pending_timer(vcpu))
5631                         kvm_inject_pending_timer_irqs(vcpu);
5632
5633                 if (dm_request_for_irq_injection(vcpu)) {
5634                         r = -EINTR;
5635                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5636                         ++vcpu->stat.request_irq_exits;
5637                 }
5638
5639                 kvm_check_async_pf_completion(vcpu);
5640
5641                 if (signal_pending(current)) {
5642                         r = -EINTR;
5643                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5644                         ++vcpu->stat.signal_exits;
5645                 }
5646                 if (need_resched()) {
5647                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5648                         kvm_resched(vcpu);
5649                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5650                 }
5651         }
5652
5653         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5654
5655         vapic_exit(vcpu);
5656
5657         return r;
5658 }
5659
5660 static int complete_mmio(struct kvm_vcpu *vcpu)
5661 {
5662         struct kvm_run *run = vcpu->run;
5663         int r;
5664
5665         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5666                 return 1;
5667
5668         if (vcpu->mmio_needed) {
5669                 vcpu->mmio_needed = 0;
5670                 if (!vcpu->mmio_is_write)
5671                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5672                                run->mmio.data, 8);
5673                 vcpu->mmio_index += 8;
5674                 if (vcpu->mmio_index < vcpu->mmio_size) {
5675                         run->exit_reason = KVM_EXIT_MMIO;
5676                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5677                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5678                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5679                         run->mmio.is_write = vcpu->mmio_is_write;
5680                         vcpu->mmio_needed = 1;
5681                         return 0;
5682                 }
5683                 if (vcpu->mmio_is_write)
5684                         return 1;
5685                 vcpu->mmio_read_completed = 1;
5686         }
5687         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5688         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5689         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5690         if (r != EMULATE_DONE)
5691                 return 0;
5692         return 1;
5693 }
5694
5695 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5696 {
5697         int r;
5698         sigset_t sigsaved;
5699
5700         if (!tsk_used_math(current) && init_fpu(current))
5701                 return -ENOMEM;
5702
5703         if (vcpu->sigset_active)
5704                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5705
5706         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5707                 kvm_vcpu_block(vcpu);
5708                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5709                 r = -EAGAIN;
5710                 goto out;
5711         }
5712
5713         /* re-sync apic's tpr */
5714         if (!irqchip_in_kernel(vcpu->kvm)) {
5715                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5716                         r = -EINVAL;
5717                         goto out;
5718                 }
5719         }
5720
5721         r = complete_mmio(vcpu);
5722         if (r <= 0)
5723                 goto out;
5724
5725         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5726                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5727                                      kvm_run->hypercall.ret);
5728
5729         r = __vcpu_run(vcpu);
5730
5731 out:
5732         post_kvm_run_save(vcpu);
5733         if (vcpu->sigset_active)
5734                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5735
5736         return r;
5737 }
5738
5739 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5740 {
5741         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5742                 /*
5743                  * We are here if userspace calls get_regs() in the middle of
5744                  * instruction emulation. Registers state needs to be copied
5745                  * back from emulation context to vcpu. Usrapace shouldn't do
5746                  * that usually, but some bad designed PV devices (vmware
5747                  * backdoor interface) need this to work
5748                  */
5749                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5750                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5751                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5752         }
5753         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5754         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5755         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5756         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5757         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5758         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5759         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5760         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5761 #ifdef CONFIG_X86_64
5762         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5763         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5764         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5765         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5766         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5767         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5768         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5769         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5770 #endif
5771
5772         regs->rip = kvm_rip_read(vcpu);
5773         regs->rflags = kvm_get_rflags(vcpu);
5774
5775         return 0;
5776 }
5777
5778 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5779 {
5780         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5781         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5782
5783         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5784         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5785         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5786         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5787         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5788         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5789         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5790         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5791 #ifdef CONFIG_X86_64
5792         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5793         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5794         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5795         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5796         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5797         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5798         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5799         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5800 #endif
5801
5802         kvm_rip_write(vcpu, regs->rip);
5803         kvm_set_rflags(vcpu, regs->rflags);
5804
5805         vcpu->arch.exception.pending = false;
5806
5807         kvm_make_request(KVM_REQ_EVENT, vcpu);
5808
5809         return 0;
5810 }
5811
5812 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5813 {
5814         struct kvm_segment cs;
5815
5816         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5817         *db = cs.db;
5818         *l = cs.l;
5819 }
5820 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5821
5822 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5823                                   struct kvm_sregs *sregs)
5824 {
5825         struct desc_ptr dt;
5826
5827         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5828         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5829         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5830         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5831         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5832         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5833
5834         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5835         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5836
5837         kvm_x86_ops->get_idt(vcpu, &dt);
5838         sregs->idt.limit = dt.size;
5839         sregs->idt.base = dt.address;
5840         kvm_x86_ops->get_gdt(vcpu, &dt);
5841         sregs->gdt.limit = dt.size;
5842         sregs->gdt.base = dt.address;
5843
5844         sregs->cr0 = kvm_read_cr0(vcpu);
5845         sregs->cr2 = vcpu->arch.cr2;
5846         sregs->cr3 = kvm_read_cr3(vcpu);
5847         sregs->cr4 = kvm_read_cr4(vcpu);
5848         sregs->cr8 = kvm_get_cr8(vcpu);
5849         sregs->efer = vcpu->arch.efer;
5850         sregs->apic_base = kvm_get_apic_base(vcpu);
5851
5852         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5853
5854         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5855                 set_bit(vcpu->arch.interrupt.nr,
5856                         (unsigned long *)sregs->interrupt_bitmap);
5857
5858         return 0;
5859 }
5860
5861 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5862                                     struct kvm_mp_state *mp_state)
5863 {
5864         mp_state->mp_state = vcpu->arch.mp_state;
5865         return 0;
5866 }
5867
5868 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5869                                     struct kvm_mp_state *mp_state)
5870 {
5871         vcpu->arch.mp_state = mp_state->mp_state;
5872         kvm_make_request(KVM_REQ_EVENT, vcpu);
5873         return 0;
5874 }
5875
5876 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5877                     bool has_error_code, u32 error_code)
5878 {
5879         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5880         int ret;
5881
5882         init_emulate_ctxt(vcpu);
5883
5884         ret = emulator_task_switch(ctxt, tss_selector, reason,
5885                                    has_error_code, error_code);
5886
5887         if (ret)
5888                 return EMULATE_FAIL;
5889
5890         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5891         kvm_rip_write(vcpu, ctxt->eip);
5892         kvm_set_rflags(vcpu, ctxt->eflags);
5893         kvm_make_request(KVM_REQ_EVENT, vcpu);
5894         return EMULATE_DONE;
5895 }
5896 EXPORT_SYMBOL_GPL(kvm_task_switch);
5897
5898 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5899                                   struct kvm_sregs *sregs)
5900 {
5901         int mmu_reset_needed = 0;
5902         int pending_vec, max_bits, idx;
5903         struct desc_ptr dt;
5904
5905         dt.size = sregs->idt.limit;
5906         dt.address = sregs->idt.base;
5907         kvm_x86_ops->set_idt(vcpu, &dt);
5908         dt.size = sregs->gdt.limit;
5909         dt.address = sregs->gdt.base;
5910         kvm_x86_ops->set_gdt(vcpu, &dt);
5911
5912         vcpu->arch.cr2 = sregs->cr2;
5913         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5914         vcpu->arch.cr3 = sregs->cr3;
5915         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5916
5917         kvm_set_cr8(vcpu, sregs->cr8);
5918
5919         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5920         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5921         kvm_set_apic_base(vcpu, sregs->apic_base);
5922
5923         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5924         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5925         vcpu->arch.cr0 = sregs->cr0;
5926
5927         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5928         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5929         if (sregs->cr4 & X86_CR4_OSXSAVE)
5930                 update_cpuid(vcpu);
5931
5932         idx = srcu_read_lock(&vcpu->kvm->srcu);
5933         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5934                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5935                 mmu_reset_needed = 1;
5936         }
5937         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5938
5939         if (mmu_reset_needed)
5940                 kvm_mmu_reset_context(vcpu);
5941
5942         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5943         pending_vec = find_first_bit(
5944                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5945         if (pending_vec < max_bits) {
5946                 kvm_queue_interrupt(vcpu, pending_vec, false);
5947                 pr_debug("Set back pending irq %d\n", pending_vec);
5948         }
5949
5950         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5951         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5952         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5953         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5954         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5955         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5956
5957         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5958         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5959
5960         update_cr8_intercept(vcpu);
5961
5962         /* Older userspace won't unhalt the vcpu on reset. */
5963         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5964             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5965             !is_protmode(vcpu))
5966                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5967
5968         kvm_make_request(KVM_REQ_EVENT, vcpu);
5969
5970         return 0;
5971 }
5972
5973 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5974                                         struct kvm_guest_debug *dbg)
5975 {
5976         unsigned long rflags;
5977         int i, r;
5978
5979         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5980                 r = -EBUSY;
5981                 if (vcpu->arch.exception.pending)
5982                         goto out;
5983                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5984                         kvm_queue_exception(vcpu, DB_VECTOR);
5985                 else
5986                         kvm_queue_exception(vcpu, BP_VECTOR);
5987         }
5988
5989         /*
5990          * Read rflags as long as potentially injected trace flags are still
5991          * filtered out.
5992          */
5993         rflags = kvm_get_rflags(vcpu);
5994
5995         vcpu->guest_debug = dbg->control;
5996         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5997                 vcpu->guest_debug = 0;
5998
5999         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6000                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6001                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6002                 vcpu->arch.switch_db_regs =
6003                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6004         } else {
6005                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6006                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6007                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6008         }
6009
6010         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6011                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6012                         get_segment_base(vcpu, VCPU_SREG_CS);
6013
6014         /*
6015          * Trigger an rflags update that will inject or remove the trace
6016          * flags.
6017          */
6018         kvm_set_rflags(vcpu, rflags);
6019
6020         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6021
6022         r = 0;
6023
6024 out:
6025
6026         return r;
6027 }
6028
6029 /*
6030  * Translate a guest virtual address to a guest physical address.
6031  */
6032 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6033                                     struct kvm_translation *tr)
6034 {
6035         unsigned long vaddr = tr->linear_address;
6036         gpa_t gpa;
6037         int idx;
6038
6039         idx = srcu_read_lock(&vcpu->kvm->srcu);
6040         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6041         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6042         tr->physical_address = gpa;
6043         tr->valid = gpa != UNMAPPED_GVA;
6044         tr->writeable = 1;
6045         tr->usermode = 0;
6046
6047         return 0;
6048 }
6049
6050 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6051 {
6052         struct i387_fxsave_struct *fxsave =
6053                         &vcpu->arch.guest_fpu.state->fxsave;
6054
6055         memcpy(fpu->fpr, fxsave->st_space, 128);
6056         fpu->fcw = fxsave->cwd;
6057         fpu->fsw = fxsave->swd;
6058         fpu->ftwx = fxsave->twd;
6059         fpu->last_opcode = fxsave->fop;
6060         fpu->last_ip = fxsave->rip;
6061         fpu->last_dp = fxsave->rdp;
6062         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6063
6064         return 0;
6065 }
6066
6067 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6068 {
6069         struct i387_fxsave_struct *fxsave =
6070                         &vcpu->arch.guest_fpu.state->fxsave;
6071
6072         memcpy(fxsave->st_space, fpu->fpr, 128);
6073         fxsave->cwd = fpu->fcw;
6074         fxsave->swd = fpu->fsw;
6075         fxsave->twd = fpu->ftwx;
6076         fxsave->fop = fpu->last_opcode;
6077         fxsave->rip = fpu->last_ip;
6078         fxsave->rdp = fpu->last_dp;
6079         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6080
6081         return 0;
6082 }
6083
6084 int fx_init(struct kvm_vcpu *vcpu)
6085 {
6086         int err;
6087
6088         err = fpu_alloc(&vcpu->arch.guest_fpu);
6089         if (err)
6090                 return err;
6091
6092         fpu_finit(&vcpu->arch.guest_fpu);
6093
6094         /*
6095          * Ensure guest xcr0 is valid for loading
6096          */
6097         vcpu->arch.xcr0 = XSTATE_FP;
6098
6099         vcpu->arch.cr0 |= X86_CR0_ET;
6100
6101         return 0;
6102 }
6103 EXPORT_SYMBOL_GPL(fx_init);
6104
6105 static void fx_free(struct kvm_vcpu *vcpu)
6106 {
6107         fpu_free(&vcpu->arch.guest_fpu);
6108 }
6109
6110 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6111 {
6112         if (vcpu->guest_fpu_loaded)
6113                 return;
6114
6115         /*
6116          * Restore all possible states in the guest,
6117          * and assume host would use all available bits.
6118          * Guest xcr0 would be loaded later.
6119          */
6120         kvm_put_guest_xcr0(vcpu);
6121         vcpu->guest_fpu_loaded = 1;
6122         unlazy_fpu(current);
6123         fpu_restore_checking(&vcpu->arch.guest_fpu);
6124         trace_kvm_fpu(1);
6125 }
6126
6127 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6128 {
6129         kvm_put_guest_xcr0(vcpu);
6130
6131         if (!vcpu->guest_fpu_loaded)
6132                 return;
6133
6134         vcpu->guest_fpu_loaded = 0;
6135         fpu_save_init(&vcpu->arch.guest_fpu);
6136         ++vcpu->stat.fpu_reload;
6137         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6138         trace_kvm_fpu(0);
6139 }
6140
6141 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6142 {
6143         kvmclock_reset(vcpu);
6144
6145         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6146         fx_free(vcpu);
6147         kvm_x86_ops->vcpu_free(vcpu);
6148 }
6149
6150 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6151                                                 unsigned int id)
6152 {
6153         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6154                 printk_once(KERN_WARNING
6155                 "kvm: SMP vm created on host with unstable TSC; "
6156                 "guest TSC will not be reliable\n");
6157         return kvm_x86_ops->vcpu_create(kvm, id);
6158 }
6159
6160 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6161 {
6162         int r;
6163
6164         vcpu->arch.mtrr_state.have_fixed = 1;
6165         vcpu_load(vcpu);
6166         r = kvm_arch_vcpu_reset(vcpu);
6167         if (r == 0)
6168                 r = kvm_mmu_setup(vcpu);
6169         vcpu_put(vcpu);
6170
6171         return r;
6172 }
6173
6174 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6175 {
6176         vcpu->arch.apf.msr_val = 0;
6177
6178         vcpu_load(vcpu);
6179         kvm_mmu_unload(vcpu);
6180         vcpu_put(vcpu);
6181
6182         fx_free(vcpu);
6183         kvm_x86_ops->vcpu_free(vcpu);
6184 }
6185
6186 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6187 {
6188         vcpu->arch.nmi_pending = false;
6189         vcpu->arch.nmi_injected = false;
6190
6191         vcpu->arch.switch_db_regs = 0;
6192         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6193         vcpu->arch.dr6 = DR6_FIXED_1;
6194         vcpu->arch.dr7 = DR7_FIXED_1;
6195
6196         kvm_make_request(KVM_REQ_EVENT, vcpu);
6197         vcpu->arch.apf.msr_val = 0;
6198
6199         kvmclock_reset(vcpu);
6200
6201         kvm_clear_async_pf_completion_queue(vcpu);
6202         kvm_async_pf_hash_reset(vcpu);
6203         vcpu->arch.apf.halted = false;
6204
6205         return kvm_x86_ops->vcpu_reset(vcpu);
6206 }
6207
6208 int kvm_arch_hardware_enable(void *garbage)
6209 {
6210         struct kvm *kvm;
6211         struct kvm_vcpu *vcpu;
6212         int i;
6213
6214         kvm_shared_msr_cpu_online();
6215         list_for_each_entry(kvm, &vm_list, vm_list)
6216                 kvm_for_each_vcpu(i, vcpu, kvm)
6217                         if (vcpu->cpu == smp_processor_id())
6218                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6219         return kvm_x86_ops->hardware_enable(garbage);
6220 }
6221
6222 void kvm_arch_hardware_disable(void *garbage)
6223 {
6224         kvm_x86_ops->hardware_disable(garbage);
6225         drop_user_return_notifiers(garbage);
6226 }
6227
6228 int kvm_arch_hardware_setup(void)
6229 {
6230         return kvm_x86_ops->hardware_setup();
6231 }
6232
6233 void kvm_arch_hardware_unsetup(void)
6234 {
6235         kvm_x86_ops->hardware_unsetup();
6236 }
6237
6238 void kvm_arch_check_processor_compat(void *rtn)
6239 {
6240         kvm_x86_ops->check_processor_compatibility(rtn);
6241 }
6242
6243 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6244 {
6245         struct page *page;
6246         struct kvm *kvm;
6247         int r;
6248
6249         BUG_ON(vcpu->kvm == NULL);
6250         kvm = vcpu->kvm;
6251
6252         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6253         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6254         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6255         vcpu->arch.mmu.translate_gpa = translate_gpa;
6256         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6257         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6258                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6259         else
6260                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6261
6262         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6263         if (!page) {
6264                 r = -ENOMEM;
6265                 goto fail;
6266         }
6267         vcpu->arch.pio_data = page_address(page);
6268
6269         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6270
6271         r = kvm_mmu_create(vcpu);
6272         if (r < 0)
6273                 goto fail_free_pio_data;
6274
6275         if (irqchip_in_kernel(kvm)) {
6276                 r = kvm_create_lapic(vcpu);
6277                 if (r < 0)
6278                         goto fail_mmu_destroy;
6279         }
6280
6281         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6282                                        GFP_KERNEL);
6283         if (!vcpu->arch.mce_banks) {
6284                 r = -ENOMEM;
6285                 goto fail_free_lapic;
6286         }
6287         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6288
6289         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6290                 goto fail_free_mce_banks;
6291
6292         kvm_async_pf_hash_reset(vcpu);
6293
6294         return 0;
6295 fail_free_mce_banks:
6296         kfree(vcpu->arch.mce_banks);
6297 fail_free_lapic:
6298         kvm_free_lapic(vcpu);
6299 fail_mmu_destroy:
6300         kvm_mmu_destroy(vcpu);
6301 fail_free_pio_data:
6302         free_page((unsigned long)vcpu->arch.pio_data);
6303 fail:
6304         return r;
6305 }
6306
6307 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6308 {
6309         int idx;
6310
6311         kfree(vcpu->arch.mce_banks);
6312         kvm_free_lapic(vcpu);
6313         idx = srcu_read_lock(&vcpu->kvm->srcu);
6314         kvm_mmu_destroy(vcpu);
6315         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6316         free_page((unsigned long)vcpu->arch.pio_data);
6317 }
6318
6319 int kvm_arch_init_vm(struct kvm *kvm)
6320 {
6321         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6322         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6323
6324         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6325         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6326
6327         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6328
6329         return 0;
6330 }
6331
6332 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6333 {
6334         vcpu_load(vcpu);
6335         kvm_mmu_unload(vcpu);
6336         vcpu_put(vcpu);
6337 }
6338
6339 static void kvm_free_vcpus(struct kvm *kvm)
6340 {
6341         unsigned int i;
6342         struct kvm_vcpu *vcpu;
6343
6344         /*
6345          * Unpin any mmu pages first.
6346          */
6347         kvm_for_each_vcpu(i, vcpu, kvm) {
6348                 kvm_clear_async_pf_completion_queue(vcpu);
6349                 kvm_unload_vcpu_mmu(vcpu);
6350         }
6351         kvm_for_each_vcpu(i, vcpu, kvm)
6352                 kvm_arch_vcpu_free(vcpu);
6353
6354         mutex_lock(&kvm->lock);
6355         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6356                 kvm->vcpus[i] = NULL;
6357
6358         atomic_set(&kvm->online_vcpus, 0);
6359         mutex_unlock(&kvm->lock);
6360 }
6361
6362 void kvm_arch_sync_events(struct kvm *kvm)
6363 {
6364         kvm_free_all_assigned_devices(kvm);
6365         kvm_free_pit(kvm);
6366 }
6367
6368 void kvm_arch_destroy_vm(struct kvm *kvm)
6369 {
6370         kvm_iommu_unmap_guest(kvm);
6371         kfree(kvm->arch.vpic);
6372         kfree(kvm->arch.vioapic);
6373         kvm_free_vcpus(kvm);
6374         if (kvm->arch.apic_access_page)
6375                 put_page(kvm->arch.apic_access_page);
6376         if (kvm->arch.ept_identity_pagetable)
6377                 put_page(kvm->arch.ept_identity_pagetable);
6378 }
6379
6380 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6381                                 struct kvm_memory_slot *memslot,
6382                                 struct kvm_memory_slot old,
6383                                 struct kvm_userspace_memory_region *mem,
6384                                 int user_alloc)
6385 {
6386         int npages = memslot->npages;
6387         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6388
6389         /* Prevent internal slot pages from being moved by fork()/COW. */
6390         if (memslot->id >= KVM_MEMORY_SLOTS)
6391                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6392
6393         /*To keep backward compatibility with older userspace,
6394          *x86 needs to hanlde !user_alloc case.
6395          */
6396         if (!user_alloc) {
6397                 if (npages && !old.rmap) {
6398                         unsigned long userspace_addr;
6399
6400                         down_write(&current->mm->mmap_sem);
6401                         userspace_addr = do_mmap(NULL, 0,
6402                                                  npages * PAGE_SIZE,
6403                                                  PROT_READ | PROT_WRITE,
6404                                                  map_flags,
6405                                                  0);
6406                         up_write(&current->mm->mmap_sem);
6407
6408                         if (IS_ERR((void *)userspace_addr))
6409                                 return PTR_ERR((void *)userspace_addr);
6410
6411                         memslot->userspace_addr = userspace_addr;
6412                 }
6413         }
6414
6415
6416         return 0;
6417 }
6418
6419 void kvm_arch_commit_memory_region(struct kvm *kvm,
6420                                 struct kvm_userspace_memory_region *mem,
6421                                 struct kvm_memory_slot old,
6422                                 int user_alloc)
6423 {
6424
6425         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6426
6427         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6428                 int ret;
6429
6430                 down_write(&current->mm->mmap_sem);
6431                 ret = do_munmap(current->mm, old.userspace_addr,
6432                                 old.npages * PAGE_SIZE);
6433                 up_write(&current->mm->mmap_sem);
6434                 if (ret < 0)
6435                         printk(KERN_WARNING
6436                                "kvm_vm_ioctl_set_memory_region: "
6437                                "failed to munmap memory\n");
6438         }
6439
6440         if (!kvm->arch.n_requested_mmu_pages)
6441                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6442
6443         spin_lock(&kvm->mmu_lock);
6444         if (nr_mmu_pages)
6445                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6446         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6447         spin_unlock(&kvm->mmu_lock);
6448 }
6449
6450 void kvm_arch_flush_shadow(struct kvm *kvm)
6451 {
6452         kvm_mmu_zap_all(kvm);
6453         kvm_reload_remote_mmus(kvm);
6454 }
6455
6456 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6457 {
6458         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6459                 !vcpu->arch.apf.halted)
6460                 || !list_empty_careful(&vcpu->async_pf.done)
6461                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6462                 || vcpu->arch.nmi_pending ||
6463                 (kvm_arch_interrupt_allowed(vcpu) &&
6464                  kvm_cpu_has_interrupt(vcpu));
6465 }
6466
6467 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6468 {
6469         int me;
6470         int cpu = vcpu->cpu;
6471
6472         if (waitqueue_active(&vcpu->wq)) {
6473                 wake_up_interruptible(&vcpu->wq);
6474                 ++vcpu->stat.halt_wakeup;
6475         }
6476
6477         me = get_cpu();
6478         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6479                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6480                         smp_send_reschedule(cpu);
6481         put_cpu();
6482 }
6483
6484 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6485 {
6486         return kvm_x86_ops->interrupt_allowed(vcpu);
6487 }
6488
6489 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6490 {
6491         unsigned long current_rip = kvm_rip_read(vcpu) +
6492                 get_segment_base(vcpu, VCPU_SREG_CS);
6493
6494         return current_rip == linear_rip;
6495 }
6496 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6497
6498 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6499 {
6500         unsigned long rflags;
6501
6502         rflags = kvm_x86_ops->get_rflags(vcpu);
6503         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6504                 rflags &= ~X86_EFLAGS_TF;
6505         return rflags;
6506 }
6507 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6508
6509 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6510 {
6511         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6512             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6513                 rflags |= X86_EFLAGS_TF;
6514         kvm_x86_ops->set_rflags(vcpu, rflags);
6515         kvm_make_request(KVM_REQ_EVENT, vcpu);
6516 }
6517 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6518
6519 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6520 {
6521         int r;
6522
6523         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6524               is_error_page(work->page))
6525                 return;
6526
6527         r = kvm_mmu_reload(vcpu);
6528         if (unlikely(r))
6529                 return;
6530
6531         if (!vcpu->arch.mmu.direct_map &&
6532               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6533                 return;
6534
6535         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6536 }
6537
6538 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6539 {
6540         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6541 }
6542
6543 static inline u32 kvm_async_pf_next_probe(u32 key)
6544 {
6545         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6546 }
6547
6548 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6549 {
6550         u32 key = kvm_async_pf_hash_fn(gfn);
6551
6552         while (vcpu->arch.apf.gfns[key] != ~0)
6553                 key = kvm_async_pf_next_probe(key);
6554
6555         vcpu->arch.apf.gfns[key] = gfn;
6556 }
6557
6558 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6559 {
6560         int i;
6561         u32 key = kvm_async_pf_hash_fn(gfn);
6562
6563         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6564                      (vcpu->arch.apf.gfns[key] != gfn &&
6565                       vcpu->arch.apf.gfns[key] != ~0); i++)
6566                 key = kvm_async_pf_next_probe(key);
6567
6568         return key;
6569 }
6570
6571 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6572 {
6573         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6574 }
6575
6576 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6577 {
6578         u32 i, j, k;
6579
6580         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6581         while (true) {
6582                 vcpu->arch.apf.gfns[i] = ~0;
6583                 do {
6584                         j = kvm_async_pf_next_probe(j);
6585                         if (vcpu->arch.apf.gfns[j] == ~0)
6586                                 return;
6587                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6588                         /*
6589                          * k lies cyclically in ]i,j]
6590                          * |    i.k.j |
6591                          * |....j i.k.| or  |.k..j i...|
6592                          */
6593                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6594                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6595                 i = j;
6596         }
6597 }
6598
6599 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6600 {
6601
6602         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6603                                       sizeof(val));
6604 }
6605
6606 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6607                                      struct kvm_async_pf *work)
6608 {
6609         struct x86_exception fault;
6610
6611         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6612         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6613
6614         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6615             (vcpu->arch.apf.send_user_only &&
6616              kvm_x86_ops->get_cpl(vcpu) == 0))
6617                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6618         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6619                 fault.vector = PF_VECTOR;
6620                 fault.error_code_valid = true;
6621                 fault.error_code = 0;
6622                 fault.nested_page_fault = false;
6623                 fault.address = work->arch.token;
6624                 kvm_inject_page_fault(vcpu, &fault);
6625         }
6626 }
6627
6628 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6629                                  struct kvm_async_pf *work)
6630 {
6631         struct x86_exception fault;
6632
6633         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6634         if (is_error_page(work->page))
6635                 work->arch.token = ~0; /* broadcast wakeup */
6636         else
6637                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6638
6639         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6640             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6641                 fault.vector = PF_VECTOR;
6642                 fault.error_code_valid = true;
6643                 fault.error_code = 0;
6644                 fault.nested_page_fault = false;
6645                 fault.address = work->arch.token;
6646                 kvm_inject_page_fault(vcpu, &fault);
6647         }
6648         vcpu->arch.apf.halted = false;
6649 }
6650
6651 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6652 {
6653         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6654                 return true;
6655         else
6656                 return !kvm_event_needs_reinjection(vcpu) &&
6657                         kvm_x86_ops->interrupt_allowed(vcpu);
6658 }
6659
6660 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6661 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6662 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6663 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6664 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6665 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6666 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6667 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6668 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6669 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6670 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6671 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);