2 * DO NOT EDIT - This file is automatically generated
3 * from the following source files:
5 * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#93 $
6 * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#68 $
9 #include "aic79xx_osm.h"
11 static ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
12 { "SRC_MODE", 0x07, 0x07 },
13 { "DST_MODE", 0x70, 0x70 }
17 ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
19 return (ahd_print_register(MODE_PTR_parse_table, 2, "MODE_PTR",
20 0x00, regvalue, cur_col, wrap));
23 static ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
24 { "SPLTINT", 0x01, 0x01 },
25 { "CMDCMPLT", 0x02, 0x02 },
26 { "SEQINT", 0x04, 0x04 },
27 { "SCSIINT", 0x08, 0x08 },
28 { "PCIINT", 0x10, 0x10 },
29 { "SWTMINT", 0x20, 0x20 },
30 { "BRKADRINT", 0x40, 0x40 },
31 { "HWERRINT", 0x80, 0x80 },
32 { "INT_PEND", 0xff, 0xff }
36 ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
38 return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
39 0x01, regvalue, cur_col, wrap));
42 static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
43 { "NO_SEQINT", 0x00, 0xff },
44 { "BAD_PHASE", 0x01, 0xff },
45 { "SEND_REJECT", 0x02, 0xff },
46 { "PROTO_VIOLATION", 0x03, 0xff },
47 { "NO_MATCH", 0x04, 0xff },
48 { "IGN_WIDE_RES", 0x05, 0xff },
49 { "PDATA_REINIT", 0x06, 0xff },
50 { "HOST_MSG_LOOP", 0x07, 0xff },
51 { "BAD_STATUS", 0x08, 0xff },
52 { "DATA_OVERRUN", 0x09, 0xff },
53 { "MKMSG_FAILED", 0x0a, 0xff },
54 { "MISSED_BUSFREE", 0x0b, 0xff },
55 { "DUMP_CARD_STATE", 0x0c, 0xff },
56 { "ILLEGAL_PHASE", 0x0d, 0xff },
57 { "INVALID_SEQINT", 0x0e, 0xff },
58 { "CFG4ISTAT_INTR", 0x0f, 0xff },
59 { "STATUS_OVERRUN", 0x10, 0xff },
60 { "CFG4OVERRUN", 0x11, 0xff },
61 { "ENTERING_NONPACK", 0x12, 0xff },
62 { "TASKMGMT_FUNC_COMPLETE",0x13, 0xff },
63 { "TASKMGMT_CMD_CMPLT_OKAY",0x14, 0xff },
64 { "TRACEPOINT0", 0x15, 0xff },
65 { "TRACEPOINT1", 0x16, 0xff },
66 { "TRACEPOINT2", 0x17, 0xff },
67 { "TRACEPOINT3", 0x18, 0xff },
68 { "SAW_HWERR", 0x19, 0xff },
69 { "BAD_SCB_STATUS", 0x1a, 0xff }
73 ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
75 return (ahd_print_register(SEQINTCODE_parse_table, 27, "SEQINTCODE",
76 0x02, regvalue, cur_col, wrap));
79 static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
80 { "CLRSPLTINT", 0x01, 0x01 },
81 { "CLRCMDINT", 0x02, 0x02 },
82 { "CLRSEQINT", 0x04, 0x04 },
83 { "CLRSCSIINT", 0x08, 0x08 },
84 { "CLRPCIINT", 0x10, 0x10 },
85 { "CLRSWTMINT", 0x20, 0x20 },
86 { "CLRBRKADRINT", 0x40, 0x40 },
87 { "CLRHWERRINT", 0x80, 0x80 }
91 ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
93 return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
94 0x03, regvalue, cur_col, wrap));
97 static ahd_reg_parse_entry_t ERROR_parse_table[] = {
98 { "DSCTMOUT", 0x02, 0x02 },
99 { "ILLOPCODE", 0x04, 0x04 },
100 { "SQPARERR", 0x08, 0x08 },
101 { "DPARERR", 0x10, 0x10 },
102 { "MPARERR", 0x20, 0x20 },
103 { "CIOACCESFAIL", 0x40, 0x40 },
104 { "CIOPARERR", 0x80, 0x80 }
108 ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
110 return (ahd_print_register(ERROR_parse_table, 7, "ERROR",
111 0x04, regvalue, cur_col, wrap));
114 static ahd_reg_parse_entry_t CLRERR_parse_table[] = {
115 { "CLRDSCTMOUT", 0x02, 0x02 },
116 { "CLRILLOPCODE", 0x04, 0x04 },
117 { "CLRSQPARERR", 0x08, 0x08 },
118 { "CLRDPARERR", 0x10, 0x10 },
119 { "CLRMPARERR", 0x20, 0x20 },
120 { "CLRCIOACCESFAIL", 0x40, 0x40 },
121 { "CLRCIOPARERR", 0x80, 0x80 }
125 ahd_clrerr_print(u_int regvalue, u_int *cur_col, u_int wrap)
127 return (ahd_print_register(CLRERR_parse_table, 7, "CLRERR",
128 0x04, regvalue, cur_col, wrap));
131 static ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
132 { "CHIPRST", 0x01, 0x01 },
133 { "CHIPRSTACK", 0x01, 0x01 },
134 { "INTEN", 0x02, 0x02 },
135 { "PAUSE", 0x04, 0x04 },
136 { "SWTIMER_START_B", 0x08, 0x08 },
137 { "SWINT", 0x10, 0x10 },
138 { "POWRDN", 0x40, 0x40 },
139 { "SEQ_RESET", 0x80, 0x80 }
143 ahd_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
145 return (ahd_print_register(HCNTRL_parse_table, 8, "HCNTRL",
146 0x05, regvalue, cur_col, wrap));
150 ahd_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
152 return (ahd_print_register(NULL, 0, "HNSCB_QOFF",
153 0x06, regvalue, cur_col, wrap));
157 ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
159 return (ahd_print_register(NULL, 0, "HESCB_QOFF",
160 0x08, regvalue, cur_col, wrap));
163 static ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
164 { "ENINT_COALESCE", 0x40, 0x40 },
165 { "HOST_TQINPOS", 0x80, 0x80 }
169 ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
171 return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
172 0x0b, regvalue, cur_col, wrap));
175 static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
176 { "CLRSEQ_SPLTINT", 0x01, 0x01 },
177 { "CLRSEQ_PCIINT", 0x02, 0x02 },
178 { "CLRSEQ_SCSIINT", 0x04, 0x04 },
179 { "CLRSEQ_SEQINT", 0x08, 0x08 },
180 { "CLRSEQ_SWTMRTO", 0x10, 0x10 }
184 ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
186 return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
187 0x0c, regvalue, cur_col, wrap));
190 static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
191 { "SEQ_SPLTINT", 0x01, 0x01 },
192 { "SEQ_PCIINT", 0x02, 0x02 },
193 { "SEQ_SCSIINT", 0x04, 0x04 },
194 { "SEQ_SEQINT", 0x08, 0x08 },
195 { "SEQ_SWTMRTO", 0x10, 0x10 }
199 ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
201 return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
202 0x0c, regvalue, cur_col, wrap));
206 ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
208 return (ahd_print_register(NULL, 0, "SWTIMER",
209 0x0e, regvalue, cur_col, wrap));
213 ahd_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
215 return (ahd_print_register(NULL, 0, "SNSCB_QOFF",
216 0x10, regvalue, cur_col, wrap));
220 ahd_sescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
222 return (ahd_print_register(NULL, 0, "SESCB_QOFF",
223 0x12, regvalue, cur_col, wrap));
227 ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
229 return (ahd_print_register(NULL, 0, "SDSCB_QOFF",
230 0x14, regvalue, cur_col, wrap));
233 static ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
234 { "SCB_QSIZE_4", 0x00, 0x0f },
235 { "SCB_QSIZE_8", 0x01, 0x0f },
236 { "SCB_QSIZE_16", 0x02, 0x0f },
237 { "SCB_QSIZE_32", 0x03, 0x0f },
238 { "SCB_QSIZE_64", 0x04, 0x0f },
239 { "SCB_QSIZE_128", 0x05, 0x0f },
240 { "SCB_QSIZE_256", 0x06, 0x0f },
241 { "SCB_QSIZE_512", 0x07, 0x0f },
242 { "SCB_QSIZE_1024", 0x08, 0x0f },
243 { "SCB_QSIZE_2048", 0x09, 0x0f },
244 { "SCB_QSIZE_4096", 0x0a, 0x0f },
245 { "SCB_QSIZE_8192", 0x0b, 0x0f },
246 { "SCB_QSIZE_16384", 0x0c, 0x0f },
247 { "SCB_QSIZE", 0x0f, 0x0f },
248 { "HS_MAILBOX_ACT", 0x10, 0x10 },
249 { "SDSCB_ROLLOVR", 0x20, 0x20 },
250 { "NEW_SCB_AVAIL", 0x40, 0x40 },
251 { "EMPTY_SCB_AVAIL", 0x80, 0x80 }
255 ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
257 return (ahd_print_register(QOFF_CTLSTA_parse_table, 18, "QOFF_CTLSTA",
258 0x16, regvalue, cur_col, wrap));
261 static ahd_reg_parse_entry_t INTCTL_parse_table[] = {
262 { "SPLTINTEN", 0x01, 0x01 },
263 { "SEQINTEN", 0x02, 0x02 },
264 { "SCSIINTEN", 0x04, 0x04 },
265 { "PCIINTEN", 0x08, 0x08 },
266 { "AUTOCLRCMDINT", 0x10, 0x10 },
267 { "SWTIMER_START", 0x20, 0x20 },
268 { "SWTMINTEN", 0x40, 0x40 },
269 { "SWTMINTMASK", 0x80, 0x80 }
273 ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
275 return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
276 0x18, regvalue, cur_col, wrap));
279 static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
280 { "DIRECTIONEN", 0x01, 0x01 },
281 { "FIFOFLUSH", 0x02, 0x02 },
282 { "FIFOFLUSHACK", 0x02, 0x02 },
283 { "DIRECTION", 0x04, 0x04 },
284 { "DIRECTIONACK", 0x04, 0x04 },
285 { "HDMAEN", 0x08, 0x08 },
286 { "HDMAENACK", 0x08, 0x08 },
287 { "SCSIEN", 0x20, 0x20 },
288 { "SCSIENACK", 0x20, 0x20 },
289 { "SCSIENWRDIS", 0x40, 0x40 },
290 { "PRELOADEN", 0x80, 0x80 }
294 ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
296 return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
297 0x19, regvalue, cur_col, wrap));
300 static ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
301 { "CIOPARCKEN", 0x01, 0x01 },
302 { "DISABLE_TWATE", 0x02, 0x02 },
303 { "EXTREQLCK", 0x10, 0x10 },
304 { "MPARCKEN", 0x20, 0x20 },
305 { "DPARCKEN", 0x40, 0x40 },
306 { "CACHETHEN", 0x80, 0x80 }
310 ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
312 return (ahd_print_register(DSCOMMAND0_parse_table, 6, "DSCOMMAND0",
313 0x19, regvalue, cur_col, wrap));
316 static ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
317 { "FIFOEMP", 0x01, 0x01 },
318 { "FIFOFULL", 0x02, 0x02 },
319 { "DFTHRESH", 0x04, 0x04 },
320 { "HDONE", 0x08, 0x08 },
321 { "MREQPEND", 0x10, 0x10 },
322 { "PKT_PRELOAD_AVAIL", 0x40, 0x40 },
323 { "PRELOAD_AVAIL", 0x80, 0x80 }
327 ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
329 return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
330 0x1a, regvalue, cur_col, wrap));
333 static ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
334 { "LAST_SEG_DONE", 0x01, 0x01 },
335 { "LAST_SEG", 0x02, 0x02 },
336 { "ODD_SEG", 0x04, 0x04 },
337 { "SG_ADDR_MASK", 0xf8, 0xf8 }
341 ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
343 return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
344 0x1b, regvalue, cur_col, wrap));
347 static ahd_reg_parse_entry_t ARBCTL_parse_table[] = {
348 { "USE_TIME", 0x07, 0x07 },
349 { "RETRY_SWEN", 0x08, 0x08 },
350 { "RESET_HARB", 0x80, 0x80 }
354 ahd_arbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
356 return (ahd_print_register(ARBCTL_parse_table, 3, "ARBCTL",
357 0x1b, regvalue, cur_col, wrap));
360 static ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
361 { "LAST_SEG", 0x02, 0x02 },
362 { "ODD_SEG", 0x04, 0x04 },
363 { "SG_ADDR_MASK", 0xf8, 0xf8 }
367 ahd_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
369 return (ahd_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
370 0x1b, regvalue, cur_col, wrap));
374 ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
376 return (ahd_print_register(NULL, 0, "LQIN",
377 0x20, regvalue, cur_col, wrap));
381 ahd_typeptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
383 return (ahd_print_register(NULL, 0, "TYPEPTR",
384 0x20, regvalue, cur_col, wrap));
388 ahd_tagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
390 return (ahd_print_register(NULL, 0, "TAGPTR",
391 0x21, regvalue, cur_col, wrap));
395 ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
397 return (ahd_print_register(NULL, 0, "LUNPTR",
398 0x22, regvalue, cur_col, wrap));
402 ahd_datalenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
404 return (ahd_print_register(NULL, 0, "DATALENPTR",
405 0x23, regvalue, cur_col, wrap));
409 ahd_statlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
411 return (ahd_print_register(NULL, 0, "STATLENPTR",
412 0x24, regvalue, cur_col, wrap));
416 ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
418 return (ahd_print_register(NULL, 0, "CMDLENPTR",
419 0x25, regvalue, cur_col, wrap));
423 ahd_attrptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
425 return (ahd_print_register(NULL, 0, "ATTRPTR",
426 0x26, regvalue, cur_col, wrap));
430 ahd_flagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
432 return (ahd_print_register(NULL, 0, "FLAGPTR",
433 0x27, regvalue, cur_col, wrap));
437 ahd_cmdptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
439 return (ahd_print_register(NULL, 0, "CMDPTR",
440 0x28, regvalue, cur_col, wrap));
444 ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
446 return (ahd_print_register(NULL, 0, "QNEXTPTR",
447 0x29, regvalue, cur_col, wrap));
451 ahd_idptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
453 return (ahd_print_register(NULL, 0, "IDPTR",
454 0x2a, regvalue, cur_col, wrap));
458 ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
460 return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
461 0x2b, regvalue, cur_col, wrap));
465 ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
467 return (ahd_print_register(NULL, 0, "ABRTBITPTR",
468 0x2c, regvalue, cur_col, wrap));
472 ahd_maxcmdbytes_print(u_int regvalue, u_int *cur_col, u_int wrap)
474 return (ahd_print_register(NULL, 0, "MAXCMDBYTES",
475 0x2d, regvalue, cur_col, wrap));
479 ahd_maxcmd2rcv_print(u_int regvalue, u_int *cur_col, u_int wrap)
481 return (ahd_print_register(NULL, 0, "MAXCMD2RCV",
482 0x2e, regvalue, cur_col, wrap));
486 ahd_shortthresh_print(u_int regvalue, u_int *cur_col, u_int wrap)
488 return (ahd_print_register(NULL, 0, "SHORTTHRESH",
489 0x2f, regvalue, cur_col, wrap));
493 ahd_lunlen_print(u_int regvalue, u_int *cur_col, u_int wrap)
495 return (ahd_print_register(NULL, 0, "LUNLEN",
496 0x30, regvalue, cur_col, wrap));
500 ahd_cdblimit_print(u_int regvalue, u_int *cur_col, u_int wrap)
502 return (ahd_print_register(NULL, 0, "CDBLIMIT",
503 0x31, regvalue, cur_col, wrap));
507 ahd_maxcmd_print(u_int regvalue, u_int *cur_col, u_int wrap)
509 return (ahd_print_register(NULL, 0, "MAXCMD",
510 0x32, regvalue, cur_col, wrap));
514 ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
516 return (ahd_print_register(NULL, 0, "MAXCMDCNT",
517 0x33, regvalue, cur_col, wrap));
521 ahd_lqrsvd01_print(u_int regvalue, u_int *cur_col, u_int wrap)
523 return (ahd_print_register(NULL, 0, "LQRSVD01",
524 0x34, regvalue, cur_col, wrap));
528 ahd_lqrsvd16_print(u_int regvalue, u_int *cur_col, u_int wrap)
530 return (ahd_print_register(NULL, 0, "LQRSVD16",
531 0x35, regvalue, cur_col, wrap));
535 ahd_lqrsvd17_print(u_int regvalue, u_int *cur_col, u_int wrap)
537 return (ahd_print_register(NULL, 0, "LQRSVD17",
538 0x36, regvalue, cur_col, wrap));
542 ahd_cmdrsvd0_print(u_int regvalue, u_int *cur_col, u_int wrap)
544 return (ahd_print_register(NULL, 0, "CMDRSVD0",
545 0x37, regvalue, cur_col, wrap));
548 static ahd_reg_parse_entry_t LQCTL0_parse_table[] = {
549 { "LQ0INITGCLT", 0x03, 0x03 },
550 { "LQ0TARGCLT", 0x0c, 0x0c },
551 { "LQIINITGCLT", 0x30, 0x30 },
552 { "LQITARGCLT", 0xc0, 0xc0 }
556 ahd_lqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
558 return (ahd_print_register(LQCTL0_parse_table, 4, "LQCTL0",
559 0x38, regvalue, cur_col, wrap));
562 static ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
563 { "ABORTPENDING", 0x01, 0x01 },
564 { "SINGLECMD", 0x02, 0x02 },
565 { "PCI2PCI", 0x04, 0x04 }
569 ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
571 return (ahd_print_register(LQCTL1_parse_table, 3, "LQCTL1",
572 0x38, regvalue, cur_col, wrap));
575 static ahd_reg_parse_entry_t SCSBIST0_parse_table[] = {
576 { "OSBISTRUN", 0x01, 0x01 },
577 { "OSBISTDONE", 0x02, 0x02 },
578 { "OSBISTERR", 0x04, 0x04 },
579 { "GSBISTRUN", 0x10, 0x10 },
580 { "GSBISTDONE", 0x20, 0x20 },
581 { "GSBISTERR", 0x40, 0x40 }
585 ahd_scsbist0_print(u_int regvalue, u_int *cur_col, u_int wrap)
587 return (ahd_print_register(SCSBIST0_parse_table, 6, "SCSBIST0",
588 0x39, regvalue, cur_col, wrap));
591 static ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
592 { "LQOPAUSE", 0x01, 0x01 },
593 { "LQOTOIDLE", 0x02, 0x02 },
594 { "LQOCONTINUE", 0x04, 0x04 },
595 { "LQORETRY", 0x08, 0x08 },
596 { "LQIPAUSE", 0x10, 0x10 },
597 { "LQITOIDLE", 0x20, 0x20 },
598 { "LQICONTINUE", 0x40, 0x40 },
599 { "LQIRETRY", 0x80, 0x80 }
603 ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
605 return (ahd_print_register(LQCTL2_parse_table, 8, "LQCTL2",
606 0x39, regvalue, cur_col, wrap));
609 static ahd_reg_parse_entry_t SCSBIST1_parse_table[] = {
610 { "NTBISTRUN", 0x01, 0x01 },
611 { "NTBISTDONE", 0x02, 0x02 },
612 { "NTBISTERR", 0x04, 0x04 }
616 ahd_scsbist1_print(u_int regvalue, u_int *cur_col, u_int wrap)
618 return (ahd_print_register(SCSBIST1_parse_table, 3, "SCSBIST1",
619 0x3a, regvalue, cur_col, wrap));
622 static ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
623 { "SCSIRSTO", 0x01, 0x01 },
624 { "FORCEBUSFREE", 0x10, 0x10 },
625 { "ENARBO", 0x20, 0x20 },
626 { "ENSELO", 0x40, 0x40 },
627 { "TEMODEO", 0x80, 0x80 }
631 ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
633 return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
634 0x3a, regvalue, cur_col, wrap));
637 static ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
638 { "ALTSTIM", 0x01, 0x01 },
639 { "ENAUTOATNP", 0x02, 0x02 },
640 { "MANUALP", 0x0c, 0x0c },
641 { "ENRSELI", 0x10, 0x10 },
642 { "ENSELI", 0x20, 0x20 },
643 { "MANUALCTL", 0x40, 0x40 }
647 ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
649 return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
650 0x3b, regvalue, cur_col, wrap));
653 static ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
654 { "SPIOEN", 0x08, 0x08 },
655 { "BIOSCANCELEN", 0x10, 0x10 },
656 { "DFPEXP", 0x40, 0x40 },
657 { "DFON", 0x80, 0x80 }
661 ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
663 return (ahd_print_register(SXFRCTL0_parse_table, 4, "SXFRCTL0",
664 0x3c, regvalue, cur_col, wrap));
668 ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
670 return (ahd_print_register(NULL, 0, "BUSINITID",
671 0x3c, regvalue, cur_col, wrap));
675 ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
677 return (ahd_print_register(NULL, 0, "DLCOUNT",
678 0x3c, regvalue, cur_col, wrap));
681 static ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
682 { "STPWEN", 0x01, 0x01 },
683 { "ACTNEGEN", 0x02, 0x02 },
684 { "ENSTIMER", 0x04, 0x04 },
685 { "STIMESEL", 0x18, 0x18 },
686 { "ENSPCHK", 0x20, 0x20 },
687 { "ENSACHK", 0x40, 0x40 },
688 { "BITBUCKET", 0x80, 0x80 }
692 ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
694 return (ahd_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
695 0x3d, regvalue, cur_col, wrap));
699 ahd_bustargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
701 return (ahd_print_register(NULL, 0, "BUSTARGID",
702 0x3e, regvalue, cur_col, wrap));
705 static ahd_reg_parse_entry_t SXFRCTL2_parse_table[] = {
706 { "ASU", 0x07, 0x07 },
707 { "CMDDMAEN", 0x08, 0x08 },
708 { "AUTORSTDIS", 0x10, 0x10 }
712 ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
714 return (ahd_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
715 0x3e, regvalue, cur_col, wrap));
718 static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
719 { "CURRFIFO_0", 0x00, 0x03 },
720 { "CURRFIFO_1", 0x01, 0x03 },
721 { "CURRFIFO_NONE", 0x03, 0x03 },
722 { "FIFO0FREE", 0x10, 0x10 },
723 { "FIFO1FREE", 0x20, 0x20 },
724 { "CURRFIFO", 0x03, 0x03 }
728 ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
730 return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
731 0x3f, regvalue, cur_col, wrap));
734 static ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
735 { "P_DATAOUT", 0x00, 0xe0 },
736 { "P_DATAOUT_DT", 0x20, 0xe0 },
737 { "P_DATAIN", 0x40, 0xe0 },
738 { "P_DATAIN_DT", 0x60, 0xe0 },
739 { "P_COMMAND", 0x80, 0xe0 },
740 { "P_MESGOUT", 0xa0, 0xe0 },
741 { "P_STATUS", 0xc0, 0xe0 },
742 { "P_MESGIN", 0xe0, 0xe0 },
743 { "ACKO", 0x01, 0x01 },
744 { "REQO", 0x02, 0x02 },
745 { "BSYO", 0x04, 0x04 },
746 { "SELO", 0x08, 0x08 },
747 { "ATNO", 0x10, 0x10 },
748 { "MSGO", 0x20, 0x20 },
749 { "IOO", 0x40, 0x40 },
750 { "CDO", 0x80, 0x80 },
751 { "PHASE_MASK", 0xe0, 0xe0 }
755 ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
757 return (ahd_print_register(SCSISIGO_parse_table, 17, "SCSISIGO",
758 0x40, regvalue, cur_col, wrap));
762 ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
764 return (ahd_print_register(NULL, 0, "MULTARGID",
765 0x40, regvalue, cur_col, wrap));
768 static ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
769 { "P_DATAOUT", 0x00, 0xe0 },
770 { "P_DATAOUT_DT", 0x20, 0xe0 },
771 { "P_DATAIN", 0x40, 0xe0 },
772 { "P_DATAIN_DT", 0x60, 0xe0 },
773 { "P_COMMAND", 0x80, 0xe0 },
774 { "P_MESGOUT", 0xa0, 0xe0 },
775 { "P_STATUS", 0xc0, 0xe0 },
776 { "P_MESGIN", 0xe0, 0xe0 },
777 { "ACKI", 0x01, 0x01 },
778 { "REQI", 0x02, 0x02 },
779 { "BSYI", 0x04, 0x04 },
780 { "SELI", 0x08, 0x08 },
781 { "ATNI", 0x10, 0x10 },
782 { "MSGI", 0x20, 0x20 },
783 { "IOI", 0x40, 0x40 },
784 { "CDI", 0x80, 0x80 },
785 { "PHASE_MASK", 0xe0, 0xe0 }
789 ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
791 return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
792 0x41, regvalue, cur_col, wrap));
795 static ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
796 { "DATA_OUT_PHASE", 0x01, 0x03 },
797 { "DATA_IN_PHASE", 0x02, 0x03 },
798 { "DATA_PHASE_MASK", 0x03, 0x03 },
799 { "MSG_OUT_PHASE", 0x04, 0x04 },
800 { "MSG_IN_PHASE", 0x08, 0x08 },
801 { "COMMAND_PHASE", 0x10, 0x10 },
802 { "STATUS_PHASE", 0x20, 0x20 }
806 ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
808 return (ahd_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
809 0x42, regvalue, cur_col, wrap));
813 ahd_scsidat0_img_print(u_int regvalue, u_int *cur_col, u_int wrap)
815 return (ahd_print_register(NULL, 0, "SCSIDAT0_IMG",
816 0x43, regvalue, cur_col, wrap));
820 ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
822 return (ahd_print_register(NULL, 0, "SCSIDAT",
823 0x44, regvalue, cur_col, wrap));
827 ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
829 return (ahd_print_register(NULL, 0, "SCSIBUS",
830 0x46, regvalue, cur_col, wrap));
833 static ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
834 { "TARGID", 0x0f, 0x0f },
835 { "CLKOUT", 0x80, 0x80 }
839 ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
841 return (ahd_print_register(TARGIDIN_parse_table, 2, "TARGIDIN",
842 0x48, regvalue, cur_col, wrap));
845 static ahd_reg_parse_entry_t SELID_parse_table[] = {
846 { "ONEBIT", 0x08, 0x08 },
847 { "SELID_MASK", 0xf0, 0xf0 }
851 ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
853 return (ahd_print_register(SELID_parse_table, 2, "SELID",
854 0x49, regvalue, cur_col, wrap));
857 static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
858 { "SELWIDE", 0x02, 0x02 },
859 { "ENAB20", 0x04, 0x04 },
860 { "ENAB40", 0x08, 0x08 },
861 { "DIAGLEDON", 0x40, 0x40 },
862 { "DIAGLEDEN", 0x80, 0x80 }
866 ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
868 return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
869 0x4a, regvalue, cur_col, wrap));
872 static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
873 { "AUTO_MSGOUT_DE", 0x02, 0x02 },
874 { "ENDGFORMCHK", 0x04, 0x04 },
875 { "BUSFREEREV", 0x10, 0x10 },
876 { "BIASCANCTL", 0x20, 0x20 },
877 { "AUTOACKEN", 0x40, 0x40 },
878 { "BIOSCANCTL", 0x80, 0x80 },
879 { "OPTIONMODE_DEFAULTS",0x02, 0x02 }
883 ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
885 return (ahd_print_register(OPTIONMODE_parse_table, 7, "OPTIONMODE",
886 0x4a, regvalue, cur_col, wrap));
889 static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
890 { "ARBDO", 0x01, 0x01 },
891 { "SPIORDY", 0x02, 0x02 },
892 { "OVERRUN", 0x04, 0x04 },
893 { "IOERR", 0x08, 0x08 },
894 { "SELINGO", 0x10, 0x10 },
895 { "SELDI", 0x20, 0x20 },
896 { "SELDO", 0x40, 0x40 },
897 { "TARGET", 0x80, 0x80 }
901 ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
903 return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
904 0x4b, regvalue, cur_col, wrap));
907 static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
908 { "CLRARBDO", 0x01, 0x01 },
909 { "CLRSPIORDY", 0x02, 0x02 },
910 { "CLROVERRUN", 0x04, 0x04 },
911 { "CLRIOERR", 0x08, 0x08 },
912 { "CLRSELINGO", 0x10, 0x10 },
913 { "CLRSELDI", 0x20, 0x20 },
914 { "CLRSELDO", 0x40, 0x40 }
918 ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
920 return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
921 0x4b, regvalue, cur_col, wrap));
924 static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
925 { "ENARBDO", 0x01, 0x01 },
926 { "ENSPIORDY", 0x02, 0x02 },
927 { "ENOVERRUN", 0x04, 0x04 },
928 { "ENIOERR", 0x08, 0x08 },
929 { "ENSELINGO", 0x10, 0x10 },
930 { "ENSELDI", 0x20, 0x20 },
931 { "ENSELDO", 0x40, 0x40 }
935 ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
937 return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
938 0x4b, regvalue, cur_col, wrap));
941 static ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
942 { "CLRREQINIT", 0x01, 0x01 },
943 { "CLRSTRB2FAST", 0x02, 0x02 },
944 { "CLRSCSIPERR", 0x04, 0x04 },
945 { "CLRBUSFREE", 0x08, 0x08 },
946 { "CLRSCSIRSTI", 0x20, 0x20 },
947 { "CLRATNO", 0x40, 0x40 },
948 { "CLRSELTIMEO", 0x80, 0x80 }
952 ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
954 return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
955 0x4c, regvalue, cur_col, wrap));
958 static ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
959 { "REQINIT", 0x01, 0x01 },
960 { "STRB2FAST", 0x02, 0x02 },
961 { "SCSIPERR", 0x04, 0x04 },
962 { "BUSFREE", 0x08, 0x08 },
963 { "PHASEMIS", 0x10, 0x10 },
964 { "SCSIRSTI", 0x20, 0x20 },
965 { "ATNTARG", 0x40, 0x40 },
966 { "SELTO", 0x80, 0x80 }
970 ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
972 return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
973 0x4c, regvalue, cur_col, wrap));
976 static ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
977 { "BUSFREE_LQO", 0x40, 0xc0 },
978 { "BUSFREE_DFF0", 0x80, 0xc0 },
979 { "BUSFREE_DFF1", 0xc0, 0xc0 },
980 { "DMADONE", 0x01, 0x01 },
981 { "SDONE", 0x02, 0x02 },
982 { "WIDE_RES", 0x04, 0x04 },
983 { "BSYX", 0x08, 0x08 },
984 { "EXP_ACTIVE", 0x10, 0x10 },
985 { "NONPACKREQ", 0x20, 0x20 },
986 { "BUSFREETIME", 0xc0, 0xc0 }
990 ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
992 return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
993 0x4d, regvalue, cur_col, wrap));
996 static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
997 { "CLRDMADONE", 0x01, 0x01 },
998 { "CLRSDONE", 0x02, 0x02 },
999 { "CLRWIDE_RES", 0x04, 0x04 },
1000 { "CLRNONPACKREQ", 0x20, 0x20 }
1004 ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1006 return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
1007 0x4d, regvalue, cur_col, wrap));
1010 static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
1011 { "ENDMADONE", 0x01, 0x01 },
1012 { "ENSDONE", 0x02, 0x02 },
1013 { "ENWIDE_RES", 0x04, 0x04 }
1017 ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1019 return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
1020 0x4d, regvalue, cur_col, wrap));
1023 static ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
1024 { "DTERR", 0x01, 0x01 },
1025 { "DGFORMERR", 0x02, 0x02 },
1026 { "CRCERR", 0x04, 0x04 },
1027 { "AIPERR", 0x08, 0x08 },
1028 { "PARITYERR", 0x10, 0x10 },
1029 { "PREVPHASE", 0x20, 0x20 },
1030 { "HIPERR", 0x40, 0x40 },
1031 { "HIZERO", 0x80, 0x80 }
1035 ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1037 return (ahd_print_register(PERRDIAG_parse_table, 8, "PERRDIAG",
1038 0x4e, regvalue, cur_col, wrap));
1042 ahd_lqistate_print(u_int regvalue, u_int *cur_col, u_int wrap)
1044 return (ahd_print_register(NULL, 0, "LQISTATE",
1045 0x4e, regvalue, cur_col, wrap));
1049 ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1051 return (ahd_print_register(NULL, 0, "SOFFCNT",
1052 0x4f, regvalue, cur_col, wrap));
1056 ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
1058 return (ahd_print_register(NULL, 0, "LQOSTATE",
1059 0x4f, regvalue, cur_col, wrap));
1062 static ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
1063 { "LQIATNCMD", 0x01, 0x01 },
1064 { "LQIATNLQ", 0x02, 0x02 },
1065 { "LQIBADLQT", 0x04, 0x04 },
1066 { "LQICRCT2", 0x08, 0x08 },
1067 { "LQICRCT1", 0x10, 0x10 },
1068 { "LQIATNQAS", 0x20, 0x20 }
1072 ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1074 return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
1075 0x50, regvalue, cur_col, wrap));
1078 static ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
1079 { "CLRLQIATNCMD", 0x01, 0x01 },
1080 { "CLRLQIATNLQ", 0x02, 0x02 },
1081 { "CLRLQIBADLQT", 0x04, 0x04 },
1082 { "CLRLQICRCT2", 0x08, 0x08 },
1083 { "CLRLQICRCT1", 0x10, 0x10 },
1084 { "CLRLQIATNQAS", 0x20, 0x20 }
1088 ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1090 return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
1091 0x50, regvalue, cur_col, wrap));
1094 static ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
1095 { "ENLQIATNCMD", 0x01, 0x01 },
1096 { "ENLQIATNLQ", 0x02, 0x02 },
1097 { "ENLQIBADLQT", 0x04, 0x04 },
1098 { "ENLQICRCT2", 0x08, 0x08 },
1099 { "ENLQICRCT1", 0x10, 0x10 },
1100 { "ENLQIATNQASK", 0x20, 0x20 }
1104 ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1106 return (ahd_print_register(LQIMODE0_parse_table, 6, "LQIMODE0",
1107 0x50, regvalue, cur_col, wrap));
1110 static ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
1111 { "ENLQIOVERI_NLQ", 0x01, 0x01 },
1112 { "ENLQIOVERI_LQ", 0x02, 0x02 },
1113 { "ENLQIBADLQI", 0x04, 0x04 },
1114 { "ENLQICRCI_NLQ", 0x08, 0x08 },
1115 { "ENLQICRCI_LQ", 0x10, 0x10 },
1116 { "ENLIQABORT", 0x20, 0x20 },
1117 { "ENLQIPHASE_NLQ", 0x40, 0x40 },
1118 { "ENLQIPHASE_LQ", 0x80, 0x80 }
1122 ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1124 return (ahd_print_register(LQIMODE1_parse_table, 8, "LQIMODE1",
1125 0x51, regvalue, cur_col, wrap));
1128 static ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
1129 { "LQIOVERI_NLQ", 0x01, 0x01 },
1130 { "LQIOVERI_LQ", 0x02, 0x02 },
1131 { "LQIBADLQI", 0x04, 0x04 },
1132 { "LQICRCI_NLQ", 0x08, 0x08 },
1133 { "LQICRCI_LQ", 0x10, 0x10 },
1134 { "LQIABORT", 0x20, 0x20 },
1135 { "LQIPHASE_NLQ", 0x40, 0x40 },
1136 { "LQIPHASE_LQ", 0x80, 0x80 }
1140 ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1142 return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
1143 0x51, regvalue, cur_col, wrap));
1146 static ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
1147 { "CLRLQIOVERI_NLQ", 0x01, 0x01 },
1148 { "CLRLQIOVERI_LQ", 0x02, 0x02 },
1149 { "CLRLQIBADLQI", 0x04, 0x04 },
1150 { "CLRLQICRCI_NLQ", 0x08, 0x08 },
1151 { "CLRLQICRCI_LQ", 0x10, 0x10 },
1152 { "CLRLIQABORT", 0x20, 0x20 },
1153 { "CLRLQIPHASE_NLQ", 0x40, 0x40 },
1154 { "CLRLQIPHASE_LQ", 0x80, 0x80 }
1158 ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1160 return (ahd_print_register(CLRLQIINT1_parse_table, 8, "CLRLQIINT1",
1161 0x51, regvalue, cur_col, wrap));
1164 static ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
1165 { "LQIGSAVAIL", 0x01, 0x01 },
1166 { "LQISTOPCMD", 0x02, 0x02 },
1167 { "LQISTOPLQ", 0x04, 0x04 },
1168 { "LQISTOPPKT", 0x08, 0x08 },
1169 { "LQIWAITFIFO", 0x10, 0x10 },
1170 { "LQIWORKONLQ", 0x20, 0x20 },
1171 { "LQIPHASE_OUTPKT", 0x40, 0x40 },
1172 { "PACKETIZED", 0x80, 0x80 }
1176 ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1178 return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
1179 0x52, regvalue, cur_col, wrap));
1182 static ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
1183 { "OSRAMPERR", 0x01, 0x01 },
1184 { "NTRAMPERR", 0x02, 0x02 }
1188 ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
1190 return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
1191 0x53, regvalue, cur_col, wrap));
1194 static ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
1195 { "ENOSRAMPERR", 0x01, 0x01 },
1196 { "ENNTRAMPERR", 0x02, 0x02 }
1200 ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
1202 return (ahd_print_register(SIMODE3_parse_table, 2, "SIMODE3",
1203 0x53, regvalue, cur_col, wrap));
1206 static ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
1207 { "CLROSRAMPERR", 0x01, 0x01 },
1208 { "CLRNTRAMPERR", 0x02, 0x02 }
1212 ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
1214 return (ahd_print_register(CLRSINT3_parse_table, 2, "CLRSINT3",
1215 0x53, regvalue, cur_col, wrap));
1218 static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
1219 { "ENLQOTCRC", 0x01, 0x01 },
1220 { "ENLQOATNPKT", 0x02, 0x02 },
1221 { "ENLQOATNLQ", 0x04, 0x04 },
1222 { "ENLQOSTOPT2", 0x08, 0x08 },
1223 { "ENLQOTARGSCBPERR", 0x10, 0x10 }
1227 ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1229 return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
1230 0x54, regvalue, cur_col, wrap));
1233 static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
1234 { "LQOTCRC", 0x01, 0x01 },
1235 { "LQOATNPKT", 0x02, 0x02 },
1236 { "LQOATNLQ", 0x04, 0x04 },
1237 { "LQOSTOPT2", 0x08, 0x08 },
1238 { "LQOTARGSCBPERR", 0x10, 0x10 }
1242 ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1244 return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
1245 0x54, regvalue, cur_col, wrap));
1248 static ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
1249 { "CLRLQOTCRC", 0x01, 0x01 },
1250 { "CLRLQOATNPKT", 0x02, 0x02 },
1251 { "CLRLQOATNLQ", 0x04, 0x04 },
1252 { "CLRLQOSTOPT2", 0x08, 0x08 },
1253 { "CLRLQOTARGSCBPERR", 0x10, 0x10 }
1257 ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1259 return (ahd_print_register(CLRLQOINT0_parse_table, 5, "CLRLQOINT0",
1260 0x54, regvalue, cur_col, wrap));
1263 static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
1264 { "LQOPHACHGINPKT", 0x01, 0x01 },
1265 { "LQOBUSFREE", 0x02, 0x02 },
1266 { "LQOBADQAS", 0x04, 0x04 },
1267 { "LQOSTOPI2", 0x08, 0x08 },
1268 { "LQOINITSCBPERR", 0x10, 0x10 }
1272 ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1274 return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
1275 0x55, regvalue, cur_col, wrap));
1278 static ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
1279 { "CLRLQOPHACHGINPKT", 0x01, 0x01 },
1280 { "CLRLQOBUSFREE", 0x02, 0x02 },
1281 { "CLRLQOBADQAS", 0x04, 0x04 },
1282 { "CLRLQOSTOPI2", 0x08, 0x08 },
1283 { "CLRLQOINITSCBPERR", 0x10, 0x10 }
1287 ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1289 return (ahd_print_register(CLRLQOINT1_parse_table, 5, "CLRLQOINT1",
1290 0x55, regvalue, cur_col, wrap));
1293 static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
1294 { "ENLQOPHACHGINPKT", 0x01, 0x01 },
1295 { "ENLQOBUSFREE", 0x02, 0x02 },
1296 { "ENLQOBADQAS", 0x04, 0x04 },
1297 { "ENLQOSTOPI2", 0x08, 0x08 },
1298 { "ENLQOINITSCBPERR", 0x10, 0x10 }
1302 ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1304 return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
1305 0x55, regvalue, cur_col, wrap));
1308 static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
1309 { "LQOSTOP0", 0x01, 0x01 },
1310 { "LQOPHACHGOUTPKT", 0x02, 0x02 },
1311 { "LQOWAITFIFO", 0x10, 0x10 },
1312 { "LQOPKT", 0xe0, 0xe0 }
1316 ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1318 return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
1319 0x56, regvalue, cur_col, wrap));
1323 ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1325 return (ahd_print_register(NULL, 0, "OS_SPACE_CNT",
1326 0x56, regvalue, cur_col, wrap));
1329 static ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
1330 { "ENREQINIT", 0x01, 0x01 },
1331 { "ENSTRB2FAST", 0x02, 0x02 },
1332 { "ENSCSIPERR", 0x04, 0x04 },
1333 { "ENBUSFREE", 0x08, 0x08 },
1334 { "ENPHASEMIS", 0x10, 0x10 },
1335 { "ENSCSIRST", 0x20, 0x20 },
1336 { "ENATNTARG", 0x40, 0x40 },
1337 { "ENSELTIMO", 0x80, 0x80 }
1341 ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1343 return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
1344 0x57, regvalue, cur_col, wrap));
1348 ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1350 return (ahd_print_register(NULL, 0, "GSFIFO",
1351 0x58, regvalue, cur_col, wrap));
1354 static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
1355 { "RSTCHN", 0x01, 0x01 },
1356 { "CLRCHN", 0x02, 0x02 },
1357 { "CLRSHCNT", 0x04, 0x04 },
1358 { "DFFBITBUCKET", 0x08, 0x08 }
1362 ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1364 return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
1365 0x5a, regvalue, cur_col, wrap));
1368 static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
1369 { "LQONOCHKOVER", 0x01, 0x01 },
1370 { "LQOH2A_VERSION", 0x80, 0x80 }
1374 ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1376 return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
1377 0x5a, regvalue, cur_col, wrap));
1381 ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1383 return (ahd_print_register(NULL, 0, "NEXTSCB",
1384 0x5a, regvalue, cur_col, wrap));
1387 static ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
1388 { "CLRCFG4TCMD", 0x01, 0x01 },
1389 { "CLRCFG4ICMD", 0x02, 0x02 },
1390 { "CLRCFG4TSTAT", 0x04, 0x04 },
1391 { "CLRCFG4ISTAT", 0x08, 0x08 },
1392 { "CLRCFG4DATA", 0x10, 0x10 },
1393 { "CLRSAVEPTRS", 0x20, 0x20 },
1394 { "CLRCTXTDONE", 0x40, 0x40 }
1398 ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
1400 return (ahd_print_register(CLRSEQINTSRC_parse_table, 7, "CLRSEQINTSRC",
1401 0x5b, regvalue, cur_col, wrap));
1404 static ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
1405 { "CFG4TCMD", 0x01, 0x01 },
1406 { "CFG4ICMD", 0x02, 0x02 },
1407 { "CFG4TSTAT", 0x04, 0x04 },
1408 { "CFG4ISTAT", 0x08, 0x08 },
1409 { "CFG4DATA", 0x10, 0x10 },
1410 { "SAVEPTRS", 0x20, 0x20 },
1411 { "CTXTDONE", 0x40, 0x40 }
1415 ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
1417 return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
1418 0x5b, regvalue, cur_col, wrap));
1422 ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1424 return (ahd_print_register(NULL, 0, "CURRSCB",
1425 0x5c, regvalue, cur_col, wrap));
1428 static ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
1429 { "ENCFG4TCMD", 0x01, 0x01 },
1430 { "ENCFG4ICMD", 0x02, 0x02 },
1431 { "ENCFG4TSTAT", 0x04, 0x04 },
1432 { "ENCFG4ISTAT", 0x08, 0x08 },
1433 { "ENCFG4DATA", 0x10, 0x10 },
1434 { "ENSAVEPTRS", 0x20, 0x20 },
1435 { "ENCTXTDONE", 0x40, 0x40 }
1439 ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
1441 return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
1442 0x5c, regvalue, cur_col, wrap));
1445 static ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
1446 { "FIFOFREE", 0x01, 0x01 },
1447 { "DATAINFIFO", 0x02, 0x02 },
1448 { "DLZERO", 0x04, 0x04 },
1449 { "SHVALID", 0x08, 0x08 },
1450 { "LASTSDONE", 0x10, 0x10 },
1451 { "SHCNTMINUS1", 0x20, 0x20 },
1452 { "SHCNTNEGATIVE", 0x40, 0x40 }
1456 ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1458 return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
1459 0x5d, regvalue, cur_col, wrap));
1462 static ahd_reg_parse_entry_t CRCCONTROL_parse_table[] = {
1463 { "CRCVALCHKEN", 0x40, 0x40 }
1467 ahd_crccontrol_print(u_int regvalue, u_int *cur_col, u_int wrap)
1469 return (ahd_print_register(CRCCONTROL_parse_table, 1, "CRCCONTROL",
1470 0x5d, regvalue, cur_col, wrap));
1474 ahd_dfftag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1476 return (ahd_print_register(NULL, 0, "DFFTAG",
1477 0x5e, regvalue, cur_col, wrap));
1481 ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
1483 return (ahd_print_register(NULL, 0, "LASTSCB",
1484 0x5e, regvalue, cur_col, wrap));
1487 static ahd_reg_parse_entry_t SCSITEST_parse_table[] = {
1488 { "SEL_TXPLL_DEBUG", 0x04, 0x04 },
1489 { "CNTRTEST", 0x08, 0x08 }
1493 ahd_scsitest_print(u_int regvalue, u_int *cur_col, u_int wrap)
1495 return (ahd_print_register(SCSITEST_parse_table, 2, "SCSITEST",
1496 0x5e, regvalue, cur_col, wrap));
1499 static ahd_reg_parse_entry_t IOPDNCTL_parse_table[] = {
1500 { "PDN_DIFFSENSE", 0x01, 0x01 },
1501 { "PDN_IDIST", 0x04, 0x04 },
1502 { "DISABLE_OE", 0x80, 0x80 }
1506 ahd_iopdnctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1508 return (ahd_print_register(IOPDNCTL_parse_table, 3, "IOPDNCTL",
1509 0x5f, regvalue, cur_col, wrap));
1513 ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1515 return (ahd_print_register(NULL, 0, "SHADDR",
1516 0x60, regvalue, cur_col, wrap));
1520 ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1522 return (ahd_print_register(NULL, 0, "NEGOADDR",
1523 0x60, regvalue, cur_col, wrap));
1527 ahd_dgrpcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
1529 return (ahd_print_register(NULL, 0, "DGRPCRCI",
1530 0x60, regvalue, cur_col, wrap));
1534 ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
1536 return (ahd_print_register(NULL, 0, "NEGPERIOD",
1537 0x61, regvalue, cur_col, wrap));
1541 ahd_packcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
1543 return (ahd_print_register(NULL, 0, "PACKCRCI",
1544 0x62, regvalue, cur_col, wrap));
1548 ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
1550 return (ahd_print_register(NULL, 0, "NEGOFFSET",
1551 0x62, regvalue, cur_col, wrap));
1554 static ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
1555 { "PPROPT_IUT", 0x01, 0x01 },
1556 { "PPROPT_DT", 0x02, 0x02 },
1557 { "PPROPT_QAS", 0x04, 0x04 },
1558 { "PPROPT_PACE", 0x08, 0x08 }
1562 ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
1564 return (ahd_print_register(NEGPPROPTS_parse_table, 4, "NEGPPROPTS",
1565 0x63, regvalue, cur_col, wrap));
1568 static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
1569 { "WIDEXFER", 0x01, 0x01 },
1570 { "ENAUTOATNO", 0x02, 0x02 },
1571 { "ENAUTOATNI", 0x04, 0x04 },
1572 { "ENSLOWCRC", 0x08, 0x08 },
1573 { "RTI_OVRDTRN", 0x10, 0x10 },
1574 { "RTI_WRTDIS", 0x20, 0x20 },
1575 { "ENSNAPSHOT", 0x40, 0x40 }
1579 ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
1581 return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
1582 0x64, regvalue, cur_col, wrap));
1586 ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
1588 return (ahd_print_register(NULL, 0, "ANNEXCOL",
1589 0x65, regvalue, cur_col, wrap));
1592 static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
1593 { "LSTSGCLRDIS", 0x01, 0x01 },
1594 { "SHVALIDSTDIS", 0x02, 0x02 },
1595 { "DFFACTCLR", 0x04, 0x04 },
1596 { "SDONEMSKDIS", 0x08, 0x08 },
1597 { "WIDERESEN", 0x10, 0x10 },
1598 { "CURRFIFODEF", 0x20, 0x20 },
1599 { "STSELSKIDDIS", 0x40, 0x40 }
1603 ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
1605 return (ahd_print_register(SCSCHKN_parse_table, 7, "SCSCHKN",
1606 0x66, regvalue, cur_col, wrap));
1610 ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1612 return (ahd_print_register(NULL, 0, "ANNEXDAT",
1613 0x66, regvalue, cur_col, wrap));
1617 ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1619 return (ahd_print_register(NULL, 0, "IOWNID",
1620 0x67, regvalue, cur_col, wrap));
1623 static ahd_reg_parse_entry_t PLL960CTL0_parse_table[] = {
1624 { "PLL_ENFBM", 0x01, 0x01 },
1625 { "PLL_DLPF", 0x02, 0x02 },
1626 { "PLL_ENLPF", 0x04, 0x04 },
1627 { "PLL_ENLUD", 0x08, 0x08 },
1628 { "PLL_NS", 0x30, 0x30 },
1629 { "PLL_PWDN", 0x40, 0x40 },
1630 { "PLL_VCOSEL", 0x80, 0x80 }
1634 ahd_pll960ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1636 return (ahd_print_register(PLL960CTL0_parse_table, 7, "PLL960CTL0",
1637 0x68, regvalue, cur_col, wrap));
1641 ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1643 return (ahd_print_register(NULL, 0, "SHCNT",
1644 0x68, regvalue, cur_col, wrap));
1648 ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1650 return (ahd_print_register(NULL, 0, "TOWNID",
1651 0x69, regvalue, cur_col, wrap));
1654 static ahd_reg_parse_entry_t PLL960CTL1_parse_table[] = {
1655 { "PLL_RST", 0x01, 0x01 },
1656 { "PLL_CNTCLR", 0x40, 0x40 },
1657 { "PLL_CNTEN", 0x80, 0x80 }
1661 ahd_pll960ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1663 return (ahd_print_register(PLL960CTL1_parse_table, 3, "PLL960CTL1",
1664 0x69, regvalue, cur_col, wrap));
1668 ahd_pll960cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1670 return (ahd_print_register(NULL, 0, "PLL960CNT0",
1671 0x6a, regvalue, cur_col, wrap));
1675 ahd_xsig_print(u_int regvalue, u_int *cur_col, u_int wrap)
1677 return (ahd_print_register(NULL, 0, "XSIG",
1678 0x6a, regvalue, cur_col, wrap));
1682 ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1684 return (ahd_print_register(NULL, 0, "SELOID",
1685 0x6b, regvalue, cur_col, wrap));
1688 static ahd_reg_parse_entry_t PLL400CTL0_parse_table[] = {
1689 { "PLL_ENFBM", 0x01, 0x01 },
1690 { "PLL_DLPF", 0x02, 0x02 },
1691 { "PLL_ENLPF", 0x04, 0x04 },
1692 { "PLL_ENLUD", 0x08, 0x08 },
1693 { "PLL_NS", 0x30, 0x30 },
1694 { "PLL_PWDN", 0x40, 0x40 },
1695 { "PLL_VCOSEL", 0x80, 0x80 }
1699 ahd_pll400ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1701 return (ahd_print_register(PLL400CTL0_parse_table, 7, "PLL400CTL0",
1702 0x6c, regvalue, cur_col, wrap));
1706 ahd_fairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
1708 return (ahd_print_register(NULL, 0, "FAIRNESS",
1709 0x6c, regvalue, cur_col, wrap));
1712 static ahd_reg_parse_entry_t PLL400CTL1_parse_table[] = {
1713 { "PLL_RST", 0x01, 0x01 },
1714 { "PLL_CNTCLR", 0x40, 0x40 },
1715 { "PLL_CNTEN", 0x80, 0x80 }
1719 ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1721 return (ahd_print_register(PLL400CTL1_parse_table, 3, "PLL400CTL1",
1722 0x6d, regvalue, cur_col, wrap));
1726 ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1728 return (ahd_print_register(NULL, 0, "PLL400CNT0",
1729 0x6e, regvalue, cur_col, wrap));
1733 ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
1735 return (ahd_print_register(NULL, 0, "UNFAIRNESS",
1736 0x6e, regvalue, cur_col, wrap));
1740 ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1742 return (ahd_print_register(NULL, 0, "HADDR",
1743 0x70, regvalue, cur_col, wrap));
1746 static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
1747 { "SPLIT_DROP_REQ", 0x80, 0x80 }
1751 ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
1753 return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
1754 0x70, regvalue, cur_col, wrap));
1758 ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1760 return (ahd_print_register(NULL, 0, "HODMAADR",
1761 0x70, regvalue, cur_col, wrap));
1765 ahd_hodmacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1767 return (ahd_print_register(NULL, 0, "HODMACNT",
1768 0x78, regvalue, cur_col, wrap));
1772 ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1774 return (ahd_print_register(NULL, 0, "HCNT",
1775 0x78, regvalue, cur_col, wrap));
1779 ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
1781 return (ahd_print_register(NULL, 0, "HODMAEN",
1782 0x7a, regvalue, cur_col, wrap));
1786 ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1788 return (ahd_print_register(NULL, 0, "SGHADDR",
1789 0x7c, regvalue, cur_col, wrap));
1793 ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1795 return (ahd_print_register(NULL, 0, "SCBHADDR",
1796 0x7c, regvalue, cur_col, wrap));
1800 ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1802 return (ahd_print_register(NULL, 0, "SGHCNT",
1803 0x84, regvalue, cur_col, wrap));
1807 ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1809 return (ahd_print_register(NULL, 0, "SCBHCNT",
1810 0x84, regvalue, cur_col, wrap));
1813 static ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
1814 { "WR_DFTHRSH_MIN", 0x00, 0x70 },
1815 { "RD_DFTHRSH_MIN", 0x00, 0x07 },
1816 { "RD_DFTHRSH_25", 0x01, 0x07 },
1817 { "RD_DFTHRSH_50", 0x02, 0x07 },
1818 { "RD_DFTHRSH_63", 0x03, 0x07 },
1819 { "RD_DFTHRSH_75", 0x04, 0x07 },
1820 { "RD_DFTHRSH_85", 0x05, 0x07 },
1821 { "RD_DFTHRSH_90", 0x06, 0x07 },
1822 { "RD_DFTHRSH_MAX", 0x07, 0x07 },
1823 { "WR_DFTHRSH_25", 0x10, 0x70 },
1824 { "WR_DFTHRSH_50", 0x20, 0x70 },
1825 { "WR_DFTHRSH_63", 0x30, 0x70 },
1826 { "WR_DFTHRSH_75", 0x40, 0x70 },
1827 { "WR_DFTHRSH_85", 0x50, 0x70 },
1828 { "WR_DFTHRSH_90", 0x60, 0x70 },
1829 { "WR_DFTHRSH_MAX", 0x70, 0x70 },
1830 { "RD_DFTHRSH", 0x07, 0x07 },
1831 { "WR_DFTHRSH", 0x70, 0x70 }
1835 ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
1837 return (ahd_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
1838 0x88, regvalue, cur_col, wrap));
1842 ahd_romaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1844 return (ahd_print_register(NULL, 0, "ROMADDR",
1845 0x8a, regvalue, cur_col, wrap));
1848 static ahd_reg_parse_entry_t ROMCNTRL_parse_table[] = {
1849 { "RDY", 0x01, 0x01 },
1850 { "REPEAT", 0x02, 0x02 },
1851 { "ROMSPD", 0x18, 0x18 },
1852 { "ROMOP", 0xe0, 0xe0 }
1856 ahd_romcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1858 return (ahd_print_register(ROMCNTRL_parse_table, 4, "ROMCNTRL",
1859 0x8d, regvalue, cur_col, wrap));
1863 ahd_romdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
1865 return (ahd_print_register(NULL, 0, "ROMDATA",
1866 0x8e, regvalue, cur_col, wrap));
1869 static ahd_reg_parse_entry_t CMCRXMSG0_parse_table[] = {
1870 { "CFNUM", 0x07, 0x07 },
1871 { "CDNUM", 0xf8, 0xf8 }
1875 ahd_cmcrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1877 return (ahd_print_register(CMCRXMSG0_parse_table, 2, "CMCRXMSG0",
1878 0x90, regvalue, cur_col, wrap));
1881 static ahd_reg_parse_entry_t ROENABLE_parse_table[] = {
1882 { "DCH0ROEN", 0x01, 0x01 },
1883 { "DCH1ROEN", 0x02, 0x02 },
1884 { "SGROEN", 0x04, 0x04 },
1885 { "CMCROEN", 0x08, 0x08 },
1886 { "OVLYROEN", 0x10, 0x10 },
1887 { "MSIROEN", 0x20, 0x20 }
1891 ahd_roenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
1893 return (ahd_print_register(ROENABLE_parse_table, 6, "ROENABLE",
1894 0x90, regvalue, cur_col, wrap));
1897 static ahd_reg_parse_entry_t OVLYRXMSG0_parse_table[] = {
1898 { "CFNUM", 0x07, 0x07 },
1899 { "CDNUM", 0xf8, 0xf8 }
1903 ahd_ovlyrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1905 return (ahd_print_register(OVLYRXMSG0_parse_table, 2, "OVLYRXMSG0",
1906 0x90, regvalue, cur_col, wrap));
1909 static ahd_reg_parse_entry_t DCHRXMSG0_parse_table[] = {
1910 { "CFNUM", 0x07, 0x07 },
1911 { "CDNUM", 0xf8, 0xf8 }
1915 ahd_dchrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
1917 return (ahd_print_register(DCHRXMSG0_parse_table, 2, "DCHRXMSG0",
1918 0x90, regvalue, cur_col, wrap));
1921 static ahd_reg_parse_entry_t OVLYRXMSG1_parse_table[] = {
1922 { "CBNUM", 0xff, 0xff }
1926 ahd_ovlyrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1928 return (ahd_print_register(OVLYRXMSG1_parse_table, 1, "OVLYRXMSG1",
1929 0x91, regvalue, cur_col, wrap));
1932 static ahd_reg_parse_entry_t NSENABLE_parse_table[] = {
1933 { "DCH0NSEN", 0x01, 0x01 },
1934 { "DCH1NSEN", 0x02, 0x02 },
1935 { "SGNSEN", 0x04, 0x04 },
1936 { "CMCNSEN", 0x08, 0x08 },
1937 { "OVLYNSEN", 0x10, 0x10 },
1938 { "MSINSEN", 0x20, 0x20 }
1942 ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
1944 return (ahd_print_register(NSENABLE_parse_table, 6, "NSENABLE",
1945 0x91, regvalue, cur_col, wrap));
1948 static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
1949 { "CBNUM", 0xff, 0xff }
1953 ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1955 return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
1956 0x91, regvalue, cur_col, wrap));
1959 static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
1960 { "CBNUM", 0xff, 0xff }
1964 ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1966 return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
1967 0x91, regvalue, cur_col, wrap));
1970 static ahd_reg_parse_entry_t DCHRXMSG2_parse_table[] = {
1971 { "MINDEX", 0xff, 0xff }
1975 ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1977 return (ahd_print_register(DCHRXMSG2_parse_table, 1, "DCHRXMSG2",
1978 0x92, regvalue, cur_col, wrap));
1981 static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
1982 { "MINDEX", 0xff, 0xff }
1986 ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1988 return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
1989 0x92, regvalue, cur_col, wrap));
1992 static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
1993 { "MINDEX", 0xff, 0xff }
1997 ahd_cmcrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
1999 return (ahd_print_register(CMCRXMSG2_parse_table, 1, "CMCRXMSG2",
2000 0x92, regvalue, cur_col, wrap));
2004 ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
2006 return (ahd_print_register(NULL, 0, "OST",
2007 0x92, regvalue, cur_col, wrap));
2010 static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
2011 { "MCLASS", 0x0f, 0x0f }
2015 ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
2017 return (ahd_print_register(DCHRXMSG3_parse_table, 1, "DCHRXMSG3",
2018 0x93, regvalue, cur_col, wrap));
2021 static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
2022 { "MCLASS", 0x0f, 0x0f }
2026 ahd_cmcrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
2028 return (ahd_print_register(CMCRXMSG3_parse_table, 1, "CMCRXMSG3",
2029 0x93, regvalue, cur_col, wrap));
2032 static ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
2033 { "CMPABCDIS", 0x01, 0x01 },
2034 { "TSCSERREN", 0x02, 0x02 },
2035 { "SRSPDPEEN", 0x04, 0x04 },
2036 { "SPLTSTADIS", 0x08, 0x08 },
2037 { "SPLTSMADIS", 0x10, 0x10 },
2038 { "UNEXPSCIEN", 0x20, 0x20 },
2039 { "SERRPULSE", 0x80, 0x80 }
2043 ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2045 return (ahd_print_register(PCIXCTL_parse_table, 7, "PCIXCTL",
2046 0x93, regvalue, cur_col, wrap));
2049 static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
2050 { "MCLASS", 0x0f, 0x0f }
2054 ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
2056 return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
2057 0x93, regvalue, cur_col, wrap));
2061 ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2063 return (ahd_print_register(NULL, 0, "OVLYSEQBCNT",
2064 0x94, regvalue, cur_col, wrap));
2068 ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2070 return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
2071 0x94, regvalue, cur_col, wrap));
2075 ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2077 return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
2078 0x94, regvalue, cur_col, wrap));
2081 static ahd_reg_parse_entry_t CMCSPLTSTAT0_parse_table[] = {
2082 { "RXSPLTRSP", 0x01, 0x01 },
2083 { "RXSCEMSG", 0x02, 0x02 },
2084 { "RXOVRUN", 0x04, 0x04 },
2085 { "CNTNOTCMPLT", 0x08, 0x08 },
2086 { "SCDATBUCKET", 0x10, 0x10 },
2087 { "SCADERR", 0x20, 0x20 },
2088 { "SCBCERR", 0x40, 0x40 },
2089 { "STAETERM", 0x80, 0x80 }
2093 ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2095 return (ahd_print_register(CMCSPLTSTAT0_parse_table, 8, "CMCSPLTSTAT0",
2096 0x96, regvalue, cur_col, wrap));
2099 static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
2100 { "RXSPLTRSP", 0x01, 0x01 },
2101 { "RXSCEMSG", 0x02, 0x02 },
2102 { "RXOVRUN", 0x04, 0x04 },
2103 { "CNTNOTCMPLT", 0x08, 0x08 },
2104 { "SCDATBUCKET", 0x10, 0x10 },
2105 { "SCADERR", 0x20, 0x20 },
2106 { "SCBCERR", 0x40, 0x40 },
2107 { "STAETERM", 0x80, 0x80 }
2111 ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2113 return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
2114 0x96, regvalue, cur_col, wrap));
2117 static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
2118 { "RXSPLTRSP", 0x01, 0x01 },
2119 { "RXSCEMSG", 0x02, 0x02 },
2120 { "RXOVRUN", 0x04, 0x04 },
2121 { "CNTNOTCMPLT", 0x08, 0x08 },
2122 { "SCDATBUCKET", 0x10, 0x10 },
2123 { "SCADERR", 0x20, 0x20 },
2124 { "SCBCERR", 0x40, 0x40 },
2125 { "STAETERM", 0x80, 0x80 }
2129 ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2131 return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
2132 0x96, regvalue, cur_col, wrap));
2135 static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
2136 { "RXDATABUCKET", 0x01, 0x01 }
2140 ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2142 return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
2143 0x97, regvalue, cur_col, wrap));
2146 static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
2147 { "RXDATABUCKET", 0x01, 0x01 }
2151 ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2153 return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
2154 0x97, regvalue, cur_col, wrap));
2157 static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
2158 { "RXDATABUCKET", 0x01, 0x01 }
2162 ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2164 return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
2165 0x97, regvalue, cur_col, wrap));
2168 static ahd_reg_parse_entry_t SGRXMSG0_parse_table[] = {
2169 { "CFNUM", 0x07, 0x07 },
2170 { "CDNUM", 0xf8, 0xf8 }
2174 ahd_sgrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2176 return (ahd_print_register(SGRXMSG0_parse_table, 2, "SGRXMSG0",
2177 0x98, regvalue, cur_col, wrap));
2180 static ahd_reg_parse_entry_t SLVSPLTOUTADR0_parse_table[] = {
2181 { "LOWER_ADDR", 0x7f, 0x7f }
2185 ahd_slvspltoutadr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2187 return (ahd_print_register(SLVSPLTOUTADR0_parse_table, 1, "SLVSPLTOUTADR0",
2188 0x98, regvalue, cur_col, wrap));
2191 static ahd_reg_parse_entry_t SGRXMSG1_parse_table[] = {
2192 { "CBNUM", 0xff, 0xff }
2196 ahd_sgrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2198 return (ahd_print_register(SGRXMSG1_parse_table, 1, "SGRXMSG1",
2199 0x99, regvalue, cur_col, wrap));
2202 static ahd_reg_parse_entry_t SLVSPLTOUTADR1_parse_table[] = {
2203 { "REQ_FNUM", 0x07, 0x07 },
2204 { "REQ_DNUM", 0xf8, 0xf8 }
2208 ahd_slvspltoutadr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2210 return (ahd_print_register(SLVSPLTOUTADR1_parse_table, 2, "SLVSPLTOUTADR1",
2211 0x99, regvalue, cur_col, wrap));
2214 static ahd_reg_parse_entry_t SGRXMSG2_parse_table[] = {
2215 { "MINDEX", 0xff, 0xff }
2219 ahd_sgrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2221 return (ahd_print_register(SGRXMSG2_parse_table, 1, "SGRXMSG2",
2222 0x9a, regvalue, cur_col, wrap));
2225 static ahd_reg_parse_entry_t SLVSPLTOUTADR2_parse_table[] = {
2226 { "REQ_BNUM", 0xff, 0xff }
2230 ahd_slvspltoutadr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2232 return (ahd_print_register(SLVSPLTOUTADR2_parse_table, 1, "SLVSPLTOUTADR2",
2233 0x9a, regvalue, cur_col, wrap));
2236 static ahd_reg_parse_entry_t SGRXMSG3_parse_table[] = {
2237 { "MCLASS", 0x0f, 0x0f }
2241 ahd_sgrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
2243 return (ahd_print_register(SGRXMSG3_parse_table, 1, "SGRXMSG3",
2244 0x9b, regvalue, cur_col, wrap));
2247 static ahd_reg_parse_entry_t SLVSPLTOUTADR3_parse_table[] = {
2248 { "RLXORD", 0x10, 0x10 },
2249 { "TAG_NUM", 0x1f, 0x1f }
2253 ahd_slvspltoutadr3_print(u_int regvalue, u_int *cur_col, u_int wrap)
2255 return (ahd_print_register(SLVSPLTOUTADR3_parse_table, 2, "SLVSPLTOUTADR3",
2256 0x9b, regvalue, cur_col, wrap));
2260 ahd_sgseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2262 return (ahd_print_register(NULL, 0, "SGSEQBCNT",
2263 0x9c, regvalue, cur_col, wrap));
2266 static ahd_reg_parse_entry_t SLVSPLTOUTATTR0_parse_table[] = {
2267 { "LOWER_BCNT", 0xff, 0xff }
2271 ahd_slvspltoutattr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2273 return (ahd_print_register(SLVSPLTOUTATTR0_parse_table, 1, "SLVSPLTOUTATTR0",
2274 0x9c, regvalue, cur_col, wrap));
2277 static ahd_reg_parse_entry_t SLVSPLTOUTATTR1_parse_table[] = {
2278 { "CMPLT_FNUM", 0x07, 0x07 },
2279 { "CMPLT_DNUM", 0xf8, 0xf8 }
2283 ahd_slvspltoutattr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2285 return (ahd_print_register(SLVSPLTOUTATTR1_parse_table, 2, "SLVSPLTOUTATTR1",
2286 0x9d, regvalue, cur_col, wrap));
2289 static ahd_reg_parse_entry_t SLVSPLTOUTATTR2_parse_table[] = {
2290 { "CMPLT_BNUM", 0xff, 0xff }
2294 ahd_slvspltoutattr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
2296 return (ahd_print_register(SLVSPLTOUTATTR2_parse_table, 1, "SLVSPLTOUTATTR2",
2297 0x9e, regvalue, cur_col, wrap));
2300 static ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
2301 { "RXSPLTRSP", 0x01, 0x01 },
2302 { "RXSCEMSG", 0x02, 0x02 },
2303 { "RXOVRUN", 0x04, 0x04 },
2304 { "CNTNOTCMPLT", 0x08, 0x08 },
2305 { "SCDATBUCKET", 0x10, 0x10 },
2306 { "SCADERR", 0x20, 0x20 },
2307 { "SCBCERR", 0x40, 0x40 },
2308 { "STAETERM", 0x80, 0x80 }
2312 ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2314 return (ahd_print_register(SGSPLTSTAT0_parse_table, 8, "SGSPLTSTAT0",
2315 0x9e, regvalue, cur_col, wrap));
2318 static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
2319 { "TEST_NUM", 0x0f, 0x0f },
2320 { "TEST_GROUP", 0xf0, 0xf0 }
2324 ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
2326 return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
2327 0x9f, regvalue, cur_col, wrap));
2330 static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
2331 { "RXDATABUCKET", 0x01, 0x01 }
2335 ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2337 return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
2338 0x9f, regvalue, cur_col, wrap));
2341 static ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
2342 { "DPR", 0x01, 0x01 },
2343 { "TWATERR", 0x02, 0x02 },
2344 { "RDPERR", 0x04, 0x04 },
2345 { "SCAAPERR", 0x08, 0x08 },
2346 { "RTA", 0x10, 0x10 },
2347 { "RMA", 0x20, 0x20 },
2348 { "SSE", 0x40, 0x40 },
2349 { "DPE", 0x80, 0x80 }
2353 ahd_df0pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2355 return (ahd_print_register(DF0PCISTAT_parse_table, 8, "DF0PCISTAT",
2356 0xa0, regvalue, cur_col, wrap));
2360 ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2362 return (ahd_print_register(NULL, 0, "REG0",
2363 0xa0, regvalue, cur_col, wrap));
2366 static ahd_reg_parse_entry_t DF1PCISTAT_parse_table[] = {
2367 { "DPR", 0x01, 0x01 },
2368 { "TWATERR", 0x02, 0x02 },
2369 { "RDPERR", 0x04, 0x04 },
2370 { "SCAAPERR", 0x08, 0x08 },
2371 { "RTA", 0x10, 0x10 },
2372 { "RMA", 0x20, 0x20 },
2373 { "SSE", 0x40, 0x40 },
2374 { "DPE", 0x80, 0x80 }
2378 ahd_df1pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2380 return (ahd_print_register(DF1PCISTAT_parse_table, 8, "DF1PCISTAT",
2381 0xa1, regvalue, cur_col, wrap));
2384 static ahd_reg_parse_entry_t SGPCISTAT_parse_table[] = {
2385 { "DPR", 0x01, 0x01 },
2386 { "RDPERR", 0x04, 0x04 },
2387 { "SCAAPERR", 0x08, 0x08 },
2388 { "RTA", 0x10, 0x10 },
2389 { "RMA", 0x20, 0x20 },
2390 { "SSE", 0x40, 0x40 },
2391 { "DPE", 0x80, 0x80 }
2395 ahd_sgpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2397 return (ahd_print_register(SGPCISTAT_parse_table, 7, "SGPCISTAT",
2398 0xa2, regvalue, cur_col, wrap));
2402 ahd_reg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2404 return (ahd_print_register(NULL, 0, "REG1",
2405 0xa2, regvalue, cur_col, wrap));
2408 static ahd_reg_parse_entry_t CMCPCISTAT_parse_table[] = {
2409 { "DPR", 0x01, 0x01 },
2410 { "TWATERR", 0x02, 0x02 },
2411 { "RDPERR", 0x04, 0x04 },
2412 { "SCAAPERR", 0x08, 0x08 },
2413 { "RTA", 0x10, 0x10 },
2414 { "RMA", 0x20, 0x20 },
2415 { "SSE", 0x40, 0x40 },
2416 { "DPE", 0x80, 0x80 }
2420 ahd_cmcpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2422 return (ahd_print_register(CMCPCISTAT_parse_table, 8, "CMCPCISTAT",
2423 0xa3, regvalue, cur_col, wrap));
2426 static ahd_reg_parse_entry_t OVLYPCISTAT_parse_table[] = {
2427 { "DPR", 0x01, 0x01 },
2428 { "RDPERR", 0x04, 0x04 },
2429 { "SCAAPERR", 0x08, 0x08 },
2430 { "RTA", 0x10, 0x10 },
2431 { "RMA", 0x20, 0x20 },
2432 { "SSE", 0x40, 0x40 },
2433 { "DPE", 0x80, 0x80 }
2437 ahd_ovlypcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2439 return (ahd_print_register(OVLYPCISTAT_parse_table, 7, "OVLYPCISTAT",
2440 0xa4, regvalue, cur_col, wrap));
2444 ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2446 return (ahd_print_register(NULL, 0, "REG_ISR",
2447 0xa4, regvalue, cur_col, wrap));
2450 static ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
2451 { "SEGS_AVAIL", 0x01, 0x01 },
2452 { "LOADING_NEEDED", 0x02, 0x02 },
2453 { "FETCH_INPROG", 0x04, 0x04 }
2457 ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
2459 return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
2460 0xa6, regvalue, cur_col, wrap));
2463 static ahd_reg_parse_entry_t MSIPCISTAT_parse_table[] = {
2464 { "DPR", 0x01, 0x01 },
2465 { "TWATERR", 0x02, 0x02 },
2466 { "CLRPENDMSI", 0x08, 0x08 },
2467 { "RTA", 0x10, 0x10 },
2468 { "RMA", 0x20, 0x20 },
2469 { "SSE", 0x40, 0x40 }
2473 ahd_msipcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2475 return (ahd_print_register(MSIPCISTAT_parse_table, 6, "MSIPCISTAT",
2476 0xa6, regvalue, cur_col, wrap));
2479 static ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
2480 { "TWATERR", 0x02, 0x02 },
2481 { "STA", 0x08, 0x08 },
2482 { "SSE", 0x40, 0x40 },
2483 { "DPE", 0x80, 0x80 }
2487 ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2489 return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
2490 0xa7, regvalue, cur_col, wrap));
2494 ahd_data_count_odd_print(u_int regvalue, u_int *cur_col, u_int wrap)
2496 return (ahd_print_register(NULL, 0, "DATA_COUNT_ODD",
2497 0xa7, regvalue, cur_col, wrap));
2501 ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2503 return (ahd_print_register(NULL, 0, "SCBPTR",
2504 0xa8, regvalue, cur_col, wrap));
2508 ahd_ccscbacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2510 return (ahd_print_register(NULL, 0, "CCSCBACNT",
2511 0xab, regvalue, cur_col, wrap));
2514 static ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
2515 { "SCBPTR_OFF", 0x07, 0x07 },
2516 { "SCBPTR_ADDR", 0x38, 0x38 },
2517 { "AUSCBPTR_EN", 0x80, 0x80 }
2521 ahd_scbautoptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2523 return (ahd_print_register(SCBAUTOPTR_parse_table, 3, "SCBAUTOPTR",
2524 0xab, regvalue, cur_col, wrap));
2528 ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2530 return (ahd_print_register(NULL, 0, "CCSGADDR",
2531 0xac, regvalue, cur_col, wrap));
2535 ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2537 return (ahd_print_register(NULL, 0, "CCSCBADDR",
2538 0xac, regvalue, cur_col, wrap));
2542 ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
2544 return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
2545 0xac, regvalue, cur_col, wrap));
2548 static ahd_reg_parse_entry_t CMC_RAMBIST_parse_table[] = {
2549 { "CMC_BUFFER_BIST_EN", 0x01, 0x01 },
2550 { "CMC_BUFFER_BIST_FAIL",0x02, 0x02 },
2551 { "SG_BIST_EN", 0x10, 0x10 },
2552 { "SG_BIST_FAIL", 0x20, 0x20 },
2553 { "SCBRAMBIST_FAIL", 0x40, 0x40 },
2554 { "SG_ELEMENT_SIZE", 0x80, 0x80 }
2558 ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
2560 return (ahd_print_register(CMC_RAMBIST_parse_table, 6, "CMC_RAMBIST",
2561 0xad, regvalue, cur_col, wrap));
2564 static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
2565 { "CCSGRESET", 0x01, 0x01 },
2566 { "SG_FETCH_REQ", 0x02, 0x02 },
2567 { "CCSGENACK", 0x08, 0x08 },
2568 { "SG_CACHE_AVAIL", 0x10, 0x10 },
2569 { "CCSGDONE", 0x80, 0x80 },
2570 { "CCSGEN", 0x0c, 0x0c }
2574 ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2576 return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
2577 0xad, regvalue, cur_col, wrap));
2580 static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
2581 { "CCSCBRESET", 0x01, 0x01 },
2582 { "CCSCBDIR", 0x04, 0x04 },
2583 { "CCSCBEN", 0x08, 0x08 },
2584 { "CCARREN", 0x10, 0x10 },
2585 { "ARRDONE", 0x40, 0x40 },
2586 { "CCSCBDONE", 0x80, 0x80 }
2590 ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2592 return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
2593 0xad, regvalue, cur_col, wrap));
2597 ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
2599 return (ahd_print_register(NULL, 0, "CCSGRAM",
2600 0xb0, regvalue, cur_col, wrap));
2604 ahd_flexadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2606 return (ahd_print_register(NULL, 0, "FLEXADR",
2607 0xb0, regvalue, cur_col, wrap));
2611 ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
2613 return (ahd_print_register(NULL, 0, "CCSCBRAM",
2614 0xb0, regvalue, cur_col, wrap));
2618 ahd_flexcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2620 return (ahd_print_register(NULL, 0, "FLEXCNT",
2621 0xb3, regvalue, cur_col, wrap));
2624 static ahd_reg_parse_entry_t FLEXDMASTAT_parse_table[] = {
2625 { "FLEXDMADONE", 0x01, 0x01 },
2626 { "FLEXDMAERR", 0x02, 0x02 }
2630 ahd_flexdmastat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2632 return (ahd_print_register(FLEXDMASTAT_parse_table, 2, "FLEXDMASTAT",
2633 0xb5, regvalue, cur_col, wrap));
2637 ahd_flexdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
2639 return (ahd_print_register(NULL, 0, "FLEXDATA",
2640 0xb6, regvalue, cur_col, wrap));
2644 ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2646 return (ahd_print_register(NULL, 0, "BRDDAT",
2647 0xb8, regvalue, cur_col, wrap));
2650 static ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
2651 { "BRDSTB", 0x01, 0x01 },
2652 { "BRDRW", 0x02, 0x02 },
2653 { "BRDEN", 0x04, 0x04 },
2654 { "BRDADDR", 0x38, 0x38 },
2655 { "FLXARBREQ", 0x40, 0x40 },
2656 { "FLXARBACK", 0x80, 0x80 }
2660 ahd_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2662 return (ahd_print_register(BRDCTL_parse_table, 6, "BRDCTL",
2663 0xb9, regvalue, cur_col, wrap));
2667 ahd_seeadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2669 return (ahd_print_register(NULL, 0, "SEEADR",
2670 0xba, regvalue, cur_col, wrap));
2674 ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2676 return (ahd_print_register(NULL, 0, "SEEDAT",
2677 0xbc, regvalue, cur_col, wrap));
2680 static ahd_reg_parse_entry_t SEECTL_parse_table[] = {
2681 { "SEEOP_ERAL", 0x40, 0x70 },
2682 { "SEEOP_WRITE", 0x50, 0x70 },
2683 { "SEEOP_READ", 0x60, 0x70 },
2684 { "SEEOP_ERASE", 0x70, 0x70 },
2685 { "SEESTART", 0x01, 0x01 },
2686 { "SEERST", 0x02, 0x02 },
2687 { "SEEOPCODE", 0x70, 0x70 },
2688 { "SEEOP_EWEN", 0x40, 0x40 },
2689 { "SEEOP_WALL", 0x40, 0x40 },
2690 { "SEEOP_EWDS", 0x40, 0x40 }
2694 ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2696 return (ahd_print_register(SEECTL_parse_table, 10, "SEECTL",
2697 0xbe, regvalue, cur_col, wrap));
2700 static ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
2701 { "SEESTART", 0x01, 0x01 },
2702 { "SEEBUSY", 0x02, 0x02 },
2703 { "SEEARBACK", 0x04, 0x04 },
2704 { "LDALTID_L", 0x08, 0x08 },
2705 { "SEEOPCODE", 0x70, 0x70 },
2706 { "INIT_DONE", 0x80, 0x80 }
2710 ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2712 return (ahd_print_register(SEESTAT_parse_table, 6, "SEESTAT",
2713 0xbe, regvalue, cur_col, wrap));
2717 ahd_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2719 return (ahd_print_register(NULL, 0, "SCBCNT",
2720 0xbf, regvalue, cur_col, wrap));
2724 ahd_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2726 return (ahd_print_register(NULL, 0, "DFWADDR",
2727 0xc0, regvalue, cur_col, wrap));
2730 static ahd_reg_parse_entry_t DSPFLTRCTL_parse_table[] = {
2731 { "DSPFCNTSEL", 0x0f, 0x0f },
2732 { "EDGESENSE", 0x10, 0x10 },
2733 { "FLTRDISABLE", 0x20, 0x20 }
2737 ahd_dspfltrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2739 return (ahd_print_register(DSPFLTRCTL_parse_table, 3, "DSPFLTRCTL",
2740 0xc0, regvalue, cur_col, wrap));
2743 static ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
2744 { "XMITOFFSTDIS", 0x02, 0x02 },
2745 { "RCVROFFSTDIS", 0x04, 0x04 },
2746 { "DESQDIS", 0x10, 0x10 },
2747 { "BYPASSENAB", 0x80, 0x80 }
2751 ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2753 return (ahd_print_register(DSPDATACTL_parse_table, 4, "DSPDATACTL",
2754 0xc1, regvalue, cur_col, wrap));
2758 ahd_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2760 return (ahd_print_register(NULL, 0, "DFRADDR",
2761 0xc2, regvalue, cur_col, wrap));
2764 static ahd_reg_parse_entry_t DSPREQCTL_parse_table[] = {
2765 { "MANREQDLY", 0x3f, 0x3f },
2766 { "MANREQCTL", 0xc0, 0xc0 }
2770 ahd_dspreqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2772 return (ahd_print_register(DSPREQCTL_parse_table, 2, "DSPREQCTL",
2773 0xc2, regvalue, cur_col, wrap));
2776 static ahd_reg_parse_entry_t DSPACKCTL_parse_table[] = {
2777 { "MANACKDLY", 0x3f, 0x3f },
2778 { "MANACKCTL", 0xc0, 0xc0 }
2782 ahd_dspackctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2784 return (ahd_print_register(DSPACKCTL_parse_table, 2, "DSPACKCTL",
2785 0xc3, regvalue, cur_col, wrap));
2789 ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
2791 return (ahd_print_register(NULL, 0, "DFDAT",
2792 0xc4, regvalue, cur_col, wrap));
2795 static ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
2796 { "DSPSEL", 0x1f, 0x1f },
2797 { "AUTOINCEN", 0x80, 0x80 }
2801 ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
2803 return (ahd_print_register(DSPSELECT_parse_table, 2, "DSPSELECT",
2804 0xc4, regvalue, cur_col, wrap));
2807 static ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
2808 { "XMITMANVAL", 0x3f, 0x3f },
2809 { "AUTOXBCDIS", 0x80, 0x80 }
2813 ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2815 return (ahd_print_register(WRTBIASCTL_parse_table, 2, "WRTBIASCTL",
2816 0xc5, regvalue, cur_col, wrap));
2819 static ahd_reg_parse_entry_t RCVRBIOSCTL_parse_table[] = {
2820 { "RCVRMANVAL", 0x3f, 0x3f },
2821 { "AUTORBCDIS", 0x80, 0x80 }
2825 ahd_rcvrbiosctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2827 return (ahd_print_register(RCVRBIOSCTL_parse_table, 2, "RCVRBIOSCTL",
2828 0xc6, regvalue, cur_col, wrap));
2832 ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
2834 return (ahd_print_register(NULL, 0, "WRTBIASCALC",
2835 0xc7, regvalue, cur_col, wrap));
2839 ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
2841 return (ahd_print_register(NULL, 0, "DFPTRS",
2842 0xc8, regvalue, cur_col, wrap));
2846 ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
2848 return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
2849 0xc8, regvalue, cur_col, wrap));
2853 ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2855 return (ahd_print_register(NULL, 0, "DFBKPTR",
2856 0xc9, regvalue, cur_col, wrap));
2860 ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
2862 return (ahd_print_register(NULL, 0, "SKEWCALC",
2863 0xc9, regvalue, cur_col, wrap));
2866 static ahd_reg_parse_entry_t DFDBCTL_parse_table[] = {
2867 { "DFF_RAMBIST_EN", 0x01, 0x01 },
2868 { "DFF_RAMBIST_DONE", 0x02, 0x02 },
2869 { "DFF_RAMBIST_FAIL", 0x04, 0x04 },
2870 { "DFF_DIR_ERR", 0x08, 0x08 },
2871 { "DFF_CIO_RD_RDY", 0x10, 0x10 },
2872 { "DFF_CIO_WR_RDY", 0x20, 0x20 }
2876 ahd_dfdbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2878 return (ahd_print_register(DFDBCTL_parse_table, 6, "DFDBCTL",
2879 0xcb, regvalue, cur_col, wrap));
2883 ahd_dfscnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2885 return (ahd_print_register(NULL, 0, "DFSCNT",
2886 0xcc, regvalue, cur_col, wrap));
2890 ahd_dfbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2892 return (ahd_print_register(NULL, 0, "DFBCNT",
2893 0xce, regvalue, cur_col, wrap));
2897 ahd_ovlyaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
2899 return (ahd_print_register(NULL, 0, "OVLYADDR",
2900 0xd4, regvalue, cur_col, wrap));
2903 static ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
2904 { "LOADRAM", 0x01, 0x01 },
2905 { "SEQRESET", 0x02, 0x02 },
2906 { "STEP", 0x04, 0x04 },
2907 { "BRKADRINTEN", 0x08, 0x08 },
2908 { "FASTMODE", 0x10, 0x10 },
2909 { "FAILDIS", 0x20, 0x20 },
2910 { "PAUSEDIS", 0x40, 0x40 },
2911 { "PERRORDIS", 0x80, 0x80 }
2915 ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
2917 return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
2918 0xd6, regvalue, cur_col, wrap));
2921 static ahd_reg_parse_entry_t SEQCTL1_parse_table[] = {
2922 { "RAMBIST_EN", 0x01, 0x01 },
2923 { "RAMBIST_FAIL", 0x02, 0x02 },
2924 { "RAMBIST_DONE", 0x04, 0x04 },
2925 { "OVRLAY_DATA_CHK", 0x08, 0x08 }
2929 ahd_seqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
2931 return (ahd_print_register(SEQCTL1_parse_table, 4, "SEQCTL1",
2932 0xd7, regvalue, cur_col, wrap));
2935 static ahd_reg_parse_entry_t FLAGS_parse_table[] = {
2936 { "CARRY", 0x01, 0x01 },
2937 { "ZERO", 0x02, 0x02 }
2941 ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
2943 return (ahd_print_register(FLAGS_parse_table, 2, "FLAGS",
2944 0xd8, regvalue, cur_col, wrap));
2947 static ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
2948 { "IRET", 0x01, 0x01 },
2949 { "INTMASK1", 0x02, 0x02 },
2950 { "INTMASK2", 0x04, 0x04 },
2951 { "SCS_SEQ_INT1M0", 0x08, 0x08 },
2952 { "SCS_SEQ_INT1M1", 0x10, 0x10 },
2953 { "INT1_CONTEXT", 0x20, 0x20 },
2954 { "INTVEC1DSL", 0x80, 0x80 }
2958 ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
2960 return (ahd_print_register(SEQINTCTL_parse_table, 7, "SEQINTCTL",
2961 0xd9, regvalue, cur_col, wrap));
2965 ahd_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
2967 return (ahd_print_register(NULL, 0, "SEQRAM",
2968 0xda, regvalue, cur_col, wrap));
2972 ahd_prgmcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
2974 return (ahd_print_register(NULL, 0, "PRGMCNT",
2975 0xde, regvalue, cur_col, wrap));
2979 ahd_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
2981 return (ahd_print_register(NULL, 0, "ACCUM",
2982 0xe0, regvalue, cur_col, wrap));
2986 ahd_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
2988 return (ahd_print_register(NULL, 0, "SINDEX",
2989 0xe2, regvalue, cur_col, wrap));
2993 ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
2995 return (ahd_print_register(NULL, 0, "DINDEX",
2996 0xe4, regvalue, cur_col, wrap));
2999 static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
3000 { "BRKDIS", 0x80, 0x80 }
3004 ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
3006 return (ahd_print_register(BRKADDR1_parse_table, 1, "BRKADDR1",
3007 0xe6, regvalue, cur_col, wrap));
3011 ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
3013 return (ahd_print_register(NULL, 0, "BRKADDR0",
3014 0xe6, regvalue, cur_col, wrap));
3018 ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
3020 return (ahd_print_register(NULL, 0, "ALLONES",
3021 0xe8, regvalue, cur_col, wrap));
3025 ahd_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
3027 return (ahd_print_register(NULL, 0, "ALLZEROS",
3028 0xea, regvalue, cur_col, wrap));
3032 ahd_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
3034 return (ahd_print_register(NULL, 0, "NONE",
3035 0xea, regvalue, cur_col, wrap));
3039 ahd_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
3041 return (ahd_print_register(NULL, 0, "SINDIR",
3042 0xec, regvalue, cur_col, wrap));
3046 ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
3048 return (ahd_print_register(NULL, 0, "DINDIR",
3049 0xed, regvalue, cur_col, wrap));
3053 ahd_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
3055 return (ahd_print_register(NULL, 0, "FUNCTION1",
3056 0xf0, regvalue, cur_col, wrap));
3060 ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
3062 return (ahd_print_register(NULL, 0, "STACK",
3063 0xf2, regvalue, cur_col, wrap));
3067 ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3069 return (ahd_print_register(NULL, 0, "CURADDR",
3070 0xf4, regvalue, cur_col, wrap));
3074 ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3076 return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
3077 0xf4, regvalue, cur_col, wrap));
3081 ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3083 return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
3084 0xf6, regvalue, cur_col, wrap));
3088 ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3090 return (ahd_print_register(NULL, 0, "LASTADDR",
3091 0xf6, regvalue, cur_col, wrap));
3095 ahd_longjmp_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3097 return (ahd_print_register(NULL, 0, "LONGJMP_ADDR",
3098 0xf8, regvalue, cur_col, wrap));
3102 ahd_accum_save_print(u_int regvalue, u_int *cur_col, u_int wrap)
3104 return (ahd_print_register(NULL, 0, "ACCUM_SAVE",
3105 0xfa, regvalue, cur_col, wrap));
3109 ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
3111 return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
3112 0x100, regvalue, cur_col, wrap));
3116 ahd_ahd_pci_config_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
3118 return (ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE",
3119 0x100, regvalue, cur_col, wrap));
3123 ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
3125 return (ahd_print_register(NULL, 0, "SRAM_BASE",
3126 0x100, regvalue, cur_col, wrap));
3130 ahd_waiting_tid_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
3132 return (ahd_print_register(NULL, 0, "WAITING_TID_HEAD",
3133 0x120, regvalue, cur_col, wrap));
3137 ahd_waiting_tid_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
3139 return (ahd_print_register(NULL, 0, "WAITING_TID_TAIL",
3140 0x122, regvalue, cur_col, wrap));
3144 ahd_next_queued_scb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3146 return (ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR",
3147 0x124, regvalue, cur_col, wrap));
3151 ahd_complete_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
3153 return (ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD",
3154 0x128, regvalue, cur_col, wrap));
3158 ahd_complete_scb_dmainprog_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
3160 return (ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD",
3161 0x12a, regvalue, cur_col, wrap));
3165 ahd_complete_dma_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
3167 return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD",
3168 0x12c, regvalue, cur_col, wrap));
3172 ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
3174 return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
3175 0x12e, regvalue, cur_col, wrap));
3179 ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
3181 return (ahd_print_register(NULL, 0, "SAVED_MODE",
3182 0x130, regvalue, cur_col, wrap));
3186 ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
3188 return (ahd_print_register(NULL, 0, "MSG_OUT",
3189 0x131, regvalue, cur_col, wrap));
3192 static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
3193 { "FIFORESET", 0x01, 0x01 },
3194 { "FIFOFLUSH", 0x02, 0x02 },
3195 { "DIRECTION", 0x04, 0x04 },
3196 { "HDMAEN", 0x08, 0x08 },
3197 { "HDMAENACK", 0x08, 0x08 },
3198 { "SDMAEN", 0x10, 0x10 },
3199 { "SDMAENACK", 0x10, 0x10 },
3200 { "SCSIEN", 0x20, 0x20 },
3201 { "WIDEODD", 0x40, 0x40 },
3202 { "PRELOADEN", 0x80, 0x80 }
3206 ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
3208 return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
3209 0x132, regvalue, cur_col, wrap));
3212 static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
3213 { "NO_DISCONNECT", 0x01, 0x01 },
3214 { "SPHASE_PENDING", 0x02, 0x02 },
3215 { "DPHASE_PENDING", 0x04, 0x04 },
3216 { "CMDPHASE_PENDING", 0x08, 0x08 },
3217 { "TARG_CMD_PENDING", 0x10, 0x10 },
3218 { "DPHASE", 0x20, 0x20 },
3219 { "NO_CDB_SENT", 0x40, 0x40 },
3220 { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
3221 { "NOT_IDENTIFIED", 0x80, 0x80 }
3225 ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
3227 return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
3228 0x133, regvalue, cur_col, wrap));
3232 ahd_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
3234 return (ahd_print_register(NULL, 0, "SAVED_SCSIID",
3235 0x134, regvalue, cur_col, wrap));
3239 ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
3241 return (ahd_print_register(NULL, 0, "SAVED_LUN",
3242 0x135, regvalue, cur_col, wrap));
3245 static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
3246 { "P_DATAOUT", 0x00, 0xe0 },
3247 { "P_DATAOUT_DT", 0x20, 0xe0 },
3248 { "P_DATAIN", 0x40, 0xe0 },
3249 { "P_DATAIN_DT", 0x60, 0xe0 },
3250 { "P_COMMAND", 0x80, 0xe0 },
3251 { "P_MESGOUT", 0xa0, 0xe0 },
3252 { "P_STATUS", 0xc0, 0xe0 },
3253 { "P_MESGIN", 0xe0, 0xe0 },
3254 { "P_BUSFREE", 0x01, 0x01 },
3255 { "MSGI", 0x20, 0x20 },
3256 { "IOI", 0x40, 0x40 },
3257 { "CDI", 0x80, 0x80 },
3258 { "PHASE_MASK", 0xe0, 0xe0 }
3262 ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
3264 return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
3265 0x136, regvalue, cur_col, wrap));
3269 ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
3271 return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
3272 0x137, regvalue, cur_col, wrap));
3276 ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3278 return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
3279 0x138, regvalue, cur_col, wrap));
3283 ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3285 return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
3286 0x13c, regvalue, cur_col, wrap));
3290 ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
3292 return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
3293 0x140, regvalue, cur_col, wrap));
3297 ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
3299 return (ahd_print_register(NULL, 0, "TQINPOS",
3300 0x141, regvalue, cur_col, wrap));
3303 static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
3304 { "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
3305 { "CONT_MSG_LOOP_READ", 0x03, 0x03 },
3306 { "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
3307 { "EXIT_MSG_LOOP", 0x08, 0x08 },
3308 { "MSGOUT_PHASEMIS", 0x10, 0x10 },
3309 { "SEND_REJ", 0x20, 0x20 },
3310 { "SEND_SENSE", 0x40, 0x40 },
3311 { "SEND_MSG", 0x80, 0x80 }
3315 ahd_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
3317 return (ahd_print_register(ARG_1_parse_table, 8, "ARG_1",
3318 0x142, regvalue, cur_col, wrap));
3322 ahd_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
3324 return (ahd_print_register(NULL, 0, "ARG_2",
3325 0x143, regvalue, cur_col, wrap));
3329 ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
3331 return (ahd_print_register(NULL, 0, "LAST_MSG",
3332 0x144, regvalue, cur_col, wrap));
3335 static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
3336 { "ALTSTIM", 0x01, 0x01 },
3337 { "ENAUTOATNP", 0x02, 0x02 },
3338 { "MANUALP", 0x0c, 0x0c },
3339 { "ENRSELI", 0x10, 0x10 },
3340 { "ENSELI", 0x20, 0x20 },
3341 { "MANUALCTL", 0x40, 0x40 }
3345 ahd_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
3347 return (ahd_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
3348 0x145, regvalue, cur_col, wrap));
3352 ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
3354 return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
3355 0x146, regvalue, cur_col, wrap));
3358 static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
3359 { "TARGET_MSG_PENDING", 0x02, 0x02 },
3360 { "SELECTOUT_QFROZEN", 0x04, 0x04 }
3364 ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
3366 return (ahd_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
3367 0x147, regvalue, cur_col, wrap));
3371 ahd_allocfifo_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3373 return (ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR",
3374 0x148, regvalue, cur_col, wrap));
3378 ahd_int_coalescing_timer_print(u_int regvalue, u_int *cur_col, u_int wrap)
3380 return (ahd_print_register(NULL, 0, "INT_COALESCING_TIMER",
3381 0x14a, regvalue, cur_col, wrap));
3385 ahd_int_coalescing_maxcmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
3387 return (ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS",
3388 0x14c, regvalue, cur_col, wrap));
3392 ahd_int_coalescing_mincmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
3394 return (ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS",
3395 0x14d, regvalue, cur_col, wrap));
3399 ahd_cmds_pending_print(u_int regvalue, u_int *cur_col, u_int wrap)
3401 return (ahd_print_register(NULL, 0, "CMDS_PENDING",
3402 0x14e, regvalue, cur_col, wrap));
3406 ahd_int_coalescing_cmdcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
3408 return (ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT",
3409 0x150, regvalue, cur_col, wrap));
3413 ahd_local_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
3415 return (ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX",
3416 0x151, regvalue, cur_col, wrap));
3420 ahd_cmdsize_table_print(u_int regvalue, u_int *cur_col, u_int wrap)
3422 return (ahd_print_register(NULL, 0, "CMDSIZE_TABLE",
3423 0x152, regvalue, cur_col, wrap));
3427 ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
3429 return (ahd_print_register(NULL, 0, "SCB_BASE",
3430 0x180, regvalue, cur_col, wrap));
3434 ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
3436 return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
3437 0x180, regvalue, cur_col, wrap));
3440 static ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
3441 { "SG_LIST_NULL", 0x01, 0x01 },
3442 { "SG_OVERRUN_RESID", 0x02, 0x02 },
3443 { "SG_ADDR_MASK", 0xf8, 0xf8 }
3447 ahd_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3449 return (ahd_print_register(SCB_RESIDUAL_SGPTR_parse_table, 3, "SCB_RESIDUAL_SGPTR",
3450 0x184, regvalue, cur_col, wrap));
3454 ahd_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
3456 return (ahd_print_register(NULL, 0, "SCB_SCSI_STATUS",
3457 0x188, regvalue, cur_col, wrap));
3461 ahd_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
3463 return (ahd_print_register(NULL, 0, "SCB_TARGET_PHASES",
3464 0x189, regvalue, cur_col, wrap));
3468 ahd_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
3470 return (ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
3471 0x18a, regvalue, cur_col, wrap));
3475 ahd_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
3477 return (ahd_print_register(NULL, 0, "SCB_TARGET_ITAG",
3478 0x18b, regvalue, cur_col, wrap));
3482 ahd_scb_sense_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3484 return (ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR",
3485 0x18c, regvalue, cur_col, wrap));
3489 ahd_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3491 return (ahd_print_register(NULL, 0, "SCB_DATAPTR",
3492 0x190, regvalue, cur_col, wrap));
3495 static ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
3496 { "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
3497 { "SG_LAST_SEG", 0x80, 0x80 }
3501 ahd_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
3503 return (ahd_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
3504 0x198, regvalue, cur_col, wrap));
3507 static ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
3508 { "SG_LIST_NULL", 0x01, 0x01 },
3509 { "SG_FULL_RESID", 0x02, 0x02 },
3510 { "SG_STATUS_VALID", 0x04, 0x04 }
3514 ahd_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3516 return (ahd_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
3517 0x19c, regvalue, cur_col, wrap));
3521 ahd_scb_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
3523 return (ahd_print_register(NULL, 0, "SCB_BUSADDR",
3524 0x1a0, regvalue, cur_col, wrap));
3528 ahd_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
3530 return (ahd_print_register(NULL, 0, "SCB_NEXT",
3531 0x1a4, regvalue, cur_col, wrap));
3535 ahd_scb_next2_print(u_int regvalue, u_int *cur_col, u_int wrap)
3537 return (ahd_print_register(NULL, 0, "SCB_NEXT2",
3538 0x1a6, regvalue, cur_col, wrap));
3541 static ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
3542 { "SCB_TAG_TYPE", 0x03, 0x03 },
3543 { "DISCONNECTED", 0x04, 0x04 },
3544 { "STATUS_RCVD", 0x08, 0x08 },
3545 { "MK_MESSAGE", 0x10, 0x10 },
3546 { "TAG_ENB", 0x20, 0x20 },
3547 { "DISCENB", 0x40, 0x40 },
3548 { "TARGET_SCB", 0x80, 0x80 }
3552 ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
3554 return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
3555 0x1a8, regvalue, cur_col, wrap));
3558 static ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
3559 { "OID", 0x0f, 0x0f },
3560 { "TID", 0xf0, 0xf0 }
3564 ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
3566 return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
3567 0x1a9, regvalue, cur_col, wrap));
3570 static ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
3571 { "LID", 0xff, 0xff }
3575 ahd_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
3577 return (ahd_print_register(SCB_LUN_parse_table, 1, "SCB_LUN",
3578 0x1aa, regvalue, cur_col, wrap));
3582 ahd_scb_task_attribute_print(u_int regvalue, u_int *cur_col, u_int wrap)
3584 return (ahd_print_register(NULL, 0, "SCB_TASK_ATTRIBUTE",
3585 0x1ab, regvalue, cur_col, wrap));
3588 static ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
3589 { "SCB_CDB_LEN_PTR", 0x80, 0x80 }
3593 ahd_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
3595 return (ahd_print_register(SCB_CDB_LEN_parse_table, 1, "SCB_CDB_LEN",
3596 0x1ac, regvalue, cur_col, wrap));
3600 ahd_scb_task_management_print(u_int regvalue, u_int *cur_col, u_int wrap)
3602 return (ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT",
3603 0x1ad, regvalue, cur_col, wrap));
3607 ahd_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
3609 return (ahd_print_register(NULL, 0, "SCB_TAG",
3610 0x1ae, regvalue, cur_col, wrap));
3614 ahd_scb_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
3616 return (ahd_print_register(NULL, 0, "SCB_SPARE",
3617 0x1b0, regvalue, cur_col, wrap));
3621 ahd_scb_disconnected_lists_print(u_int regvalue, u_int *cur_col, u_int wrap)
3623 return (ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS",
3624 0x1b8, regvalue, cur_col, wrap));