2 * Copyright (c) 2000-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/config.h>
21 #ifdef CONFIG_USB_DEBUG
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/dmapool.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/slab.h>
35 #include <linux/smp_lock.h>
36 #include <linux/errno.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/reboot.h>
42 #include <linux/usb.h>
43 #include <linux/moduleparam.h>
44 #include <linux/dma-mapping.h>
46 #include "../core/hcd.h"
48 #include <asm/byteorder.h>
51 #include <asm/system.h>
52 #include <asm/unaligned.h>
55 /*-------------------------------------------------------------------------*/
58 * EHCI hc_driver implementation ... experimental, incomplete.
59 * Based on the final 1.0 register interface specification.
61 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
62 * First was PCMCIA, like ISA; then CardBus, which is PCI.
63 * Next comes "CardBay", using USB 2.0 signals.
65 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
66 * Special thanks to Intel and VIA for providing host controllers to
67 * test this driver on, and Cypress (including In-System Design) for
68 * providing early devices for those host controllers to talk to!
72 * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
73 * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
74 * <sojkam@centrum.cz>, updates by DB).
76 * 2002-11-29 Correct handling for hw async_next register.
77 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
78 * only scheduling is different, no arbitrary limitations.
79 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
80 * clean up HC run state handshaking.
81 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
82 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
83 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
84 * 2002-05-07 Some error path cleanups to report better errors; wmb();
85 * use non-CVS version id; better iso bandwidth claim.
86 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
87 * errors in submit path. Bugfixes to interrupt scheduling/processing.
88 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
89 * more checking to generic hcd framework (db). Make it work with
90 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
91 * 2002-01-14 Minor cleanup; version synch.
92 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
93 * 2002-01-04 Control/Bulk queuing behaves.
95 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
96 * 2001-June Works with usb-storage and NEC EHCI on 2.4
99 #define DRIVER_VERSION "2003-Dec-29"
100 #define DRIVER_AUTHOR "David Brownell"
101 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
103 static const char hcd_name [] = "ehci_hcd";
106 #undef EHCI_VERBOSE_DEBUG
107 #undef EHCI_URB_TRACE
109 // #define have_split_iso
115 /* magic numbers that can affect system performance */
116 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
117 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
118 #define EHCI_TUNE_RL_TT 0
119 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
120 #define EHCI_TUNE_MULT_TT 1
121 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
123 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
124 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
125 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
126 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
128 /* Initial IRQ latency: lower than default */
129 static int log2_irq_thresh = 0; // 0 to 6
130 module_param (log2_irq_thresh, int, S_IRUGO);
131 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
133 #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
135 /*-------------------------------------------------------------------------*/
138 #include "ehci-dbg.c"
140 /*-------------------------------------------------------------------------*/
143 * handshake - spin reading hc until handshake completes or fails
144 * @ptr: address of hc register to be read
145 * @mask: bits to look at in result of read
146 * @done: value of those bits when handshake succeeds
147 * @usec: timeout in microseconds
149 * Returns negative errno, or zero on success
151 * Success happens when the "mask" bits have the specified value (hardware
152 * handshake done). There are two failure modes: "usec" have passed (major
153 * hardware flakeout), or the register reads as all-ones (hardware removed).
155 * That last failure should_only happen in cases like physical cardbus eject
156 * before driver shutdown. But it also seems to be caused by bugs in cardbus
157 * bridge shutdown: shutting down the bridge before the devices using it.
159 static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
164 result = readl (ptr);
165 if (result == ~(u32)0) /* card removed */
177 * hc states include: unknown, halted, ready, running
178 * transitional states are messy just now
179 * trying to avoid "running" unless urbs are active
180 * a "ready" hc can be finishing prefetched work
183 /* force HC to halt state from unknown (EHCI spec section 2.3) */
184 static int ehci_halt (struct ehci_hcd *ehci)
186 u32 temp = readl (&ehci->regs->status);
188 if ((temp & STS_HALT) != 0)
191 temp = readl (&ehci->regs->command);
193 writel (temp, &ehci->regs->command);
194 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
197 /* reset a non-running (STS_HALT == 1) controller */
198 static int ehci_reset (struct ehci_hcd *ehci)
200 u32 command = readl (&ehci->regs->command);
202 command |= CMD_RESET;
203 dbg_cmd (ehci, "reset", command);
204 writel (command, &ehci->regs->command);
205 ehci->hcd.state = USB_STATE_HALT;
206 return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
209 /* idle the controller (from running) */
210 static void ehci_ready (struct ehci_hcd *ehci)
215 if (!HCD_IS_RUNNING (ehci->hcd.state))
219 /* wait for any schedule enables/disables to take effect */
221 if (ehci->async->qh_next.qh)
223 if (ehci->next_uframe != -1)
225 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
226 temp, 16 * 125) != 0) {
227 ehci->hcd.state = USB_STATE_HALT;
231 /* then disable anything that's still active */
232 temp = readl (&ehci->regs->command);
233 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
234 writel (temp, &ehci->regs->command);
236 /* hardware can take 16 microframes to turn off ... */
237 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
239 ehci->hcd.state = USB_STATE_HALT;
244 /*-------------------------------------------------------------------------*/
246 #include "ehci-hub.c"
247 #include "ehci-mem.c"
249 #include "ehci-sched.c"
251 /*-------------------------------------------------------------------------*/
253 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
255 static void ehci_watchdog (unsigned long param)
257 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
260 spin_lock_irqsave (&ehci->lock, flags);
262 /* lost IAA irqs wedge things badly; seen with a vt8235 */
264 u32 status = readl (&ehci->regs->status);
266 if (status & STS_IAA) {
267 ehci_vdbg (ehci, "lost IAA\n");
268 COUNT (ehci->stats.lost_iaa);
269 writel (STS_IAA, &ehci->regs->status);
270 ehci->reclaim_ready = 1;
274 /* stop async processing after it's idled a bit */
275 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
276 start_unlink_async (ehci, ehci->async);
278 /* ehci could run by timer, without IRQs ... */
279 ehci_work (ehci, NULL);
281 spin_unlock_irqrestore (&ehci->lock, flags);
284 /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
285 * off the controller (maybe it can boot from highspeed USB disks).
287 static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
289 if (cap & (1 << 16)) {
292 /* request handoff to OS */
294 pci_write_config_dword (to_pci_dev(ehci->hcd.self.controller), where, cap);
296 /* and wait a while for it to happen */
300 pci_read_config_dword (to_pci_dev(ehci->hcd.self.controller), where, &cap);
301 } while ((cap & (1 << 16)) && msec);
302 if (cap & (1 << 16)) {
303 ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n",
307 ehci_dbg (ehci, "BIOS handoff succeeded\n");
313 ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
315 struct ehci_hcd *ehci;
317 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
319 /* make BIOS/etc use companion controller during reboot */
320 writel (0, &ehci->regs->configured_flag);
325 /* called by khubd or root hub init threads */
327 static int ehci_hc_reset (struct usb_hcd *hcd)
329 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
332 spin_lock_init (&ehci->lock);
334 ehci->caps = (struct ehci_caps *) hcd->regs;
335 ehci->regs = (struct ehci_regs *) (hcd->regs +
336 HC_LENGTH (readl (&ehci->caps->hc_capbase)));
337 dbg_hcs_params (ehci, "reset");
338 dbg_hcc_params (ehci, "reset");
340 /* EHCI 0.96 and later may have "extended capabilities" */
341 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
345 pci_read_config_dword (to_pci_dev(ehci->hcd.self.controller), temp, &cap);
346 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
347 switch (cap & 0xff) {
348 case 1: /* BIOS/SMM/... handoff */
349 if (bios_handoff (ehci, temp, cap) != 0)
352 case 0: /* illegal reserved capability */
353 ehci_warn (ehci, "illegal capability!\n");
356 default: /* unknown */
359 temp = (cap >> 8) & 0xff;
362 /* cache this readonly data; minimize PCI reads */
363 ehci->hcs_params = readl (&ehci->caps->hcs_params);
365 /* force HC to halt state */
366 return ehci_halt (ehci);
369 static int ehci_start (struct usb_hcd *hcd)
371 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
373 struct usb_device *udev;
380 * hw default: 1K periodic list heads, one per frame.
381 * periodic_size can shrink by USBCMD update if hcc_params allows.
383 ehci->periodic_size = DEFAULT_I_TDPS;
384 if ((retval = ehci_mem_init (ehci, GFP_KERNEL)) < 0)
387 /* controllers may cache some of the periodic schedule ... */
388 hcc_params = readl (&ehci->caps->hcc_params);
389 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
391 else // N microframes cached
392 ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
395 ehci->next_uframe = -1;
397 /* controller state: unknown --> reset */
399 /* EHCI spec section 4.1 */
400 if ((retval = ehci_reset (ehci)) != 0) {
401 ehci_mem_cleanup (ehci);
404 writel (INTR_MASK, &ehci->regs->intr_enable);
405 writel (ehci->periodic_dma, &ehci->regs->frame_list);
408 * dedicate a qh for the async ring head, since we couldn't unlink
409 * a 'real' qh without stopping the async schedule [4.8]. use it
410 * as the 'reclamation list head' too.
411 * its dummy is used in hw_alt_next of many tds, to prevent the qh
412 * from automatically advancing to the next td after short reads.
414 ehci->async->qh_next.qh = 0;
415 ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
416 ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
417 ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
418 ehci->async->hw_qtd_next = EHCI_LIST_END;
419 ehci->async->qh_state = QH_STATE_LINKED;
420 ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
421 writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
424 * hcc_params controls whether ehci->regs->segment must (!!!)
425 * be used; it constrains QH/ITD/SITD and QTD locations.
426 * pci_pool consistent memory always uses segment zero.
427 * streaming mappings for I/O buffers, like pci_map_single(),
428 * can return segments above 4GB, if the device allows.
430 * NOTE: the dma mask is visible through dma_supported(), so
431 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
432 * Scsi_Host.highmem_io, and so forth. It's readonly to all
433 * host side drivers though.
435 if (HCC_64BIT_ADDR (hcc_params)) {
436 writel (0, &ehci->regs->segment);
438 // this is deeply broken on almost all architectures
439 if (!pci_set_dma_mask (to_pci_dev(ehci->hcd.self.controller), 0xffffffffffffffffULL))
440 ehci_info (ehci, "enabled 64bit PCI DMA\n");
444 /* help hc dma work well with cachelines */
445 pci_set_mwi (to_pci_dev(ehci->hcd.self.controller));
447 /* clear interrupt enables, set irq latency */
448 temp = readl (&ehci->regs->command) & 0x0fff;
449 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
451 temp |= 1 << (16 + log2_irq_thresh);
452 // if hc can park (ehci >= 0.96), default is 3 packets per async QH
453 if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
454 /* periodic schedule size can be smaller than default */
456 temp |= (EHCI_TUNE_FLS << 2);
457 switch (EHCI_TUNE_FLS) {
458 case 0: ehci->periodic_size = 1024; break;
459 case 1: ehci->periodic_size = 512; break;
460 case 2: ehci->periodic_size = 256; break;
464 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
465 // Philips, Intel, and maybe others need CMD_RUN before the
466 // root hub will detect new devices (why?); NEC doesn't
468 writel (temp, &ehci->regs->command);
469 dbg_cmd (ehci, "init", temp);
471 /* set async sleep time = 10 us ... ? */
473 init_timer (&ehci->watchdog);
474 ehci->watchdog.function = ehci_watchdog;
475 ehci->watchdog.data = (unsigned long) ehci;
477 /* wire up the root hub */
478 bus = hcd_to_bus (hcd);
479 bus->root_hub = udev = usb_alloc_dev (NULL, bus, 0);
482 ehci_mem_cleanup (ehci);
487 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
488 * are explicitly handed to companion controller(s), so no TT is
489 * involved with the root hub.
491 ehci->reboot_notifier.notifier_call = ehci_reboot;
492 register_reboot_notifier (&ehci->reboot_notifier);
494 ehci->hcd.state = USB_STATE_RUNNING;
495 writel (FLAG_CF, &ehci->regs->configured_flag);
496 readl (&ehci->regs->command); /* unblock posted write */
498 /* PCI Serial Bus Release Number is at 0x60 offset */
499 pci_read_config_byte(to_pci_dev(hcd->self.controller), 0x60, &tempbyte);
500 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
502 "USB %x.%x enabled, EHCI %x.%02x, driver %s\n",
503 ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f),
504 temp >> 8, temp & 0xff, DRIVER_VERSION);
507 * From here on, khubd concurrently accesses the root
508 * hub; drivers will be talking to enumerated devices.
510 * Before this point the HC was idle/ready. After, khubd
511 * and device drivers may start it running.
513 udev->speed = USB_SPEED_HIGH;
514 if (hcd_register_root (hcd) != 0) {
515 if (hcd->state == USB_STATE_RUNNING)
524 create_debug_files (ehci);
529 /* always called by thread; normally rmmod */
531 static void ehci_stop (struct usb_hcd *hcd)
533 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
535 ehci_dbg (ehci, "stop\n");
537 /* no more interrupts ... */
538 if (hcd->state == USB_STATE_RUNNING)
540 if (in_interrupt ()) { /* must not happen!! */
541 ehci_err (ehci, "stopped in_interrupt!\n");
544 del_timer_sync (&ehci->watchdog);
547 /* let companion controllers work when we aren't */
548 writel (0, &ehci->regs->configured_flag);
549 unregister_reboot_notifier (&ehci->reboot_notifier);
551 remove_debug_files (ehci);
553 /* root hub is shut down separately (first, when possible) */
554 spin_lock_irq (&ehci->lock);
555 ehci_work (ehci, NULL);
556 spin_unlock_irq (&ehci->lock);
557 ehci_mem_cleanup (ehci);
560 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
561 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
562 ehci->stats.lost_iaa);
563 ehci_dbg (ehci, "complete %ld unlink %ld\n",
564 ehci->stats.complete, ehci->stats.unlink);
567 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
570 static int ehci_get_frame (struct usb_hcd *hcd)
572 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
573 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
576 /*-------------------------------------------------------------------------*/
580 /* suspend/resume, section 4.3 */
582 static int ehci_suspend (struct usb_hcd *hcd, u32 state)
584 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
588 ehci_dbg (ehci, "suspend to %d\n", state);
590 ports = HCS_N_PORTS (ehci->hcs_params);
592 // FIXME: This assumes what's probably a D3 level suspend...
594 // FIXME: usb wakeup events on this bus should resume the machine.
595 // pci config register PORTWAKECAP controls which ports can do it;
596 // bios may have initted the register...
598 /* suspend each port, then stop the hc */
599 for (i = 0; i < ports; i++) {
600 int temp = readl (&ehci->regs->port_status [i]);
602 if ((temp & PORT_PE) == 0
603 || (temp & PORT_OWNER) != 0)
605 ehci_dbg (ehci, "suspend port %d", i);
606 temp |= PORT_SUSPEND;
607 writel (temp, &ehci->regs->port_status [i]);
610 if (hcd->state == USB_STATE_RUNNING)
612 writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
614 // save pci FLADJ value
616 /* who tells PCI to reduce power consumption? */
621 static int ehci_resume (struct usb_hcd *hcd)
623 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
627 ehci_dbg (ehci, "resume\n");
629 ports = HCS_N_PORTS (ehci->hcs_params);
631 // FIXME: if controller didn't retain state,
632 // return and let generic code clean it up
633 // test configured_flag ?
635 /* resume HC and each port */
636 // restore pci FLADJ value
637 // khubd and drivers will set HC running, if needed;
638 hcd->state = USB_STATE_RUNNING;
639 // FIXME Philips/Intel/... etc don't really have a "READY"
640 // state ... turn on CMD_RUN too
641 for (i = 0; i < ports; i++) {
642 int temp = readl (&ehci->regs->port_status [i]);
644 if ((temp & PORT_PE) == 0
645 || (temp & PORT_SUSPEND) != 0)
647 ehci_dbg (ehci, "resume port %d", i);
649 writel (temp, &ehci->regs->port_status [i]);
650 readl (&ehci->regs->command); /* unblock posted writes */
653 temp &= ~PORT_RESUME;
654 writel (temp, &ehci->regs->port_status [i]);
656 readl (&ehci->regs->command); /* unblock posted writes */
662 /*-------------------------------------------------------------------------*/
665 * ehci_work is called from some interrupts, timers, and so on.
666 * it calls driver completion functions, after dropping ehci->lock.
668 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
670 timer_action_done (ehci, TIMER_IO_WATCHDOG);
671 if (ehci->reclaim_ready)
672 end_unlink_async (ehci, regs);
673 scan_async (ehci, regs);
674 if (ehci->next_uframe != -1)
675 scan_periodic (ehci, regs);
677 /* the IO watchdog guards against hardware or driver bugs that
678 * misplace IRQs, and should let us run completely without IRQs.
680 if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0))
681 timer_action (ehci, TIMER_IO_WATCHDOG);
684 /*-------------------------------------------------------------------------*/
686 static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
688 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
692 spin_lock (&ehci->lock);
694 status = readl (&ehci->regs->status);
698 spin_unlock (&ehci->lock);
702 /* e.g. cardbus physical eject */
703 if (status == ~(u32) 0) {
704 ehci_dbg (ehci, "device removed\n");
709 if (!status) /* irq sharing? */
712 /* clear (just) interrupts */
713 writel (status, &ehci->regs->status);
714 readl (&ehci->regs->command); /* unblock posted write */
717 #ifdef EHCI_VERBOSE_DEBUG
718 /* unrequested/ignored: Port Change Detect, Frame List Rollover */
719 dbg_status (ehci, "irq", status);
722 /* INT, ERR, and IAA interrupt rates can be throttled */
724 /* normal [4.15.1.2] or error [4.15.1.1] completion */
725 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
726 if (likely ((status & STS_ERR) == 0))
727 COUNT (ehci->stats.normal);
729 COUNT (ehci->stats.error);
733 /* complete the unlinking of some qh [4.15.2.3] */
734 if (status & STS_IAA) {
735 COUNT (ehci->stats.reclaim);
736 ehci->reclaim_ready = 1;
740 /* PCI errors [4.15.2.4] */
741 if (unlikely ((status & STS_FATAL) != 0)) {
742 ehci_err (ehci, "fatal error\n");
745 /* generic layer kills/unlinks all urbs, then
746 * uses ehci_stop to clean up the rest
752 ehci_work (ehci, regs);
754 spin_unlock (&ehci->lock);
758 /*-------------------------------------------------------------------------*/
761 * non-error returns are a promise to giveback() the urb later
762 * we drop ownership so next owner (or urb unlink) can get it
764 * urb + dev is in hcd.self.controller.urb_list
765 * we're queueing TDs onto software and hardware lists
767 * hcd-specific init for hcpriv hasn't been done yet
769 * NOTE: control, bulk, and interrupt share the same code to append TDs
770 * to a (possibly active) QH, and the same QH scanning code.
772 static int ehci_urb_enqueue (
777 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
778 struct list_head qtd_list;
780 urb->transfer_flags &= ~EHCI_STATE_UNLINK;
781 INIT_LIST_HEAD (&qtd_list);
783 switch (usb_pipetype (urb->pipe)) {
784 // case PIPE_CONTROL:
787 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
789 return submit_async (ehci, urb, &qtd_list, mem_flags);
792 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
794 return intr_submit (ehci, urb, &qtd_list, mem_flags);
796 case PIPE_ISOCHRONOUS:
797 if (urb->dev->speed == USB_SPEED_HIGH)
798 return itd_submit (ehci, urb, mem_flags);
799 #ifdef have_split_iso
801 return sitd_submit (ehci, urb, mem_flags);
803 dbg ("no split iso support yet");
805 #endif /* have_split_iso */
809 /* remove from hardware lists
810 * completions normally happen asynchronously
813 static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
815 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
819 spin_lock_irqsave (&ehci->lock, flags);
820 switch (usb_pipetype (urb->pipe)) {
821 // case PIPE_CONTROL:
824 qh = (struct ehci_qh *) urb->hcpriv;
828 /* if we need to use IAA and it's busy, defer */
829 if (qh->qh_state == QH_STATE_LINKED
831 && HCD_IS_RUNNING (ehci->hcd.state)
833 struct ehci_qh *last;
835 for (last = ehci->reclaim;
837 last = last->reclaim)
839 qh->qh_state = QH_STATE_UNLINK_WAIT;
842 /* bypass IAA if the hc can't care */
843 } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim)
844 end_unlink_async (ehci, NULL);
846 /* something else might have unlinked the qh by now */
847 if (qh->qh_state == QH_STATE_LINKED)
848 start_unlink_async (ehci, qh);
852 qh = (struct ehci_qh *) urb->hcpriv;
855 if (qh->qh_state == QH_STATE_LINKED) {
856 /* messy, can spin or block a microframe ... */
857 intr_deschedule (ehci, qh, 1);
858 /* qh_state == IDLE */
860 qh_completions (ehci, qh, NULL);
862 /* reschedule QH iff another request is queued */
863 if (!list_empty (&qh->qtd_list)
864 && HCD_IS_RUNNING (ehci->hcd.state)) {
867 status = qh_schedule (ehci, qh);
868 spin_unlock_irqrestore (&ehci->lock, flags);
871 // shouldn't happen often, but ...
872 // FIXME kill those tds' urbs
873 err ("can't reschedule qh %p, err %d",
880 case PIPE_ISOCHRONOUS:
883 // wait till next completion, do it then.
884 // completion irqs can wait up to 1024 msec,
885 urb->transfer_flags |= EHCI_STATE_UNLINK;
888 spin_unlock_irqrestore (&ehci->lock, flags);
892 /*-------------------------------------------------------------------------*/
894 // bulk qh holds the data toggle
897 ehci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
899 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
904 /* ASSERT: any requests/urbs are being unlinked */
905 /* ASSERT: nobody can be submitting urbs for this any more */
907 epnum = ep & USB_ENDPOINT_NUMBER_MASK;
908 if (epnum != 0 && (ep & USB_DIR_IN))
912 spin_lock_irqsave (&ehci->lock, flags);
913 qh = (struct ehci_qh *) dev->ep [epnum];
917 /* endpoints can be iso streams. for now, we don't
918 * accelerate iso completions ... so spin a while.
920 if (qh->hw_info1 == 0) {
921 ehci_vdbg (ehci, "iso delay\n");
925 if (!HCD_IS_RUNNING (ehci->hcd.state))
926 qh->qh_state = QH_STATE_IDLE;
927 switch (qh->qh_state) {
928 case QH_STATE_UNLINK: /* wait for hw to finish? */
930 spin_unlock_irqrestore (&ehci->lock, flags);
931 set_current_state (TASK_UNINTERRUPTIBLE);
932 schedule_timeout (1);
934 case QH_STATE_IDLE: /* fully unlinked */
935 if (list_empty (&qh->qtd_list)) {
939 /* else FALL THROUGH */
941 /* caller was supposed to have unlinked any requests;
942 * that's not our job. just leak this memory.
944 ehci_err (ehci, "qh %p (#%d) state %d%s\n",
945 qh, epnum, qh->qh_state,
946 list_empty (&qh->qtd_list) ? "" : "(has tds)");
951 spin_unlock_irqrestore (&ehci->lock, flags);
955 /*-------------------------------------------------------------------------*/
957 static const struct hc_driver ehci_driver = {
958 .description = hcd_name,
961 * generic hardware linkage
964 .flags = HCD_MEMORY | HCD_USB2,
967 * basic lifecycle operations
969 .reset = ehci_hc_reset,
972 .suspend = ehci_suspend,
973 .resume = ehci_resume,
978 * memory lifecycle (except per-request)
980 .hcd_alloc = ehci_hcd_alloc,
981 .hcd_free = ehci_hcd_free,
984 * managing i/o requests and associated device resources
986 .urb_enqueue = ehci_urb_enqueue,
987 .urb_dequeue = ehci_urb_dequeue,
988 .endpoint_disable = ehci_endpoint_disable,
993 .get_frame_number = ehci_get_frame,
998 .hub_status_data = ehci_hub_status_data,
999 .hub_control = ehci_hub_control,
1002 /*-------------------------------------------------------------------------*/
1004 /* EHCI spec says PCI is required. */
1006 /* PCI driver selection metadata; PCI hotplugging uses this */
1007 static const struct pci_device_id pci_ids [] = { {
1008 /* handle any USB 2.0 EHCI controller */
1009 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
1010 .driver_data = (unsigned long) &ehci_driver,
1012 { /* end: all zeroes */ }
1014 MODULE_DEVICE_TABLE (pci, pci_ids);
1016 /* pci driver glue; this is a "new style" PCI driver module */
1017 static struct pci_driver ehci_pci_driver = {
1018 .name = (char *) hcd_name,
1019 .id_table = pci_ids,
1021 .probe = usb_hcd_pci_probe,
1022 .remove = usb_hcd_pci_remove,
1025 .suspend = usb_hcd_pci_suspend,
1026 .resume = usb_hcd_pci_resume,
1030 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1032 MODULE_DESCRIPTION (DRIVER_INFO);
1033 MODULE_AUTHOR (DRIVER_AUTHOR);
1034 MODULE_LICENSE ("GPL");
1036 static int __init init (void)
1041 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1043 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1044 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1046 return pci_module_init (&ehci_pci_driver);
1050 static void __exit cleanup (void)
1052 pci_unregister_driver (&ehci_pci_driver);
1054 module_exit (cleanup);