2 * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify it
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21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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33 This directory contains the files required to build
34 the fake PROM image that is currently being used to
35 boot IA64 kernels running under the SGI Medusa kernel.
37 The FPROM currently provides the following functions:
39 - PAL emulation for all PAL calls we've made so far.
40 - SAL emulation for all SAL calls we've made so far.
41 - EFI emulation for all EFI calls we've made so far.
42 - builds the "ia64_bootparam" structure that is
43 passed to the kernel from SAL. This structure
44 shows the cpu & memory configurations.
45 - supports medusa boottime options for changing
46 the number of cpus present
47 - supports medusa boottime options for changing
48 the memory configuration.
52 At some point, this fake PROM will be replaced by the
58 To build a fake PROM, cd to this directory & type:
62 This will (or should) build a fake PROM named "fprom".
67 Use this fprom image when booting the Medusa simulator. The
68 control file used to boot Medusa should include the
74 sr g 9 <address of kernel _start function> #(currently 0xe000000000520000)
76 NOTE: There is a script "runsim" in this directory that can be used to
77 simplify setting up an environment for running under Medusa.
82 The following parameters may be passed to the fake PROM to
83 control the PAL/SAL/EFI parameters passed to the kernel:
86 GR[9] = address of primary entry point into the kernel
87 GR[20] = memory configuration for node 0
88 GR[21] = memory configuration for node 1
89 GR[22] = memory configuration for node 2
90 GR[23] = memory configuration for node 3
93 Registers GR[20] - GR[23] contain information to specify the
94 amount of memory present on nodes 0-3.
96 - if nothing is specified (all registers are 0), the configuration
97 defaults to 8 MB on node 0.
99 - a mem config entry for node N is passed in GR[20+N]
101 - a mem config entry consists of 8 hex digits. Each digit gives the
102 amount of physical memory available on the node starting at
103 1GB*<dn>, where dn is the digit number. The amount of memory
104 is 8MB*2**<d>. (If <d> = 0, the memory size is 0).
106 SN1 doesnt support dimms this small but small memory systems
107 boot faster on Medusa.
111 An example helps a lot. The following specifies that node 0 has
112 physical memory 0 to 8MB and 1GB to 1GB+32MB, and that node 1 has
113 64MB starting at address 0 of the node which is 8GB.
115 gr[20] = 0x21 # 0 to 8MB, 1GB to 1GB+32MB
116 gr[21] = 0x4 # 8GB to 8GB+64MB