sound/soc/codecs/wm9090.h

   1 /*
   2  * ALSA SoC WM9090 driver
   3  *
   4  * Copyright 2009 Wolfson Microelectronics
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  */
  22
  23 #ifndef __WM9090_H
  24 #define __WM9090_H
  25
  26 extern struct snd_soc_codec_device soc_codec_dev_wm9090;
  27
  28 /*
  29  * Register values.
  30  */
  31 #define WM9090_SOFTWARE_RESET                   0x00
  32 #define WM9090_POWER_MANAGEMENT_1               0x01
  33 #define WM9090_POWER_MANAGEMENT_2               0x02
  34 #define WM9090_POWER_MANAGEMENT_3               0x03
  35 #define WM9090_CLOCKING_1                       0x06
  36 #define WM9090_IN1_LINE_CONTROL                 0x16
  37 #define WM9090_IN2_LINE_CONTROL                 0x17
  38 #define WM9090_IN1_LINE_INPUT_A_VOLUME          0x18
  39 #define WM9090_IN1_LINE_INPUT_B_VOLUME          0x19
  40 #define WM9090_IN2_LINE_INPUT_A_VOLUME          0x1A
  41 #define WM9090_IN2_LINE_INPUT_B_VOLUME          0x1B
  42 #define WM9090_LEFT_OUTPUT_VOLUME               0x1C
  43 #define WM9090_RIGHT_OUTPUT_VOLUME              0x1D
  44 #define WM9090_SPKMIXL_ATTENUATION              0x22
  45 #define WM9090_SPKOUT_MIXERS                    0x24
  46 #define WM9090_CLASSD3                          0x25
  47 #define WM9090_SPEAKER_VOLUME_LEFT              0x26
  48 #define WM9090_OUTPUT_MIXER1                    0x2D
  49 #define WM9090_OUTPUT_MIXER2                    0x2E
  50 #define WM9090_OUTPUT_MIXER3                    0x2F
  51 #define WM9090_OUTPUT_MIXER4                    0x30
  52 #define WM9090_SPEAKER_MIXER                    0x36
  53 #define WM9090_ANTIPOP2                         0x39
  54 #define WM9090_WRITE_SEQUENCER_0                0x46
  55 #define WM9090_WRITE_SEQUENCER_1                0x47
  56 #define WM9090_WRITE_SEQUENCER_2                0x48
  57 #define WM9090_WRITE_SEQUENCER_3                0x49
  58 #define WM9090_WRITE_SEQUENCER_4                0x4A
  59 #define WM9090_WRITE_SEQUENCER_5                0x4B
  60 #define WM9090_CHARGE_PUMP_1                    0x4C
  61 #define WM9090_DC_SERVO_0                       0x54
  62 #define WM9090_DC_SERVO_1                       0x55
  63 #define WM9090_DC_SERVO_3                       0x57
  64 #define WM9090_DC_SERVO_READBACK_0              0x58
  65 #define WM9090_DC_SERVO_READBACK_1              0x59
  66 #define WM9090_DC_SERVO_READBACK_2              0x5A
  67 #define WM9090_ANALOGUE_HP_0                    0x60
  68 #define WM9090_AGC_CONTROL_0                    0x62
  69 #define WM9090_AGC_CONTROL_1                    0x63
  70 #define WM9090_AGC_CONTROL_2                    0x64
  71
  72 #define WM9090_REGISTER_COUNT                   40
  73 #define WM9090_MAX_REGISTER                     0x64
  74
  75 /*
  76  * Field Definitions.
  77  */
  78
  79 /*
  80  * R0 (0x00) - Software Reset
  81  */
  82 #define WM9090_SW_RESET_MASK                    0xFFFF  /* SW_RESET - [15:0] */
  83 #define WM9090_SW_RESET_SHIFT                        0  /* SW_RESET - [15:0] */
  84 #define WM9090_SW_RESET_WIDTH                       16  /* SW_RESET - [15:0] */
  85
  86 /*
  87  * R1 (0x01) - Power Management (1)
  88  */
  89 #define WM9090_SPKOUTL_ENA                      0x1000  /* SPKOUTL_ENA */
  90 #define WM9090_SPKOUTL_ENA_MASK                 0x1000  /* SPKOUTL_ENA */
  91 #define WM9090_SPKOUTL_ENA_SHIFT                    12  /* SPKOUTL_ENA */
  92 #define WM9090_SPKOUTL_ENA_WIDTH                     1  /* SPKOUTL_ENA */
  93 #define WM9090_HPOUT1L_ENA                      0x0200  /* HPOUT1L_ENA */
  94 #define WM9090_HPOUT1L_ENA_MASK                 0x0200  /* HPOUT1L_ENA */
  95 #define WM9090_HPOUT1L_ENA_SHIFT                     9  /* HPOUT1L_ENA */
  96 #define WM9090_HPOUT1L_ENA_WIDTH                     1  /* HPOUT1L_ENA */
  97 #define WM9090_HPOUT1R_ENA                      0x0100  /* HPOUT1R_ENA */
  98 #define WM9090_HPOUT1R_ENA_MASK                 0x0100  /* HPOUT1R_ENA */
  99 #define WM9090_HPOUT1R_ENA_SHIFT                     8  /* HPOUT1R_ENA */
 100 #define WM9090_HPOUT1R_ENA_WIDTH                     1  /* HPOUT1R_ENA */
 101 #define WM9090_OSC_ENA                          0x0008  /* OSC_ENA */
 102 #define WM9090_OSC_ENA_MASK                     0x0008  /* OSC_ENA */
 103 #define WM9090_OSC_ENA_SHIFT                         3  /* OSC_ENA */
 104 #define WM9090_OSC_ENA_WIDTH                         1  /* OSC_ENA */
 105 #define WM9090_VMID_RES_MASK                    0x0006  /* VMID_RES - [2:1] */
 106 #define WM9090_VMID_RES_SHIFT                        1  /* VMID_RES - [2:1] */
 107 #define WM9090_VMID_RES_WIDTH                        2  /* VMID_RES - [2:1] */
 108 #define WM9090_BIAS_ENA                         0x0001  /* BIAS_ENA */
 109 #define WM9090_BIAS_ENA_MASK                    0x0001  /* BIAS_ENA */
 110 #define WM9090_BIAS_ENA_SHIFT                        0  /* BIAS_ENA */
 111 #define WM9090_BIAS_ENA_WIDTH                        1  /* BIAS_ENA */
 112
 113 /*
 114  * R2 (0x02) - Power Management (2)
 115  */
 116 #define WM9090_TSHUT                            0x8000  /* TSHUT */
 117 #define WM9090_TSHUT_MASK                       0x8000  /* TSHUT */
 118 #define WM9090_TSHUT_SHIFT                          15  /* TSHUT */
 119 #define WM9090_TSHUT_WIDTH                           1  /* TSHUT */
 120 #define WM9090_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
 121 #define WM9090_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
 122 #define WM9090_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
 123 #define WM9090_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
 124 #define WM9090_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
 125 #define WM9090_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
 126 #define WM9090_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
 127 #define WM9090_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
 128 #define WM9090_IN1A_ENA                         0x0080  /* IN1A_ENA */
 129 #define WM9090_IN1A_ENA_MASK                    0x0080  /* IN1A_ENA */
 130 #define WM9090_IN1A_ENA_SHIFT                        7  /* IN1A_ENA */
 131 #define WM9090_IN1A_ENA_WIDTH                        1  /* IN1A_ENA */
 132 #define WM9090_IN1B_ENA                         0x0040  /* IN1B_ENA */
 133 #define WM9090_IN1B_ENA_MASK                    0x0040  /* IN1B_ENA */
 134 #define WM9090_IN1B_ENA_SHIFT                        6  /* IN1B_ENA */
 135 #define WM9090_IN1B_ENA_WIDTH                        1  /* IN1B_ENA */
 136 #define WM9090_IN2A_ENA                         0x0020  /* IN2A_ENA */
 137 #define WM9090_IN2A_ENA_MASK                    0x0020  /* IN2A_ENA */
 138 #define WM9090_IN2A_ENA_SHIFT                        5  /* IN2A_ENA */
 139 #define WM9090_IN2A_ENA_WIDTH                        1  /* IN2A_ENA */
 140 #define WM9090_IN2B_ENA                         0x0010  /* IN2B_ENA */
 141 #define WM9090_IN2B_ENA_MASK                    0x0010  /* IN2B_ENA */
 142 #define WM9090_IN2B_ENA_SHIFT                        4  /* IN2B_ENA */
 143 #define WM9090_IN2B_ENA_WIDTH                        1  /* IN2B_ENA */
 144
 145 /*
 146  * R3 (0x03) - Power Management (3)
 147  */
 148 #define WM9090_AGC_ENA                          0x4000  /* AGC_ENA */
 149 #define WM9090_AGC_ENA_MASK                     0x4000  /* AGC_ENA */
 150 #define WM9090_AGC_ENA_SHIFT                        14  /* AGC_ENA */
 151 #define WM9090_AGC_ENA_WIDTH                         1  /* AGC_ENA */
 152 #define WM9090_SPKLVOL_ENA                      0x0100  /* SPKLVOL_ENA */
 153 #define WM9090_SPKLVOL_ENA_MASK                 0x0100  /* SPKLVOL_ENA */
 154 #define WM9090_SPKLVOL_ENA_SHIFT                     8  /* SPKLVOL_ENA */
 155 #define WM9090_SPKLVOL_ENA_WIDTH                     1  /* SPKLVOL_ENA */
 156 #define WM9090_MIXOUTL_ENA                      0x0020  /* MIXOUTL_ENA */
 157 #define WM9090_MIXOUTL_ENA_MASK                 0x0020  /* MIXOUTL_ENA */
 158 #define WM9090_MIXOUTL_ENA_SHIFT                     5  /* MIXOUTL_ENA */
 159 #define WM9090_MIXOUTL_ENA_WIDTH                     1  /* MIXOUTL_ENA */
 160 #define WM9090_MIXOUTR_ENA                      0x0010  /* MIXOUTR_ENA */
 161 #define WM9090_MIXOUTR_ENA_MASK                 0x0010  /* MIXOUTR_ENA */
 162 #define WM9090_MIXOUTR_ENA_SHIFT                     4  /* MIXOUTR_ENA */
 163 #define WM9090_MIXOUTR_ENA_WIDTH                     1  /* MIXOUTR_ENA */
 164 #define WM9090_SPKMIX_ENA                       0x0008  /* SPKMIX_ENA */
 165 #define WM9090_SPKMIX_ENA_MASK                  0x0008  /* SPKMIX_ENA */
 166 #define WM9090_SPKMIX_ENA_SHIFT                      3  /* SPKMIX_ENA */
 167 #define WM9090_SPKMIX_ENA_WIDTH                      1  /* SPKMIX_ENA */
 168
 169 /*
 170  * R6 (0x06) - Clocking 1
 171  */
 172 #define WM9090_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
 173 #define WM9090_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
 174 #define WM9090_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
 175 #define WM9090_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
 176 #define WM9090_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
 177 #define WM9090_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
 178 #define WM9090_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
 179 #define WM9090_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
 180
 181 /*
 182  * R22 (0x16) - IN1 Line Control
 183  */
 184 #define WM9090_IN1_DIFF                         0x0002  /* IN1_DIFF */
 185 #define WM9090_IN1_DIFF_MASK                    0x0002  /* IN1_DIFF */
 186 #define WM9090_IN1_DIFF_SHIFT                        1  /* IN1_DIFF */
 187 #define WM9090_IN1_DIFF_WIDTH                        1  /* IN1_DIFF */
 188 #define WM9090_IN1_CLAMP                        0x0001  /* IN1_CLAMP */
 189 #define WM9090_IN1_CLAMP_MASK                   0x0001  /* IN1_CLAMP */
 190 #define WM9090_IN1_CLAMP_SHIFT                       0  /* IN1_CLAMP */
 191 #define WM9090_IN1_CLAMP_WIDTH                       1  /* IN1_CLAMP */
 192
 193 /*
 194  * R23 (0x17) - IN2 Line Control
 195  */
 196 #define WM9090_IN2_DIFF                         0x0002  /* IN2_DIFF */
 197 #define WM9090_IN2_DIFF_MASK                    0x0002  /* IN2_DIFF */
 198 #define WM9090_IN2_DIFF_SHIFT                        1  /* IN2_DIFF */
 199 #define WM9090_IN2_DIFF_WIDTH                        1  /* IN2_DIFF */
 200 #define WM9090_IN2_CLAMP                        0x0001  /* IN2_CLAMP */
 201 #define WM9090_IN2_CLAMP_MASK                   0x0001  /* IN2_CLAMP */
 202 #define WM9090_IN2_CLAMP_SHIFT                       0  /* IN2_CLAMP */
 203 #define WM9090_IN2_CLAMP_WIDTH                       1  /* IN2_CLAMP */
 204
 205 /*
 206  * R24 (0x18) - IN1 Line Input A Volume
 207  */
 208 #define WM9090_IN1_VU                           0x0100  /* IN1_VU */
 209 #define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
 210 #define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
 211 #define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
 212 #define WM9090_IN1A_MUTE                        0x0080  /* IN1A_MUTE */
 213 #define WM9090_IN1A_MUTE_MASK                   0x0080  /* IN1A_MUTE */
 214 #define WM9090_IN1A_MUTE_SHIFT                       7  /* IN1A_MUTE */
 215 #define WM9090_IN1A_MUTE_WIDTH                       1  /* IN1A_MUTE */
 216 #define WM9090_IN1A_ZC                          0x0040  /* IN1A_ZC */
 217 #define WM9090_IN1A_ZC_MASK                     0x0040  /* IN1A_ZC */
 218 #define WM9090_IN1A_ZC_SHIFT                         6  /* IN1A_ZC */
 219 #define WM9090_IN1A_ZC_WIDTH                         1  /* IN1A_ZC */
 220 #define WM9090_IN1A_VOL_MASK                    0x0007  /* IN1A_VOL - [2:0] */
 221 #define WM9090_IN1A_VOL_SHIFT                        0  /* IN1A_VOL - [2:0] */
 222 #define WM9090_IN1A_VOL_WIDTH                        3  /* IN1A_VOL - [2:0] */
 223
 224 /*
 225  * R25 (0x19) - IN1  Line Input B Volume
 226  */
 227 #define WM9090_IN1_VU                           0x0100  /* IN1_VU */
 228 #define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
 229 #define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
 230 #define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
 231 #define WM9090_IN1B_MUTE                        0x0080  /* IN1B_MUTE */
 232 #define WM9090_IN1B_MUTE_MASK                   0x0080  /* IN1B_MUTE */
 233 #define WM9090_IN1B_MUTE_SHIFT                       7  /* IN1B_MUTE */
 234 #define WM9090_IN1B_MUTE_WIDTH                       1  /* IN1B_MUTE */
 235 #define WM9090_IN1B_ZC                          0x0040  /* IN1B_ZC */
 236 #define WM9090_IN1B_ZC_MASK                     0x0040  /* IN1B_ZC */
 237 #define WM9090_IN1B_ZC_SHIFT                         6  /* IN1B_ZC */
 238 #define WM9090_IN1B_ZC_WIDTH                         1  /* IN1B_ZC */
 239 #define WM9090_IN1B_VOL_MASK                    0x0007  /* IN1B_VOL - [2:0] */
 240 #define WM9090_IN1B_VOL_SHIFT                        0  /* IN1B_VOL - [2:0] */
 241 #define WM9090_IN1B_VOL_WIDTH                        3  /* IN1B_VOL - [2:0] */
 242
 243 /*
 244  * R26 (0x1A) - IN2 Line Input A Volume
 245  */
 246 #define WM9090_IN2_VU                           0x0100  /* IN2_VU */
 247 #define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
 248 #define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
 249 #define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
 250 #define WM9090_IN2A_MUTE                        0x0080  /* IN2A_MUTE */
 251 #define WM9090_IN2A_MUTE_MASK                   0x0080  /* IN2A_MUTE */
 252 #define WM9090_IN2A_MUTE_SHIFT                       7  /* IN2A_MUTE */
 253 #define WM9090_IN2A_MUTE_WIDTH                       1  /* IN2A_MUTE */
 254 #define WM9090_IN2A_ZC                          0x0040  /* IN2A_ZC */
 255 #define WM9090_IN2A_ZC_MASK                     0x0040  /* IN2A_ZC */
 256 #define WM9090_IN2A_ZC_SHIFT                         6  /* IN2A_ZC */
 257 #define WM9090_IN2A_ZC_WIDTH                         1  /* IN2A_ZC */
 258 #define WM9090_IN2A_VOL_MASK                    0x0007  /* IN2A_VOL - [2:0] */
 259 #define WM9090_IN2A_VOL_SHIFT                        0  /* IN2A_VOL - [2:0] */
 260 #define WM9090_IN2A_VOL_WIDTH                        3  /* IN2A_VOL - [2:0] */
 261
 262 /*
 263  * R27 (0x1B) - IN2 Line Input B Volume
 264  */
 265 #define WM9090_IN2_VU                           0x0100  /* IN2_VU */
 266 #define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
 267 #define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
 268 #define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
 269 #define WM9090_IN2B_MUTE                        0x0080  /* IN2B_MUTE */
 270 #define WM9090_IN2B_MUTE_MASK                   0x0080  /* IN2B_MUTE */
 271 #define WM9090_IN2B_MUTE_SHIFT                       7  /* IN2B_MUTE */
 272 #define WM9090_IN2B_MUTE_WIDTH                       1  /* IN2B_MUTE */
 273 #define WM9090_IN2B_ZC                          0x0040  /* IN2B_ZC */
 274 #define WM9090_IN2B_ZC_MASK                     0x0040  /* IN2B_ZC */
 275 #define WM9090_IN2B_ZC_SHIFT                         6  /* IN2B_ZC */
 276 #define WM9090_IN2B_ZC_WIDTH                         1  /* IN2B_ZC */
 277 #define WM9090_IN2B_VOL_MASK                    0x0007  /* IN2B_VOL - [2:0] */
 278 #define WM9090_IN2B_VOL_SHIFT                        0  /* IN2B_VOL - [2:0] */
 279 #define WM9090_IN2B_VOL_WIDTH                        3  /* IN2B_VOL - [2:0] */
 280
 281 /*
 282  * R28 (0x1C) - Left Output Volume
 283  */
 284 #define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
 285 #define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
 286 #define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
 287 #define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
 288 #define WM9090_HPOUT1L_ZC                       0x0080  /* HPOUT1L_ZC */
 289 #define WM9090_HPOUT1L_ZC_MASK                  0x0080  /* HPOUT1L_ZC */
 290 #define WM9090_HPOUT1L_ZC_SHIFT                      7  /* HPOUT1L_ZC */
 291 #define WM9090_HPOUT1L_ZC_WIDTH                      1  /* HPOUT1L_ZC */
 292 #define WM9090_HPOUT1L_MUTE                     0x0040  /* HPOUT1L_MUTE */
 293 #define WM9090_HPOUT1L_MUTE_MASK                0x0040  /* HPOUT1L_MUTE */
 294 #define WM9090_HPOUT1L_MUTE_SHIFT                    6  /* HPOUT1L_MUTE */
 295 #define WM9090_HPOUT1L_MUTE_WIDTH                    1  /* HPOUT1L_MUTE */
 296 #define WM9090_HPOUT1L_VOL_MASK                 0x003F  /* HPOUT1L_VOL - [5:0] */
 297 #define WM9090_HPOUT1L_VOL_SHIFT                     0  /* HPOUT1L_VOL - [5:0] */
 298 #define WM9090_HPOUT1L_VOL_WIDTH                     6  /* HPOUT1L_VOL - [5:0] */
 299
 300 /*
 301  * R29 (0x1D) - Right Output Volume
 302  */
 303 #define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
 304 #define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
 305 #define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
 306 #define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
 307 #define WM9090_HPOUT1R_ZC                       0x0080  /* HPOUT1R_ZC */
 308 #define WM9090_HPOUT1R_ZC_MASK                  0x0080  /* HPOUT1R_ZC */
 309 #define WM9090_HPOUT1R_ZC_SHIFT                      7  /* HPOUT1R_ZC */
 310 #define WM9090_HPOUT1R_ZC_WIDTH                      1  /* HPOUT1R_ZC */
 311 #define WM9090_HPOUT1R_MUTE                     0x0040  /* HPOUT1R_MUTE */
 312 #define WM9090_HPOUT1R_MUTE_MASK                0x0040  /* HPOUT1R_MUTE */
 313 #define WM9090_HPOUT1R_MUTE_SHIFT                    6  /* HPOUT1R_MUTE */
 314 #define WM9090_HPOUT1R_MUTE_WIDTH                    1  /* HPOUT1R_MUTE */
 315 #define WM9090_HPOUT1R_VOL_MASK                 0x003F  /* HPOUT1R_VOL - [5:0] */
 316 #define WM9090_HPOUT1R_VOL_SHIFT                     0  /* HPOUT1R_VOL - [5:0] */
 317 #define WM9090_HPOUT1R_VOL_WIDTH                     6  /* HPOUT1R_VOL - [5:0] */
 318
 319 /*
 320  * R34 (0x22) - SPKMIXL Attenuation
 321  */
 322 #define WM9090_SPKMIX_MUTE                      0x0100  /* SPKMIX_MUTE */
 323 #define WM9090_SPKMIX_MUTE_MASK                 0x0100  /* SPKMIX_MUTE */
 324 #define WM9090_SPKMIX_MUTE_SHIFT                     8  /* SPKMIX_MUTE */
 325 #define WM9090_SPKMIX_MUTE_WIDTH                     1  /* SPKMIX_MUTE */
 326 #define WM9090_IN1A_SPKMIX_VOL_MASK             0x00C0  /* IN1A_SPKMIX_VOL - [7:6] */
 327 #define WM9090_IN1A_SPKMIX_VOL_SHIFT                 6  /* IN1A_SPKMIX_VOL - [7:6] */
 328 #define WM9090_IN1A_SPKMIX_VOL_WIDTH                 2  /* IN1A_SPKMIX_VOL - [7:6] */
 329 #define WM9090_IN1B_SPKMIX_VOL_MASK             0x0030  /* IN1B_SPKMIX_VOL - [5:4] */
 330 #define WM9090_IN1B_SPKMIX_VOL_SHIFT                 4  /* IN1B_SPKMIX_VOL - [5:4] */
 331 #define WM9090_IN1B_SPKMIX_VOL_WIDTH                 2  /* IN1B_SPKMIX_VOL - [5:4] */
 332 #define WM9090_IN2A_SPKMIX_VOL_MASK             0x000C  /* IN2A_SPKMIX_VOL - [3:2] */
 333 #define WM9090_IN2A_SPKMIX_VOL_SHIFT                 2  /* IN2A_SPKMIX_VOL - [3:2] */
 334 #define WM9090_IN2A_SPKMIX_VOL_WIDTH                 2  /* IN2A_SPKMIX_VOL - [3:2] */
 335 #define WM9090_IN2B_SPKMIX_VOL_MASK             0x0003  /* IN2B_SPKMIX_VOL - [1:0] */
 336 #define WM9090_IN2B_SPKMIX_VOL_SHIFT                 0  /* IN2B_SPKMIX_VOL - [1:0] */
 337 #define WM9090_IN2B_SPKMIX_VOL_WIDTH                 2  /* IN2B_SPKMIX_VOL - [1:0] */
 338
 339 /*
 340  * R36 (0x24) - SPKOUT Mixers
 341  */
 342 #define WM9090_SPKMIXL_TO_SPKOUTL               0x0010  /* SPKMIXL_TO_SPKOUTL */
 343 #define WM9090_SPKMIXL_TO_SPKOUTL_MASK          0x0010  /* SPKMIXL_TO_SPKOUTL */
 344 #define WM9090_SPKMIXL_TO_SPKOUTL_SHIFT              4  /* SPKMIXL_TO_SPKOUTL */
 345 #define WM9090_SPKMIXL_TO_SPKOUTL_WIDTH              1  /* SPKMIXL_TO_SPKOUTL */
 346
 347 /*
 348  * R37 (0x25) - ClassD3
 349  */
 350 #define WM9090_SPKOUTL_BOOST_MASK               0x0038  /* SPKOUTL_BOOST - [5:3] */
 351 #define WM9090_SPKOUTL_BOOST_SHIFT                   3  /* SPKOUTL_BOOST - [5:3] */
 352 #define WM9090_SPKOUTL_BOOST_WIDTH                   3  /* SPKOUTL_BOOST - [5:3] */
 353
 354 /*
 355  * R38 (0x26) - Speaker Volume Left
 356  */
 357 #define WM9090_SPKOUT_VU                        0x0100  /* SPKOUT_VU */
 358 #define WM9090_SPKOUT_VU_MASK                   0x0100  /* SPKOUT_VU */
 359 #define WM9090_SPKOUT_VU_SHIFT                       8  /* SPKOUT_VU */
 360 #define WM9090_SPKOUT_VU_WIDTH                       1  /* SPKOUT_VU */
 361 #define WM9090_SPKOUTL_ZC                       0x0080  /* SPKOUTL_ZC */
 362 #define WM9090_SPKOUTL_ZC_MASK                  0x0080  /* SPKOUTL_ZC */
 363 #define WM9090_SPKOUTL_ZC_SHIFT                      7  /* SPKOUTL_ZC */
 364 #define WM9090_SPKOUTL_ZC_WIDTH                      1  /* SPKOUTL_ZC */
 365 #define WM9090_SPKOUTL_MUTE                     0x0040  /* SPKOUTL_MUTE */
 366 #define WM9090_SPKOUTL_MUTE_MASK                0x0040  /* SPKOUTL_MUTE */
 367 #define WM9090_SPKOUTL_MUTE_SHIFT                    6  /* SPKOUTL_MUTE */
 368 #define WM9090_SPKOUTL_MUTE_WIDTH                    1  /* SPKOUTL_MUTE */
 369 #define WM9090_SPKOUTL_VOL_MASK                 0x003F  /* SPKOUTL_VOL - [5:0] */
 370 #define WM9090_SPKOUTL_VOL_SHIFT                     0  /* SPKOUTL_VOL - [5:0] */
 371 #define WM9090_SPKOUTL_VOL_WIDTH                     6  /* SPKOUTL_VOL - [5:0] */
 372
 373 /*
 374  * R45 (0x2D) - Output Mixer1
 375  */
 376 #define WM9090_IN1A_TO_MIXOUTL                  0x0040  /* IN1A_TO_MIXOUTL */
 377 #define WM9090_IN1A_TO_MIXOUTL_MASK             0x0040  /* IN1A_TO_MIXOUTL */
 378 #define WM9090_IN1A_TO_MIXOUTL_SHIFT                 6  /* IN1A_TO_MIXOUTL */
 379 #define WM9090_IN1A_TO_MIXOUTL_WIDTH                 1  /* IN1A_TO_MIXOUTL */
 380 #define WM9090_IN2A_TO_MIXOUTL                  0x0004  /* IN2A_TO_MIXOUTL */
 381 #define WM9090_IN2A_TO_MIXOUTL_MASK             0x0004  /* IN2A_TO_MIXOUTL */
 382 #define WM9090_IN2A_TO_MIXOUTL_SHIFT                 2  /* IN2A_TO_MIXOUTL */
 383 #define WM9090_IN2A_TO_MIXOUTL_WIDTH                 1  /* IN2A_TO_MIXOUTL */
 384
 385 /*
 386  * R46 (0x2E) - Output Mixer2
 387  */
 388 #define WM9090_IN1A_TO_MIXOUTR                  0x0040  /* IN1A_TO_MIXOUTR */
 389 #define WM9090_IN1A_TO_MIXOUTR_MASK             0x0040  /* IN1A_TO_MIXOUTR */
 390 #define WM9090_IN1A_TO_MIXOUTR_SHIFT                 6  /* IN1A_TO_MIXOUTR */
 391 #define WM9090_IN1A_TO_MIXOUTR_WIDTH                 1  /* IN1A_TO_MIXOUTR */
 392 #define WM9090_IN1B_TO_MIXOUTR                  0x0010  /* IN1B_TO_MIXOUTR */
 393 #define WM9090_IN1B_TO_MIXOUTR_MASK             0x0010  /* IN1B_TO_MIXOUTR */
 394 #define WM9090_IN1B_TO_MIXOUTR_SHIFT                 4  /* IN1B_TO_MIXOUTR */
 395 #define WM9090_IN1B_TO_MIXOUTR_WIDTH                 1  /* IN1B_TO_MIXOUTR */
 396 #define WM9090_IN2A_TO_MIXOUTR                  0x0004  /* IN2A_TO_MIXOUTR */
 397 #define WM9090_IN2A_TO_MIXOUTR_MASK             0x0004  /* IN2A_TO_MIXOUTR */
 398 #define WM9090_IN2A_TO_MIXOUTR_SHIFT                 2  /* IN2A_TO_MIXOUTR */
 399 #define WM9090_IN2A_TO_MIXOUTR_WIDTH                 1  /* IN2A_TO_MIXOUTR */
 400 #define WM9090_IN2B_TO_MIXOUTR                  0x0001  /* IN2B_TO_MIXOUTR */
 401 #define WM9090_IN2B_TO_MIXOUTR_MASK             0x0001  /* IN2B_TO_MIXOUTR */
 402 #define WM9090_IN2B_TO_MIXOUTR_SHIFT                 0  /* IN2B_TO_MIXOUTR */
 403 #define WM9090_IN2B_TO_MIXOUTR_WIDTH                 1  /* IN2B_TO_MIXOUTR */
 404
 405 /*
 406  * R47 (0x2F) - Output Mixer3
 407  */
 408 #define WM9090_MIXOUTL_MUTE                     0x0100  /* MIXOUTL_MUTE */
 409 #define WM9090_MIXOUTL_MUTE_MASK                0x0100  /* MIXOUTL_MUTE */
 410 #define WM9090_MIXOUTL_MUTE_SHIFT                    8  /* MIXOUTL_MUTE */
 411 #define WM9090_MIXOUTL_MUTE_WIDTH                    1  /* MIXOUTL_MUTE */
 412 #define WM9090_IN1A_MIXOUTL_VOL_MASK            0x00C0  /* IN1A_MIXOUTL_VOL - [7:6] */
 413 #define WM9090_IN1A_MIXOUTL_VOL_SHIFT                6  /* IN1A_MIXOUTL_VOL - [7:6] */
 414 #define WM9090_IN1A_MIXOUTL_VOL_WIDTH                2  /* IN1A_MIXOUTL_VOL - [7:6] */
 415 #define WM9090_IN2A_MIXOUTL_VOL_MASK            0x000C  /* IN2A_MIXOUTL_VOL - [3:2] */
 416 #define WM9090_IN2A_MIXOUTL_VOL_SHIFT                2  /* IN2A_MIXOUTL_VOL - [3:2] */
 417 #define WM9090_IN2A_MIXOUTL_VOL_WIDTH                2  /* IN2A_MIXOUTL_VOL - [3:2] */
 418
 419 /*
 420  * R48 (0x30) - Output Mixer4
 421  */
 422 #define WM9090_MIXOUTR_MUTE                     0x0100  /* MIXOUTR_MUTE */
 423 #define WM9090_MIXOUTR_MUTE_MASK                0x0100  /* MIXOUTR_MUTE */
 424 #define WM9090_MIXOUTR_MUTE_SHIFT                    8  /* MIXOUTR_MUTE */
 425 #define WM9090_MIXOUTR_MUTE_WIDTH                    1  /* MIXOUTR_MUTE */
 426 #define WM9090_IN1A_MIXOUTR_VOL_MASK            0x00C0  /* IN1A_MIXOUTR_VOL - [7:6] */
 427 #define WM9090_IN1A_MIXOUTR_VOL_SHIFT                6  /* IN1A_MIXOUTR_VOL - [7:6] */
 428 #define WM9090_IN1A_MIXOUTR_VOL_WIDTH                2  /* IN1A_MIXOUTR_VOL - [7:6] */
 429 #define WM9090_IN1B_MIXOUTR_VOL_MASK            0x0030  /* IN1B_MIXOUTR_VOL - [5:4] */
 430 #define WM9090_IN1B_MIXOUTR_VOL_SHIFT                4  /* IN1B_MIXOUTR_VOL - [5:4] */
 431 #define WM9090_IN1B_MIXOUTR_VOL_WIDTH                2  /* IN1B_MIXOUTR_VOL - [5:4] */
 432 #define WM9090_IN2A_MIXOUTR_VOL_MASK            0x000C  /* IN2A_MIXOUTR_VOL - [3:2] */
 433 #define WM9090_IN2A_MIXOUTR_VOL_SHIFT                2  /* IN2A_MIXOUTR_VOL - [3:2] */
 434 #define WM9090_IN2A_MIXOUTR_VOL_WIDTH                2  /* IN2A_MIXOUTR_VOL - [3:2] */
 435 #define WM9090_IN2B_MIXOUTR_VOL_MASK            0x0003  /* IN2B_MIXOUTR_VOL - [1:0] */
 436 #define WM9090_IN2B_MIXOUTR_VOL_SHIFT                0  /* IN2B_MIXOUTR_VOL - [1:0] */
 437 #define WM9090_IN2B_MIXOUTR_VOL_WIDTH                2  /* IN2B_MIXOUTR_VOL - [1:0] */
 438
 439 /*
 440  * R54 (0x36) - Speaker Mixer
 441  */
 442 #define WM9090_IN1A_TO_SPKMIX                   0x0040  /* IN1A_TO_SPKMIX */
 443 #define WM9090_IN1A_TO_SPKMIX_MASK              0x0040  /* IN1A_TO_SPKMIX */
 444 #define WM9090_IN1A_TO_SPKMIX_SHIFT                  6  /* IN1A_TO_SPKMIX */
 445 #define WM9090_IN1A_TO_SPKMIX_WIDTH                  1  /* IN1A_TO_SPKMIX */
 446 #define WM9090_IN1B_TO_SPKMIX                   0x0010  /* IN1B_TO_SPKMIX */
 447 #define WM9090_IN1B_TO_SPKMIX_MASK              0x0010  /* IN1B_TO_SPKMIX */
 448 #define WM9090_IN1B_TO_SPKMIX_SHIFT                  4  /* IN1B_TO_SPKMIX */
 449 #define WM9090_IN1B_TO_SPKMIX_WIDTH                  1  /* IN1B_TO_SPKMIX */
 450 #define WM9090_IN2A_TO_SPKMIX                   0x0004  /* IN2A_TO_SPKMIX */
 451 #define WM9090_IN2A_TO_SPKMIX_MASK              0x0004  /* IN2A_TO_SPKMIX */
 452 #define WM9090_IN2A_TO_SPKMIX_SHIFT                  2  /* IN2A_TO_SPKMIX */
 453 #define WM9090_IN2A_TO_SPKMIX_WIDTH                  1  /* IN2A_TO_SPKMIX */
 454 #define WM9090_IN2B_TO_SPKMIX                   0x0001  /* IN2B_TO_SPKMIX */
 455 #define WM9090_IN2B_TO_SPKMIX_MASK              0x0001  /* IN2B_TO_SPKMIX */
 456 #define WM9090_IN2B_TO_SPKMIX_SHIFT                  0  /* IN2B_TO_SPKMIX */
 457 #define WM9090_IN2B_TO_SPKMIX_WIDTH                  1  /* IN2B_TO_SPKMIX */
 458
 459 /*
 460  * R57 (0x39) - AntiPOP2
 461  */
 462 #define WM9090_VMID_BUF_ENA                     0x0008  /* VMID_BUF_ENA */
 463 #define WM9090_VMID_BUF_ENA_MASK                0x0008  /* VMID_BUF_ENA */
 464 #define WM9090_VMID_BUF_ENA_SHIFT                    3  /* VMID_BUF_ENA */
 465 #define WM9090_VMID_BUF_ENA_WIDTH                    1  /* VMID_BUF_ENA */
 466 #define WM9090_VMID_ENA                         0x0001  /* VMID_ENA */
 467 #define WM9090_VMID_ENA_MASK                    0x0001  /* VMID_ENA */
 468 #define WM9090_VMID_ENA_SHIFT                        0  /* VMID_ENA */
 469 #define WM9090_VMID_ENA_WIDTH                        1  /* VMID_ENA */
 470
 471 /*
 472  * R70 (0x46) - Write Sequencer 0
 473  */
 474 #define WM9090_WSEQ_ENA                         0x0100  /* WSEQ_ENA */
 475 #define WM9090_WSEQ_ENA_MASK                    0x0100  /* WSEQ_ENA */
 476 #define WM9090_WSEQ_ENA_SHIFT                        8  /* WSEQ_ENA */
 477 #define WM9090_WSEQ_ENA_WIDTH                        1  /* WSEQ_ENA */
 478 #define WM9090_WSEQ_WRITE_INDEX_MASK            0x000F  /* WSEQ_WRITE_INDEX - [3:0] */
 479 #define WM9090_WSEQ_WRITE_INDEX_SHIFT                0  /* WSEQ_WRITE_INDEX - [3:0] */
 480 #define WM9090_WSEQ_WRITE_INDEX_WIDTH                4  /* WSEQ_WRITE_INDEX - [3:0] */
 481
 482 /*
 483  * R71 (0x47) - Write Sequencer 1
 484  */
 485 #define WM9090_WSEQ_DATA_WIDTH_MASK             0x7000  /* WSEQ_DATA_WIDTH - [14:12] */
 486 #define WM9090_WSEQ_DATA_WIDTH_SHIFT                12  /* WSEQ_DATA_WIDTH - [14:12] */
 487 #define WM9090_WSEQ_DATA_WIDTH_WIDTH                 3  /* WSEQ_DATA_WIDTH - [14:12] */
 488 #define WM9090_WSEQ_DATA_START_MASK             0x0F00  /* WSEQ_DATA_START - [11:8] */
 489 #define WM9090_WSEQ_DATA_START_SHIFT                 8  /* WSEQ_DATA_START - [11:8] */
 490 #define WM9090_WSEQ_DATA_START_WIDTH                 4  /* WSEQ_DATA_START - [11:8] */
 491 #define WM9090_WSEQ_ADDR_MASK                   0x00FF  /* WSEQ_ADDR - [7:0] */
 492 #define WM9090_WSEQ_ADDR_SHIFT                       0  /* WSEQ_ADDR - [7:0] */
 493 #define WM9090_WSEQ_ADDR_WIDTH                       8  /* WSEQ_ADDR - [7:0] */
 494
 495 /*
 496  * R72 (0x48) - Write Sequencer 2
 497  */
 498 #define WM9090_WSEQ_EOS                         0x4000  /* WSEQ_EOS */
 499 #define WM9090_WSEQ_EOS_MASK                    0x4000  /* WSEQ_EOS */
 500 #define WM9090_WSEQ_EOS_SHIFT                       14  /* WSEQ_EOS */
 501 #define WM9090_WSEQ_EOS_WIDTH                        1  /* WSEQ_EOS */
 502 #define WM9090_WSEQ_DELAY_MASK                  0x0F00  /* WSEQ_DELAY - [11:8] */
 503 #define WM9090_WSEQ_DELAY_SHIFT                      8  /* WSEQ_DELAY - [11:8] */
 504 #define WM9090_WSEQ_DELAY_WIDTH                      4  /* WSEQ_DELAY - [11:8] */
 505 #define WM9090_WSEQ_DATA_MASK                   0x00FF  /* WSEQ_DATA - [7:0] */
 506 #define WM9090_WSEQ_DATA_SHIFT                       0  /* WSEQ_DATA - [7:0] */
 507 #define WM9090_WSEQ_DATA_WIDTH                       8  /* WSEQ_DATA - [7:0] */
 508
 509 /*
 510  * R73 (0x49) - Write Sequencer 3
 511  */
 512 #define WM9090_WSEQ_ABORT                       0x0200  /* WSEQ_ABORT */
 513 #define WM9090_WSEQ_ABORT_MASK                  0x0200  /* WSEQ_ABORT */
 514 #define WM9090_WSEQ_ABORT_SHIFT                      9  /* WSEQ_ABORT */
 515 #define WM9090_WSEQ_ABORT_WIDTH                      1  /* WSEQ_ABORT */
 516 #define WM9090_WSEQ_START                       0x0100  /* WSEQ_START */
 517 #define WM9090_WSEQ_START_MASK                  0x0100  /* WSEQ_START */
 518 #define WM9090_WSEQ_START_SHIFT                      8  /* WSEQ_START */
 519 #define WM9090_WSEQ_START_WIDTH                      1  /* WSEQ_START */
 520 #define WM9090_WSEQ_START_INDEX_MASK            0x003F  /* WSEQ_START_INDEX - [5:0] */
 521 #define WM9090_WSEQ_START_INDEX_SHIFT                0  /* WSEQ_START_INDEX - [5:0] */
 522 #define WM9090_WSEQ_START_INDEX_WIDTH                6  /* WSEQ_START_INDEX - [5:0] */
 523
 524 /*
 525  * R74 (0x4A) - Write Sequencer 4
 526  */
 527 #define WM9090_WSEQ_BUSY                        0x0001  /* WSEQ_BUSY */
 528 #define WM9090_WSEQ_BUSY_MASK                   0x0001  /* WSEQ_BUSY */
 529 #define WM9090_WSEQ_BUSY_SHIFT                       0  /* WSEQ_BUSY */
 530 #define WM9090_WSEQ_BUSY_WIDTH                       1  /* WSEQ_BUSY */
 531
 532 /*
 533  * R75 (0x4B) - Write Sequencer 5
 534  */
 535 #define WM9090_WSEQ_CURRENT_INDEX_MASK          0x003F  /* WSEQ_CURRENT_INDEX - [5:0] */
 536 #define WM9090_WSEQ_CURRENT_INDEX_SHIFT              0  /* WSEQ_CURRENT_INDEX - [5:0] */
 537 #define WM9090_WSEQ_CURRENT_INDEX_WIDTH              6  /* WSEQ_CURRENT_INDEX - [5:0] */
 538
 539 /*
 540  * R76 (0x4C) - Charge Pump 1
 541  */
 542 #define WM9090_CP_ENA                           0x8000  /* CP_ENA */
 543 #define WM9090_CP_ENA_MASK                      0x8000  /* CP_ENA */
 544 #define WM9090_CP_ENA_SHIFT                         15  /* CP_ENA */
 545 #define WM9090_CP_ENA_WIDTH                          1  /* CP_ENA */
 546
 547 /*
 548  * R84 (0x54) - DC Servo 0
 549  */
 550 #define WM9090_DCS_TRIG_SINGLE_1                0x2000  /* DCS_TRIG_SINGLE_1 */
 551 #define WM9090_DCS_TRIG_SINGLE_1_MASK           0x2000  /* DCS_TRIG_SINGLE_1 */
 552 #define WM9090_DCS_TRIG_SINGLE_1_SHIFT              13  /* DCS_TRIG_SINGLE_1 */
 553 #define WM9090_DCS_TRIG_SINGLE_1_WIDTH               1  /* DCS_TRIG_SINGLE_1 */
 554 #define WM9090_DCS_TRIG_SINGLE_0                0x1000  /* DCS_TRIG_SINGLE_0 */
 555 #define WM9090_DCS_TRIG_SINGLE_0_MASK           0x1000  /* DCS_TRIG_SINGLE_0 */
 556 #define WM9090_DCS_TRIG_SINGLE_0_SHIFT              12  /* DCS_TRIG_SINGLE_0 */
 557 #define WM9090_DCS_TRIG_SINGLE_0_WIDTH               1  /* DCS_TRIG_SINGLE_0 */
 558 #define WM9090_DCS_TRIG_SERIES_1                0x0200  /* DCS_TRIG_SERIES_1 */
 559 #define WM9090_DCS_TRIG_SERIES_1_MASK           0x0200  /* DCS_TRIG_SERIES_1 */
 560 #define WM9090_DCS_TRIG_SERIES_1_SHIFT               9  /* DCS_TRIG_SERIES_1 */
 561 #define WM9090_DCS_TRIG_SERIES_1_WIDTH               1  /* DCS_TRIG_SERIES_1 */
 562 #define WM9090_DCS_TRIG_SERIES_0                0x0100  /* DCS_TRIG_SERIES_0 */
 563 #define WM9090_DCS_TRIG_SERIES_0_MASK           0x0100  /* DCS_TRIG_SERIES_0 */
 564 #define WM9090_DCS_TRIG_SERIES_0_SHIFT               8  /* DCS_TRIG_SERIES_0 */
 565 #define WM9090_DCS_TRIG_SERIES_0_WIDTH               1  /* DCS_TRIG_SERIES_0 */
 566 #define WM9090_DCS_TRIG_STARTUP_1               0x0020  /* DCS_TRIG_STARTUP_1 */
 567 #define WM9090_DCS_TRIG_STARTUP_1_MASK          0x0020  /* DCS_TRIG_STARTUP_1 */
 568 #define WM9090_DCS_TRIG_STARTUP_1_SHIFT              5  /* DCS_TRIG_STARTUP_1 */
 569 #define WM9090_DCS_TRIG_STARTUP_1_WIDTH              1  /* DCS_TRIG_STARTUP_1 */
 570 #define WM9090_DCS_TRIG_STARTUP_0               0x0010  /* DCS_TRIG_STARTUP_0 */
 571 #define WM9090_DCS_TRIG_STARTUP_0_MASK          0x0010  /* DCS_TRIG_STARTUP_0 */
 572 #define WM9090_DCS_TRIG_STARTUP_0_SHIFT              4  /* DCS_TRIG_STARTUP_0 */
 573 #define WM9090_DCS_TRIG_STARTUP_0_WIDTH              1  /* DCS_TRIG_STARTUP_0 */
 574 #define WM9090_DCS_TRIG_DAC_WR_1                0x0008  /* DCS_TRIG_DAC_WR_1 */
 575 #define WM9090_DCS_TRIG_DAC_WR_1_MASK           0x0008  /* DCS_TRIG_DAC_WR_1 */
 576 #define WM9090_DCS_TRIG_DAC_WR_1_SHIFT               3  /* DCS_TRIG_DAC_WR_1 */
 577 #define WM9090_DCS_TRIG_DAC_WR_1_WIDTH               1  /* DCS_TRIG_DAC_WR_1 */
 578 #define WM9090_DCS_TRIG_DAC_WR_0                0x0004  /* DCS_TRIG_DAC_WR_0 */
 579 #define WM9090_DCS_TRIG_DAC_WR_0_MASK           0x0004  /* DCS_TRIG_DAC_WR_0 */
 580 #define WM9090_DCS_TRIG_DAC_WR_0_SHIFT               2  /* DCS_TRIG_DAC_WR_0 */
 581 #define WM9090_DCS_TRIG_DAC_WR_0_WIDTH               1  /* DCS_TRIG_DAC_WR_0 */
 582 #define WM9090_DCS_ENA_CHAN_1                   0x0002  /* DCS_ENA_CHAN_1 */
 583 #define WM9090_DCS_ENA_CHAN_1_MASK              0x0002  /* DCS_ENA_CHAN_1 */
 584 #define WM9090_DCS_ENA_CHAN_1_SHIFT                  1  /* DCS_ENA_CHAN_1 */
 585 #define WM9090_DCS_ENA_CHAN_1_WIDTH                  1  /* DCS_ENA_CHAN_1 */
 586 #define WM9090_DCS_ENA_CHAN_0                   0x0001  /* DCS_ENA_CHAN_0 */
 587 #define WM9090_DCS_ENA_CHAN_0_MASK              0x0001  /* DCS_ENA_CHAN_0 */
 588 #define WM9090_DCS_ENA_CHAN_0_SHIFT                  0  /* DCS_ENA_CHAN_0 */
 589 #define WM9090_DCS_ENA_CHAN_0_WIDTH                  1  /* DCS_ENA_CHAN_0 */
 590
 591 /*
 592  * R85 (0x55) - DC Servo 1
 593  */
 594 #define WM9090_DCS_SERIES_NO_01_MASK            0x0FE0  /* DCS_SERIES_NO_01 - [11:5] */
 595 #define WM9090_DCS_SERIES_NO_01_SHIFT                5  /* DCS_SERIES_NO_01 - [11:5] */
 596 #define WM9090_DCS_SERIES_NO_01_WIDTH                7  /* DCS_SERIES_NO_01 - [11:5] */
 597 #define WM9090_DCS_TIMER_PERIOD_01_MASK         0x000F  /* DCS_TIMER_PERIOD_01 - [3:0] */
 598 #define WM9090_DCS_TIMER_PERIOD_01_SHIFT             0  /* DCS_TIMER_PERIOD_01 - [3:0] */
 599 #define WM9090_DCS_TIMER_PERIOD_01_WIDTH             4  /* DCS_TIMER_PERIOD_01 - [3:0] */
 600
 601 /*
 602  * R87 (0x57) - DC Servo 3
 603  */
 604 #define WM9090_DCS_DAC_WR_VAL_1_MASK            0xFF00  /* DCS_DAC_WR_VAL_1 - [15:8] */
 605 #define WM9090_DCS_DAC_WR_VAL_1_SHIFT                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
 606 #define WM9090_DCS_DAC_WR_VAL_1_WIDTH                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
 607 #define WM9090_DCS_DAC_WR_VAL_0_MASK            0x00FF  /* DCS_DAC_WR_VAL_0 - [7:0] */
 608 #define WM9090_DCS_DAC_WR_VAL_0_SHIFT                0  /* DCS_DAC_WR_VAL_0 - [7:0] */
 609 #define WM9090_DCS_DAC_WR_VAL_0_WIDTH                8  /* DCS_DAC_WR_VAL_0 - [7:0] */
 610
 611 /*
 612  * R88 (0x58) - DC Servo Readback 0
 613  */
 614 #define WM9090_DCS_CAL_COMPLETE_MASK            0x0300  /* DCS_CAL_COMPLETE - [9:8] */
 615 #define WM9090_DCS_CAL_COMPLETE_SHIFT                8  /* DCS_CAL_COMPLETE - [9:8] */
 616 #define WM9090_DCS_CAL_COMPLETE_WIDTH                2  /* DCS_CAL_COMPLETE - [9:8] */
 617 #define WM9090_DCS_DAC_WR_COMPLETE_MASK         0x0030  /* DCS_DAC_WR_COMPLETE - [5:4] */
 618 #define WM9090_DCS_DAC_WR_COMPLETE_SHIFT             4  /* DCS_DAC_WR_COMPLETE - [5:4] */
 619 #define WM9090_DCS_DAC_WR_COMPLETE_WIDTH             2  /* DCS_DAC_WR_COMPLETE - [5:4] */
 620 #define WM9090_DCS_STARTUP_COMPLETE_MASK        0x0003  /* DCS_STARTUP_COMPLETE - [1:0] */
 621 #define WM9090_DCS_STARTUP_COMPLETE_SHIFT            0  /* DCS_STARTUP_COMPLETE - [1:0] */
 622 #define WM9090_DCS_STARTUP_COMPLETE_WIDTH            2  /* DCS_STARTUP_COMPLETE - [1:0] */
 623
 624 /*
 625  * R89 (0x59) - DC Servo Readback 1
 626  */
 627 #define WM9090_DCS_DAC_WR_VAL_1_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 628 #define WM9090_DCS_DAC_WR_VAL_1_RD_SHIFT             0  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 629 #define WM9090_DCS_DAC_WR_VAL_1_RD_WIDTH             8  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 630
 631 /*
 632  * R90 (0x5A) - DC Servo Readback 2
 633  */
 634 #define WM9090_DCS_DAC_WR_VAL_0_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 635 #define WM9090_DCS_DAC_WR_VAL_0_RD_SHIFT             0  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 636 #define WM9090_DCS_DAC_WR_VAL_0_RD_WIDTH             8  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 637
 638 /*
 639  * R96 (0x60) - Analogue HP 0
 640  */
 641 #define WM9090_HPOUT1L_RMV_SHORT                0x0080  /* HPOUT1L_RMV_SHORT */
 642 #define WM9090_HPOUT1L_RMV_SHORT_MASK           0x0080  /* HPOUT1L_RMV_SHORT */
 643 #define WM9090_HPOUT1L_RMV_SHORT_SHIFT               7  /* HPOUT1L_RMV_SHORT */
 644 #define WM9090_HPOUT1L_RMV_SHORT_WIDTH               1  /* HPOUT1L_RMV_SHORT */
 645 #define WM9090_HPOUT1L_OUTP                     0x0040  /* HPOUT1L_OUTP */
 646 #define WM9090_HPOUT1L_OUTP_MASK                0x0040  /* HPOUT1L_OUTP */
 647 #define WM9090_HPOUT1L_OUTP_SHIFT                    6  /* HPOUT1L_OUTP */
 648 #define WM9090_HPOUT1L_OUTP_WIDTH                    1  /* HPOUT1L_OUTP */
 649 #define WM9090_HPOUT1L_DLY                      0x0020  /* HPOUT1L_DLY */
 650 #define WM9090_HPOUT1L_DLY_MASK                 0x0020  /* HPOUT1L_DLY */
 651 #define WM9090_HPOUT1L_DLY_SHIFT                     5  /* HPOUT1L_DLY */
 652 #define WM9090_HPOUT1L_DLY_WIDTH                     1  /* HPOUT1L_DLY */
 653 #define WM9090_HPOUT1R_RMV_SHORT                0x0008  /* HPOUT1R_RMV_SHORT */
 654 #define WM9090_HPOUT1R_RMV_SHORT_MASK           0x0008  /* HPOUT1R_RMV_SHORT */
 655 #define WM9090_HPOUT1R_RMV_SHORT_SHIFT               3  /* HPOUT1R_RMV_SHORT */
 656 #define WM9090_HPOUT1R_RMV_SHORT_WIDTH               1  /* HPOUT1R_RMV_SHORT */
 657 #define WM9090_HPOUT1R_OUTP                     0x0004  /* HPOUT1R_OUTP */
 658 #define WM9090_HPOUT1R_OUTP_MASK                0x0004  /* HPOUT1R_OUTP */
 659 #define WM9090_HPOUT1R_OUTP_SHIFT                    2  /* HPOUT1R_OUTP */
 660 #define WM9090_HPOUT1R_OUTP_WIDTH                    1  /* HPOUT1R_OUTP */
 661 #define WM9090_HPOUT1R_DLY                      0x0002  /* HPOUT1R_DLY */
 662 #define WM9090_HPOUT1R_DLY_MASK                 0x0002  /* HPOUT1R_DLY */
 663 #define WM9090_HPOUT1R_DLY_SHIFT                     1  /* HPOUT1R_DLY */
 664 #define WM9090_HPOUT1R_DLY_WIDTH                     1  /* HPOUT1R_DLY */
 665
 666 /*
 667  * R98 (0x62) - AGC Control 0
 668  */
 669 #define WM9090_AGC_CLIP_ENA                     0x8000  /* AGC_CLIP_ENA */
 670 #define WM9090_AGC_CLIP_ENA_MASK                0x8000  /* AGC_CLIP_ENA */
 671 #define WM9090_AGC_CLIP_ENA_SHIFT                   15  /* AGC_CLIP_ENA */
 672 #define WM9090_AGC_CLIP_ENA_WIDTH                    1  /* AGC_CLIP_ENA */
 673 #define WM9090_AGC_CLIP_THR_MASK                0x0F00  /* AGC_CLIP_THR - [11:8] */
 674 #define WM9090_AGC_CLIP_THR_SHIFT                    8  /* AGC_CLIP_THR - [11:8] */
 675 #define WM9090_AGC_CLIP_THR_WIDTH                    4  /* AGC_CLIP_THR - [11:8] */
 676 #define WM9090_AGC_CLIP_ATK_MASK                0x0070  /* AGC_CLIP_ATK - [6:4] */
 677 #define WM9090_AGC_CLIP_ATK_SHIFT                    4  /* AGC_CLIP_ATK - [6:4] */
 678 #define WM9090_AGC_CLIP_ATK_WIDTH                    3  /* AGC_CLIP_ATK - [6:4] */
 679 #define WM9090_AGC_CLIP_DCY_MASK                0x0007  /* AGC_CLIP_DCY - [2:0] */
 680 #define WM9090_AGC_CLIP_DCY_SHIFT                    0  /* AGC_CLIP_DCY - [2:0] */
 681 #define WM9090_AGC_CLIP_DCY_WIDTH                    3  /* AGC_CLIP_DCY - [2:0] */
 682
 683 /*
 684  * R99 (0x63) - AGC Control 1
 685  */
 686 #define WM9090_AGC_PWR_ENA                      0x8000  /* AGC_PWR_ENA */
 687 #define WM9090_AGC_PWR_ENA_MASK                 0x8000  /* AGC_PWR_ENA */
 688 #define WM9090_AGC_PWR_ENA_SHIFT                    15  /* AGC_PWR_ENA */
 689 #define WM9090_AGC_PWR_ENA_WIDTH                     1  /* AGC_PWR_ENA */
 690 #define WM9090_AGC_PWR_AVG                      0x1000  /* AGC_PWR_AVG */
 691 #define WM9090_AGC_PWR_AVG_MASK                 0x1000  /* AGC_PWR_AVG */
 692 #define WM9090_AGC_PWR_AVG_SHIFT                    12  /* AGC_PWR_AVG */
 693 #define WM9090_AGC_PWR_AVG_WIDTH                     1  /* AGC_PWR_AVG */
 694 #define WM9090_AGC_PWR_THR_MASK                 0x0F00  /* AGC_PWR_THR - [11:8] */
 695 #define WM9090_AGC_PWR_THR_SHIFT                     8  /* AGC_PWR_THR - [11:8] */
 696 #define WM9090_AGC_PWR_THR_WIDTH                     4  /* AGC_PWR_THR - [11:8] */
 697 #define WM9090_AGC_PWR_ATK_MASK                 0x0070  /* AGC_PWR_ATK - [6:4] */
 698 #define WM9090_AGC_PWR_ATK_SHIFT                     4  /* AGC_PWR_ATK - [6:4] */
 699 #define WM9090_AGC_PWR_ATK_WIDTH                     3  /* AGC_PWR_ATK - [6:4] */
 700 #define WM9090_AGC_PWR_DCY_MASK                 0x0007  /* AGC_PWR_DCY - [2:0] */
 701 #define WM9090_AGC_PWR_DCY_SHIFT                     0  /* AGC_PWR_DCY - [2:0] */
 702 #define WM9090_AGC_PWR_DCY_WIDTH                     3  /* AGC_PWR_DCY - [2:0] */
 703
 704 /*
 705  * R100 (0x64) - AGC Control 2
 706  */
 707 #define WM9090_AGC_RAMP                         0x0100  /* AGC_RAMP */
 708 #define WM9090_AGC_RAMP_MASK                    0x0100  /* AGC_RAMP */
 709 #define WM9090_AGC_RAMP_SHIFT                        8  /* AGC_RAMP */
 710 #define WM9090_AGC_RAMP_WIDTH                        1  /* AGC_RAMP */
 711 #define WM9090_AGC_MINGAIN_MASK                 0x003F  /* AGC_MINGAIN - [5:0] */
 712 #define WM9090_AGC_MINGAIN_SHIFT                     0  /* AGC_MINGAIN - [5:0] */
 713 #define WM9090_AGC_MINGAIN_WIDTH                     6  /* AGC_MINGAIN - [5:0] */
 714
 715 #endif