3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
7 * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved.
11 #ifndef _ASM_IA64_SN_SN_CPUID_H
12 #define _ASM_IA64_SN_SN_CPUID_H
14 #include <linux/config.h>
15 #include <linux/smp.h>
16 #include <linux/sched.h>
17 #include <linux/mmzone.h>
18 #include <asm/sn/types.h>
19 #include <asm/current.h>
20 #include <asm/nodedata.h>
24 * Functions for converting between cpuids, nodeids and NASIDs.
26 * These are for SGI platforms only.
34 * Definitions of terms (these definitions are for IA64 ONLY. Other architectures
35 * use cpuid/cpunum quite defferently):
37 * CPUID - a number in range of 0..NR_CPUS-1 that uniquely identifies
38 * the cpu. The value cpuid has no significance on IA64 other than
40 * smp_processor_id() returns the cpuid of the current cpu.
42 * CPUNUM - On IA64, a cpunum and cpuid are the same. This is NOT true
43 * on other architectures like IA32.
45 * CPU_PHYSICAL_ID (also known as HARD_PROCESSOR_ID)
46 * This is the same as 31:24 of the processor LID register
47 * hard_smp_processor_id()- cpu_physical_id of current processor
48 * cpu_physical_id(cpuid) - convert a <cpuid> to a <physical_cpuid>
49 * cpu_logical_id(phy_id) - convert a <physical_cpuid> to a <cpuid>
50 * * not real efficient - don't use in perf critical code
52 * LID - processor defined register (see PRM V2).
55 * 31:24 - id Contains the NASID
56 * 23:16 - eid Contains 0-3 to identify the cpu on the node
57 * bit 17 - synergy number
58 * bit 16 - FSB slot number
60 * 31:28 - id Contains 0-3 to identify the cpu on the node
61 * 27:16 - eid Contains the NASID
65 * The following assumes the following mappings for LID register values:
67 * The macros convert between cpu physical ids & slice/fsb/synergy/nasid/cnodeid.
68 * These terms are described below:
71 * ----- ----- ----- ----- CPU
72 * | 0 | | 1 | | 2 | | 3 | SLICE
73 * ----- ----- ----- -----
76 * 0 | | 1 0 | | 1 FSB SLOT
82 * | 0 | | 1 | SYNERGY (SN1 only)
87 * -------------------------------
89 * | BEDROCK / SHUB | NASID (0..MAX_NASIDS)
90 * | | CNODEID (0..num_compact_nodes-1)
93 * -------------------------------
99 #define cpu_logical_id(cpu) 0
100 #define cpu_physical_id(cpuid) ((ia64_get_lid() >> 16) & 0xffff)
103 #ifdef CONFIG_IA64_SGI_SN1
105 * macros for some of these exist in sn/addrs.h & sn/arch.h, etc. However,
106 * trying #include these files here causes circular dependencies.
108 #define cpu_physical_id_to_nasid(cpi) ((cpi) >> 8)
109 #define cpu_physical_id_to_synergy(cpi) (((cpi) >> 1) & 1)
110 #define cpu_physical_id_to_fsb_slot(cpi) ((cpi) & 1)
111 #define cpu_physical_id_to_slice(cpi) ((cpi) & 3)
112 #define get_nasid() ((ia64_get_lid() >> 24))
113 #define get_slice() ((ia64_get_lid() >> 16) & 3)
114 #define get_node_number(addr) (((unsigned long)(addr)>>33) & 0x7f)
116 #define cpu_physical_id_to_nasid(cpi) ((cpi) &0xfff)
117 #define cpu_physical_id_to_slice(cpi) ((cpi>>12) & 3)
118 #define get_nasid() ((ia64_get_lid() >> 16) & 0xfff)
119 #define get_slice() ((ia64_get_lid() >> 28) & 0xf)
120 #define get_node_number(addr) (((unsigned long)(addr)>>38) & 0x7ff)
124 * NOTE: id & eid refer to Intel's definitions of the LID register
126 * NOTE: on non-MP systems, only cpuid 0 exists
128 #define id_eid_to_cpu_physical_id(id,eid) (((id)<<8) | (eid))
130 #define nasid_slice_to_cpuid(nasid,slice) (cpu_logical_id(nasid_slice_to_cpu_physical_id((nasid),(slice))))
132 #ifdef CONFIG_IA64_SGI_SN1
133 #define nasid_slice_to_cpu_physical_id(nasid, slice) (((nasid)<<8) | (slice))
135 #define nasid_slice_to_cpu_physical_id(nasid, slice) (((slice)<<12) | (nasid))
139 * The following table/struct is used for managing PTC coherency domains.
147 extern sn_sapicid_info_t sn_sapicid_info[]; /* indexed by cpuid */
151 #ifdef CONFIG_IA64_SGI_SN1
153 * cpuid_to_fsb_slot - convert a cpuid to the fsb slot number that it is in.
154 * (there are 2 cpus per FSB. This function returns 0 or 1)
156 #define cpuid_to_fsb_slot(cpuid) (cpu_physical_id_to_fsb_slot(cpu_physical_id(cpuid)))
160 * cpuid_to_synergy - convert a cpuid to the synergy that it resides on
161 * (there are 2 synergies per node. Function returns 0 or 1 to
162 * specify which synergy the cpu is on)
164 #define cpuid_to_synergy(cpuid) (cpu_physical_id_to_synergy(cpu_physical_id(cpuid)))
169 * cpuid_to_slice - convert a cpuid to the slice that it resides on
170 * There are 4 cpus per node. This function returns 0 .. 3)
172 #define cpuid_to_slice(cpuid) (cpu_physical_id_to_slice(cpu_physical_id(cpuid)))
176 * cpuid_to_nasid - convert a cpuid to the NASID that it resides on
178 #define cpuid_to_nasid(cpuid) (cpu_physical_id_to_nasid(cpu_physical_id(cpuid)))
182 * cpuid_to_cnodeid - convert a cpuid to the cnode that it resides on
184 #define cpuid_to_cnodeid(cpuid) (local_node_data->physical_node_map[cpuid_to_nasid(cpuid)])
188 * cnodeid_to_nasid - convert a cnodeid to a NASID
189 * Macro relies on pg_data for a node being on the node itself.
190 * Just extract the NASID from the pointer.
193 #define cnodeid_to_nasid(cnodeid) (get_node_number(local_node_data->pg_data_ptrs[cnodeid]))
197 * nasid_to_cnodeid - convert a NASID to a cnodeid
199 #define nasid_to_cnodeid(nasid) (nasid) /* (local_node_data->physical_node_map[nasid]) */
203 * cnode_slice_to_cpuid - convert a codeid & slice to a cpuid
206 #define cnode_slice_to_cpuid(cnodeid,slice) (nasid_slice_to_cpuid(cnodeid_to_nasid(cnodeid),(slice)))
210 * cpuid_to_subnode - convert a cpuid to the subnode it resides on.
211 * slice 0 & 1 are on subnode 0
212 * slice 2 & 3 are on subnode 1.
214 #define cpuid_to_subnode(cpuid) ((cpuid_to_slice(cpuid)<2) ? 0 : 1)
218 * cpuid_to_localslice - convert a cpuid to a local slice
219 * slice 0 & 2 are local slice 0
220 * slice 1 & 3 are local slice 1
222 #define cpuid_to_localslice(cpuid) (cpuid_to_slice(cpuid) & 1)
225 #define smp_physical_node_id() (cpuid_to_nasid(smp_processor_id()))
229 * cnodeid_to_cpuid - convert a cnode to a cpuid of a cpu on the node.
230 * returns -1 if no cpus exist on the node
232 extern int cnodeid_to_cpuid(int cnode);
235 #endif /* _ASM_IA64_SN_SN_CPUID_H */