Merge tag 'md-3.4-fixes' of git://neil.brown.name/md
[linux-flexiantxendom0-3.2.10.git] / drivers / net / wireless / brcm80211 / brcmsmac / main.c
1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include <linux/pci_ids.h>
20 #include <linux/if_ether.h>
21 #include <net/mac80211.h>
22 #include <brcm_hw_ids.h>
23 #include <aiutils.h>
24 #include <chipcommon.h>
25 #include "rate.h"
26 #include "scb.h"
27 #include "phy/phy_hal.h"
28 #include "channel.h"
29 #include "antsel.h"
30 #include "stf.h"
31 #include "ampdu.h"
32 #include "mac80211_if.h"
33 #include "ucode_loader.h"
34 #include "main.h"
35 #include "soc.h"
36
37 /*
38  * Indication for txflowcontrol that all priority bits in
39  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
40  */
41 #define ALLPRIO                         -1
42
43 /* watchdog timer, in unit of ms */
44 #define TIMER_INTERVAL_WATCHDOG         1000
45 /* radio monitor timer, in unit of ms */
46 #define TIMER_INTERVAL_RADIOCHK         800
47
48 /* beacon interval, in unit of 1024TU */
49 #define BEACON_INTERVAL_DEFAULT         100
50
51 /* n-mode support capability */
52 /* 2x2 includes both 1x1 & 2x2 devices
53  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
54  * control it independently
55  */
56 #define WL_11N_2x2                      1
57 #define WL_11N_3x3                      3
58 #define WL_11N_4x4                      4
59
60 #define EDCF_ACI_MASK                   0x60
61 #define EDCF_ACI_SHIFT                  5
62 #define EDCF_ECWMIN_MASK                0x0f
63 #define EDCF_ECWMAX_SHIFT               4
64 #define EDCF_AIFSN_MASK                 0x0f
65 #define EDCF_AIFSN_MAX                  15
66 #define EDCF_ECWMAX_MASK                0xf0
67
68 #define EDCF_AC_BE_TXOP_STA             0x0000
69 #define EDCF_AC_BK_TXOP_STA             0x0000
70 #define EDCF_AC_VO_ACI_STA              0x62
71 #define EDCF_AC_VO_ECW_STA              0x32
72 #define EDCF_AC_VI_ACI_STA              0x42
73 #define EDCF_AC_VI_ECW_STA              0x43
74 #define EDCF_AC_BK_ECW_STA              0xA4
75 #define EDCF_AC_VI_TXOP_STA             0x005e
76 #define EDCF_AC_VO_TXOP_STA             0x002f
77 #define EDCF_AC_BE_ACI_STA              0x03
78 #define EDCF_AC_BE_ECW_STA              0xA4
79 #define EDCF_AC_BK_ACI_STA              0x27
80 #define EDCF_AC_VO_TXOP_AP              0x002f
81
82 #define EDCF_TXOP2USEC(txop)            ((txop) << 5)
83 #define EDCF_ECW2CW(exp)                ((1 << (exp)) - 1)
84
85 #define APHY_SYMBOL_TIME                4
86 #define APHY_PREAMBLE_TIME              16
87 #define APHY_SIGNAL_TIME                4
88 #define APHY_SIFS_TIME                  16
89 #define APHY_SERVICE_NBITS              16
90 #define APHY_TAIL_NBITS                 6
91 #define BPHY_SIFS_TIME                  10
92 #define BPHY_PLCP_SHORT_TIME            96
93
94 #define PREN_PREAMBLE                   24
95 #define PREN_MM_EXT                     12
96 #define PREN_PREAMBLE_EXT               4
97
98 #define DOT11_MAC_HDR_LEN               24
99 #define DOT11_ACK_LEN                   10
100 #define DOT11_BA_LEN                    4
101 #define DOT11_OFDM_SIGNAL_EXTENSION     6
102 #define DOT11_MIN_FRAG_LEN              256
103 #define DOT11_RTS_LEN                   16
104 #define DOT11_CTS_LEN                   10
105 #define DOT11_BA_BITMAP_LEN             128
106 #define DOT11_MIN_BEACON_PERIOD         1
107 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
108 #define DOT11_MAXNUMFRAGS               16
109 #define DOT11_MAX_FRAG_LEN              2346
110
111 #define BPHY_PLCP_TIME                  192
112 #define RIFS_11N_TIME                   2
113
114 /* length of the BCN template area */
115 #define BCN_TMPL_LEN                    512
116
117 /* brcms_bss_info flag bit values */
118 #define BRCMS_BSS_HT                    0x0020  /* BSS is HT (MIMO) capable */
119
120 /* chip rx buffer offset */
121 #define BRCMS_HWRXOFF                   38
122
123 /* rfdisable delay timer 500 ms, runs of ALP clock */
124 #define RFDISABLE_DEFAULT               10000000
125
126 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
127
128 /* precedences numbers for wlc queues. These are twice as may levels as
129  * 802.1D priorities.
130  * Odd numbers are used for HI priority traffic at same precedence levels
131  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
132  * elsewhere.
133  */
134 #define _BRCMS_PREC_NONE                0       /* None = - */
135 #define _BRCMS_PREC_BK                  2       /* BK - Background */
136 #define _BRCMS_PREC_BE                  4       /* BE - Best-effort */
137 #define _BRCMS_PREC_EE                  6       /* EE - Excellent-effort */
138 #define _BRCMS_PREC_CL                  8       /* CL - Controlled Load */
139 #define _BRCMS_PREC_VI                  10      /* Vi - Video */
140 #define _BRCMS_PREC_VO                  12      /* Vo - Voice */
141 #define _BRCMS_PREC_NC                  14      /* NC - Network Control */
142
143 /* synthpu_dly times in us */
144 #define SYNTHPU_DLY_APHY_US             3700
145 #define SYNTHPU_DLY_BPHY_US             1050
146 #define SYNTHPU_DLY_NPHY_US             2048
147 #define SYNTHPU_DLY_LPPHY_US            300
148
149 #define ANTCNT                          10      /* vanilla M_MAX_ANTCNT val */
150
151 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
152 #define EDCF_SHORT_S                    0
153 #define EDCF_SFB_S                      4
154 #define EDCF_LONG_S                     8
155 #define EDCF_LFB_S                      12
156 #define EDCF_SHORT_M                    BITFIELD_MASK(4)
157 #define EDCF_SFB_M                      BITFIELD_MASK(4)
158 #define EDCF_LONG_M                     BITFIELD_MASK(4)
159 #define EDCF_LFB_M                      BITFIELD_MASK(4)
160
161 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
162 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
163 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
164 #define RETRY_SHORT_FB                  3       /* Short count for fb rate */
165 #define RETRY_LONG_FB                   2       /* Long count for fb rate */
166
167 #define APHY_CWMIN                      15
168 #define PHY_CWMAX                       1023
169
170 #define EDCF_AIFSN_MIN                  1
171
172 #define FRAGNUM_MASK                    0xF
173
174 #define APHY_SLOT_TIME                  9
175 #define BPHY_SLOT_TIME                  20
176
177 #define WL_SPURAVOID_OFF                0
178 #define WL_SPURAVOID_ON1                1
179 #define WL_SPURAVOID_ON2                2
180
181 /* invalid core flags, use the saved coreflags */
182 #define BRCMS_USE_COREFLAGS             0xffffffff
183
184 /* values for PLCPHdr_override */
185 #define BRCMS_PLCP_AUTO                 -1
186 #define BRCMS_PLCP_SHORT                0
187 #define BRCMS_PLCP_LONG                 1
188
189 /* values for g_protection_override and n_protection_override */
190 #define BRCMS_PROTECTION_AUTO           -1
191 #define BRCMS_PROTECTION_OFF            0
192 #define BRCMS_PROTECTION_ON             1
193 #define BRCMS_PROTECTION_MMHDR_ONLY     2
194 #define BRCMS_PROTECTION_CTS_ONLY       3
195
196 /* values for g_protection_control and n_protection_control */
197 #define BRCMS_PROTECTION_CTL_OFF        0
198 #define BRCMS_PROTECTION_CTL_LOCAL      1
199 #define BRCMS_PROTECTION_CTL_OVERLAP    2
200
201 /* values for n_protection */
202 #define BRCMS_N_PROTECTION_OFF          0
203 #define BRCMS_N_PROTECTION_OPTIONAL     1
204 #define BRCMS_N_PROTECTION_20IN40       2
205 #define BRCMS_N_PROTECTION_MIXEDMODE    3
206
207 /* values for band specific 40MHz capabilities */
208 #define BRCMS_N_BW_20ALL                0
209 #define BRCMS_N_BW_40ALL                1
210 #define BRCMS_N_BW_20IN2G_40IN5G        2
211
212 /* bitflags for SGI support (sgi_rx iovar) */
213 #define BRCMS_N_SGI_20                  0x01
214 #define BRCMS_N_SGI_40                  0x02
215
216 /* defines used by the nrate iovar */
217 /* MSC in use,indicates b0-6 holds an mcs */
218 #define NRATE_MCS_INUSE                 0x00000080
219 /* rate/mcs value */
220 #define NRATE_RATE_MASK                 0x0000007f
221 /* stf mode mask: siso, cdd, stbc, sdm */
222 #define NRATE_STF_MASK                  0x0000ff00
223 /* stf mode shift */
224 #define NRATE_STF_SHIFT                 8
225 /* bit indicate to override mcs only */
226 #define NRATE_OVERRIDE_MCS_ONLY         0x40000000
227 #define NRATE_SGI_MASK                  0x00800000      /* sgi mode */
228 #define NRATE_SGI_SHIFT                 23              /* sgi mode */
229 #define NRATE_LDPC_CODING               0x00400000      /* adv coding in use */
230 #define NRATE_LDPC_SHIFT                22              /* ldpc shift */
231
232 #define NRATE_STF_SISO                  0               /* stf mode SISO */
233 #define NRATE_STF_CDD                   1               /* stf mode CDD */
234 #define NRATE_STF_STBC                  2               /* stf mode STBC */
235 #define NRATE_STF_SDM                   3               /* stf mode SDM */
236
237 #define MAX_DMA_SEGS                    4
238
239 /* Max # of entries in Tx FIFO based on 4kb page size */
240 #define NTXD                            256
241 /* Max # of entries in Rx FIFO based on 4kb page size */
242 #define NRXD                            256
243
244 /* try to keep this # rbufs posted to the chip */
245 #define NRXBUFPOST                      32
246
247 /* data msg txq hiwat mark */
248 #define BRCMS_DATAHIWAT                 50
249
250 /* max # frames to process in brcms_c_recv() */
251 #define RXBND                           8
252 /* max # tx status to process in wlc_txstatus() */
253 #define TXSBND                          8
254
255 /* brcmu_format_flags() bit description structure */
256 struct brcms_c_bit_desc {
257         u32 bit;
258         const char *name;
259 };
260
261 /*
262  * The following table lists the buffer memory allocated to xmt fifos in HW.
263  * the size is in units of 256bytes(one block), total size is HW dependent
264  * ucode has default fifo partition, sw can overwrite if necessary
265  *
266  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
267  * the twiki is updated before making changes.
268  */
269
270 /* Starting corerev for the fifo size table */
271 #define XMTFIFOTBL_STARTREV     20
272
273 struct d11init {
274         __le16 addr;
275         __le16 size;
276         __le32 value;
277 };
278
279 struct edcf_acparam {
280         u8 ACI;
281         u8 ECW;
282         u16 TXOP;
283 } __packed;
284
285 const u8 prio2fifo[NUMPRIO] = {
286         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
287         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
288         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
289         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
290         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
291         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
292         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
293         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
294 };
295
296 /* debug/trace */
297 uint brcm_msg_level =
298 #if defined(DEBUG)
299         LOG_ERROR_VAL;
300 #else
301         0;
302 #endif                          /* DEBUG */
303
304 /* TX FIFO number to WME/802.1E Access Category */
305 static const u8 wme_fifo2ac[] = {
306         IEEE80211_AC_BK,
307         IEEE80211_AC_BE,
308         IEEE80211_AC_VI,
309         IEEE80211_AC_VO,
310         IEEE80211_AC_BE,
311         IEEE80211_AC_BE
312 };
313
314 /* ieee80211 Access Category to TX FIFO number */
315 static const u8 wme_ac2fifo[] = {
316         TX_AC_VO_FIFO,
317         TX_AC_VI_FIFO,
318         TX_AC_BE_FIFO,
319         TX_AC_BK_FIFO
320 };
321
322 /* 802.1D Priority to precedence queue mapping */
323 const u8 wlc_prio2prec_map[] = {
324         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
325         _BRCMS_PREC_BK,         /* 1 BK - Background */
326         _BRCMS_PREC_NONE,               /* 2 None = - */
327         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
328         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
329         _BRCMS_PREC_VI,         /* 5 Vi - Video */
330         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
331         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
332 };
333
334 static const u16 xmtfifo_sz[][NFIFO] = {
335         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
336         {20, 192, 192, 21, 17, 5},
337         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
338         {9, 58, 22, 14, 14, 5},
339         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
340         {20, 192, 192, 21, 17, 5},
341         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
342         {20, 192, 192, 21, 17, 5},
343         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
344         {9, 58, 22, 14, 14, 5},
345 };
346
347 #ifdef DEBUG
348 static const char * const fifo_names[] = {
349         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
350 #else
351 static const char fifo_names[6][0];
352 #endif
353
354 #ifdef DEBUG
355 /* pointer to most recently allocated wl/wlc */
356 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
357 #endif
358
359 /* Find basic rate for a given rate */
360 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
361 {
362         if (is_mcs_rate(rspec))
363                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
364                        .leg_ofdm];
365         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
366 }
367
368 static u16 frametype(u32 rspec, u8 mimoframe)
369 {
370         if (is_mcs_rate(rspec))
371                 return mimoframe;
372         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
373 }
374
375 /* currently the best mechanism for determining SIFS is the band in use */
376 static u16 get_sifs(struct brcms_band *band)
377 {
378         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
379                                  BPHY_SIFS_TIME;
380 }
381
382 /*
383  * Detect Card removed.
384  * Even checking an sbconfig register read will not false trigger when the core
385  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
386  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
387  * reg with fixed 0/1 pattern (some platforms return all 0).
388  * If clocks are present, call the sb routine which will figure out if the
389  * device is removed.
390  */
391 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
392 {
393         u32 macctrl;
394
395         if (!wlc->hw->clk)
396                 return ai_deviceremoved(wlc->hw->sih);
397         macctrl = bcma_read32(wlc->hw->d11core,
398                               D11REGOFFS(maccontrol));
399         return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
400 }
401
402 /* sum the individual fifo tx pending packet counts */
403 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
404 {
405         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
406                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
407 }
408
409 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
410 {
411         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
412 }
413
414 static int brcms_chspec_bw(u16 chanspec)
415 {
416         if (CHSPEC_IS40(chanspec))
417                 return BRCMS_40_MHZ;
418         if (CHSPEC_IS20(chanspec))
419                 return BRCMS_20_MHZ;
420
421         return BRCMS_10_MHZ;
422 }
423
424 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
425 {
426         if (cfg == NULL)
427                 return;
428
429         kfree(cfg->current_bss);
430         kfree(cfg);
431 }
432
433 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
434 {
435         if (wlc == NULL)
436                 return;
437
438         brcms_c_bsscfg_mfree(wlc->bsscfg);
439         kfree(wlc->pub);
440         kfree(wlc->modulecb);
441         kfree(wlc->default_bss);
442         kfree(wlc->protection);
443         kfree(wlc->stf);
444         kfree(wlc->bandstate[0]);
445         kfree(wlc->corestate->macstat_snapshot);
446         kfree(wlc->corestate);
447         kfree(wlc->hw->bandstate[0]);
448         kfree(wlc->hw);
449
450         /* free the wlc */
451         kfree(wlc);
452         wlc = NULL;
453 }
454
455 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
456 {
457         struct brcms_bss_cfg *cfg;
458
459         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
460         if (cfg == NULL)
461                 goto fail;
462
463         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
464         if (cfg->current_bss == NULL)
465                 goto fail;
466
467         return cfg;
468
469  fail:
470         brcms_c_bsscfg_mfree(cfg);
471         return NULL;
472 }
473
474 static struct brcms_c_info *
475 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
476 {
477         struct brcms_c_info *wlc;
478
479         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
480         if (wlc == NULL) {
481                 *err = 1002;
482                 goto fail;
483         }
484
485         /* allocate struct brcms_c_pub state structure */
486         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
487         if (wlc->pub == NULL) {
488                 *err = 1003;
489                 goto fail;
490         }
491         wlc->pub->wlc = wlc;
492
493         /* allocate struct brcms_hardware state structure */
494
495         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
496         if (wlc->hw == NULL) {
497                 *err = 1005;
498                 goto fail;
499         }
500         wlc->hw->wlc = wlc;
501
502         wlc->hw->bandstate[0] =
503                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
504         if (wlc->hw->bandstate[0] == NULL) {
505                 *err = 1006;
506                 goto fail;
507         } else {
508                 int i;
509
510                 for (i = 1; i < MAXBANDS; i++)
511                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
512                             ((unsigned long)wlc->hw->bandstate[0] +
513                              (sizeof(struct brcms_hw_band) * i));
514         }
515
516         wlc->modulecb =
517                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
518         if (wlc->modulecb == NULL) {
519                 *err = 1009;
520                 goto fail;
521         }
522
523         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
524         if (wlc->default_bss == NULL) {
525                 *err = 1010;
526                 goto fail;
527         }
528
529         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
530         if (wlc->bsscfg == NULL) {
531                 *err = 1011;
532                 goto fail;
533         }
534
535         wlc->protection = kzalloc(sizeof(struct brcms_protection),
536                                   GFP_ATOMIC);
537         if (wlc->protection == NULL) {
538                 *err = 1016;
539                 goto fail;
540         }
541
542         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
543         if (wlc->stf == NULL) {
544                 *err = 1017;
545                 goto fail;
546         }
547
548         wlc->bandstate[0] =
549                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
550         if (wlc->bandstate[0] == NULL) {
551                 *err = 1025;
552                 goto fail;
553         } else {
554                 int i;
555
556                 for (i = 1; i < MAXBANDS; i++)
557                         wlc->bandstate[i] = (struct brcms_band *)
558                                 ((unsigned long)wlc->bandstate[0]
559                                 + (sizeof(struct brcms_band)*i));
560         }
561
562         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
563         if (wlc->corestate == NULL) {
564                 *err = 1026;
565                 goto fail;
566         }
567
568         wlc->corestate->macstat_snapshot =
569                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
570         if (wlc->corestate->macstat_snapshot == NULL) {
571                 *err = 1027;
572                 goto fail;
573         }
574
575         return wlc;
576
577  fail:
578         brcms_c_detach_mfree(wlc);
579         return NULL;
580 }
581
582 /*
583  * Update the slot timing for standard 11b/g (20us slots)
584  * or shortslot 11g (9us slots)
585  * The PSM needs to be suspended for this call.
586  */
587 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
588                                         bool shortslot)
589 {
590         struct bcma_device *core = wlc_hw->d11core;
591
592         if (shortslot) {
593                 /* 11g short slot: 11a timing */
594                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
595                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
596         } else {
597                 /* 11g long slot: 11b timing */
598                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
599                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
600         }
601 }
602
603 /*
604  * calculate frame duration of a given rate and length, return
605  * time in usec unit
606  */
607 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
608                                     u8 preamble_type, uint mac_len)
609 {
610         uint nsyms, dur = 0, Ndps, kNdps;
611         uint rate = rspec2rate(ratespec);
612
613         if (rate == 0) {
614                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
615                           wlc->pub->unit);
616                 rate = BRCM_RATE_1M;
617         }
618
619         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
620                  wlc->pub->unit, ratespec, preamble_type, mac_len);
621
622         if (is_mcs_rate(ratespec)) {
623                 uint mcs = ratespec & RSPEC_RATE_MASK;
624                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
625
626                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
627                 if (preamble_type == BRCMS_MM_PREAMBLE)
628                         dur += PREN_MM_EXT;
629                 /* 1000Ndbps = kbps * 4 */
630                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
631                                    rspec_issgi(ratespec)) * 4;
632
633                 if (rspec_stc(ratespec) == 0)
634                         nsyms =
635                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
636                                   APHY_TAIL_NBITS) * 1000, kNdps);
637                 else
638                         /* STBC needs to have even number of symbols */
639                         nsyms =
640                             2 *
641                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
642                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
643
644                 dur += APHY_SYMBOL_TIME * nsyms;
645                 if (wlc->band->bandtype == BRCM_BAND_2G)
646                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
647         } else if (is_ofdm_rate(rate)) {
648                 dur = APHY_PREAMBLE_TIME;
649                 dur += APHY_SIGNAL_TIME;
650                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
651                 Ndps = rate * 2;
652                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
653                 nsyms =
654                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
655                          Ndps);
656                 dur += APHY_SYMBOL_TIME * nsyms;
657                 if (wlc->band->bandtype == BRCM_BAND_2G)
658                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
659         } else {
660                 /*
661                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
662                  * will divide out
663                  */
664                 mac_len = mac_len * 8 * 2;
665                 /* calc ceiling of bits/rate = microseconds of air time */
666                 dur = (mac_len + rate - 1) / rate;
667                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
668                         dur += BPHY_PLCP_SHORT_TIME;
669                 else
670                         dur += BPHY_PLCP_TIME;
671         }
672         return dur;
673 }
674
675 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
676                                 const struct d11init *inits)
677 {
678         struct bcma_device *core = wlc_hw->d11core;
679         int i;
680         uint offset;
681         u16 size;
682         u32 value;
683
684         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
685
686         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
687                 size = le16_to_cpu(inits[i].size);
688                 offset = le16_to_cpu(inits[i].addr);
689                 value = le32_to_cpu(inits[i].value);
690                 if (size == 2)
691                         bcma_write16(core, offset, value);
692                 else if (size == 4)
693                         bcma_write32(core, offset, value);
694                 else
695                         break;
696         }
697 }
698
699 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
700 {
701         u8 idx;
702         u16 addr[] = {
703                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
704                 M_HOST_FLAGS5
705         };
706
707         for (idx = 0; idx < MHFMAX; idx++)
708                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
709 }
710
711 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
712 {
713         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
714         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
715
716         /* init microcode host flags */
717         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
718
719         /* do band-specific ucode IHR, SHM, and SCR inits */
720         if (D11REV_IS(wlc_hw->corerev, 23)) {
721                 if (BRCMS_ISNPHY(wlc_hw->band))
722                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
723                 else
724                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
725                                   " %d\n", __func__, wlc_hw->unit,
726                                   wlc_hw->corerev);
727         } else {
728                 if (D11REV_IS(wlc_hw->corerev, 24)) {
729                         if (BRCMS_ISLCNPHY(wlc_hw->band))
730                                 brcms_c_write_inits(wlc_hw,
731                                                     ucode->d11lcn0bsinitvals24);
732                         else
733                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
734                                           " core rev %d\n", __func__,
735                                           wlc_hw->unit, wlc_hw->corerev);
736                 } else {
737                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
738                                 __func__, wlc_hw->unit, wlc_hw->corerev);
739                 }
740         }
741 }
742
743 static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
744 {
745         struct bcma_device *core = wlc_hw->d11core;
746         u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
747
748         bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
749 }
750
751 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
752 {
753         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
754
755         wlc_hw->phyclk = clk;
756
757         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
758
759                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
760                                    (SICF_PRST | SICF_FGC));
761                 udelay(1);
762                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
763                 udelay(1);
764
765         } else {                /* take phy out of reset */
766
767                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
768                 udelay(1);
769                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
770                 udelay(1);
771
772         }
773 }
774
775 /* low-level band switch utility routine */
776 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
777 {
778         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
779                 bandunit);
780
781         wlc_hw->band = wlc_hw->bandstate[bandunit];
782
783         /*
784          * BMAC_NOTE:
785          *   until we eliminate need for wlc->band refs in low level code
786          */
787         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
788
789         /* set gmode core flag */
790         if (wlc_hw->sbclk && !wlc_hw->noreset) {
791                 u32 gmode = 0;
792
793                 if (bandunit == 0)
794                         gmode = SICF_GMODE;
795
796                 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
797         }
798 }
799
800 /* switch to new band but leave it inactive */
801 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
802 {
803         struct brcms_hardware *wlc_hw = wlc->hw;
804         u32 macintmask;
805         u32 macctrl;
806
807         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
808         macctrl = bcma_read32(wlc_hw->d11core,
809                               D11REGOFFS(maccontrol));
810         WARN_ON((macctrl & MCTL_EN_MAC) != 0);
811
812         /* disable interrupts */
813         macintmask = brcms_intrsoff(wlc->wl);
814
815         /* radio off */
816         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
817
818         brcms_b_core_phy_clk(wlc_hw, OFF);
819
820         brcms_c_setxband(wlc_hw, bandunit);
821
822         return macintmask;
823 }
824
825 /* process an individual struct tx_status */
826 static bool
827 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
828 {
829         struct sk_buff *p;
830         uint queue;
831         struct d11txh *txh;
832         struct scb *scb = NULL;
833         bool free_pdu;
834         int tx_rts, tx_frame_count, tx_rts_count;
835         uint totlen, supr_status;
836         bool lastframe;
837         struct ieee80211_hdr *h;
838         u16 mcl;
839         struct ieee80211_tx_info *tx_info;
840         struct ieee80211_tx_rate *txrate;
841         int i;
842
843         /* discard intermediate indications for ucode with one legitimate case:
844          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
845          *   but the subsequent tx of DATA failed. so it will start rts/cts
846          *   from the beginning (resetting the rts transmission count)
847          */
848         if (!(txs->status & TX_STATUS_AMPDU)
849             && (txs->status & TX_STATUS_INTERMEDIATE)) {
850                 BCMMSG(wlc->wiphy, "INTERMEDIATE but not AMPDU\n");
851                 return false;
852         }
853
854         queue = txs->frameid & TXFID_QUEUE_MASK;
855         if (queue >= NFIFO) {
856                 p = NULL;
857                 goto fatal;
858         }
859
860         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
861         if (p == NULL)
862                 goto fatal;
863
864         txh = (struct d11txh *) (p->data);
865         mcl = le16_to_cpu(txh->MacTxControlLow);
866
867         if (txs->phyerr) {
868                 if (brcm_msg_level & LOG_ERROR_VAL) {
869                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
870                                   txs->phyerr, txh->MainRates);
871                         brcms_c_print_txdesc(txh);
872                 }
873                 brcms_c_print_txstatus(txs);
874         }
875
876         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
877                 goto fatal;
878         tx_info = IEEE80211_SKB_CB(p);
879         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
880
881         if (tx_info->control.sta)
882                 scb = &wlc->pri_scb;
883
884         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
885                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
886                 return false;
887         }
888
889         supr_status = txs->status & TX_STATUS_SUPR_MASK;
890         if (supr_status == TX_STATUS_SUPR_BADCH)
891                 BCMMSG(wlc->wiphy,
892                        "%s: Pkt tx suppressed, possibly channel %d\n",
893                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
894
895         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
896         tx_frame_count =
897             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
898         tx_rts_count =
899             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
900
901         lastframe = !ieee80211_has_morefrags(h->frame_control);
902
903         if (!lastframe) {
904                 wiphy_err(wlc->wiphy, "Not last frame!\n");
905         } else {
906                 /*
907                  * Set information to be consumed by Minstrel ht.
908                  *
909                  * The "fallback limit" is the number of tx attempts a given
910                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
911                  * limit are sent at the "secondary" rate.
912                  * A 'short frame' does not exceed RTS treshold.
913                  */
914                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
915                     lfbl,       /* Long Frame Rate Fallback Limit */
916                     fbl;
917
918                 if (queue < IEEE80211_NUM_ACS) {
919                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
920                                       EDCF_SFB);
921                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
922                                       EDCF_LFB);
923                 } else {
924                         sfbl = wlc->SFBL;
925                         lfbl = wlc->LFBL;
926                 }
927
928                 txrate = tx_info->status.rates;
929                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
930                         fbl = lfbl;
931                 else
932                         fbl = sfbl;
933
934                 ieee80211_tx_info_clear_status(tx_info);
935
936                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
937                         /*
938                          * rate selection requested a fallback rate
939                          * and we used it
940                          */
941                         txrate[0].count = fbl;
942                         txrate[1].count = tx_frame_count - fbl;
943                 } else {
944                         /*
945                          * rate selection did not request fallback rate, or
946                          * we didn't need it
947                          */
948                         txrate[0].count = tx_frame_count;
949                         /*
950                          * rc80211_minstrel.c:minstrel_tx_status() expects
951                          * unused rates to be marked with idx = -1
952                          */
953                         txrate[1].idx = -1;
954                         txrate[1].count = 0;
955                 }
956
957                 /* clear the rest of the rates */
958                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
959                         txrate[i].idx = -1;
960                         txrate[i].count = 0;
961                 }
962
963                 if (txs->status & TX_STATUS_ACK_RCV)
964                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
965         }
966
967         totlen = p->len;
968         free_pdu = true;
969
970         brcms_c_txfifo_complete(wlc, queue, 1);
971
972         if (lastframe) {
973                 /* remove PLCP & Broadcom tx descriptor header */
974                 skb_pull(p, D11_PHY_HDR_LEN);
975                 skb_pull(p, D11_TXH_LEN);
976                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
977         } else {
978                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
979                           "tx_status\n", __func__);
980         }
981
982         return false;
983
984  fatal:
985         if (p)
986                 brcmu_pkt_buf_free_skb(p);
987
988         return true;
989
990 }
991
992 /* process tx completion events in BMAC
993  * Return true if more tx status need to be processed. false otherwise.
994  */
995 static bool
996 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
997 {
998         bool morepending = false;
999         struct brcms_c_info *wlc = wlc_hw->wlc;
1000         struct bcma_device *core;
1001         struct tx_status txstatus, *txs;
1002         u32 s1, s2;
1003         uint n = 0;
1004         /*
1005          * Param 'max_tx_num' indicates max. # tx status to process before
1006          * break out.
1007          */
1008         uint max_tx_num = bound ? TXSBND : -1;
1009
1010         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1011
1012         txs = &txstatus;
1013         core = wlc_hw->d11core;
1014         *fatal = false;
1015         s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1016         while (!(*fatal)
1017                && (s1 & TXS_V)) {
1018
1019                 if (s1 == 0xffffffff) {
1020                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1021                                 wlc_hw->unit, __func__);
1022                         return morepending;
1023                 }
1024                 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1025
1026                 txs->status = s1 & TXS_STATUS_MASK;
1027                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1028                 txs->sequence = s2 & TXS_SEQ_MASK;
1029                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1030                 txs->lasttxtime = 0;
1031
1032                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1033
1034                 /* !give others some time to run! */
1035                 if (++n >= max_tx_num)
1036                         break;
1037                 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1038         }
1039
1040         if (*fatal)
1041                 return 0;
1042
1043         if (n >= max_tx_num)
1044                 morepending = true;
1045
1046         if (!pktq_empty(&wlc->pkt_queue->q))
1047                 brcms_c_send_q(wlc);
1048
1049         return morepending;
1050 }
1051
1052 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1053 {
1054         if (!wlc->bsscfg->BSS)
1055                 /*
1056                  * DirFrmQ is now valid...defer setting until end
1057                  * of ATIM window
1058                  */
1059                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1060 }
1061
1062 /* set initial host flags value */
1063 static void
1064 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1065 {
1066         struct brcms_hardware *wlc_hw = wlc->hw;
1067
1068         memset(mhfs, 0, MHFMAX * sizeof(u16));
1069
1070         mhfs[MHF2] |= mhf2_init;
1071
1072         /* prohibit use of slowclock on multifunction boards */
1073         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1074                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1075
1076         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1077                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1078                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1079         }
1080 }
1081
1082 static uint
1083 dmareg(uint direction, uint fifonum)
1084 {
1085         if (direction == DMA_TX)
1086                 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1087         return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1088 }
1089
1090 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1091 {
1092         uint i;
1093         char name[8];
1094         /*
1095          * ucode host flag 2 needed for pio mode, independent of band and fifo
1096          */
1097         u16 pio_mhf2 = 0;
1098         struct brcms_hardware *wlc_hw = wlc->hw;
1099         uint unit = wlc_hw->unit;
1100         struct wiphy *wiphy = wlc->wiphy;
1101
1102         /* name and offsets for dma_attach */
1103         snprintf(name, sizeof(name), "wl%d", unit);
1104
1105         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1106                 int dma_attach_err = 0;
1107
1108                 /*
1109                  * FIFO 0
1110                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1111                  * RX: RX_FIFO (RX data packets)
1112                  */
1113                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1114                                            (wme ? dmareg(DMA_TX, 0) : 0),
1115                                            dmareg(DMA_RX, 0),
1116                                            (wme ? NTXD : 0), NRXD,
1117                                            RXBUFSZ, -1, NRXBUFPOST,
1118                                            BRCMS_HWRXOFF, &brcm_msg_level);
1119                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1120
1121                 /*
1122                  * FIFO 1
1123                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1124                  *   (legacy) TX_DATA_FIFO (TX data packets)
1125                  * RX: UNUSED
1126                  */
1127                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1128                                            dmareg(DMA_TX, 1), 0,
1129                                            NTXD, 0, 0, -1, 0, 0,
1130                                            &brcm_msg_level);
1131                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1132
1133                 /*
1134                  * FIFO 2
1135                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1136                  * RX: UNUSED
1137                  */
1138                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1139                                            dmareg(DMA_TX, 2), 0,
1140                                            NTXD, 0, 0, -1, 0, 0,
1141                                            &brcm_msg_level);
1142                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1143                 /*
1144                  * FIFO 3
1145                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1146                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1147                  */
1148                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1149                                            dmareg(DMA_TX, 3),
1150                                            0, NTXD, 0, 0, -1,
1151                                            0, 0, &brcm_msg_level);
1152                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1153 /* Cleaner to leave this as if with AP defined */
1154
1155                 if (dma_attach_err) {
1156                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1157                                   "\n", unit);
1158                         return false;
1159                 }
1160
1161                 /* get pointer to dma engine tx flow control variable */
1162                 for (i = 0; i < NFIFO; i++)
1163                         if (wlc_hw->di[i])
1164                                 wlc_hw->txavail[i] =
1165                                     (uint *) dma_getvar(wlc_hw->di[i],
1166                                                         "&txavail");
1167         }
1168
1169         /* initial ucode host flags */
1170         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1171
1172         return true;
1173 }
1174
1175 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1176 {
1177         uint j;
1178
1179         for (j = 0; j < NFIFO; j++) {
1180                 if (wlc_hw->di[j]) {
1181                         dma_detach(wlc_hw->di[j]);
1182                         wlc_hw->di[j] = NULL;
1183                 }
1184         }
1185 }
1186
1187 /*
1188  * Initialize brcms_c_info default values ...
1189  * may get overrides later in this function
1190  *  BMAC_NOTES, move low out and resolve the dangling ones
1191  */
1192 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1193 {
1194         struct brcms_c_info *wlc = wlc_hw->wlc;
1195
1196         /* set default sw macintmask value */
1197         wlc->defmacintmask = DEF_MACINTMASK;
1198
1199         /* various 802.11g modes */
1200         wlc_hw->shortslot = false;
1201
1202         wlc_hw->SFBL = RETRY_SHORT_FB;
1203         wlc_hw->LFBL = RETRY_LONG_FB;
1204
1205         /* default mac retry limits */
1206         wlc_hw->SRL = RETRY_SHORT_DEF;
1207         wlc_hw->LRL = RETRY_LONG_DEF;
1208         wlc_hw->chanspec = ch20mhz_chspec(1);
1209 }
1210
1211 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1212 {
1213         /* delay before first read of ucode state */
1214         udelay(40);
1215
1216         /* wait until ucode is no longer asleep */
1217         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1218                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1219 }
1220
1221 /* control chip clock to save power, enable dynamic clock or force fast clock */
1222 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1223 {
1224         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1225                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1226                  * on backplane, but mac core will still run on ALP(not HT) when
1227                  * it enters powersave mode, which means the FCA bit may not be
1228                  * set. Should wakeup mac if driver wants it to run on HT.
1229                  */
1230
1231                 if (wlc_hw->clk) {
1232                         if (mode == CLK_FAST) {
1233                                 bcma_set32(wlc_hw->d11core,
1234                                            D11REGOFFS(clk_ctl_st),
1235                                            CCS_FORCEHT);
1236
1237                                 udelay(64);
1238
1239                                 SPINWAIT(
1240                                     ((bcma_read32(wlc_hw->d11core,
1241                                       D11REGOFFS(clk_ctl_st)) &
1242                                       CCS_HTAVAIL) == 0),
1243                                       PMU_MAX_TRANSITION_DLY);
1244                                 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1245                                         D11REGOFFS(clk_ctl_st)) &
1246                                         CCS_HTAVAIL));
1247                         } else {
1248                                 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1249                                     (bcma_read32(wlc_hw->d11core,
1250                                         D11REGOFFS(clk_ctl_st)) &
1251                                         (CCS_FORCEHT | CCS_HTAREQ)))
1252                                         SPINWAIT(
1253                                             ((bcma_read32(wlc_hw->d11core,
1254                                               offsetof(struct d11regs,
1255                                                        clk_ctl_st)) &
1256                                               CCS_HTAVAIL) == 0),
1257                                               PMU_MAX_TRANSITION_DLY);
1258                                 bcma_mask32(wlc_hw->d11core,
1259                                         D11REGOFFS(clk_ctl_st),
1260                                         ~CCS_FORCEHT);
1261                         }
1262                 }
1263                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1264         } else {
1265
1266                 /* old chips w/o PMU, force HT through cc,
1267                  * then use FCA to verify mac is running fast clock
1268                  */
1269
1270                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1271
1272                 /* check fast clock is available (if core is not in reset) */
1273                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1274                         WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1275                                   SISF_FCLKA));
1276
1277                 /*
1278                  * keep the ucode wake bit on if forcefastclk is on since we
1279                  * do not want ucode to put us back to slow clock when it dozes
1280                  * for PM mode. Code below matches the wake override bit with
1281                  * current forcefastclk state. Only setting bit in wake_override
1282                  * instead of waking ucode immediately since old code had this
1283                  * behavior. Older code set wlc->forcefastclk but only had the
1284                  * wake happen if the wakup_ucode work (protected by an up
1285                  * check) was executed just below.
1286                  */
1287                 if (wlc_hw->forcefastclk)
1288                         mboolset(wlc_hw->wake_override,
1289                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1290                 else
1291                         mboolclr(wlc_hw->wake_override,
1292                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1293         }
1294 }
1295
1296 /* set or clear ucode host flag bits
1297  * it has an optimization for no-change write
1298  * it only writes through shared memory when the core has clock;
1299  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1300  *
1301  *
1302  * bands values are: BRCM_BAND_AUTO <--- Current band only
1303  *                   BRCM_BAND_5G   <--- 5G band only
1304  *                   BRCM_BAND_2G   <--- 2G band only
1305  *                   BRCM_BAND_ALL  <--- All bands
1306  */
1307 void
1308 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1309              int bands)
1310 {
1311         u16 save;
1312         u16 addr[MHFMAX] = {
1313                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1314                 M_HOST_FLAGS5
1315         };
1316         struct brcms_hw_band *band;
1317
1318         if ((val & ~mask) || idx >= MHFMAX)
1319                 return; /* error condition */
1320
1321         switch (bands) {
1322                 /* Current band only or all bands,
1323                  * then set the band to current band
1324                  */
1325         case BRCM_BAND_AUTO:
1326         case BRCM_BAND_ALL:
1327                 band = wlc_hw->band;
1328                 break;
1329         case BRCM_BAND_5G:
1330                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1331                 break;
1332         case BRCM_BAND_2G:
1333                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1334                 break;
1335         default:
1336                 band = NULL;    /* error condition */
1337         }
1338
1339         if (band) {
1340                 save = band->mhfs[idx];
1341                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1342
1343                 /* optimization: only write through if changed, and
1344                  * changed band is the current band
1345                  */
1346                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1347                     && (band == wlc_hw->band))
1348                         brcms_b_write_shm(wlc_hw, addr[idx],
1349                                            (u16) band->mhfs[idx]);
1350         }
1351
1352         if (bands == BRCM_BAND_ALL) {
1353                 wlc_hw->bandstate[0]->mhfs[idx] =
1354                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1355                 wlc_hw->bandstate[1]->mhfs[idx] =
1356                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1357         }
1358 }
1359
1360 /* set the maccontrol register to desired reset state and
1361  * initialize the sw cache of the register
1362  */
1363 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1364 {
1365         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1366         wlc_hw->maccontrol = 0;
1367         wlc_hw->suspended_fifos = 0;
1368         wlc_hw->wake_override = 0;
1369         wlc_hw->mute_override = 0;
1370         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1371 }
1372
1373 /*
1374  * write the software state of maccontrol and
1375  * overrides to the maccontrol register
1376  */
1377 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1378 {
1379         u32 maccontrol = wlc_hw->maccontrol;
1380
1381         /* OR in the wake bit if overridden */
1382         if (wlc_hw->wake_override)
1383                 maccontrol |= MCTL_WAKE;
1384
1385         /* set AP and INFRA bits for mute if needed */
1386         if (wlc_hw->mute_override) {
1387                 maccontrol &= ~(MCTL_AP);
1388                 maccontrol |= MCTL_INFRA;
1389         }
1390
1391         bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1392                      maccontrol);
1393 }
1394
1395 /* set or clear maccontrol bits */
1396 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1397 {
1398         u32 maccontrol;
1399         u32 new_maccontrol;
1400
1401         if (val & ~mask)
1402                 return; /* error condition */
1403         maccontrol = wlc_hw->maccontrol;
1404         new_maccontrol = (maccontrol & ~mask) | val;
1405
1406         /* if the new maccontrol value is the same as the old, nothing to do */
1407         if (new_maccontrol == maccontrol)
1408                 return;
1409
1410         /* something changed, cache the new value */
1411         wlc_hw->maccontrol = new_maccontrol;
1412
1413         /* write the new values with overrides applied */
1414         brcms_c_mctrl_write(wlc_hw);
1415 }
1416
1417 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1418                                  u32 override_bit)
1419 {
1420         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1421                 mboolset(wlc_hw->wake_override, override_bit);
1422                 return;
1423         }
1424
1425         mboolset(wlc_hw->wake_override, override_bit);
1426
1427         brcms_c_mctrl_write(wlc_hw);
1428         brcms_b_wait_for_wake(wlc_hw);
1429 }
1430
1431 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1432                                    u32 override_bit)
1433 {
1434         mboolclr(wlc_hw->wake_override, override_bit);
1435
1436         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1437                 return;
1438
1439         brcms_c_mctrl_write(wlc_hw);
1440 }
1441
1442 /* When driver needs ucode to stop beaconing, it has to make sure that
1443  * MCTL_AP is clear and MCTL_INFRA is set
1444  * Mode           MCTL_AP        MCTL_INFRA
1445  * AP                1              1
1446  * STA               0              1 <--- This will ensure no beacons
1447  * IBSS              0              0
1448  */
1449 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1450 {
1451         wlc_hw->mute_override = 1;
1452
1453         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1454          * override, then there is no change to write
1455          */
1456         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1457                 return;
1458
1459         brcms_c_mctrl_write(wlc_hw);
1460 }
1461
1462 /* Clear the override on AP and INFRA bits */
1463 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1464 {
1465         if (wlc_hw->mute_override == 0)
1466                 return;
1467
1468         wlc_hw->mute_override = 0;
1469
1470         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1471          * override, then there is no change to write
1472          */
1473         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1474                 return;
1475
1476         brcms_c_mctrl_write(wlc_hw);
1477 }
1478
1479 /*
1480  * Write a MAC address to the given match reg offset in the RXE match engine.
1481  */
1482 static void
1483 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1484                        const u8 *addr)
1485 {
1486         struct bcma_device *core = wlc_hw->d11core;
1487         u16 mac_l;
1488         u16 mac_m;
1489         u16 mac_h;
1490
1491         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1492                  wlc_hw->unit);
1493
1494         mac_l = addr[0] | (addr[1] << 8);
1495         mac_m = addr[2] | (addr[3] << 8);
1496         mac_h = addr[4] | (addr[5] << 8);
1497
1498         /* enter the MAC addr into the RXE match registers */
1499         bcma_write16(core, D11REGOFFS(rcm_ctl),
1500                      RCM_INC_DATA | match_reg_offset);
1501         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1502         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1503         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1504 }
1505
1506 void
1507 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1508                             void *buf)
1509 {
1510         struct bcma_device *core = wlc_hw->d11core;
1511         u32 word;
1512         __le32 word_le;
1513         __be32 word_be;
1514         bool be_bit;
1515         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1516
1517         bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1518
1519         /* if MCTL_BIGEND bit set in mac control register,
1520          * the chip swaps data in fifo, as well as data in
1521          * template ram
1522          */
1523         be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1524
1525         while (len > 0) {
1526                 memcpy(&word, buf, sizeof(u32));
1527
1528                 if (be_bit) {
1529                         word_be = cpu_to_be32(word);
1530                         word = *(u32 *)&word_be;
1531                 } else {
1532                         word_le = cpu_to_le32(word);
1533                         word = *(u32 *)&word_le;
1534                 }
1535
1536                 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1537
1538                 buf = (u8 *) buf + sizeof(u32);
1539                 len -= sizeof(u32);
1540         }
1541 }
1542
1543 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1544 {
1545         wlc_hw->band->CWmin = newmin;
1546
1547         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1548                      OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1549         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1550         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1551 }
1552
1553 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1554 {
1555         wlc_hw->band->CWmax = newmax;
1556
1557         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1558                      OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1559         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1560         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1561 }
1562
1563 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1564 {
1565         bool fastclk;
1566
1567         /* request FAST clock if not on */
1568         fastclk = wlc_hw->forcefastclk;
1569         if (!fastclk)
1570                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1571
1572         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1573
1574         brcms_b_phy_reset(wlc_hw);
1575         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1576
1577         /* restore the clk */
1578         if (!fastclk)
1579                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1580 }
1581
1582 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1583 {
1584         u16 v;
1585         struct brcms_c_info *wlc = wlc_hw->wlc;
1586         /* update SYNTHPU_DLY */
1587
1588         if (BRCMS_ISLCNPHY(wlc->band))
1589                 v = SYNTHPU_DLY_LPPHY_US;
1590         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1591                 v = SYNTHPU_DLY_NPHY_US;
1592         else
1593                 v = SYNTHPU_DLY_BPHY_US;
1594
1595         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1596 }
1597
1598 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1599 {
1600         u16 phyctl;
1601         u16 phytxant = wlc_hw->bmac_phytxant;
1602         u16 mask = PHY_TXC_ANT_MASK;
1603
1604         /* set the Probe Response frame phy control word */
1605         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1606         phyctl = (phyctl & ~mask) | phytxant;
1607         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1608
1609         /* set the Response (ACK/CTS) frame phy control word */
1610         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1611         phyctl = (phyctl & ~mask) | phytxant;
1612         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1613 }
1614
1615 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1616                                          u8 rate)
1617 {
1618         uint i;
1619         u8 plcp_rate = 0;
1620         struct plcp_signal_rate_lookup {
1621                 u8 rate;
1622                 u8 signal_rate;
1623         };
1624         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1625         const struct plcp_signal_rate_lookup rate_lookup[] = {
1626                 {BRCM_RATE_6M, 0xB},
1627                 {BRCM_RATE_9M, 0xF},
1628                 {BRCM_RATE_12M, 0xA},
1629                 {BRCM_RATE_18M, 0xE},
1630                 {BRCM_RATE_24M, 0x9},
1631                 {BRCM_RATE_36M, 0xD},
1632                 {BRCM_RATE_48M, 0x8},
1633                 {BRCM_RATE_54M, 0xC}
1634         };
1635
1636         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1637                 if (rate == rate_lookup[i].rate) {
1638                         plcp_rate = rate_lookup[i].signal_rate;
1639                         break;
1640                 }
1641         }
1642
1643         /* Find the SHM pointer to the rate table entry by looking in the
1644          * Direct-map Table
1645          */
1646         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1647 }
1648
1649 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1650 {
1651         u8 rate;
1652         u8 rates[8] = {
1653                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1654                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1655         };
1656         u16 entry_ptr;
1657         u16 pctl1;
1658         uint i;
1659
1660         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1661                 return;
1662
1663         /* walk the phy rate table and update the entries */
1664         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1665                 rate = rates[i];
1666
1667                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1668
1669                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1670                 pctl1 =
1671                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1672
1673                 /* modify the value */
1674                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1675                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1676
1677                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1678                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1679                                    pctl1);
1680         }
1681 }
1682
1683 /* band-specific init */
1684 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1685 {
1686         struct brcms_hardware *wlc_hw = wlc->hw;
1687
1688         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1689                 wlc_hw->band->bandunit);
1690
1691         brcms_c_ucode_bsinit(wlc_hw);
1692
1693         wlc_phy_init(wlc_hw->band->pi, chanspec);
1694
1695         brcms_c_ucode_txant_set(wlc_hw);
1696
1697         /*
1698          * cwmin is band-specific, update hardware
1699          * with value for current band
1700          */
1701         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1702         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1703
1704         brcms_b_update_slot_timing(wlc_hw,
1705                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1706                                    true : wlc_hw->shortslot);
1707
1708         /* write phytype and phyvers */
1709         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1710         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1711
1712         /*
1713          * initialize the txphyctl1 rate table since
1714          * shmem is shared between bands
1715          */
1716         brcms_upd_ofdm_pctl1_table(wlc_hw);
1717
1718         brcms_b_upd_synthpu(wlc_hw);
1719 }
1720
1721 /* Perform a soft reset of the PHY PLL */
1722 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1723 {
1724         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1725
1726         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1727                   ~0, 0);
1728         udelay(1);
1729         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1730                   0x4, 0);
1731         udelay(1);
1732         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1733                   0x4, 4);
1734         udelay(1);
1735         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1736                   0x4, 0);
1737         udelay(1);
1738 }
1739
1740 /* light way to turn on phy clock without reset for NPHY only
1741  *  refer to brcms_b_core_phy_clk for full version
1742  */
1743 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1744 {
1745         /* support(necessary for NPHY and HYPHY) only */
1746         if (!BRCMS_ISNPHY(wlc_hw->band))
1747                 return;
1748
1749         if (ON == clk)
1750                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1751         else
1752                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1753
1754 }
1755
1756 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1757 {
1758         if (ON == clk)
1759                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1760         else
1761                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1762 }
1763
1764 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1765 {
1766         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1767         u32 phy_bw_clkbits;
1768         bool phy_in_reset = false;
1769
1770         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1771
1772         if (pih == NULL)
1773                 return;
1774
1775         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1776
1777         /* Specific reset sequence required for NPHY rev 3 and 4 */
1778         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1779             NREV_LE(wlc_hw->band->phyrev, 4)) {
1780                 /* Set the PHY bandwidth */
1781                 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1782
1783                 udelay(1);
1784
1785                 /* Perform a soft reset of the PHY PLL */
1786                 brcms_b_core_phypll_reset(wlc_hw);
1787
1788                 /* reset the PHY */
1789                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1790                                    (SICF_PRST | SICF_PCLKE));
1791                 phy_in_reset = true;
1792         } else {
1793                 brcms_b_core_ioctl(wlc_hw,
1794                                    (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1795                                    (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1796         }
1797
1798         udelay(2);
1799         brcms_b_core_phy_clk(wlc_hw, ON);
1800
1801         if (pih)
1802                 wlc_phy_anacore(pih, ON);
1803 }
1804
1805 /* switch to and initialize new band */
1806 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1807                             u16 chanspec) {
1808         struct brcms_c_info *wlc = wlc_hw->wlc;
1809         u32 macintmask;
1810
1811         /* Enable the d11 core before accessing it */
1812         if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1813                 bcma_core_enable(wlc_hw->d11core, 0);
1814                 brcms_c_mctrl_reset(wlc_hw);
1815         }
1816
1817         macintmask = brcms_c_setband_inact(wlc, bandunit);
1818
1819         if (!wlc_hw->up)
1820                 return;
1821
1822         brcms_b_core_phy_clk(wlc_hw, ON);
1823
1824         /* band-specific initializations */
1825         brcms_b_bsinit(wlc, chanspec);
1826
1827         /*
1828          * If there are any pending software interrupt bits,
1829          * then replace these with a harmless nonzero value
1830          * so brcms_c_dpc() will re-enable interrupts when done.
1831          */
1832         if (wlc->macintstatus)
1833                 wlc->macintstatus = MI_DMAINT;
1834
1835         /* restore macintmask */
1836         brcms_intrsrestore(wlc->wl, macintmask);
1837
1838         /* ucode should still be suspended.. */
1839         WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1840                  MCTL_EN_MAC) != 0);
1841 }
1842
1843 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1844 {
1845
1846         /* reject unsupported corerev */
1847         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1848                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1849                           wlc_hw->corerev);
1850                 return false;
1851         }
1852
1853         return true;
1854 }
1855
1856 /* Validate some board info parameters */
1857 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1858 {
1859         uint boardrev = wlc_hw->boardrev;
1860
1861         /* 4 bits each for board type, major, minor, and tiny version */
1862         uint brt = (boardrev & 0xf000) >> 12;
1863         uint b0 = (boardrev & 0xf00) >> 8;
1864         uint b1 = (boardrev & 0xf0) >> 4;
1865         uint b2 = boardrev & 0xf;
1866
1867         /* voards from other vendors are always considered valid */
1868         if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1869                 return true;
1870
1871         /* do some boardrev sanity checks when boardvendor is Broadcom */
1872         if (boardrev == 0)
1873                 return false;
1874
1875         if (boardrev <= 0xff)
1876                 return true;
1877
1878         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1879                 || (b2 > 9))
1880                 return false;
1881
1882         return true;
1883 }
1884
1885 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1886 {
1887         enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1888         char *macaddr;
1889
1890         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1891         macaddr = getvar(wlc_hw->sih, var_id);
1892         if (macaddr != NULL)
1893                 return macaddr;
1894
1895         if (wlc_hw->_nbands > 1)
1896                 var_id = BRCMS_SROM_ET1MACADDR;
1897         else
1898                 var_id = BRCMS_SROM_IL0MACADDR;
1899
1900         macaddr = getvar(wlc_hw->sih, var_id);
1901         if (macaddr == NULL)
1902                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1903                           "getvar(%d) not found\n", wlc_hw->unit, var_id);
1904
1905         return macaddr;
1906 }
1907
1908 /* power both the pll and external oscillator on/off */
1909 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1910 {
1911         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1912
1913         /*
1914          * dont power down if plldown is false or
1915          * we must poll hw radio disable
1916          */
1917         if (!want && wlc_hw->pllreq)
1918                 return;
1919
1920         if (wlc_hw->sih)
1921                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1922
1923         wlc_hw->sbclk = want;
1924         if (!wlc_hw->sbclk) {
1925                 wlc_hw->clk = false;
1926                 if (wlc_hw->band && wlc_hw->band->pi)
1927                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1928         }
1929 }
1930
1931 /*
1932  * Return true if radio is disabled, otherwise false.
1933  * hw radio disable signal is an external pin, users activate it asynchronously
1934  * this function could be called when driver is down and w/o clock
1935  * it operates on different registers depending on corerev and boardflag.
1936  */
1937 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1938 {
1939         bool v, clk, xtal;
1940         u32 flags = 0;
1941
1942         xtal = wlc_hw->sbclk;
1943         if (!xtal)
1944                 brcms_b_xtal(wlc_hw, ON);
1945
1946         /* may need to take core out of reset first */
1947         clk = wlc_hw->clk;
1948         if (!clk) {
1949                 /*
1950                  * mac no longer enables phyclk automatically when driver
1951                  * accesses phyreg throughput mac. This can be skipped since
1952                  * only mac reg is accessed below
1953                  */
1954                 flags |= SICF_PCLKE;
1955
1956                 /*
1957                  * TODO: test suspend/resume
1958                  *
1959                  * AI chip doesn't restore bar0win2 on
1960                  * hibernation/resume, need sw fixup
1961                  */
1962
1963                 bcma_core_enable(wlc_hw->d11core, flags);
1964                 brcms_c_mctrl_reset(wlc_hw);
1965         }
1966
1967         v = ((bcma_read32(wlc_hw->d11core,
1968                           D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1969
1970         /* put core back into reset */
1971         if (!clk)
1972                 bcma_core_disable(wlc_hw->d11core, 0);
1973
1974         if (!xtal)
1975                 brcms_b_xtal(wlc_hw, OFF);
1976
1977         return v;
1978 }
1979
1980 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1981 {
1982         struct dma_pub *di = wlc_hw->di[fifo];
1983         return dma_rxreset(di);
1984 }
1985
1986 /* d11 core reset
1987  *   ensure fask clock during reset
1988  *   reset dma
1989  *   reset d11(out of reset)
1990  *   reset phy(out of reset)
1991  *   clear software macintstatus for fresh new start
1992  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1993  */
1994 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1995 {
1996         uint i;
1997         bool fastclk;
1998
1999         if (flags == BRCMS_USE_COREFLAGS)
2000                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2001
2002         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2003
2004         /* request FAST clock if not on  */
2005         fastclk = wlc_hw->forcefastclk;
2006         if (!fastclk)
2007                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2008
2009         /* reset the dma engines except first time thru */
2010         if (bcma_core_is_enabled(wlc_hw->d11core)) {
2011                 for (i = 0; i < NFIFO; i++)
2012                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2013                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2014                                           "dma_txreset[%d]: cannot stop dma\n",
2015                                            wlc_hw->unit, __func__, i);
2016
2017                 if ((wlc_hw->di[RX_FIFO])
2018                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2019                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2020                                   "[%d]: cannot stop dma\n",
2021                                   wlc_hw->unit, __func__, RX_FIFO);
2022         }
2023         /* if noreset, just stop the psm and return */
2024         if (wlc_hw->noreset) {
2025                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2026                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2027                 return;
2028         }
2029
2030         /*
2031          * mac no longer enables phyclk automatically when driver accesses
2032          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2033          * band->pi is invalid. need to enable PHY CLK
2034          */
2035         flags |= SICF_PCLKE;
2036
2037         /*
2038          * reset the core
2039          * In chips with PMU, the fastclk request goes through d11 core
2040          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2041          *
2042          * This adds some delay and we can optimize it by also requesting
2043          * fastclk through chipcommon during this period if necessary. But
2044          * that has to work coordinate with other driver like mips/arm since
2045          * they may touch chipcommon as well.
2046          */
2047         wlc_hw->clk = false;
2048         bcma_core_enable(wlc_hw->d11core, flags);
2049         wlc_hw->clk = true;
2050         if (wlc_hw->band && wlc_hw->band->pi)
2051                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2052
2053         brcms_c_mctrl_reset(wlc_hw);
2054
2055         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2056                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2057
2058         brcms_b_phy_reset(wlc_hw);
2059
2060         /* turn on PHY_PLL */
2061         brcms_b_core_phypll_ctl(wlc_hw, true);
2062
2063         /* clear sw intstatus */
2064         wlc_hw->wlc->macintstatus = 0;
2065
2066         /* restore the clk setting */
2067         if (!fastclk)
2068                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2069 }
2070
2071 /* txfifo sizes needs to be modified(increased) since the newer cores
2072  * have more memory.
2073  */
2074 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2075 {
2076         struct bcma_device *core = wlc_hw->d11core;
2077         u16 fifo_nu;
2078         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2079         u16 txfifo_def, txfifo_def1;
2080         u16 txfifo_cmd;
2081
2082         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2083         txfifo_startblk = TXFIFO_START_BLK;
2084
2085         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2086         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2087
2088                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2089                 txfifo_def = (txfifo_startblk & 0xff) |
2090                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2091                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2092                     ((((txfifo_endblk -
2093                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2094                 txfifo_cmd =
2095                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2096
2097                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2098                 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2099                 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2100
2101                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2102
2103                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2104         }
2105         /*
2106          * need to propagate to shm location to be in sync since ucode/hw won't
2107          * do this
2108          */
2109         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2110                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2111         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2112                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2113         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2114                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2115                             xmtfifo_sz[TX_AC_BK_FIFO]));
2116         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2117                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2118                             xmtfifo_sz[TX_BCMC_FIFO]));
2119 }
2120
2121 /* This function is used for changing the tsf frac register
2122  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2123  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2124  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2125  * HTPHY Formula is 2^26/freq(MHz) e.g.
2126  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2127  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2128  * For spuron: 123MHz -> 2^26/123    = 545600.5
2129  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2130  * For spur off: 120MHz -> 2^26/120    = 559240.5
2131  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2132  */
2133
2134 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2135 {
2136         struct bcma_device *core = wlc_hw->d11core;
2137
2138         if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
2139             (ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID)) {
2140                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2141                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2142                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2143                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2144                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2145                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2146                 } else {        /* 120Mhz */
2147                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2148                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2149                 }
2150         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2151                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2152                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2153                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2154                 } else {        /* 80Mhz */
2155                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2156                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2157                 }
2158         }
2159 }
2160
2161 /* Initialize GPIOs that are controlled by D11 core */
2162 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2163 {
2164         struct brcms_hardware *wlc_hw = wlc->hw;
2165         u32 gc, gm;
2166
2167         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2168         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2169
2170         /*
2171          * Common GPIO setup:
2172          *      G0 = LED 0 = WLAN Activity
2173          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2174          *      G2 = LED 2 = WLAN 5 GHz Radio State
2175          *      G4 = radio disable input (HI enabled, LO disabled)
2176          */
2177
2178         gc = gm = 0;
2179
2180         /* Allocate GPIOs for mimo antenna diversity feature */
2181         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2182                 /* Enable antenna diversity, use 2x3 mode */
2183                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2184                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2185                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2186                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2187
2188                 /* init superswitch control */
2189                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2190
2191         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2192                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2193                 /*
2194                  * The board itself is powered by these GPIOs
2195                  * (when not sending pattern) so set them high
2196                  */
2197                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2198                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2199                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2200                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2201
2202                 /* Enable antenna diversity, use 2x4 mode */
2203                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2204                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2205                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2206                              BRCM_BAND_ALL);
2207
2208                 /* Configure the desired clock to be 4Mhz */
2209                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2210                                    ANTSEL_CLKDIV_4MHZ);
2211         }
2212
2213         /*
2214          * gpio 9 controls the PA. ucode is responsible
2215          * for wiggling out and oe
2216          */
2217         if (wlc_hw->boardflags & BFL_PACTRL)
2218                 gm |= gc |= BOARD_GPIO_PACTRL;
2219
2220         /* apply to gpiocontrol register */
2221         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2222 }
2223
2224 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2225                               const __le32 ucode[], const size_t nbytes)
2226 {
2227         struct bcma_device *core = wlc_hw->d11core;
2228         uint i;
2229         uint count;
2230
2231         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2232
2233         count = (nbytes / sizeof(u32));
2234
2235         bcma_write32(core, D11REGOFFS(objaddr),
2236                      OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2237         (void)bcma_read32(core, D11REGOFFS(objaddr));
2238         for (i = 0; i < count; i++)
2239                 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2240
2241 }
2242
2243 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2244 {
2245         struct brcms_c_info *wlc;
2246         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2247
2248         wlc = wlc_hw->wlc;
2249
2250         if (wlc_hw->ucode_loaded)
2251                 return;
2252
2253         if (D11REV_IS(wlc_hw->corerev, 23)) {
2254                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2255                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2256                                           ucode->bcm43xx_16_mimosz);
2257                         wlc_hw->ucode_loaded = true;
2258                 } else
2259                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2260                                   "corerev %d\n",
2261                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2262         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2263                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2264                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2265                                           ucode->bcm43xx_24_lcnsz);
2266                         wlc_hw->ucode_loaded = true;
2267                 } else {
2268                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2269                                   "corerev %d\n",
2270                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2271                 }
2272         }
2273 }
2274
2275 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2276 {
2277         /* update sw state */
2278         wlc_hw->bmac_phytxant = phytxant;
2279
2280         /* push to ucode if up */
2281         if (!wlc_hw->up)
2282                 return;
2283         brcms_c_ucode_txant_set(wlc_hw);
2284
2285 }
2286
2287 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2288 {
2289         return (u16) wlc_hw->wlc->stf->txant;
2290 }
2291
2292 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2293 {
2294         wlc_hw->antsel_type = antsel_type;
2295
2296         /* Update the antsel type for phy module to use */
2297         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2298 }
2299
2300 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2301 {
2302         bool fatal = false;
2303         uint unit;
2304         uint intstatus, idx;
2305         struct bcma_device *core = wlc_hw->d11core;
2306         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2307
2308         unit = wlc_hw->unit;
2309
2310         for (idx = 0; idx < NFIFO; idx++) {
2311                 /* read intstatus register and ignore any non-error bits */
2312                 intstatus =
2313                         bcma_read32(core,
2314                                     D11REGOFFS(intctrlregs[idx].intstatus)) &
2315                         I_ERRORS;
2316                 if (!intstatus)
2317                         continue;
2318
2319                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2320                         unit, idx, intstatus);
2321
2322                 if (intstatus & I_RO) {
2323                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2324                                   "overflow\n", unit, idx);
2325                         fatal = true;
2326                 }
2327
2328                 if (intstatus & I_PC) {
2329                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2330                                  unit, idx);
2331                         fatal = true;
2332                 }
2333
2334                 if (intstatus & I_PD) {
2335                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2336                                   idx);
2337                         fatal = true;
2338                 }
2339
2340                 if (intstatus & I_DE) {
2341                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2342                                   "error\n", unit, idx);
2343                         fatal = true;
2344                 }
2345
2346                 if (intstatus & I_RU)
2347                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2348                                   "underflow\n", idx, unit);
2349
2350                 if (intstatus & I_XU) {
2351                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2352                                   "underflow\n", idx, unit);
2353                         fatal = true;
2354                 }
2355
2356                 if (fatal) {
2357                         brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2358                         break;
2359                 } else
2360                         bcma_write32(core,
2361                                      D11REGOFFS(intctrlregs[idx].intstatus),
2362                                      intstatus);
2363         }
2364 }
2365
2366 void brcms_c_intrson(struct brcms_c_info *wlc)
2367 {
2368         struct brcms_hardware *wlc_hw = wlc->hw;
2369         wlc->macintmask = wlc->defmacintmask;
2370         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2371 }
2372
2373 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2374 {
2375         struct brcms_hardware *wlc_hw = wlc->hw;
2376         u32 macintmask;
2377
2378         if (!wlc_hw->clk)
2379                 return 0;
2380
2381         macintmask = wlc->macintmask;   /* isr can still happen */
2382
2383         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2384         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2385         udelay(1);              /* ensure int line is no longer driven */
2386         wlc->macintmask = 0;
2387
2388         /* return previous macintmask; resolve race between us and our isr */
2389         return wlc->macintstatus ? 0 : macintmask;
2390 }
2391
2392 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2393 {
2394         struct brcms_hardware *wlc_hw = wlc->hw;
2395         if (!wlc_hw->clk)
2396                 return;
2397
2398         wlc->macintmask = macintmask;
2399         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2400 }
2401
2402 /* assumes that the d11 MAC is enabled */
2403 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2404                                     uint tx_fifo)
2405 {
2406         u8 fifo = 1 << tx_fifo;
2407
2408         /* Two clients of this code, 11h Quiet period and scanning. */
2409
2410         /* only suspend if not already suspended */
2411         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2412                 return;
2413
2414         /* force the core awake only if not already */
2415         if (wlc_hw->suspended_fifos == 0)
2416                 brcms_c_ucode_wake_override_set(wlc_hw,
2417                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2418
2419         wlc_hw->suspended_fifos |= fifo;
2420
2421         if (wlc_hw->di[tx_fifo]) {
2422                 /*
2423                  * Suspending AMPDU transmissions in the middle can cause
2424                  * underflow which may result in mismatch between ucode and
2425                  * driver so suspend the mac before suspending the FIFO
2426                  */
2427                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2428                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2429
2430                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2431
2432                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2433                         brcms_c_enable_mac(wlc_hw->wlc);
2434         }
2435 }
2436
2437 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2438                                    uint tx_fifo)
2439 {
2440         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2441          * but need to be done here for PIO otherwise the watchdog will catch
2442          * the inconsistency and fire
2443          */
2444         /* Two clients of this code, 11h Quiet period and scanning. */
2445         if (wlc_hw->di[tx_fifo])
2446                 dma_txresume(wlc_hw->di[tx_fifo]);
2447
2448         /* allow core to sleep again */
2449         if (wlc_hw->suspended_fifos == 0)
2450                 return;
2451         else {
2452                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2453                 if (wlc_hw->suspended_fifos == 0)
2454                         brcms_c_ucode_wake_override_clear(wlc_hw,
2455                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2456         }
2457 }
2458
2459 /* precondition: requires the mac core to be enabled */
2460 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2461 {
2462         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2463
2464         if (mute_tx) {
2465                 /* suspend tx fifos */
2466                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2467                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2468                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2469                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2470
2471                 /* zero the address match register so we do not send ACKs */
2472                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2473                                        null_ether_addr);
2474         } else {
2475                 /* resume tx fifos */
2476                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2477                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2478                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2479                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2480
2481                 /* Restore address */
2482                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2483                                        wlc_hw->etheraddr);
2484         }
2485
2486         wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2487
2488         if (mute_tx)
2489                 brcms_c_ucode_mute_override_set(wlc_hw);
2490         else
2491                 brcms_c_ucode_mute_override_clear(wlc_hw);
2492 }
2493
2494 void
2495 brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2496 {
2497         brcms_b_mute(wlc->hw, mute_tx);
2498 }
2499
2500 /*
2501  * Read and clear macintmask and macintstatus and intstatus registers.
2502  * This routine should be called with interrupts off
2503  * Return:
2504  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2505  *   0 if the interrupt is not for us, or we are in some special cases;
2506  *   device interrupt status bits otherwise.
2507  */
2508 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2509 {
2510         struct brcms_hardware *wlc_hw = wlc->hw;
2511         struct bcma_device *core = wlc_hw->d11core;
2512         u32 macintstatus;
2513
2514         /* macintstatus includes a DMA interrupt summary bit */
2515         macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2516
2517         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2518                  macintstatus);
2519
2520         /* detect cardbus removed, in power down(suspend) and in reset */
2521         if (brcms_deviceremoved(wlc))
2522                 return -1;
2523
2524         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2525          * handle that case here.
2526          */
2527         if (macintstatus == 0xffffffff)
2528                 return 0;
2529
2530         /* defer unsolicited interrupts */
2531         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2532
2533         /* if not for us */
2534         if (macintstatus == 0)
2535                 return 0;
2536
2537         /* interrupts are already turned off for CFE build
2538          * Caution: For CFE Turning off the interrupts again has some undesired
2539          * consequences
2540          */
2541         /* turn off the interrupts */
2542         bcma_write32(core, D11REGOFFS(macintmask), 0);
2543         (void)bcma_read32(core, D11REGOFFS(macintmask));
2544         wlc->macintmask = 0;
2545
2546         /* clear device interrupts */
2547         bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2548
2549         /* MI_DMAINT is indication of non-zero intstatus */
2550         if (macintstatus & MI_DMAINT)
2551                 /*
2552                  * only fifo interrupt enabled is I_RI in
2553                  * RX_FIFO. If MI_DMAINT is set, assume it
2554                  * is set and clear the interrupt.
2555                  */
2556                 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2557                              DEF_RXINTMASK);
2558
2559         return macintstatus;
2560 }
2561
2562 /* Update wlc->macintstatus and wlc->intstatus[]. */
2563 /* Return true if they are updated successfully. false otherwise */
2564 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2565 {
2566         u32 macintstatus;
2567
2568         /* read and clear macintstatus and intstatus registers */
2569         macintstatus = wlc_intstatus(wlc, false);
2570
2571         /* device is removed */
2572         if (macintstatus == 0xffffffff)
2573                 return false;
2574
2575         /* update interrupt status in software */
2576         wlc->macintstatus |= macintstatus;
2577
2578         return true;
2579 }
2580
2581 /*
2582  * First-level interrupt processing.
2583  * Return true if this was our interrupt, false otherwise.
2584  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2585  * false otherwise.
2586  */
2587 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2588 {
2589         struct brcms_hardware *wlc_hw = wlc->hw;
2590         u32 macintstatus;
2591
2592         *wantdpc = false;
2593
2594         if (!wlc_hw->up || !wlc->macintmask)
2595                 return false;
2596
2597         /* read and clear macintstatus and intstatus registers */
2598         macintstatus = wlc_intstatus(wlc, true);
2599
2600         if (macintstatus == 0xffffffff)
2601                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2602                           " path\n");
2603
2604         /* it is not for us */
2605         if (macintstatus == 0)
2606                 return false;
2607
2608         *wantdpc = true;
2609
2610         /* save interrupt status bits */
2611         wlc->macintstatus = macintstatus;
2612
2613         return true;
2614
2615 }
2616
2617 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2618 {
2619         struct brcms_hardware *wlc_hw = wlc->hw;
2620         struct bcma_device *core = wlc_hw->d11core;
2621         u32 mc, mi;
2622         struct wiphy *wiphy = wlc->wiphy;
2623
2624         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2625                 wlc_hw->band->bandunit);
2626
2627         /*
2628          * Track overlapping suspend requests
2629          */
2630         wlc_hw->mac_suspend_depth++;
2631         if (wlc_hw->mac_suspend_depth > 1)
2632                 return;
2633
2634         /* force the core awake */
2635         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2636
2637         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2638
2639         if (mc == 0xffffffff) {
2640                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2641                           __func__);
2642                 brcms_down(wlc->wl);
2643                 return;
2644         }
2645         WARN_ON(mc & MCTL_PSM_JMP_0);
2646         WARN_ON(!(mc & MCTL_PSM_RUN));
2647         WARN_ON(!(mc & MCTL_EN_MAC));
2648
2649         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2650         if (mi == 0xffffffff) {
2651                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2652                           __func__);
2653                 brcms_down(wlc->wl);
2654                 return;
2655         }
2656         WARN_ON(mi & MI_MACSSPNDD);
2657
2658         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2659
2660         SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2661                  BRCMS_MAX_MAC_SUSPEND);
2662
2663         if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2664                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2665                           " and MI_MACSSPNDD is still not on.\n",
2666                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2667                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2668                           "psm_brc 0x%04x\n", wlc_hw->unit,
2669                           bcma_read32(core, D11REGOFFS(psmdebug)),
2670                           bcma_read32(core, D11REGOFFS(phydebug)),
2671                           bcma_read16(core, D11REGOFFS(psm_brc)));
2672         }
2673
2674         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2675         if (mc == 0xffffffff) {
2676                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2677                           __func__);
2678                 brcms_down(wlc->wl);
2679                 return;
2680         }
2681         WARN_ON(mc & MCTL_PSM_JMP_0);
2682         WARN_ON(!(mc & MCTL_PSM_RUN));
2683         WARN_ON(mc & MCTL_EN_MAC);
2684 }
2685
2686 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2687 {
2688         struct brcms_hardware *wlc_hw = wlc->hw;
2689         struct bcma_device *core = wlc_hw->d11core;
2690         u32 mc, mi;
2691
2692         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2693                 wlc->band->bandunit);
2694
2695         /*
2696          * Track overlapping suspend requests
2697          */
2698         wlc_hw->mac_suspend_depth--;
2699         if (wlc_hw->mac_suspend_depth > 0)
2700                 return;
2701
2702         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2703         WARN_ON(mc & MCTL_PSM_JMP_0);
2704         WARN_ON(mc & MCTL_EN_MAC);
2705         WARN_ON(!(mc & MCTL_PSM_RUN));
2706
2707         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2708         bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2709
2710         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2711         WARN_ON(mc & MCTL_PSM_JMP_0);
2712         WARN_ON(!(mc & MCTL_EN_MAC));
2713         WARN_ON(!(mc & MCTL_PSM_RUN));
2714
2715         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2716         WARN_ON(mi & MI_MACSSPNDD);
2717
2718         brcms_c_ucode_wake_override_clear(wlc_hw,
2719                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2720 }
2721
2722 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2723 {
2724         wlc_hw->hw_stf_ss_opmode = stf_mode;
2725
2726         if (wlc_hw->clk)
2727                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2728 }
2729
2730 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2731 {
2732         struct bcma_device *core = wlc_hw->d11core;
2733         u32 w, val;
2734         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2735
2736         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2737
2738         /* Validate dchip register access */
2739
2740         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2741         (void)bcma_read32(core, D11REGOFFS(objaddr));
2742         w = bcma_read32(core, D11REGOFFS(objdata));
2743
2744         /* Can we write and read back a 32bit register? */
2745         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2746         (void)bcma_read32(core, D11REGOFFS(objaddr));
2747         bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2748
2749         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2750         (void)bcma_read32(core, D11REGOFFS(objaddr));
2751         val = bcma_read32(core, D11REGOFFS(objdata));
2752         if (val != (u32) 0xaa5555aa) {
2753                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2754                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2755                 return false;
2756         }
2757
2758         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2759         (void)bcma_read32(core, D11REGOFFS(objaddr));
2760         bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2761
2762         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2763         (void)bcma_read32(core, D11REGOFFS(objaddr));
2764         val = bcma_read32(core, D11REGOFFS(objdata));
2765         if (val != (u32) 0x55aaaa55) {
2766                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2767                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2768                 return false;
2769         }
2770
2771         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2772         (void)bcma_read32(core, D11REGOFFS(objaddr));
2773         bcma_write32(core, D11REGOFFS(objdata), w);
2774
2775         /* clear CFPStart */
2776         bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2777
2778         w = bcma_read32(core, D11REGOFFS(maccontrol));
2779         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2780             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2781                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2782                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2783                           (MCTL_IHR_EN | MCTL_WAKE),
2784                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2785                 return false;
2786         }
2787
2788         return true;
2789 }
2790
2791 #define PHYPLL_WAIT_US  100000
2792
2793 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2794 {
2795         struct bcma_device *core = wlc_hw->d11core;
2796         u32 tmp;
2797
2798         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2799
2800         tmp = 0;
2801
2802         if (on) {
2803                 if ((ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
2804                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2805                                    CCS_ERSRC_REQ_HT |
2806                                    CCS_ERSRC_REQ_D11PLL |
2807                                    CCS_ERSRC_REQ_PHYPLL);
2808                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2809                                   CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2810                                  PHYPLL_WAIT_US);
2811
2812                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2813                         if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2814                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2815                                           " PLL failed\n", __func__);
2816                 } else {
2817                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2818                                    tmp | CCS_ERSRC_REQ_D11PLL |
2819                                    CCS_ERSRC_REQ_PHYPLL);
2820                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2821                                   (CCS_ERSRC_AVAIL_D11PLL |
2822                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2823                                  (CCS_ERSRC_AVAIL_D11PLL |
2824                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2825
2826                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2827                         if ((tmp &
2828                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2829                             !=
2830                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2831                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2832                                           "PHY PLL failed\n", __func__);
2833                 }
2834         } else {
2835                 /*
2836                  * Since the PLL may be shared, other cores can still
2837                  * be requesting it; so we'll deassert the request but
2838                  * not wait for status to comply.
2839                  */
2840                 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2841                             ~CCS_ERSRC_REQ_PHYPLL);
2842                 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2843         }
2844 }
2845
2846 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2847 {
2848         bool dev_gone;
2849
2850         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2851
2852         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2853
2854         if (dev_gone)
2855                 return;
2856
2857         if (wlc_hw->noreset)
2858                 return;
2859
2860         /* radio off */
2861         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2862
2863         /* turn off analog core */
2864         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2865
2866         /* turn off PHYPLL to save power */
2867         brcms_b_core_phypll_ctl(wlc_hw, false);
2868
2869         wlc_hw->clk = false;
2870         bcma_core_disable(wlc_hw->d11core, 0);
2871         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2872 }
2873
2874 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2875 {
2876         struct brcms_hardware *wlc_hw = wlc->hw;
2877         uint i;
2878
2879         /* free any posted tx packets */
2880         for (i = 0; i < NFIFO; i++)
2881                 if (wlc_hw->di[i]) {
2882                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2883                         wlc->core->txpktpend[i] = 0;
2884                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2885                 }
2886
2887         /* free any posted rx packets */
2888         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2889 }
2890
2891 static u16
2892 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2893 {
2894         struct bcma_device *core = wlc_hw->d11core;
2895         u16 objoff = D11REGOFFS(objdata);
2896
2897         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2898         (void)bcma_read32(core, D11REGOFFS(objaddr));
2899         if (offset & 2)
2900                 objoff += 2;
2901
2902         return bcma_read16(core, objoff);
2903 }
2904
2905 static void
2906 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2907                      u32 sel)
2908 {
2909         struct bcma_device *core = wlc_hw->d11core;
2910         u16 objoff = D11REGOFFS(objdata);
2911
2912         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2913         (void)bcma_read32(core, D11REGOFFS(objaddr));
2914         if (offset & 2)
2915                 objoff += 2;
2916
2917         bcma_write16(core, objoff, v);
2918 }
2919
2920 /*
2921  * Read a single u16 from shared memory.
2922  * SHM 'offset' needs to be an even address
2923  */
2924 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2925 {
2926         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2927 }
2928
2929 /*
2930  * Write a single u16 to shared memory.
2931  * SHM 'offset' needs to be an even address
2932  */
2933 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2934 {
2935         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2936 }
2937
2938 /*
2939  * Copy a buffer to shared memory of specified type .
2940  * SHM 'offset' needs to be an even address and
2941  * Buffer length 'len' must be an even number of bytes
2942  * 'sel' selects the type of memory
2943  */
2944 void
2945 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2946                       const void *buf, int len, u32 sel)
2947 {
2948         u16 v;
2949         const u8 *p = (const u8 *)buf;
2950         int i;
2951
2952         if (len <= 0 || (offset & 1) || (len & 1))
2953                 return;
2954
2955         for (i = 0; i < len; i += 2) {
2956                 v = p[i] | (p[i + 1] << 8);
2957                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2958         }
2959 }
2960
2961 /*
2962  * Copy a piece of shared memory of specified type to a buffer .
2963  * SHM 'offset' needs to be an even address and
2964  * Buffer length 'len' must be an even number of bytes
2965  * 'sel' selects the type of memory
2966  */
2967 void
2968 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2969                          int len, u32 sel)
2970 {
2971         u16 v;
2972         u8 *p = (u8 *) buf;
2973         int i;
2974
2975         if (len <= 0 || (offset & 1) || (len & 1))
2976                 return;
2977
2978         for (i = 0; i < len; i += 2) {
2979                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2980                 p[i] = v & 0xFF;
2981                 p[i + 1] = (v >> 8) & 0xFF;
2982         }
2983 }
2984
2985 /* Copy a buffer to shared memory.
2986  * SHM 'offset' needs to be an even address and
2987  * Buffer length 'len' must be an even number of bytes
2988  */
2989 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2990                         const void *buf, int len)
2991 {
2992         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2993 }
2994
2995 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2996                                    u16 SRL, u16 LRL)
2997 {
2998         wlc_hw->SRL = SRL;
2999         wlc_hw->LRL = LRL;
3000
3001         /* write retry limit to SCR, shouldn't need to suspend */
3002         if (wlc_hw->up) {
3003                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3004                              OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3005                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3006                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
3007                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
3008                              OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3009                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3010                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3011         }
3012 }
3013
3014 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3015 {
3016         if (set) {
3017                 if (mboolisset(wlc_hw->pllreq, req_bit))
3018                         return;
3019
3020                 mboolset(wlc_hw->pllreq, req_bit);
3021
3022                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3023                         if (!wlc_hw->sbclk)
3024                                 brcms_b_xtal(wlc_hw, ON);
3025                 }
3026         } else {
3027                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3028                         return;
3029
3030                 mboolclr(wlc_hw->pllreq, req_bit);
3031
3032                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3033                         if (wlc_hw->sbclk)
3034                                 brcms_b_xtal(wlc_hw, OFF);
3035                 }
3036         }
3037 }
3038
3039 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3040 {
3041         wlc_hw->antsel_avail = antsel_avail;
3042 }
3043
3044 /*
3045  * conditions under which the PM bit should be set in outgoing frames
3046  * and STAY_AWAKE is meaningful
3047  */
3048 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3049 {
3050         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3051
3052         /* disallow PS when one of the following global conditions meets */
3053         if (!wlc->pub->associated)
3054                 return false;
3055
3056         /* disallow PS when one of these meets when not scanning */
3057         if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3058                 return false;
3059
3060         if (cfg->associated) {
3061                 /*
3062                  * disallow PS when one of the following
3063                  * bsscfg specific conditions meets
3064                  */
3065                 if (!cfg->BSS)
3066                         return false;
3067
3068                 return false;
3069         }
3070
3071         return true;
3072 }
3073
3074 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3075 {
3076         int i;
3077         struct macstat macstats;
3078 #ifdef DEBUG
3079         u16 delta;
3080         u16 rxf0ovfl;
3081         u16 txfunfl[NFIFO];
3082 #endif                          /* DEBUG */
3083
3084         /* if driver down, make no sense to update stats */
3085         if (!wlc->pub->up)
3086                 return;
3087
3088 #ifdef DEBUG
3089         /* save last rx fifo 0 overflow count */
3090         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3091
3092         /* save last tx fifo  underflow count */
3093         for (i = 0; i < NFIFO; i++)
3094                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3095 #endif                          /* DEBUG */
3096
3097         /* Read mac stats from contiguous shared memory */
3098         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3099                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3100
3101 #ifdef DEBUG
3102         /* check for rx fifo 0 overflow */
3103         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3104         if (delta)
3105                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3106                           wlc->pub->unit, delta);
3107
3108         /* check for tx fifo underflows */
3109         for (i = 0; i < NFIFO; i++) {
3110                 delta =
3111                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3112                               txfunfl[i]);
3113                 if (delta)
3114                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3115                                   "\n", wlc->pub->unit, delta, i);
3116         }
3117 #endif                          /* DEBUG */
3118
3119         /* merge counters from dma module */
3120         for (i = 0; i < NFIFO; i++) {
3121                 if (wlc->hw->di[i])
3122                         dma_counterreset(wlc->hw->di[i]);
3123         }
3124 }
3125
3126 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3127 {
3128         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3129
3130         /* reset the core */
3131         if (!brcms_deviceremoved(wlc_hw->wlc))
3132                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3133
3134         /* purge the dma rings */
3135         brcms_c_flushqueues(wlc_hw->wlc);
3136 }
3137
3138 void brcms_c_reset(struct brcms_c_info *wlc)
3139 {
3140         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3141
3142         /* slurp up hw mac counters before core reset */
3143         brcms_c_statsupd(wlc);
3144
3145         /* reset our snapshot of macstat counters */
3146         memset((char *)wlc->core->macstat_snapshot, 0,
3147                 sizeof(struct macstat));
3148
3149         brcms_b_reset(wlc->hw);
3150 }
3151
3152 /* Return the channel the driver should initialize during brcms_c_init.
3153  * the channel may have to be changed from the currently configured channel
3154  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3155  * invalid channel for current country, etc.)
3156  */
3157 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3158 {
3159         u16 chanspec =
3160             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3161             WL_CHANSPEC_BAND_2G;
3162
3163         return chanspec;
3164 }
3165
3166 void brcms_c_init_scb(struct scb *scb)
3167 {
3168         int i;
3169
3170         memset(scb, 0, sizeof(struct scb));
3171         scb->flags = SCB_WMECAP | SCB_HTCAP;
3172         for (i = 0; i < NUMPRIO; i++) {
3173                 scb->seqnum[i] = 0;
3174                 scb->seqctl[i] = 0xFFFF;
3175         }
3176
3177         scb->seqctl_nonqos = 0xFFFF;
3178         scb->magic = SCB_MAGIC;
3179 }
3180
3181 /* d11 core init
3182  *   reset PSM
3183  *   download ucode/PCM
3184  *   let ucode run to suspended
3185  *   download ucode inits
3186  *   config other core registers
3187  *   init dma
3188  */
3189 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3190 {
3191         struct brcms_hardware *wlc_hw = wlc->hw;
3192         struct bcma_device *core = wlc_hw->d11core;
3193         u32 sflags;
3194         u32 bcnint_us;
3195         uint i = 0;
3196         bool fifosz_fixup = false;
3197         int err = 0;
3198         u16 buf[NFIFO];
3199         struct wiphy *wiphy = wlc->wiphy;
3200         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3201
3202         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3203
3204         /* reset PSM */
3205         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3206
3207         brcms_ucode_download(wlc_hw);
3208         /*
3209          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3210          */
3211         fifosz_fixup = true;
3212
3213         /* let the PSM run to the suspended state, set mode to BSS STA */
3214         bcma_write32(core, D11REGOFFS(macintstatus), -1);
3215         brcms_b_mctrl(wlc_hw, ~0,
3216                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3217
3218         /* wait for ucode to self-suspend after auto-init */
3219         SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3220                    MI_MACSSPNDD) == 0), 1000 * 1000);
3221         if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3222                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3223                           "suspend!\n", wlc_hw->unit);
3224
3225         brcms_c_gpio_init(wlc);
3226
3227         sflags = bcma_aread32(core, BCMA_IOST);
3228
3229         if (D11REV_IS(wlc_hw->corerev, 23)) {
3230                 if (BRCMS_ISNPHY(wlc_hw->band))
3231                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3232                 else
3233                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3234                                   " %d\n", __func__, wlc_hw->unit,
3235                                   wlc_hw->corerev);
3236         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3237                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3238                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3239                 else
3240                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3241                                   " %d\n", __func__, wlc_hw->unit,
3242                                   wlc_hw->corerev);
3243         } else {
3244                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3245                           __func__, wlc_hw->unit, wlc_hw->corerev);
3246         }
3247
3248         /* For old ucode, txfifo sizes needs to be modified(increased) */
3249         if (fifosz_fixup)
3250                 brcms_b_corerev_fifofixup(wlc_hw);
3251
3252         /* check txfifo allocations match between ucode and driver */
3253         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3254         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3255                 i = TX_AC_BE_FIFO;
3256                 err = -1;
3257         }
3258         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3259         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3260                 i = TX_AC_VI_FIFO;
3261                 err = -1;
3262         }
3263         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3264         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3265         buf[TX_AC_BK_FIFO] &= 0xff;
3266         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3267                 i = TX_AC_BK_FIFO;
3268                 err = -1;
3269         }
3270         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3271                 i = TX_AC_VO_FIFO;
3272                 err = -1;
3273         }
3274         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3275         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3276         buf[TX_BCMC_FIFO] &= 0xff;
3277         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3278                 i = TX_BCMC_FIFO;
3279                 err = -1;
3280         }
3281         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3282                 i = TX_ATIM_FIFO;
3283                 err = -1;
3284         }
3285         if (err != 0)
3286                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3287                           " driver size %d index %d\n", buf[i],
3288                           wlc_hw->xmtfifo_sz[i], i);
3289
3290         /* make sure we can still talk to the mac */
3291         WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3292
3293         /* band-specific inits done by wlc_bsinit() */
3294
3295         /* Set up frame burst size and antenna swap threshold init values */
3296         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3297         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3298
3299         /* enable one rx interrupt per received frame */
3300         bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3301
3302         /* set the station mode (BSS STA) */
3303         brcms_b_mctrl(wlc_hw,
3304                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3305                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3306
3307         /* set up Beacon interval */
3308         bcnint_us = 0x8000 << 10;
3309         bcma_write32(core, D11REGOFFS(tsf_cfprep),
3310                      (bcnint_us << CFPREP_CBI_SHIFT));
3311         bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3312         bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3313
3314         /* write interrupt mask */
3315         bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3316                      DEF_RXINTMASK);
3317
3318         /* allow the MAC to control the PHY clock (dynamic on/off) */
3319         brcms_b_macphyclk_set(wlc_hw, ON);
3320
3321         /* program dynamic clock control fast powerup delay register */
3322         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3323         bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3324
3325         /* tell the ucode the corerev */
3326         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3327
3328         /* tell the ucode MAC capabilities */
3329         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3330                            (u16) (wlc_hw->machwcap & 0xffff));
3331         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3332                            (u16) ((wlc_hw->
3333                                       machwcap >> 16) & 0xffff));
3334
3335         /* write retry limits to SCR, this done after PSM init */
3336         bcma_write32(core, D11REGOFFS(objaddr),
3337                      OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3338         (void)bcma_read32(core, D11REGOFFS(objaddr));
3339         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3340         bcma_write32(core, D11REGOFFS(objaddr),
3341                      OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3342         (void)bcma_read32(core, D11REGOFFS(objaddr));
3343         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3344
3345         /* write rate fallback retry limits */
3346         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3347         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3348
3349         bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3350         bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3351
3352         /* init the tx dma engines */
3353         for (i = 0; i < NFIFO; i++) {
3354                 if (wlc_hw->di[i])
3355                         dma_txinit(wlc_hw->di[i]);
3356         }
3357
3358         /* init the rx dma engine(s) and post receive buffers */
3359         dma_rxinit(wlc_hw->di[RX_FIFO]);
3360         dma_rxfill(wlc_hw->di[RX_FIFO]);
3361 }
3362
3363 void
3364 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3365         u32 macintmask;
3366         bool fastclk;
3367         struct brcms_c_info *wlc = wlc_hw->wlc;
3368
3369         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3370
3371         /* request FAST clock if not on */
3372         fastclk = wlc_hw->forcefastclk;
3373         if (!fastclk)
3374                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3375
3376         /* disable interrupts */
3377         macintmask = brcms_intrsoff(wlc->wl);
3378
3379         /* set up the specified band and chanspec */
3380         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3381         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3382
3383         /* do one-time phy inits and calibration */
3384         wlc_phy_cal_init(wlc_hw->band->pi);
3385
3386         /* core-specific initialization */
3387         brcms_b_coreinit(wlc);
3388
3389         /* band-specific inits */
3390         brcms_b_bsinit(wlc, chanspec);
3391
3392         /* restore macintmask */
3393         brcms_intrsrestore(wlc->wl, macintmask);
3394
3395         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3396          * is suspended and brcms_c_enable_mac() will clear this override bit.
3397          */
3398         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3399
3400         /*
3401          * initialize mac_suspend_depth to 1 to match ucode
3402          * initial suspended state
3403          */
3404         wlc_hw->mac_suspend_depth = 1;
3405
3406         /* restore the clk */
3407         if (!fastclk)
3408                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3409 }
3410
3411 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3412                                      u16 chanspec)
3413 {
3414         /* Save our copy of the chanspec */
3415         wlc->chanspec = chanspec;
3416
3417         /* Set the chanspec and power limits for this locale */
3418         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3419
3420         if (wlc->stf->ss_algosel_auto)
3421                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3422                                             chanspec);
3423
3424         brcms_c_stf_ss_update(wlc, wlc->band);
3425 }
3426
3427 static void
3428 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3429 {
3430         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3431                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3432                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3433                 brcms_chspec_bw(wlc->default_bss->chanspec),
3434                 wlc->stf->txstreams);
3435 }
3436
3437 /* derive wlc->band->basic_rate[] table from 'rateset' */
3438 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3439                               struct brcms_c_rateset *rateset)
3440 {
3441         u8 rate;
3442         u8 mandatory;
3443         u8 cck_basic = 0;
3444         u8 ofdm_basic = 0;
3445         u8 *br = wlc->band->basic_rate;
3446         uint i;
3447
3448         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3449         memset(br, 0, BRCM_MAXRATE + 1);
3450
3451         /* For each basic rate in the rates list, make an entry in the
3452          * best basic lookup.
3453          */
3454         for (i = 0; i < rateset->count; i++) {
3455                 /* only make an entry for a basic rate */
3456                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3457                         continue;
3458
3459                 /* mask off basic bit */
3460                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3461
3462                 if (rate > BRCM_MAXRATE) {
3463                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3464                                   "invalid rate 0x%X in rate set\n",
3465                                   rateset->rates[i]);
3466                         continue;
3467                 }
3468
3469                 br[rate] = rate;
3470         }
3471
3472         /* The rate lookup table now has non-zero entries for each
3473          * basic rate, equal to the basic rate: br[basicN] = basicN
3474          *
3475          * To look up the best basic rate corresponding to any
3476          * particular rate, code can use the basic_rate table
3477          * like this
3478          *
3479          * basic_rate = wlc->band->basic_rate[tx_rate]
3480          *
3481          * Make sure there is a best basic rate entry for
3482          * every rate by walking up the table from low rates
3483          * to high, filling in holes in the lookup table
3484          */
3485
3486         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3487                 rate = wlc->band->hw_rateset.rates[i];
3488
3489                 if (br[rate] != 0) {
3490                         /* This rate is a basic rate.
3491                          * Keep track of the best basic rate so far by
3492                          * modulation type.
3493                          */
3494                         if (is_ofdm_rate(rate))
3495                                 ofdm_basic = rate;
3496                         else
3497                                 cck_basic = rate;
3498
3499                         continue;
3500                 }
3501
3502                 /* This rate is not a basic rate so figure out the
3503                  * best basic rate less than this rate and fill in
3504                  * the hole in the table
3505                  */
3506
3507                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3508
3509                 if (br[rate] != 0)
3510                         continue;
3511
3512                 if (is_ofdm_rate(rate)) {
3513                         /*
3514                          * In 11g and 11a, the OFDM mandatory rates
3515                          * are 6, 12, and 24 Mbps
3516                          */
3517                         if (rate >= BRCM_RATE_24M)
3518                                 mandatory = BRCM_RATE_24M;
3519                         else if (rate >= BRCM_RATE_12M)
3520                                 mandatory = BRCM_RATE_12M;
3521                         else
3522                                 mandatory = BRCM_RATE_6M;
3523                 } else {
3524                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3525                         mandatory = rate;
3526                 }
3527
3528                 br[rate] = mandatory;
3529         }
3530 }
3531
3532 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3533                                      u16 chanspec)
3534 {
3535         struct brcms_c_rateset default_rateset;
3536         uint parkband;
3537         uint i, band_order[2];
3538
3539         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3540         /*
3541          * We might have been bandlocked during down and the chip
3542          * power-cycled (hibernate). Figure out the right band to park on
3543          */
3544         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3545                 /* updated in brcms_c_bandlock() */
3546                 parkband = wlc->band->bandunit;
3547                 band_order[0] = band_order[1] = parkband;
3548         } else {
3549                 /* park on the band of the specified chanspec */
3550                 parkband = chspec_bandunit(chanspec);
3551
3552                 /* order so that parkband initialize last */
3553                 band_order[0] = parkband ^ 1;
3554                 band_order[1] = parkband;
3555         }
3556
3557         /* make each band operational, software state init */
3558         for (i = 0; i < wlc->pub->_nbands; i++) {
3559                 uint j = band_order[i];
3560
3561                 wlc->band = wlc->bandstate[j];
3562
3563                 brcms_default_rateset(wlc, &default_rateset);
3564
3565                 /* fill in hw_rate */
3566                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3567                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3568                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3569
3570                 /* init basic rate lookup */
3571                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3572         }
3573
3574         /* sync up phy/radio chanspec */
3575         brcms_c_set_phy_chanspec(wlc, chanspec);
3576 }
3577
3578 /*
3579  * Set or clear filtering related maccontrol bits based on
3580  * specified filter flags
3581  */
3582 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3583 {
3584         u32 promisc_bits = 0;
3585
3586         wlc->filter_flags = filter_flags;
3587
3588         if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3589                 promisc_bits |= MCTL_PROMISC;
3590
3591         if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3592                 promisc_bits |= MCTL_BCNS_PROMISC;
3593
3594         if (filter_flags & FIF_FCSFAIL)
3595                 promisc_bits |= MCTL_KEEPBADFCS;
3596
3597         if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3598                 promisc_bits |= MCTL_KEEPCONTROL;
3599
3600         brcms_b_mctrl(wlc->hw,
3601                 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3602                 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3603                 promisc_bits);
3604 }
3605
3606 /*
3607  * ucode, hwmac update
3608  *    Channel dependent updates for ucode and hw
3609  */
3610 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3611 {
3612         /* enable or disable any active IBSSs depending on whether or not
3613          * we are on the home channel
3614          */
3615         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3616                 if (wlc->pub->associated) {
3617                         /*
3618                          * BMAC_NOTE: This is something that should be fixed
3619                          * in ucode inits. I think that the ucode inits set
3620                          * up the bcn templates and shm values with a bogus
3621                          * beacon. This should not be done in the inits. If
3622                          * ucode needs to set up a beacon for testing, the
3623                          * test routines should write it down, not expect the
3624                          * inits to populate a bogus beacon.
3625                          */
3626                         if (BRCMS_PHY_11N_CAP(wlc->band))
3627                                 brcms_b_write_shm(wlc->hw,
3628                                                 M_BCN_TXTSF_OFFSET, 0);
3629                 }
3630         } else {
3631                 /* disable an active IBSS if we are not on the home channel */
3632         }
3633 }
3634
3635 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3636                                    u8 basic_rate)
3637 {
3638         u8 phy_rate, index;
3639         u8 basic_phy_rate, basic_index;
3640         u16 dir_table, basic_table;
3641         u16 basic_ptr;
3642
3643         /* Shared memory address for the table we are reading */
3644         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3645
3646         /* Shared memory address for the table we are writing */
3647         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3648
3649         /*
3650          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3651          * the index into the rate table.
3652          */
3653         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3654         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3655         index = phy_rate & 0xf;
3656         basic_index = basic_phy_rate & 0xf;
3657
3658         /* Find the SHM pointer to the ACK rate entry by looking in the
3659          * Direct-map Table
3660          */
3661         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3662
3663         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3664          * to the correct basic rate for the given incoming rate
3665          */
3666         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3667 }
3668
3669 static const struct brcms_c_rateset *
3670 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3671 {
3672         const struct brcms_c_rateset *rs_dflt;
3673
3674         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3675                 if (wlc->band->bandtype == BRCM_BAND_5G)
3676                         rs_dflt = &ofdm_mimo_rates;
3677                 else
3678                         rs_dflt = &cck_ofdm_mimo_rates;
3679         } else if (wlc->band->gmode)
3680                 rs_dflt = &cck_ofdm_rates;
3681         else
3682                 rs_dflt = &cck_rates;
3683
3684         return rs_dflt;
3685 }
3686
3687 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3688 {
3689         const struct brcms_c_rateset *rs_dflt;
3690         struct brcms_c_rateset rs;
3691         u8 rate, basic_rate;
3692         uint i;
3693
3694         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3695
3696         brcms_c_rateset_copy(rs_dflt, &rs);
3697         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3698
3699         /* walk the phy rate table and update SHM basic rate lookup table */
3700         for (i = 0; i < rs.count; i++) {
3701                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3702
3703                 /* for a given rate brcms_basic_rate returns the rate at
3704                  * which a response ACK/CTS should be sent.
3705                  */
3706                 basic_rate = brcms_basic_rate(wlc, rate);
3707                 if (basic_rate == 0)
3708                         /* This should only happen if we are using a
3709                          * restricted rateset.
3710                          */
3711                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3712
3713                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3714         }
3715 }
3716
3717 /* band-specific init */
3718 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3719 {
3720         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3721                  wlc->pub->unit, wlc->band->bandunit);
3722
3723         /* write ucode ACK/CTS rate table */
3724         brcms_c_set_ratetable(wlc);
3725
3726         /* update some band specific mac configuration */
3727         brcms_c_ucode_mac_upd(wlc);
3728
3729         /* init antenna selection */
3730         brcms_c_antsel_init(wlc->asi);
3731
3732 }
3733
3734 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3735 static int
3736 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3737                    bool writeToShm)
3738 {
3739         int idle_busy_ratio_x_16 = 0;
3740         uint offset =
3741             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3742             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3743         if (duty_cycle > 100 || duty_cycle < 0) {
3744                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3745                           wlc->pub->unit);
3746                 return -EINVAL;
3747         }
3748         if (duty_cycle)
3749                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3750         /* Only write to shared memory  when wl is up */
3751         if (writeToShm)
3752                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3753
3754         if (isOFDM)
3755                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3756         else
3757                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3758
3759         return 0;
3760 }
3761
3762 /*
3763  * Initialize the base precedence map for dequeueing
3764  * from txq based on WME settings
3765  */
3766 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3767 {
3768         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3769         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3770
3771         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3772         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3773         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3774         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3775 }
3776
3777 static void
3778 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3779                              struct brcms_txq_info *qi, bool on, int prio)
3780 {
3781         /* transmit flowcontrol is not yet implemented */
3782 }
3783
3784 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3785 {
3786         struct brcms_txq_info *qi;
3787
3788         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3789                 if (qi->stopped) {
3790                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3791                         qi->stopped = 0;
3792                 }
3793         }
3794 }
3795
3796 /* push sw hps and wake state through hardware */
3797 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3798 {
3799         u32 v1, v2;
3800         bool hps;
3801         bool awake_before;
3802
3803         hps = brcms_c_ps_allowed(wlc);
3804
3805         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3806
3807         v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3808         v2 = MCTL_WAKE;
3809         if (hps)
3810                 v2 |= MCTL_HPS;
3811
3812         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3813
3814         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3815
3816         if (!awake_before)
3817                 brcms_b_wait_for_wake(wlc->hw);
3818 }
3819
3820 /*
3821  * Write this BSS config's MAC address to core.
3822  * Updates RXE match engine.
3823  */
3824 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3825 {
3826         int err = 0;
3827         struct brcms_c_info *wlc = bsscfg->wlc;
3828
3829         /* enter the MAC addr into the RXE match registers */
3830         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3831
3832         brcms_c_ampdu_macaddr_upd(wlc);
3833
3834         return err;
3835 }
3836
3837 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3838  * Updates RXE match engine.
3839  */
3840 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3841 {
3842         /* we need to update BSSID in RXE match registers */
3843         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3844 }
3845
3846 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3847 {
3848         wlc_hw->shortslot = shortslot;
3849
3850         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3851                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3852                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3853                 brcms_c_enable_mac(wlc_hw->wlc);
3854         }
3855 }
3856
3857 /*
3858  * Suspend the the MAC and update the slot timing
3859  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3860  */
3861 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3862 {
3863         /* use the override if it is set */
3864         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3865                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3866
3867         if (wlc->shortslot == shortslot)
3868                 return;
3869
3870         wlc->shortslot = shortslot;
3871
3872         brcms_b_set_shortslot(wlc->hw, shortslot);
3873 }
3874
3875 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3876 {
3877         if (wlc->home_chanspec != chanspec) {
3878                 wlc->home_chanspec = chanspec;
3879
3880                 if (wlc->bsscfg->associated)
3881                         wlc->bsscfg->current_bss->chanspec = chanspec;
3882         }
3883 }
3884
3885 void
3886 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3887                       bool mute_tx, struct txpwr_limits *txpwr)
3888 {
3889         uint bandunit;
3890
3891         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3892
3893         wlc_hw->chanspec = chanspec;
3894
3895         /* Switch bands if necessary */
3896         if (wlc_hw->_nbands > 1) {
3897                 bandunit = chspec_bandunit(chanspec);
3898                 if (wlc_hw->band->bandunit != bandunit) {
3899                         /* brcms_b_setband disables other bandunit,
3900                          *  use light band switch if not up yet
3901                          */
3902                         if (wlc_hw->up) {
3903                                 wlc_phy_chanspec_radio_set(wlc_hw->
3904                                                            bandstate[bandunit]->
3905                                                            pi, chanspec);
3906                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3907                         } else {
3908                                 brcms_c_setxband(wlc_hw, bandunit);
3909                         }
3910                 }
3911         }
3912
3913         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3914
3915         if (!wlc_hw->up) {
3916                 if (wlc_hw->clk)
3917                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3918                                                   chanspec);
3919                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3920         } else {
3921                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3922                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3923
3924                 /* Update muting of the channel */
3925                 brcms_b_mute(wlc_hw, mute_tx);
3926         }
3927 }
3928
3929 /* switch to and initialize new band */
3930 static void brcms_c_setband(struct brcms_c_info *wlc,
3931                                            uint bandunit)
3932 {
3933         wlc->band = wlc->bandstate[bandunit];
3934
3935         if (!wlc->pub->up)
3936                 return;
3937
3938         /* wait for at least one beacon before entering sleeping state */
3939         brcms_c_set_ps_ctrl(wlc);
3940
3941         /* band-specific initializations */
3942         brcms_c_bsinit(wlc);
3943 }
3944
3945 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3946 {
3947         uint bandunit;
3948         bool switchband = false;
3949         u16 old_chanspec = wlc->chanspec;
3950
3951         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3952                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3953                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3954                 return;
3955         }
3956
3957         /* Switch bands if necessary */
3958         if (wlc->pub->_nbands > 1) {
3959                 bandunit = chspec_bandunit(chanspec);
3960                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3961                         switchband = true;
3962                         if (wlc->bandlocked) {
3963                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3964                                           "band is locked!\n",
3965                                           wlc->pub->unit, __func__,
3966                                           CHSPEC_CHANNEL(chanspec));
3967                                 return;
3968                         }
3969                         /*
3970                          * should the setband call come after the
3971                          * brcms_b_chanspec() ? if the setband updates
3972                          * (brcms_c_bsinit) use low level calls to inspect and
3973                          * set state, the state inspected may be from the wrong
3974                          * band, or the following brcms_b_set_chanspec() may
3975                          * undo the work.
3976                          */
3977                         brcms_c_setband(wlc, bandunit);
3978                 }
3979         }
3980
3981         /* sync up phy/radio chanspec */
3982         brcms_c_set_phy_chanspec(wlc, chanspec);
3983
3984         /* init antenna selection */
3985         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3986                 brcms_c_antsel_init(wlc->asi);
3987
3988                 /* Fix the hardware rateset based on bw.
3989                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3990                  */
3991                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3992                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3993         }
3994
3995         /* update some mac configuration since chanspec changed */
3996         brcms_c_ucode_mac_upd(wlc);
3997 }
3998
3999 /*
4000  * This function changes the phytxctl for beacon based on current
4001  * beacon ratespec AND txant setting as per this table:
4002  *  ratespec     CCK            ant = wlc->stf->txant
4003  *              OFDM            ant = 3
4004  */
4005 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4006                                        u32 bcn_rspec)
4007 {
4008         u16 phyctl;
4009         u16 phytxant = wlc->stf->phytxant;
4010         u16 mask = PHY_TXC_ANT_MASK;
4011
4012         /* for non-siso rates or default setting, use the available chains */
4013         if (BRCMS_PHY_11N_CAP(wlc->band))
4014                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4015
4016         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4017         phyctl = (phyctl & ~mask) | phytxant;
4018         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4019 }
4020
4021 /*
4022  * centralized protection config change function to simplify debugging, no
4023  * consistency checking this should be called only on changes to avoid overhead
4024  * in periodic function
4025  */
4026 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4027 {
4028         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4029
4030         switch (idx) {
4031         case BRCMS_PROT_G_SPEC:
4032                 wlc->protection->_g = (bool) val;
4033                 break;
4034         case BRCMS_PROT_G_OVR:
4035                 wlc->protection->g_override = (s8) val;
4036                 break;
4037         case BRCMS_PROT_G_USER:
4038                 wlc->protection->gmode_user = (u8) val;
4039                 break;
4040         case BRCMS_PROT_OVERLAP:
4041                 wlc->protection->overlap = (s8) val;
4042                 break;
4043         case BRCMS_PROT_N_USER:
4044                 wlc->protection->nmode_user = (s8) val;
4045                 break;
4046         case BRCMS_PROT_N_CFG:
4047                 wlc->protection->n_cfg = (s8) val;
4048                 break;
4049         case BRCMS_PROT_N_CFG_OVR:
4050                 wlc->protection->n_cfg_override = (s8) val;
4051                 break;
4052         case BRCMS_PROT_N_NONGF:
4053                 wlc->protection->nongf = (bool) val;
4054                 break;
4055         case BRCMS_PROT_N_NONGF_OVR:
4056                 wlc->protection->nongf_override = (s8) val;
4057                 break;
4058         case BRCMS_PROT_N_PAM_OVR:
4059                 wlc->protection->n_pam_override = (s8) val;
4060                 break;
4061         case BRCMS_PROT_N_OBSS:
4062                 wlc->protection->n_obss = (bool) val;
4063                 break;
4064
4065         default:
4066                 break;
4067         }
4068
4069 }
4070
4071 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4072 {
4073         if (wlc->pub->up) {
4074                 brcms_c_update_beacon(wlc);
4075                 brcms_c_update_probe_resp(wlc, true);
4076         }
4077 }
4078
4079 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4080 {
4081         wlc->stf->ldpc = val;
4082
4083         if (wlc->pub->up) {
4084                 brcms_c_update_beacon(wlc);
4085                 brcms_c_update_probe_resp(wlc, true);
4086                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4087         }
4088 }
4089
4090 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4091                        const struct ieee80211_tx_queue_params *params,
4092                        bool suspend)
4093 {
4094         int i;
4095         struct shm_acparams acp_shm;
4096         u16 *shm_entry;
4097
4098         /* Only apply params if the core is out of reset and has clocks */
4099         if (!wlc->clk) {
4100                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4101                           __func__);
4102                 return;
4103         }
4104
4105         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4106         /* fill in shm ac params struct */
4107         acp_shm.txop = params->txop;
4108         /* convert from units of 32us to us for ucode */
4109         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4110             EDCF_TXOP2USEC(acp_shm.txop);
4111         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4112
4113         if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4114             && acp_shm.aifs < EDCF_AIFSN_MAX)
4115                 acp_shm.aifs++;
4116
4117         if (acp_shm.aifs < EDCF_AIFSN_MIN
4118             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4119                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4120                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4121         } else {
4122                 acp_shm.cwmin = params->cw_min;
4123                 acp_shm.cwmax = params->cw_max;
4124                 acp_shm.cwcur = acp_shm.cwmin;
4125                 acp_shm.bslots =
4126                         bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4127                         acp_shm.cwcur;
4128                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4129                 /* Indicate the new params to the ucode */
4130                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4131                                                   wme_ac2fifo[aci] *
4132                                                   M_EDCF_QLEN +
4133                                                   M_EDCF_STATUS_OFF));
4134                 acp_shm.status |= WME_STATUS_NEWAC;
4135
4136                 /* Fill in shm acparam table */
4137                 shm_entry = (u16 *) &acp_shm;
4138                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4139                         brcms_b_write_shm(wlc->hw,
4140                                           M_EDCF_QINFO +
4141                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4142                                           *shm_entry++);
4143         }
4144
4145         if (suspend) {
4146                 brcms_c_suspend_mac_and_wait(wlc);
4147                 brcms_c_enable_mac(wlc);
4148         }
4149 }
4150
4151 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4152 {
4153         u16 aci;
4154         int i_ac;
4155         struct ieee80211_tx_queue_params txq_pars;
4156         static const struct edcf_acparam default_edcf_acparams[] = {
4157                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4158                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4159                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4160                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4161         }; /* ucode needs these parameters during its initialization */
4162         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4163
4164         for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4165                 /* find out which ac this set of params applies to */
4166                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4167
4168                 /* fill in shm ac params struct */
4169                 txq_pars.txop = edcf_acp->TXOP;
4170                 txq_pars.aifs = edcf_acp->ACI;
4171
4172                 /* CWmin = 2^(ECWmin) - 1 */
4173                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4174                 /* CWmax = 2^(ECWmax) - 1 */
4175                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4176                                             >> EDCF_ECWMAX_SHIFT);
4177                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4178         }
4179
4180         if (suspend) {
4181                 brcms_c_suspend_mac_and_wait(wlc);
4182                 brcms_c_enable_mac(wlc);
4183         }
4184 }
4185
4186 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4187 {
4188         /* Don't start the timer if HWRADIO feature is disabled */
4189         if (wlc->radio_monitor)
4190                 return;
4191
4192         wlc->radio_monitor = true;
4193         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4194         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4195 }
4196
4197 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4198 {
4199         if (!wlc->radio_monitor)
4200                 return true;
4201
4202         wlc->radio_monitor = false;
4203         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4204         return brcms_del_timer(wlc->radio_timer);
4205 }
4206
4207 /* read hwdisable state and propagate to wlc flag */
4208 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4209 {
4210         if (wlc->pub->hw_off)
4211                 return;
4212
4213         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4214                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4215         else
4216                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4217 }
4218
4219 /* update hwradio status and return it */
4220 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4221 {
4222         brcms_c_radio_hwdisable_upd(wlc);
4223
4224         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4225                         true : false;
4226 }
4227
4228 /* periodical query hw radio button while driver is "down" */
4229 static void brcms_c_radio_timer(void *arg)
4230 {
4231         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4232
4233         if (brcms_deviceremoved(wlc)) {
4234                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4235                         __func__);
4236                 brcms_down(wlc->wl);
4237                 return;
4238         }
4239
4240         brcms_c_radio_hwdisable_upd(wlc);
4241 }
4242
4243 /* common low-level watchdog code */
4244 static void brcms_b_watchdog(void *arg)
4245 {
4246         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4247         struct brcms_hardware *wlc_hw = wlc->hw;
4248
4249         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4250
4251         if (!wlc_hw->up)
4252                 return;
4253
4254         /* increment second count */
4255         wlc_hw->now++;
4256
4257         /* Check for FIFO error interrupts */
4258         brcms_b_fifoerrors(wlc_hw);
4259
4260         /* make sure RX dma has buffers */
4261         dma_rxfill(wlc->hw->di[RX_FIFO]);
4262
4263         wlc_phy_watchdog(wlc_hw->band->pi);
4264 }
4265
4266 /* common watchdog code */
4267 static void brcms_c_watchdog(void *arg)
4268 {
4269         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4270
4271         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4272
4273         if (!wlc->pub->up)
4274                 return;
4275
4276         if (brcms_deviceremoved(wlc)) {
4277                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4278                           __func__);
4279                 brcms_down(wlc->wl);
4280                 return;
4281         }
4282
4283         /* increment second count */
4284         wlc->pub->now++;
4285
4286         brcms_c_radio_hwdisable_upd(wlc);
4287         /* if radio is disable, driver may be down, quit here */
4288         if (wlc->pub->radio_disabled)
4289                 return;
4290
4291         brcms_b_watchdog(wlc);
4292
4293         /*
4294          * occasionally sample mac stat counters to
4295          * detect 16-bit counter wrap
4296          */
4297         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4298                 brcms_c_statsupd(wlc);
4299
4300         if (BRCMS_ISNPHY(wlc->band) &&
4301             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4302              BRCMS_TEMPSENSE_PERIOD)) {
4303                 wlc->tempsense_lasttime = wlc->pub->now;
4304                 brcms_c_tempsense_upd(wlc);
4305         }
4306 }
4307
4308 static void brcms_c_watchdog_by_timer(void *arg)
4309 {
4310         brcms_c_watchdog(arg);
4311 }
4312
4313 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4314 {
4315         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4316                 wlc, "watchdog");
4317         if (!wlc->wdtimer) {
4318                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4319                           "failed\n", unit);
4320                 goto fail;
4321         }
4322
4323         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4324                 wlc, "radio");
4325         if (!wlc->radio_timer) {
4326                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4327                           "failed\n", unit);
4328                 goto fail;
4329         }
4330
4331         return true;
4332
4333  fail:
4334         return false;
4335 }
4336
4337 /*
4338  * Initialize brcms_c_info default values ...
4339  * may get overrides later in this function
4340  */
4341 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4342 {
4343         int i;
4344
4345         /* Save our copy of the chanspec */
4346         wlc->chanspec = ch20mhz_chspec(1);
4347
4348         /* various 802.11g modes */
4349         wlc->shortslot = false;
4350         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4351
4352         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4353         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4354
4355         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4356                                BRCMS_PROTECTION_AUTO);
4357         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4358         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4359                                BRCMS_PROTECTION_AUTO);
4360         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4361         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4362
4363         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4364                                BRCMS_PROTECTION_CTL_OVERLAP);
4365
4366         /* 802.11g draft 4.0 NonERP elt advertisement */
4367         wlc->include_legacy_erp = true;
4368
4369         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4370         wlc->stf->txant = ANT_TX_DEF;
4371
4372         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4373
4374         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4375         for (i = 0; i < NFIFO; i++)
4376                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4377         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4378
4379         /* default rate fallback retry limits */
4380         wlc->SFBL = RETRY_SHORT_FB;
4381         wlc->LFBL = RETRY_LONG_FB;
4382
4383         /* default mac retry limits */
4384         wlc->SRL = RETRY_SHORT_DEF;
4385         wlc->LRL = RETRY_LONG_DEF;
4386
4387         /* WME QoS mode is Auto by default */
4388         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4389         wlc->pub->bcmerror = 0;
4390 }
4391
4392 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4393 {
4394         uint err = 0;
4395         uint unit;
4396         unit = wlc->pub->unit;
4397
4398         wlc->asi = brcms_c_antsel_attach(wlc);
4399         if (wlc->asi == NULL) {
4400                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4401                           "failed\n", unit);
4402                 err = 44;
4403                 goto fail;
4404         }
4405
4406         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4407         if (wlc->ampdu == NULL) {
4408                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4409                           "failed\n", unit);
4410                 err = 50;
4411                 goto fail;
4412         }
4413
4414         if ((brcms_c_stf_attach(wlc) != 0)) {
4415                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4416                           "failed\n", unit);
4417                 err = 68;
4418                 goto fail;
4419         }
4420  fail:
4421         return err;
4422 }
4423
4424 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4425 {
4426         return wlc->pub;
4427 }
4428
4429 /* low level attach
4430  *    run backplane attach, init nvram
4431  *    run phy attach
4432  *    initialize software state for each core and band
4433  *    put the whole chip in reset(driver down state), no clock
4434  */
4435 static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4436                           uint unit, bool piomode)
4437 {
4438         struct brcms_hardware *wlc_hw;
4439         char *macaddr = NULL;
4440         uint err = 0;
4441         uint j;
4442         bool wme = false;
4443         struct shared_phy_params sha_params;
4444         struct wiphy *wiphy = wlc->wiphy;
4445         struct pci_dev *pcidev = core->bus->host_pci;
4446
4447         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4448                pcidev->vendor,
4449                pcidev->device);
4450
4451         wme = true;
4452
4453         wlc_hw = wlc->hw;
4454         wlc_hw->wlc = wlc;
4455         wlc_hw->unit = unit;
4456         wlc_hw->band = wlc_hw->bandstate[0];
4457         wlc_hw->_piomode = piomode;
4458
4459         /* populate struct brcms_hardware with default values  */
4460         brcms_b_info_init(wlc_hw);
4461
4462         /*
4463          * Do the hardware portion of the attach. Also initialize software
4464          * state that depends on the particular hardware we are running.
4465          */
4466         wlc_hw->sih = ai_attach(core->bus);
4467         if (wlc_hw->sih == NULL) {
4468                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4469                           unit);
4470                 err = 11;
4471                 goto fail;
4472         }
4473
4474         /* verify again the device is supported */
4475         if (!brcms_c_chipmatch(pcidev->vendor, pcidev->device)) {
4476                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4477                         "vendor/device (0x%x/0x%x)\n",
4478                          unit, pcidev->vendor, pcidev->device);
4479                 err = 12;
4480                 goto fail;
4481         }
4482
4483         wlc_hw->vendorid = pcidev->vendor;
4484         wlc_hw->deviceid = pcidev->device;
4485
4486         wlc_hw->d11core = core;
4487         wlc_hw->corerev = core->id.rev;
4488
4489         /* validate chip, chiprev and corerev */
4490         if (!brcms_c_isgoodchip(wlc_hw)) {
4491                 err = 13;
4492                 goto fail;
4493         }
4494
4495         /* initialize power control registers */
4496         ai_clkctl_init(wlc_hw->sih);
4497
4498         /* request fastclock and force fastclock for the rest of attach
4499          * bring the d11 core out of reset.
4500          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4501          *   is still false; But it will be called again inside wlc_corereset,
4502          *   after d11 is out of reset.
4503          */
4504         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4505         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4506
4507         if (!brcms_b_validate_chip_access(wlc_hw)) {
4508                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4509                         "failed\n", unit);
4510                 err = 14;
4511                 goto fail;
4512         }
4513
4514         /* get the board rev, used just below */
4515         j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4516         /* promote srom boardrev of 0xFF to 1 */
4517         if (j == BOARDREV_PROMOTABLE)
4518                 j = BOARDREV_PROMOTED;
4519         wlc_hw->boardrev = (u16) j;
4520         if (!brcms_c_validboardtype(wlc_hw)) {
4521                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4522                           "board type (0x%x)" " or revision level (0x%x)\n",
4523                           unit, ai_get_boardtype(wlc_hw->sih),
4524                           wlc_hw->boardrev);
4525                 err = 15;
4526                 goto fail;
4527         }
4528         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4529         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4530                                              BRCMS_SROM_BOARDFLAGS);
4531         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4532                                               BRCMS_SROM_BOARDFLAGS2);
4533
4534         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4535                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4536
4537         /* check device id(srom, nvram etc.) to set bands */
4538         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4539             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4540                 /* Dualband boards */
4541                 wlc_hw->_nbands = 2;
4542         else
4543                 wlc_hw->_nbands = 1;
4544
4545         if ((ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
4546                 wlc_hw->_nbands = 1;
4547
4548         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4549          * unconditionally does the init of these values
4550          */
4551         wlc->vendorid = wlc_hw->vendorid;
4552         wlc->deviceid = wlc_hw->deviceid;
4553         wlc->pub->sih = wlc_hw->sih;
4554         wlc->pub->corerev = wlc_hw->corerev;
4555         wlc->pub->sromrev = wlc_hw->sromrev;
4556         wlc->pub->boardrev = wlc_hw->boardrev;
4557         wlc->pub->boardflags = wlc_hw->boardflags;
4558         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4559         wlc->pub->_nbands = wlc_hw->_nbands;
4560
4561         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4562
4563         if (wlc_hw->physhim == NULL) {
4564                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4565                         "failed\n", unit);
4566                 err = 25;
4567                 goto fail;
4568         }
4569
4570         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4571         sha_params.sih = wlc_hw->sih;
4572         sha_params.physhim = wlc_hw->physhim;
4573         sha_params.unit = unit;
4574         sha_params.corerev = wlc_hw->corerev;
4575         sha_params.vid = wlc_hw->vendorid;
4576         sha_params.did = wlc_hw->deviceid;
4577         sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4578         sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4579         sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4580         sha_params.sromrev = wlc_hw->sromrev;
4581         sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4582         sha_params.boardrev = wlc_hw->boardrev;
4583         sha_params.boardflags = wlc_hw->boardflags;
4584         sha_params.boardflags2 = wlc_hw->boardflags2;
4585
4586         /* alloc and save pointer to shared phy state area */
4587         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4588         if (!wlc_hw->phy_sh) {
4589                 err = 16;
4590                 goto fail;
4591         }
4592
4593         /* initialize software state for each core and band */
4594         for (j = 0; j < wlc_hw->_nbands; j++) {
4595                 /*
4596                  * band0 is always 2.4Ghz
4597                  * band1, if present, is 5Ghz
4598                  */
4599
4600                 brcms_c_setxband(wlc_hw, j);
4601
4602                 wlc_hw->band->bandunit = j;
4603                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4604                 wlc->band->bandunit = j;
4605                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4606                 wlc->core->coreidx = core->core_index;
4607
4608                 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4609                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4610
4611                 /* init tx fifo size */
4612                 wlc_hw->xmtfifo_sz =
4613                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4614
4615                 /* Get a phy for this band */
4616                 wlc_hw->band->pi =
4617                         wlc_phy_attach(wlc_hw->phy_sh, core,
4618                                        wlc_hw->band->bandtype,
4619                                        wlc->wiphy);
4620                 if (wlc_hw->band->pi == NULL) {
4621                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4622                                   "attach failed\n", unit);
4623                         err = 17;
4624                         goto fail;
4625                 }
4626
4627                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4628
4629                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4630                                        &wlc_hw->band->phyrev,
4631                                        &wlc_hw->band->radioid,
4632                                        &wlc_hw->band->radiorev);
4633                 wlc_hw->band->abgphy_encore =
4634                     wlc_phy_get_encore(wlc_hw->band->pi);
4635                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4636                 wlc_hw->band->core_flags =
4637                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4638
4639                 /* verify good phy_type & supported phy revision */
4640                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4641                         if (NCONF_HAS(wlc_hw->band->phyrev))
4642                                 goto good_phy;
4643                         else
4644                                 goto bad_phy;
4645                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4646                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4647                                 goto good_phy;
4648                         else
4649                                 goto bad_phy;
4650                 } else {
4651  bad_phy:
4652                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4653                                   "phy type/rev (%d/%d)\n", unit,
4654                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4655                         err = 18;
4656                         goto fail;
4657                 }
4658
4659  good_phy:
4660                 /*
4661                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4662                  * be done in the high level attach. However we can not make
4663                  * that change until all low level access is changed to
4664                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4665                  * keeping wlc_hw->band->pi as well for incremental update of
4666                  * low level fns, and cut over low only init when all fns
4667                  * updated.
4668                  */
4669                 wlc->band->pi = wlc_hw->band->pi;
4670                 wlc->band->phytype = wlc_hw->band->phytype;
4671                 wlc->band->phyrev = wlc_hw->band->phyrev;
4672                 wlc->band->radioid = wlc_hw->band->radioid;
4673                 wlc->band->radiorev = wlc_hw->band->radiorev;
4674
4675                 /* default contention windows size limits */
4676                 wlc_hw->band->CWmin = APHY_CWMIN;
4677                 wlc_hw->band->CWmax = PHY_CWMAX;
4678
4679                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4680                         err = 19;
4681                         goto fail;
4682                 }
4683         }
4684
4685         /* disable core to match driver "down" state */
4686         brcms_c_coredisable(wlc_hw);
4687
4688         /* Match driver "down" state */
4689         ai_pci_down(wlc_hw->sih);
4690
4691         /* turn off pll and xtal to match driver "down" state */
4692         brcms_b_xtal(wlc_hw, OFF);
4693
4694         /* *******************************************************************
4695          * The hardware is in the DOWN state at this point. D11 core
4696          * or cores are in reset with clocks off, and the board PLLs
4697          * are off if possible.
4698          *
4699          * Beyond this point, wlc->sbclk == false and chip registers
4700          * should not be touched.
4701          *********************************************************************
4702          */
4703
4704         /* init etheraddr state variables */
4705         macaddr = brcms_c_get_macaddr(wlc_hw);
4706         if (macaddr == NULL) {
4707                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4708                           unit);
4709                 err = 21;
4710                 goto fail;
4711         }
4712         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4713             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4714             is_zero_ether_addr(wlc_hw->etheraddr)) {
4715                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4716                           unit, macaddr);
4717                 err = 22;
4718                 goto fail;
4719         }
4720
4721         BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4722                wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih),
4723                macaddr);
4724
4725         return err;
4726
4727  fail:
4728         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4729                   err);
4730         return err;
4731 }
4732
4733 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4734 {
4735         uint unit;
4736         unit = wlc->pub->unit;
4737
4738         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4739                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4740                 wlc->band->antgain = 8;
4741         } else if (wlc->band->antgain == -1) {
4742                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4743                           " srom, using 2dB\n", unit, __func__);
4744                 wlc->band->antgain = 8;
4745         } else {
4746                 s8 gain, fract;
4747                 /* Older sroms specified gain in whole dbm only.  In order
4748                  * be able to specify qdbm granularity and remain backward
4749                  * compatible the whole dbms are now encoded in only
4750                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4751                  * 6 bit signed number ranges from -32 - 31.
4752                  *
4753                  * Examples:
4754                  * 0x1 = 1 db,
4755                  * 0xc1 = 1.75 db (1 + 3 quarters),
4756                  * 0x3f = -1 (-1 + 0 quarters),
4757                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4758                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4759                  */
4760                 gain = wlc->band->antgain & 0x3f;
4761                 gain <<= 2;     /* Sign extend */
4762                 gain >>= 2;
4763                 fract = (wlc->band->antgain & 0xc0) >> 6;
4764                 wlc->band->antgain = 4 * gain + fract;
4765         }
4766 }
4767
4768 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4769 {
4770         int aa;
4771         uint unit;
4772         int bandtype;
4773         struct si_pub *sih = wlc->hw->sih;
4774
4775         unit = wlc->pub->unit;
4776         bandtype = wlc->band->bandtype;
4777
4778         /* get antennas available */
4779         if (bandtype == BRCM_BAND_5G)
4780                 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4781         else
4782                 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4783
4784         if ((aa < 1) || (aa > 15)) {
4785                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4786                           " srom (0x%x), using 3\n", unit, __func__, aa);
4787                 aa = 3;
4788         }
4789
4790         /* reset the defaults if we have a single antenna */
4791         if (aa == 1) {
4792                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4793                 wlc->stf->txant = ANT_TX_FORCE_0;
4794         } else if (aa == 2) {
4795                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4796                 wlc->stf->txant = ANT_TX_FORCE_1;
4797         } else {
4798         }
4799
4800         /* Compute Antenna Gain */
4801         if (bandtype == BRCM_BAND_5G)
4802                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4803         else
4804                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4805
4806         brcms_c_attach_antgain_init(wlc);
4807
4808         return true;
4809 }
4810
4811 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4812 {
4813         u16 chanspec;
4814         struct brcms_band *band;
4815         struct brcms_bss_info *bi = wlc->default_bss;
4816
4817         /* init default and target BSS with some sane initial values */
4818         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4819         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4820
4821         /* fill the default channel as the first valid channel
4822          * starting from the 2G channels
4823          */
4824         chanspec = ch20mhz_chspec(1);
4825         wlc->home_chanspec = bi->chanspec = chanspec;
4826
4827         /* find the band of our default channel */
4828         band = wlc->band;
4829         if (wlc->pub->_nbands > 1 &&
4830             band->bandunit != chspec_bandunit(chanspec))
4831                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4832
4833         /* init bss rates to the band specific default rate set */
4834         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4835                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4836                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4837                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4838
4839         if (wlc->pub->_n_enab & SUPPORT_11N)
4840                 bi->flags |= BRCMS_BSS_HT;
4841 }
4842
4843 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4844 {
4845         struct brcms_txq_info *qi, *p;
4846
4847         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4848         if (qi != NULL) {
4849                 /*
4850                  * Have enough room for control packets along with HI watermark
4851                  * Also, add room to txq for total psq packets if all the SCBs
4852                  * leave PS mode. The watermark for flowcontrol to OS packets
4853                  * will remain the same
4854                  */
4855                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4856                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4857
4858                 /* add this queue to the the global list */
4859                 p = wlc->tx_queues;
4860                 if (p == NULL) {
4861                         wlc->tx_queues = qi;
4862                 } else {
4863                         while (p->next != NULL)
4864                                 p = p->next;
4865                         p->next = qi;
4866                 }
4867         }
4868         return qi;
4869 }
4870
4871 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4872                              struct brcms_txq_info *qi)
4873 {
4874         struct brcms_txq_info *p;
4875
4876         if (qi == NULL)
4877                 return;
4878
4879         /* remove the queue from the linked list */
4880         p = wlc->tx_queues;
4881         if (p == qi)
4882                 wlc->tx_queues = p->next;
4883         else {
4884                 while (p != NULL && p->next != qi)
4885                         p = p->next;
4886                 if (p != NULL)
4887                         p->next = p->next->next;
4888         }
4889
4890         kfree(qi);
4891 }
4892
4893 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4894 {
4895         uint i;
4896         struct brcms_band *band;
4897
4898         for (i = 0; i < wlc->pub->_nbands; i++) {
4899                 band = wlc->bandstate[i];
4900                 if (band->bandtype == BRCM_BAND_5G) {
4901                         if ((bwcap == BRCMS_N_BW_40ALL)
4902                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4903                                 band->mimo_cap_40 = true;
4904                         else
4905                                 band->mimo_cap_40 = false;
4906                 } else {
4907                         if (bwcap == BRCMS_N_BW_40ALL)
4908                                 band->mimo_cap_40 = true;
4909                         else
4910                                 band->mimo_cap_40 = false;
4911                 }
4912         }
4913 }
4914
4915 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4916 {
4917         /* free timer state */
4918         if (wlc->wdtimer) {
4919                 brcms_free_timer(wlc->wdtimer);
4920                 wlc->wdtimer = NULL;
4921         }
4922         if (wlc->radio_timer) {
4923                 brcms_free_timer(wlc->radio_timer);
4924                 wlc->radio_timer = NULL;
4925         }
4926 }
4927
4928 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4929 {
4930         if (wlc->asi) {
4931                 brcms_c_antsel_detach(wlc->asi);
4932                 wlc->asi = NULL;
4933         }
4934
4935         if (wlc->ampdu) {
4936                 brcms_c_ampdu_detach(wlc->ampdu);
4937                 wlc->ampdu = NULL;
4938         }
4939
4940         brcms_c_stf_detach(wlc);
4941 }
4942
4943 /*
4944  * low level detach
4945  */
4946 static int brcms_b_detach(struct brcms_c_info *wlc)
4947 {
4948         uint i;
4949         struct brcms_hw_band *band;
4950         struct brcms_hardware *wlc_hw = wlc->hw;
4951         int callbacks;
4952
4953         callbacks = 0;
4954
4955         if (wlc_hw->sih) {
4956                 /*
4957                  * detach interrupt sync mechanism since interrupt is disabled
4958                  * and per-port interrupt object may has been freed. this must
4959                  * be done before sb core switch
4960                  */
4961                 ai_pci_sleep(wlc_hw->sih);
4962         }
4963
4964         brcms_b_detach_dmapio(wlc_hw);
4965
4966         band = wlc_hw->band;
4967         for (i = 0; i < wlc_hw->_nbands; i++) {
4968                 if (band->pi) {
4969                         /* Detach this band's phy */
4970                         wlc_phy_detach(band->pi);
4971                         band->pi = NULL;
4972                 }
4973                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4974         }
4975
4976         /* Free shared phy state */
4977         kfree(wlc_hw->phy_sh);
4978
4979         wlc_phy_shim_detach(wlc_hw->physhim);
4980
4981         if (wlc_hw->sih) {
4982                 ai_detach(wlc_hw->sih);
4983                 wlc_hw->sih = NULL;
4984         }
4985
4986         return callbacks;
4987
4988 }
4989
4990 /*
4991  * Return a count of the number of driver callbacks still pending.
4992  *
4993  * General policy is that brcms_c_detach can only dealloc/free software states.
4994  * It can NOT touch hardware registers since the d11core may be in reset and
4995  * clock may not be available.
4996  * One exception is sb register access, which is possible if crystal is turned
4997  * on after "down" state, driver should avoid software timer with the exception
4998  * of radio_monitor.
4999  */
5000 uint brcms_c_detach(struct brcms_c_info *wlc)
5001 {
5002         uint callbacks = 0;
5003
5004         if (wlc == NULL)
5005                 return 0;
5006
5007         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5008
5009         callbacks += brcms_b_detach(wlc);
5010
5011         /* delete software timers */
5012         if (!brcms_c_radio_monitor_stop(wlc))
5013                 callbacks++;
5014
5015         brcms_c_channel_mgr_detach(wlc->cmi);
5016
5017         brcms_c_timers_deinit(wlc);
5018
5019         brcms_c_detach_module(wlc);
5020
5021
5022         while (wlc->tx_queues != NULL)
5023                 brcms_c_txq_free(wlc, wlc->tx_queues);
5024
5025         brcms_c_detach_mfree(wlc);
5026         return callbacks;
5027 }
5028
5029 /* update state that depends on the current value of "ap" */
5030 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5031 {
5032         /* STA-BSS; short capable */
5033         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5034 }
5035
5036 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5037 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5038 {
5039         if (wlc_hw->wlc->pub->hw_up)
5040                 return;
5041
5042         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5043
5044         /*
5045          * Enable pll and xtal, initialize the power control registers,
5046          * and force fastclock for the remainder of brcms_c_up().
5047          */
5048         brcms_b_xtal(wlc_hw, ON);
5049         ai_clkctl_init(wlc_hw->sih);
5050         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5051
5052         ai_pci_fixcfg(wlc_hw->sih);
5053
5054         /*
5055          * TODO: test suspend/resume
5056          *
5057          * AI chip doesn't restore bar0win2 on
5058          * hibernation/resume, need sw fixup
5059          */
5060
5061         /*
5062          * Inform phy that a POR reset has occurred so
5063          * it does a complete phy init
5064          */
5065         wlc_phy_por_inform(wlc_hw->band->pi);
5066
5067         wlc_hw->ucode_loaded = false;
5068         wlc_hw->wlc->pub->hw_up = true;
5069
5070         if ((wlc_hw->boardflags & BFL_FEM)
5071             && (ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
5072                 if (!
5073                     (wlc_hw->boardrev >= 0x1250
5074                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5075                         ai_epa_4313war(wlc_hw->sih);
5076         }
5077 }
5078
5079 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5080 {
5081         uint coremask;
5082
5083         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5084
5085         /*
5086          * Enable pll and xtal, initialize the power control registers,
5087          * and force fastclock for the remainder of brcms_c_up().
5088          */
5089         brcms_b_xtal(wlc_hw, ON);
5090         ai_clkctl_init(wlc_hw->sih);
5091         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5092
5093         /*
5094          * Configure pci/pcmcia here instead of in brcms_c_attach()
5095          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5096          */
5097         coremask = (1 << wlc_hw->wlc->core->coreidx);
5098
5099         ai_pci_setup(wlc_hw->sih, coremask);
5100
5101         /*
5102          * Need to read the hwradio status here to cover the case where the
5103          * system is loaded with the hw radio disabled. We do not want to
5104          * bring the driver up in this case.
5105          */
5106         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5107                 /* put SB PCI in down state again */
5108                 ai_pci_down(wlc_hw->sih);
5109                 brcms_b_xtal(wlc_hw, OFF);
5110                 return -ENOMEDIUM;
5111         }
5112
5113         ai_pci_up(wlc_hw->sih);
5114
5115         /* reset the d11 core */
5116         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5117
5118         return 0;
5119 }
5120
5121 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5122 {
5123         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5124
5125         wlc_hw->up = true;
5126         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5127
5128         /* FULLY enable dynamic power control and d11 core interrupt */
5129         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5130         brcms_intrson(wlc_hw->wlc->wl);
5131         return 0;
5132 }
5133
5134 /*
5135  * Write WME tunable parameters for retransmit/max rate
5136  * from wlc struct to ucode
5137  */
5138 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5139 {
5140         int ac;
5141
5142         /* Need clock to do this */
5143         if (!wlc->clk)
5144                 return;
5145
5146         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5147                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5148                                   wlc->wme_retries[ac]);
5149 }
5150
5151 /* make interface operational */
5152 int brcms_c_up(struct brcms_c_info *wlc)
5153 {
5154         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5155
5156         /* HW is turned off so don't try to access it */
5157         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5158                 return -ENOMEDIUM;
5159
5160         if (!wlc->pub->hw_up) {
5161                 brcms_b_hw_up(wlc->hw);
5162                 wlc->pub->hw_up = true;
5163         }
5164
5165         if ((wlc->pub->boardflags & BFL_FEM)
5166             && (ai_get_chip_id(wlc->hw->sih) == BCM4313_CHIP_ID)) {
5167                 if (wlc->pub->boardrev >= 0x1250
5168                     && (wlc->pub->boardflags & BFL_FEM_BT))
5169                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5170                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5171                 else
5172                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5173                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5174         }
5175
5176         /*
5177          * Need to read the hwradio status here to cover the case where the
5178          * system is loaded with the hw radio disabled. We do not want to bring
5179          * the driver up in this case. If radio is disabled, abort up, lower
5180          * power, start radio timer and return 0(for NDIS) don't call
5181          * radio_update to avoid looping brcms_c_up.
5182          *
5183          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5184          */
5185         if (!wlc->pub->radio_disabled) {
5186                 int status = brcms_b_up_prep(wlc->hw);
5187                 if (status == -ENOMEDIUM) {
5188                         if (!mboolisset
5189                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5190                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5191                                 mboolset(wlc->pub->radio_disabled,
5192                                          WL_RADIO_HW_DISABLE);
5193
5194                                 if (bsscfg->enable && bsscfg->BSS)
5195                                         wiphy_err(wlc->wiphy, "wl%d: up"
5196                                                   ": rfdisable -> "
5197                                                   "bsscfg_disable()\n",
5198                                                    wlc->pub->unit);
5199                         }
5200                 }
5201         }
5202
5203         if (wlc->pub->radio_disabled) {
5204                 brcms_c_radio_monitor_start(wlc);
5205                 return 0;
5206         }
5207
5208         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5209         wlc->clk = true;
5210
5211         brcms_c_radio_monitor_stop(wlc);
5212
5213         /* Set EDCF hostflags */
5214         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5215
5216         brcms_init(wlc->wl);
5217         wlc->pub->up = true;
5218
5219         if (wlc->bandinit_pending) {
5220                 brcms_c_suspend_mac_and_wait(wlc);
5221                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5222                 wlc->bandinit_pending = false;
5223                 brcms_c_enable_mac(wlc);
5224         }
5225
5226         brcms_b_up_finish(wlc->hw);
5227
5228         /* Program the TX wme params with the current settings */
5229         brcms_c_wme_retries_write(wlc);
5230
5231         /* start one second watchdog timer */
5232         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5233         wlc->WDarmed = true;
5234
5235         /* ensure antenna config is up to date */
5236         brcms_c_stf_phy_txant_upd(wlc);
5237         /* ensure LDPC config is in sync */
5238         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5239
5240         return 0;
5241 }
5242
5243 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5244 {
5245         uint callbacks = 0;
5246
5247         return callbacks;
5248 }
5249
5250 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5251 {
5252         bool dev_gone;
5253         uint callbacks = 0;
5254
5255         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5256
5257         if (!wlc_hw->up)
5258                 return callbacks;
5259
5260         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5261
5262         /* disable interrupts */
5263         if (dev_gone)
5264                 wlc_hw->wlc->macintmask = 0;
5265         else {
5266                 /* now disable interrupts */
5267                 brcms_intrsoff(wlc_hw->wlc->wl);
5268
5269                 /* ensure we're running on the pll clock again */
5270                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5271         }
5272         /* down phy at the last of this stage */
5273         callbacks += wlc_phy_down(wlc_hw->band->pi);
5274
5275         return callbacks;
5276 }
5277
5278 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5279 {
5280         uint callbacks = 0;
5281         bool dev_gone;
5282
5283         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5284
5285         if (!wlc_hw->up)
5286                 return callbacks;
5287
5288         wlc_hw->up = false;
5289         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5290
5291         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5292
5293         if (dev_gone) {
5294                 wlc_hw->sbclk = false;
5295                 wlc_hw->clk = false;
5296                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5297
5298                 /* reclaim any posted packets */
5299                 brcms_c_flushqueues(wlc_hw->wlc);
5300         } else {
5301
5302                 /* Reset and disable the core */
5303                 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5304                         if (bcma_read32(wlc_hw->d11core,
5305                                         D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5306                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5307                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5308                         brcms_c_coredisable(wlc_hw);
5309                 }
5310
5311                 /* turn off primary xtal and pll */
5312                 if (!wlc_hw->noreset) {
5313                         ai_pci_down(wlc_hw->sih);
5314                         brcms_b_xtal(wlc_hw, OFF);
5315                 }
5316         }
5317
5318         return callbacks;
5319 }
5320
5321 /*
5322  * Mark the interface nonoperational, stop the software mechanisms,
5323  * disable the hardware, free any transient buffer state.
5324  * Return a count of the number of driver callbacks still pending.
5325  */
5326 uint brcms_c_down(struct brcms_c_info *wlc)
5327 {
5328
5329         uint callbacks = 0;
5330         int i;
5331         bool dev_gone = false;
5332         struct brcms_txq_info *qi;
5333
5334         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5335
5336         /* check if we are already in the going down path */
5337         if (wlc->going_down) {
5338                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5339                           "\n", wlc->pub->unit, __func__);
5340                 return 0;
5341         }
5342         if (!wlc->pub->up)
5343                 return callbacks;
5344
5345         wlc->going_down = true;
5346
5347         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5348
5349         dev_gone = brcms_deviceremoved(wlc);
5350
5351         /* Call any registered down handlers */
5352         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5353                 if (wlc->modulecb[i].down_fn)
5354                         callbacks +=
5355                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5356         }
5357
5358         /* cancel the watchdog timer */
5359         if (wlc->WDarmed) {
5360                 if (!brcms_del_timer(wlc->wdtimer))
5361                         callbacks++;
5362                 wlc->WDarmed = false;
5363         }
5364         /* cancel all other timers */
5365         callbacks += brcms_c_down_del_timer(wlc);
5366
5367         wlc->pub->up = false;
5368
5369         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5370
5371         /* clear txq flow control */
5372         brcms_c_txflowcontrol_reset(wlc);
5373
5374         /* flush tx queues */
5375         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5376                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5377
5378         callbacks += brcms_b_down_finish(wlc->hw);
5379
5380         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5381         wlc->clk = false;
5382
5383         wlc->going_down = false;
5384         return callbacks;
5385 }
5386
5387 /* Set the current gmode configuration */
5388 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5389 {
5390         int ret = 0;
5391         uint i;
5392         struct brcms_c_rateset rs;
5393         /* Default to 54g Auto */
5394         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5395         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5396         bool shortslot_restrict = false; /* Restrict association to stations
5397                                           * that support shortslot
5398                                           */
5399         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5400         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5401         int preamble = BRCMS_PLCP_LONG;
5402         bool preamble_restrict = false; /* Restrict association to stations
5403                                          * that support short preambles
5404                                          */
5405         struct brcms_band *band;
5406
5407         /* if N-support is enabled, allow Gmode set as long as requested
5408          * Gmode is not GMODE_LEGACY_B
5409          */
5410         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5411                 return -ENOTSUPP;
5412
5413         /* verify that we are dealing with 2G band and grab the band pointer */
5414         if (wlc->band->bandtype == BRCM_BAND_2G)
5415                 band = wlc->band;
5416         else if ((wlc->pub->_nbands > 1) &&
5417                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5418                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5419         else
5420                 return -EINVAL;
5421
5422         /* Legacy or bust when no OFDM is supported by regulatory */
5423         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5424              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5425                 return -EINVAL;
5426
5427         /* update configuration value */
5428         if (config)
5429                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5430
5431         /* Clear rateset override */
5432         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5433
5434         switch (gmode) {
5435         case GMODE_LEGACY_B:
5436                 shortslot = BRCMS_SHORTSLOT_OFF;
5437                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5438
5439                 break;
5440
5441         case GMODE_LRS:
5442                 break;
5443
5444         case GMODE_AUTO:
5445                 /* Accept defaults */
5446                 break;
5447
5448         case GMODE_ONLY:
5449                 ofdm_basic = true;
5450                 preamble = BRCMS_PLCP_SHORT;
5451                 preamble_restrict = true;
5452                 break;
5453
5454         case GMODE_PERFORMANCE:
5455                 shortslot = BRCMS_SHORTSLOT_ON;
5456                 shortslot_restrict = true;
5457                 ofdm_basic = true;
5458                 preamble = BRCMS_PLCP_SHORT;
5459                 preamble_restrict = true;
5460                 break;
5461
5462         default:
5463                 /* Error */
5464                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5465                           wlc->pub->unit, __func__, gmode);
5466                 return -ENOTSUPP;
5467         }
5468
5469         band->gmode = gmode;
5470
5471         wlc->shortslot_override = shortslot;
5472
5473         /* Use the default 11g rateset */
5474         if (!rs.count)
5475                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5476
5477         if (ofdm_basic) {
5478                 for (i = 0; i < rs.count; i++) {
5479                         if (rs.rates[i] == BRCM_RATE_6M
5480                             || rs.rates[i] == BRCM_RATE_12M
5481                             || rs.rates[i] == BRCM_RATE_24M)
5482                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5483                 }
5484         }
5485
5486         /* Set default bss rateset */
5487         wlc->default_bss->rateset.count = rs.count;
5488         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5489                sizeof(wlc->default_bss->rateset.rates));
5490
5491         return ret;
5492 }
5493
5494 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5495 {
5496         uint i;
5497         s32 nmode = AUTO;
5498
5499         if (wlc->stf->txstreams == WL_11N_3x3)
5500                 nmode = WL_11N_3x3;
5501         else
5502                 nmode = WL_11N_2x2;
5503
5504         /* force GMODE_AUTO if NMODE is ON */
5505         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5506         if (nmode == WL_11N_3x3)
5507                 wlc->pub->_n_enab = SUPPORT_HT;
5508         else
5509                 wlc->pub->_n_enab = SUPPORT_11N;
5510         wlc->default_bss->flags |= BRCMS_BSS_HT;
5511         /* add the mcs rates to the default and hw ratesets */
5512         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5513                               wlc->stf->txstreams);
5514         for (i = 0; i < wlc->pub->_nbands; i++)
5515                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5516                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5517
5518         return 0;
5519 }
5520
5521 static int
5522 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5523                              struct brcms_c_rateset *rs_arg)
5524 {
5525         struct brcms_c_rateset rs, new;
5526         uint bandunit;
5527
5528         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5529
5530         /* check for bad count value */
5531         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5532                 return -EINVAL;
5533
5534         /* try the current band */
5535         bandunit = wlc->band->bandunit;
5536         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5537         if (brcms_c_rate_hwrs_filter_sort_validate
5538             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5539              wlc->stf->txstreams))
5540                 goto good;
5541
5542         /* try the other band */
5543         if (brcms_is_mband_unlocked(wlc)) {
5544                 bandunit = OTHERBANDUNIT(wlc);
5545                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5546                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5547                                                        &wlc->
5548                                                        bandstate[bandunit]->
5549                                                        hw_rateset, true,
5550                                                        wlc->stf->txstreams))
5551                         goto good;
5552         }
5553
5554         return -EBADE;
5555
5556  good:
5557         /* apply new rateset */
5558         memcpy(&wlc->default_bss->rateset, &new,
5559                sizeof(struct brcms_c_rateset));
5560         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5561                sizeof(struct brcms_c_rateset));
5562         return 0;
5563 }
5564
5565 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5566 {
5567         u8 r;
5568         bool war = false;
5569
5570         if (wlc->bsscfg->associated)
5571                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5572         else
5573                 r = wlc->default_bss->rateset.rates[0];
5574
5575         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5576 }
5577
5578 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5579 {
5580         u16 chspec = ch20mhz_chspec(channel);
5581
5582         if (channel < 0 || channel > MAXCHANNEL)
5583                 return -EINVAL;
5584
5585         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5586                 return -EINVAL;
5587
5588
5589         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5590                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5591                         wlc->bandinit_pending = true;
5592                 else
5593                         wlc->bandinit_pending = false;
5594         }
5595
5596         wlc->default_bss->chanspec = chspec;
5597         /* brcms_c_BSSinit() will sanitize the rateset before
5598          * using it.. */
5599         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5600                 brcms_c_set_home_chanspec(wlc, chspec);
5601                 brcms_c_suspend_mac_and_wait(wlc);
5602                 brcms_c_set_chanspec(wlc, chspec);
5603                 brcms_c_enable_mac(wlc);
5604         }
5605         return 0;
5606 }
5607
5608 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5609 {
5610         int ac;
5611
5612         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5613             lrl < 1 || lrl > RETRY_SHORT_MAX)
5614                 return -EINVAL;
5615
5616         wlc->SRL = srl;
5617         wlc->LRL = lrl;
5618
5619         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5620
5621         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5622                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5623                                                EDCF_SHORT,  wlc->SRL);
5624                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5625                                                EDCF_LONG, wlc->LRL);
5626         }
5627         brcms_c_wme_retries_write(wlc);
5628
5629         return 0;
5630 }
5631
5632 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5633                                  struct brcm_rateset *currs)
5634 {
5635         struct brcms_c_rateset *rs;
5636
5637         if (wlc->pub->associated)
5638                 rs = &wlc->bsscfg->current_bss->rateset;
5639         else
5640                 rs = &wlc->default_bss->rateset;
5641
5642         /* Copy only legacy rateset section */
5643         currs->count = rs->count;
5644         memcpy(&currs->rates, &rs->rates, rs->count);
5645 }
5646
5647 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5648 {
5649         struct brcms_c_rateset internal_rs;
5650         int bcmerror;
5651
5652         if (rs->count > BRCMS_NUMRATES)
5653                 return -ENOBUFS;
5654
5655         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5656
5657         /* Copy only legacy rateset section */
5658         internal_rs.count = rs->count;
5659         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5660
5661         /* merge rateset coming in with the current mcsset */
5662         if (wlc->pub->_n_enab & SUPPORT_11N) {
5663                 struct brcms_bss_info *mcsset_bss;
5664                 if (wlc->bsscfg->associated)
5665                         mcsset_bss = wlc->bsscfg->current_bss;
5666                 else
5667                         mcsset_bss = wlc->default_bss;
5668                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5669                        MCSSET_LEN);
5670         }
5671
5672         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5673         if (!bcmerror)
5674                 brcms_c_ofdm_rateset_war(wlc);
5675
5676         return bcmerror;
5677 }
5678
5679 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5680 {
5681         if (period < DOT11_MIN_BEACON_PERIOD ||
5682             period > DOT11_MAX_BEACON_PERIOD)
5683                 return -EINVAL;
5684
5685         wlc->default_bss->beacon_period = period;
5686         return 0;
5687 }
5688
5689 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5690 {
5691         return wlc->band->phytype;
5692 }
5693
5694 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5695 {
5696         wlc->shortslot_override = sslot_override;
5697
5698         /*
5699          * shortslot is an 11g feature, so no more work if we are
5700          * currently on the 5G band
5701          */
5702         if (wlc->band->bandtype == BRCM_BAND_5G)
5703                 return;
5704
5705         if (wlc->pub->up && wlc->pub->associated) {
5706                 /* let watchdog or beacon processing update shortslot */
5707         } else if (wlc->pub->up) {
5708                 /* unassociated shortslot is off */
5709                 brcms_c_switch_shortslot(wlc, false);
5710         } else {
5711                 /* driver is down, so just update the brcms_c_info
5712                  * value */
5713                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5714                         wlc->shortslot = false;
5715                 else
5716                         wlc->shortslot =
5717                             (wlc->shortslot_override ==
5718                              BRCMS_SHORTSLOT_ON);
5719         }
5720 }
5721
5722 /*
5723  * register watchdog and down handlers.
5724  */
5725 int brcms_c_module_register(struct brcms_pub *pub,
5726                             const char *name, struct brcms_info *hdl,
5727                             int (*d_fn)(void *handle))
5728 {
5729         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5730         int i;
5731
5732         /* find an empty entry and just add, no duplication check! */
5733         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5734                 if (wlc->modulecb[i].name[0] == '\0') {
5735                         strncpy(wlc->modulecb[i].name, name,
5736                                 sizeof(wlc->modulecb[i].name) - 1);
5737                         wlc->modulecb[i].hdl = hdl;
5738                         wlc->modulecb[i].down_fn = d_fn;
5739                         return 0;
5740                 }
5741         }
5742
5743         return -ENOSR;
5744 }
5745
5746 /* unregister module callbacks */
5747 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5748                               struct brcms_info *hdl)
5749 {
5750         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5751         int i;
5752
5753         if (wlc == NULL)
5754                 return -ENODATA;
5755
5756         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5757                 if (!strcmp(wlc->modulecb[i].name, name) &&
5758                     (wlc->modulecb[i].hdl == hdl)) {
5759                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5760                         return 0;
5761                 }
5762         }
5763
5764         /* table not found! */
5765         return -ENODATA;
5766 }
5767
5768 void brcms_c_print_txstatus(struct tx_status *txs)
5769 {
5770         pr_debug("\ntxpkt (MPDU) Complete\n");
5771
5772         pr_debug("FrameID: %04x   TxStatus: %04x\n", txs->frameid, txs->status);
5773
5774         pr_debug("[15:12]  %d  frame attempts\n",
5775                   (txs->status & TX_STATUS_FRM_RTX_MASK) >>
5776                  TX_STATUS_FRM_RTX_SHIFT);
5777         pr_debug(" [11:8]  %d  rts attempts\n",
5778                  (txs->status & TX_STATUS_RTS_RTX_MASK) >>
5779                  TX_STATUS_RTS_RTX_SHIFT);
5780         pr_debug("    [7]  %d  PM mode indicated\n",
5781                  txs->status & TX_STATUS_PMINDCTD ? 1 : 0);
5782         pr_debug("    [6]  %d  intermediate status\n",
5783                  txs->status & TX_STATUS_INTERMEDIATE ? 1 : 0);
5784         pr_debug("    [5]  %d  AMPDU\n",
5785                  txs->status & TX_STATUS_AMPDU ? 1 : 0);
5786         pr_debug("  [4:2]  %d  Frame Suppressed Reason (%s)\n",
5787                  (txs->status & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT,
5788                  (const char *[]) {
5789                         "None",
5790                         "PMQ Entry",
5791                         "Flush request",
5792                         "Previous frag failure",
5793                         "Channel mismatch",
5794                         "Lifetime Expiry",
5795                         "Underflow"
5796                  } [(txs->status & TX_STATUS_SUPR_MASK) >>
5797                     TX_STATUS_SUPR_SHIFT]);
5798         pr_debug("    [1]  %d  acked\n",
5799                  txs->status & TX_STATUS_ACK_RCV ? 1 : 0);
5800
5801         pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5802                  txs->lasttxtime, txs->sequence, txs->phyerr,
5803                  (txs->ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT,
5804                  (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5805 }
5806
5807 bool brcms_c_chipmatch(u16 vendor, u16 device)
5808 {
5809         if (vendor != PCI_VENDOR_ID_BROADCOM) {
5810                 pr_err("unknown vendor id %04x\n", vendor);
5811                 return false;
5812         }
5813
5814         if (device == BCM43224_D11N_ID_VEN1)
5815                 return true;
5816         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5817                 return true;
5818         if (device == BCM4313_D11N2G_ID)
5819                 return true;
5820         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5821                 return true;
5822
5823         pr_err("unknown device id %04x\n", device);
5824         return false;
5825 }
5826
5827 #if defined(DEBUG)
5828 void brcms_c_print_txdesc(struct d11txh *txh)
5829 {
5830         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5831         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5832         u16 mfc = le16_to_cpu(txh->MacFrameControl);
5833         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5834         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5835         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5836         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5837         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5838         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5839         u16 mainrates = le16_to_cpu(txh->MainRates);
5840         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5841         u8 *iv = txh->IV;
5842         u8 *ra = txh->TxFrameRA;
5843         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5844         u8 *rtspfb = txh->RTSPLCPFallback;
5845         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5846         u8 *fragpfb = txh->FragPLCPFallback;
5847         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5848         u16 mmodelen = le16_to_cpu(txh->MModeLen);
5849         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5850         u16 tfid = le16_to_cpu(txh->TxFrameID);
5851         u16 txs = le16_to_cpu(txh->TxStatus);
5852         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5853         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5854         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5855         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5856
5857         u8 *rtsph = txh->RTSPhyHeader;
5858         struct ieee80211_rts rts = txh->rts_frame;
5859
5860         /* add plcp header along with txh descriptor */
5861         brcmu_dbg_hex_dump(txh, sizeof(struct d11txh) + 48,
5862                            "Raw TxDesc + plcp header:\n");
5863
5864         pr_debug("TxCtlLow: %04x ", mtcl);
5865         pr_debug("TxCtlHigh: %04x ", mtch);
5866         pr_debug("FC: %04x ", mfc);
5867         pr_debug("FES Time: %04x\n", tfest);
5868         pr_debug("PhyCtl: %04x%s ", ptcw,
5869                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5870         pr_debug("PhyCtl_1: %04x ", ptcw_1);
5871         pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5872         pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5873         pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5874         pr_debug("MainRates: %04x ", mainrates);
5875         pr_debug("XtraFrameTypes: %04x ", xtraft);
5876         pr_debug("\n");
5877
5878         print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5879         print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5880                              ra, sizeof(txh->TxFrameRA));
5881
5882         pr_debug("Fb FES Time: %04x ", tfestfb);
5883         print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5884                              rtspfb, sizeof(txh->RTSPLCPFallback));
5885         pr_debug("RTS DUR: %04x ", rtsdfb);
5886         print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5887                              fragpfb, sizeof(txh->FragPLCPFallback));
5888         pr_debug("DUR: %04x", fragdfb);
5889         pr_debug("\n");
5890
5891         pr_debug("MModeLen: %04x ", mmodelen);
5892         pr_debug("MModeFbrLen: %04x\n", mmodefbrlen);
5893
5894         pr_debug("FrameID:     %04x\n", tfid);
5895         pr_debug("TxStatus:    %04x\n", txs);
5896
5897         pr_debug("MaxNumMpdu:  %04x\n", mnmpdu);
5898         pr_debug("MaxAggbyte:  %04x\n", mabyte);
5899         pr_debug("MaxAggbyte_fb:  %04x\n", mabyte_f);
5900         pr_debug("MinByte:     %04x\n", mmbyte);
5901
5902         print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5903                              rtsph, sizeof(txh->RTSPhyHeader));
5904         print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5905                              (u8 *)&rts, sizeof(txh->rts_frame));
5906         pr_debug("\n");
5907 }
5908 #endif                          /* defined(DEBUG) */
5909
5910 #if defined(DEBUG)
5911 static int
5912 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5913                      int len)
5914 {
5915         int i;
5916         char *p = buf;
5917         char hexstr[16];
5918         int slen = 0, nlen = 0;
5919         u32 bit;
5920         const char *name;
5921
5922         if (len < 2 || !buf)
5923                 return 0;
5924
5925         buf[0] = '\0';
5926
5927         for (i = 0; flags != 0; i++) {
5928                 bit = bd[i].bit;
5929                 name = bd[i].name;
5930                 if (bit == 0 && flags != 0) {
5931                         /* print any unnamed bits */
5932                         snprintf(hexstr, 16, "0x%X", flags);
5933                         name = hexstr;
5934                         flags = 0;      /* exit loop */
5935                 } else if ((flags & bit) == 0)
5936                         continue;
5937                 flags &= ~bit;
5938                 nlen = strlen(name);
5939                 slen += nlen;
5940                 /* count btwn flag space */
5941                 if (flags != 0)
5942                         slen += 1;
5943                 /* need NULL char as well */
5944                 if (len <= slen)
5945                         break;
5946                 /* copy NULL char but don't count it */
5947                 strncpy(p, name, nlen + 1);
5948                 p += nlen;
5949                 /* copy btwn flag space and NULL char */
5950                 if (flags != 0)
5951                         p += snprintf(p, 2, " ");
5952                 len -= slen;
5953         }
5954
5955         /* indicate the str was too short */
5956         if (flags != 0) {
5957                 if (len < 2)
5958                         p -= 2 - len;   /* overwrite last char */
5959                 p += snprintf(p, 2, ">");
5960         }
5961
5962         return (int)(p - buf);
5963 }
5964 #endif                          /* defined(DEBUG) */
5965
5966 #if defined(DEBUG)
5967 void brcms_c_print_rxh(struct d11rxhdr *rxh)
5968 {
5969         u16 len = rxh->RxFrameSize;
5970         u16 phystatus_0 = rxh->PhyRxStatus_0;
5971         u16 phystatus_1 = rxh->PhyRxStatus_1;
5972         u16 phystatus_2 = rxh->PhyRxStatus_2;
5973         u16 phystatus_3 = rxh->PhyRxStatus_3;
5974         u16 macstatus1 = rxh->RxStatus1;
5975         u16 macstatus2 = rxh->RxStatus2;
5976         char flagstr[64];
5977         char lenbuf[20];
5978         static const struct brcms_c_bit_desc macstat_flags[] = {
5979                 {RXS_FCSERR, "FCSErr"},
5980                 {RXS_RESPFRAMETX, "Reply"},
5981                 {RXS_PBPRES, "PADDING"},
5982                 {RXS_DECATMPT, "DeCr"},
5983                 {RXS_DECERR, "DeCrErr"},
5984                 {RXS_BCNSENT, "Bcn"},
5985                 {0, NULL}
5986         };
5987
5988         brcmu_dbg_hex_dump(rxh, sizeof(struct d11rxhdr), "Raw RxDesc:\n");
5989
5990         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
5991
5992         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
5993
5994         pr_debug("RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
5995                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
5996         pr_debug("RxPHYStatus:     %04x %04x %04x %04x\n",
5997                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
5998         pr_debug("RxMACStatus:     %x %s\n", macstatus1, flagstr);
5999         pr_debug("RXMACaggtype:    %x\n",
6000                (macstatus2 & RXS_AGGTYPE_MASK));
6001         pr_debug("RxTSFTime:       %04x\n", rxh->RxTSFTime);
6002 }
6003 #endif                          /* defined(DEBUG) */
6004
6005 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6006 {
6007         u16 table_ptr;
6008         u8 phy_rate, index;
6009
6010         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6011         if (is_ofdm_rate(rate))
6012                 table_ptr = M_RT_DIRMAP_A;
6013         else
6014                 table_ptr = M_RT_DIRMAP_B;
6015
6016         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6017          * the index into the rate table.
6018          */
6019         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6020         index = phy_rate & 0xf;
6021
6022         /* Find the SHM pointer to the rate table entry by looking in the
6023          * Direct-map Table
6024          */
6025         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6026 }
6027
6028 static bool
6029 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6030                       struct sk_buff *pkt, int prec, bool head)
6031 {
6032         struct sk_buff *p;
6033         int eprec = -1;         /* precedence to evict from */
6034
6035         /* Determine precedence from which to evict packet, if any */
6036         if (pktq_pfull(q, prec))
6037                 eprec = prec;
6038         else if (pktq_full(q)) {
6039                 p = brcmu_pktq_peek_tail(q, &eprec);
6040                 if (eprec > prec) {
6041                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6042                                   "\n", __func__, eprec, prec);
6043                         return false;
6044                 }
6045         }
6046
6047         /* Evict if needed */
6048         if (eprec >= 0) {
6049                 bool discard_oldest;
6050
6051                 discard_oldest = ac_bitmap_tst(0, eprec);
6052
6053                 /* Refuse newer packet unless configured to discard oldest */
6054                 if (eprec == prec && !discard_oldest) {
6055                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6056                                   "\n", __func__, prec);
6057                         return false;
6058                 }
6059
6060                 /* Evict packet according to discard policy */
6061                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6062                         brcmu_pktq_pdeq_tail(q, eprec);
6063                 brcmu_pkt_buf_free_skb(p);
6064         }
6065
6066         /* Enqueue */
6067         if (head)
6068                 p = brcmu_pktq_penq_head(q, prec, pkt);
6069         else
6070                 p = brcmu_pktq_penq(q, prec, pkt);
6071
6072         return true;
6073 }
6074
6075 /*
6076  * Attempts to queue a packet onto a multiple-precedence queue,
6077  * if necessary evicting a lower precedence packet from the queue.
6078  *
6079  * 'prec' is the precedence number that has already been mapped
6080  * from the packet priority.
6081  *
6082  * Returns true if packet consumed (queued), false if not.
6083  */
6084 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6085                       struct sk_buff *pkt, int prec)
6086 {
6087         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6088 }
6089
6090 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6091                      struct sk_buff *sdu, uint prec)
6092 {
6093         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6094         struct pktq *q = &qi->q;
6095         int prio;
6096
6097         prio = sdu->priority;
6098
6099         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6100                 /*
6101                  * we might hit this condtion in case
6102                  * packet flooding from mac80211 stack
6103                  */
6104                 brcmu_pkt_buf_free_skb(sdu);
6105         }
6106 }
6107
6108 /*
6109  * bcmc_fid_generate:
6110  * Generate frame ID for a BCMC packet.  The frag field is not used
6111  * for MC frames so is used as part of the sequence number.
6112  */
6113 static inline u16
6114 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6115                   struct d11txh *txh)
6116 {
6117         u16 frameid;
6118
6119         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6120                                                   TXFID_QUEUE_MASK);
6121         frameid |=
6122             (((wlc->
6123                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6124             TX_BCMC_FIFO;
6125
6126         return frameid;
6127 }
6128
6129 static uint
6130 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6131                       u8 preamble_type)
6132 {
6133         uint dur = 0;
6134
6135         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6136                 wlc->pub->unit, rspec, preamble_type);
6137         /*
6138          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6139          * is less than or equal to the rate of the immediately previous
6140          * frame in the FES
6141          */
6142         rspec = brcms_basic_rate(wlc, rspec);
6143         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6144         dur =
6145             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6146                                 (DOT11_ACK_LEN + FCS_LEN));
6147         return dur;
6148 }
6149
6150 static uint
6151 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6152                       u8 preamble_type)
6153 {
6154         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6155                 wlc->pub->unit, rspec, preamble_type);
6156         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6157 }
6158
6159 static uint
6160 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6161                      u8 preamble_type)
6162 {
6163         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6164                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6165         /*
6166          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6167          * is less than or equal to the rate of the immediately previous
6168          * frame in the FES
6169          */
6170         rspec = brcms_basic_rate(wlc, rspec);
6171         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6172         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6173                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6174                                     FCS_LEN));
6175 }
6176
6177 /* brcms_c_compute_frame_dur()
6178  *
6179  * Calculate the 802.11 MAC header DUR field for MPDU
6180  * DUR for a single frame = 1 SIFS + 1 ACK
6181  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6182  *
6183  * rate                 MPDU rate in unit of 500kbps
6184  * next_frag_len        next MPDU length in bytes
6185  * preamble_type        use short/GF or long/MM PLCP header
6186  */
6187 static u16
6188 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6189                       u8 preamble_type, uint next_frag_len)
6190 {
6191         u16 dur, sifs;
6192
6193         sifs = get_sifs(wlc->band);
6194
6195         dur = sifs;
6196         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6197
6198         if (next_frag_len) {
6199                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6200                 dur *= 2;
6201                 /* add another SIFS and the frag time */
6202                 dur += sifs;
6203                 dur +=
6204                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6205                                                  next_frag_len);
6206         }
6207         return dur;
6208 }
6209
6210 /* The opposite of brcms_c_calc_frame_time */
6211 static uint
6212 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6213                    u8 preamble_type, uint dur)
6214 {
6215         uint nsyms, mac_len, Ndps, kNdps;
6216         uint rate = rspec2rate(ratespec);
6217
6218         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6219                  wlc->pub->unit, ratespec, preamble_type, dur);
6220
6221         if (is_mcs_rate(ratespec)) {
6222                 uint mcs = ratespec & RSPEC_RATE_MASK;
6223                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6224                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6225                 /* payload calculation matches that of regular ofdm */
6226                 if (wlc->band->bandtype == BRCM_BAND_2G)
6227                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6228                 /* kNdbps = kbps * 4 */
6229                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6230                                    rspec_issgi(ratespec)) * 4;
6231                 nsyms = dur / APHY_SYMBOL_TIME;
6232                 mac_len =
6233                     ((nsyms * kNdps) -
6234                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6235         } else if (is_ofdm_rate(ratespec)) {
6236                 dur -= APHY_PREAMBLE_TIME;
6237                 dur -= APHY_SIGNAL_TIME;
6238                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6239                 Ndps = rate * 2;
6240                 nsyms = dur / APHY_SYMBOL_TIME;
6241                 mac_len =
6242                     ((nsyms * Ndps) -
6243                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6244         } else {
6245                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6246                         dur -= BPHY_PLCP_SHORT_TIME;
6247                 else
6248                         dur -= BPHY_PLCP_TIME;
6249                 mac_len = dur * rate;
6250                 /* divide out factor of 2 in rate (1/2 mbps) */
6251                 mac_len = mac_len / 8 / 2;
6252         }
6253         return mac_len;
6254 }
6255
6256 /*
6257  * Return true if the specified rate is supported by the specified band.
6258  * BRCM_BAND_AUTO indicates the current band.
6259  */
6260 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6261                     bool verbose)
6262 {
6263         struct brcms_c_rateset *hw_rateset;
6264         uint i;
6265
6266         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6267                 hw_rateset = &wlc->band->hw_rateset;
6268         else if (wlc->pub->_nbands > 1)
6269                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6270         else
6271                 /* other band specified and we are a single band device */
6272                 return false;
6273
6274         /* check if this is a mimo rate */
6275         if (is_mcs_rate(rspec)) {
6276                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6277                         goto error;
6278
6279                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6280         }
6281
6282         for (i = 0; i < hw_rateset->count; i++)
6283                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6284                         return true;
6285  error:
6286         if (verbose)
6287                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6288                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6289
6290         return false;
6291 }
6292
6293 static u32
6294 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6295                        u32 int_val)
6296 {
6297         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6298         u8 rate = int_val & NRATE_RATE_MASK;
6299         u32 rspec;
6300         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6301         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6302         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6303                                   == NRATE_OVERRIDE_MCS_ONLY);
6304         int bcmerror = 0;
6305
6306         if (!ismcs)
6307                 return (u32) rate;
6308
6309         /* validate the combination of rate/mcs/stf is allowed */
6310         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6311                 /* mcs only allowed when nmode */
6312                 if (stf > PHY_TXC1_MODE_SDM) {
6313                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6314                                   wlc->pub->unit, __func__);
6315                         bcmerror = -EINVAL;
6316                         goto done;
6317                 }
6318
6319                 /* mcs 32 is a special case, DUP mode 40 only */
6320                 if (rate == 32) {
6321                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6322                             ((stf != PHY_TXC1_MODE_SISO)
6323                              && (stf != PHY_TXC1_MODE_CDD))) {
6324                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6325                                           "32\n", wlc->pub->unit, __func__);
6326                                 bcmerror = -EINVAL;
6327                                 goto done;
6328                         }
6329                         /* mcs > 7 must use stf SDM */
6330                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6331                         /* mcs > 7 must use stf SDM */
6332                         if (stf != PHY_TXC1_MODE_SDM) {
6333                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6334                                        "SDM mode for mcs %d\n",
6335                                        wlc->pub->unit, rate);
6336                                 stf = PHY_TXC1_MODE_SDM;
6337                         }
6338                 } else {
6339                         /*
6340                          * MCS 0-7 may use SISO, CDD, and for
6341                          * phy_rev >= 3 STBC
6342                          */
6343                         if ((stf > PHY_TXC1_MODE_STBC) ||
6344                             (!BRCMS_STBC_CAP_PHY(wlc)
6345                              && (stf == PHY_TXC1_MODE_STBC))) {
6346                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6347                                           "\n", wlc->pub->unit, __func__);
6348                                 bcmerror = -EINVAL;
6349                                 goto done;
6350                         }
6351                 }
6352         } else if (is_ofdm_rate(rate)) {
6353                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6354                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6355                                   wlc->pub->unit, __func__);
6356                         bcmerror = -EINVAL;
6357                         goto done;
6358                 }
6359         } else if (is_cck_rate(rate)) {
6360                 if ((cur_band->bandtype != BRCM_BAND_2G)
6361                     || (stf != PHY_TXC1_MODE_SISO)) {
6362                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6363                                   wlc->pub->unit, __func__);
6364                         bcmerror = -EINVAL;
6365                         goto done;
6366                 }
6367         } else {
6368                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6369                           wlc->pub->unit, __func__);
6370                 bcmerror = -EINVAL;
6371                 goto done;
6372         }
6373         /* make sure multiple antennae are available for non-siso rates */
6374         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6375                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6376                           "request\n", wlc->pub->unit, __func__);
6377                 bcmerror = -EINVAL;
6378                 goto done;
6379         }
6380
6381         rspec = rate;
6382         if (ismcs) {
6383                 rspec |= RSPEC_MIMORATE;
6384                 /* For STBC populate the STC field of the ratespec */
6385                 if (stf == PHY_TXC1_MODE_STBC) {
6386                         u8 stc;
6387                         stc = 1;        /* Nss for single stream is always 1 */
6388                         rspec |= (stc << RSPEC_STC_SHIFT);
6389                 }
6390         }
6391
6392         rspec |= (stf << RSPEC_STF_SHIFT);
6393
6394         if (override_mcs_only)
6395                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6396
6397         if (issgi)
6398                 rspec |= RSPEC_SHORT_GI;
6399
6400         if ((rate != 0)
6401             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6402                 return rate;
6403
6404         return rspec;
6405 done:
6406         return rate;
6407 }
6408
6409 /*
6410  * Compute PLCP, but only requires actual rate and length of pkt.
6411  * Rate is given in the driver standard multiple of 500 kbps.
6412  * le is set for 11 Mbps rate if necessary.
6413  * Broken out for PRQ.
6414  */
6415
6416 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6417                              uint length, u8 *plcp)
6418 {
6419         u16 usec = 0;
6420         u8 le = 0;
6421
6422         switch (rate_500) {
6423         case BRCM_RATE_1M:
6424                 usec = length << 3;
6425                 break;
6426         case BRCM_RATE_2M:
6427                 usec = length << 2;
6428                 break;
6429         case BRCM_RATE_5M5:
6430                 usec = (length << 4) / 11;
6431                 if ((length << 4) - (usec * 11) > 0)
6432                         usec++;
6433                 break;
6434         case BRCM_RATE_11M:
6435                 usec = (length << 3) / 11;
6436                 if ((length << 3) - (usec * 11) > 0) {
6437                         usec++;
6438                         if ((usec * 11) - (length << 3) >= 8)
6439                                 le = D11B_PLCP_SIGNAL_LE;
6440                 }
6441                 break;
6442
6443         default:
6444                 wiphy_err(wlc->wiphy,
6445                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6446                           rate_500);
6447                 rate_500 = BRCM_RATE_1M;
6448                 usec = length << 3;
6449                 break;
6450         }
6451         /* PLCP signal byte */
6452         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6453         /* PLCP service byte */
6454         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6455         /* PLCP length u16, little endian */
6456         plcp[2] = usec & 0xff;
6457         plcp[3] = (usec >> 8) & 0xff;
6458         /* PLCP CRC16 */
6459         plcp[4] = 0;
6460         plcp[5] = 0;
6461 }
6462
6463 /* Rate: 802.11 rate code, length: PSDU length in octets */
6464 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6465 {
6466         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6467         plcp[0] = mcs;
6468         if (rspec_is40mhz(rspec) || (mcs == 32))
6469                 plcp[0] |= MIMO_PLCP_40MHZ;
6470         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6471         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6472         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6473         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6474         plcp[5] = 0;
6475 }
6476
6477 /* Rate: 802.11 rate code, length: PSDU length in octets */
6478 static void
6479 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6480 {
6481         u8 rate_signal;
6482         u32 tmp = 0;
6483         int rate = rspec2rate(rspec);
6484
6485         /*
6486          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6487          * transmitted first
6488          */
6489         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6490         memset(plcp, 0, D11_PHY_HDR_LEN);
6491         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6492
6493         tmp = (length & 0xfff) << 5;
6494         plcp[2] |= (tmp >> 16) & 0xff;
6495         plcp[1] |= (tmp >> 8) & 0xff;
6496         plcp[0] |= tmp & 0xff;
6497 }
6498
6499 /* Rate: 802.11 rate code, length: PSDU length in octets */
6500 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6501                                  uint length, u8 *plcp)
6502 {
6503         int rate = rspec2rate(rspec);
6504
6505         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6506 }
6507
6508 static void
6509 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6510                      uint length, u8 *plcp)
6511 {
6512         if (is_mcs_rate(rspec))
6513                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6514         else if (is_ofdm_rate(rspec))
6515                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6516         else
6517                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6518 }
6519
6520 /* brcms_c_compute_rtscts_dur()
6521  *
6522  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6523  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6524  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6525  *
6526  * cts                  cts-to-self or rts/cts
6527  * rts_rate             rts or cts rate in unit of 500kbps
6528  * rate                 next MPDU rate in unit of 500kbps
6529  * frame_len            next MPDU frame length in bytes
6530  */
6531 u16
6532 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6533                            u32 rts_rate,
6534                            u32 frame_rate, u8 rts_preamble_type,
6535                            u8 frame_preamble_type, uint frame_len, bool ba)
6536 {
6537         u16 dur, sifs;
6538
6539         sifs = get_sifs(wlc->band);
6540
6541         if (!cts_only) {
6542                 /* RTS/CTS */
6543                 dur = 3 * sifs;
6544                 dur +=
6545                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6546                                                rts_preamble_type);
6547         } else {
6548                 /* CTS-TO-SELF */
6549                 dur = 2 * sifs;
6550         }
6551
6552         dur +=
6553             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6554                                          frame_len);
6555         if (ba)
6556                 dur +=
6557                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6558                                               BRCMS_SHORT_PREAMBLE);
6559         else
6560                 dur +=
6561                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6562                                                frame_preamble_type);
6563         return dur;
6564 }
6565
6566 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6567 {
6568         u16 phyctl1 = 0;
6569         u16 bw;
6570
6571         if (BRCMS_ISLCNPHY(wlc->band)) {
6572                 bw = PHY_TXC1_BW_20MHZ;
6573         } else {
6574                 bw = rspec_get_bw(rspec);
6575                 /* 10Mhz is not supported yet */
6576                 if (bw < PHY_TXC1_BW_20MHZ) {
6577                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6578                                   "not supported yet, set to 20L\n", bw);
6579                         bw = PHY_TXC1_BW_20MHZ;
6580                 }
6581         }
6582
6583         if (is_mcs_rate(rspec)) {
6584                 uint mcs = rspec & RSPEC_RATE_MASK;
6585
6586                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6587                 phyctl1 = rspec_phytxbyte2(rspec);
6588                 /* set the upper byte of phyctl1 */
6589                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6590         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6591                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6592                 /*
6593                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6594                  * Data Rate. Eventually MIMOPHY would also be converted to
6595                  * this format
6596                  */
6597                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6598                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6599         } else {                /* legacy OFDM/CCK */
6600                 s16 phycfg;
6601                 /* get the phyctl byte from rate phycfg table */
6602                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6603                 if (phycfg == -1) {
6604                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6605                                   "legacy OFDM/CCK rate\n");
6606                         phycfg = 0;
6607                 }
6608                 /* set the upper byte of phyctl1 */
6609                 phyctl1 =
6610                     (bw | (phycfg << 8) |
6611                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6612         }
6613         return phyctl1;
6614 }
6615
6616 /*
6617  * Add struct d11txh, struct cck_phy_hdr.
6618  *
6619  * 'p' data must start with 802.11 MAC header
6620  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6621  *
6622  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6623  *
6624  */
6625 static u16
6626 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6627                      struct sk_buff *p, struct scb *scb, uint frag,
6628                      uint nfrags, uint queue, uint next_frag_len)
6629 {
6630         struct ieee80211_hdr *h;
6631         struct d11txh *txh;
6632         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6633         int len, phylen, rts_phylen;
6634         u16 mch, phyctl, xfts, mainrates;
6635         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6636         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6637         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6638         bool use_rts = false;
6639         bool use_cts = false;
6640         bool use_rifs = false;
6641         bool short_preamble[2] = { false, false };
6642         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6643         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6644         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6645         struct ieee80211_rts *rts = NULL;
6646         bool qos;
6647         uint ac;
6648         bool hwtkmic = false;
6649         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6650 #define ANTCFG_NONE 0xFF
6651         u8 antcfg = ANTCFG_NONE;
6652         u8 fbantcfg = ANTCFG_NONE;
6653         uint phyctl1_stf = 0;
6654         u16 durid = 0;
6655         struct ieee80211_tx_rate *txrate[2];
6656         int k;
6657         struct ieee80211_tx_info *tx_info;
6658         bool is_mcs;
6659         u16 mimo_txbw;
6660         u8 mimo_preamble_type;
6661
6662         /* locate 802.11 MAC header */
6663         h = (struct ieee80211_hdr *)(p->data);
6664         qos = ieee80211_is_data_qos(h->frame_control);
6665
6666         /* compute length of frame in bytes for use in PLCP computations */
6667         len = p->len;
6668         phylen = len + FCS_LEN;
6669
6670         /* Get tx_info */
6671         tx_info = IEEE80211_SKB_CB(p);
6672
6673         /* add PLCP */
6674         plcp = skb_push(p, D11_PHY_HDR_LEN);
6675
6676         /* add Broadcom tx descriptor header */
6677         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6678         memset(txh, 0, D11_TXH_LEN);
6679
6680         /* setup frameid */
6681         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6682                 /* non-AP STA should never use BCMC queue */
6683                 if (queue == TX_BCMC_FIFO) {
6684                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6685                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6686                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6687                 } else {
6688                         /* Increment the counter for first fragment */
6689                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6690                                 scb->seqnum[p->priority]++;
6691
6692                         /* extract fragment number from frame first */
6693                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6694                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6695                         h->seq_ctrl = cpu_to_le16(seq);
6696
6697                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6698                             (queue & TXFID_QUEUE_MASK);
6699                 }
6700         }
6701         frameid |= queue & TXFID_QUEUE_MASK;
6702
6703         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6704         if (ieee80211_is_beacon(h->frame_control))
6705                 mcl |= TXC_IGNOREPMQ;
6706
6707         txrate[0] = tx_info->control.rates;
6708         txrate[1] = txrate[0] + 1;
6709
6710         /*
6711          * if rate control algorithm didn't give us a fallback
6712          * rate, use the primary rate
6713          */
6714         if (txrate[1]->idx < 0)
6715                 txrate[1] = txrate[0];
6716
6717         for (k = 0; k < hw->max_rates; k++) {
6718                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6719                 if (!is_mcs) {
6720                         if ((txrate[k]->idx >= 0)
6721                             && (txrate[k]->idx <
6722                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6723                                 rspec[k] =
6724                                     hw->wiphy->bands[tx_info->band]->
6725                                     bitrates[txrate[k]->idx].hw_value;
6726                                 short_preamble[k] =
6727                                     txrate[k]->
6728                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6729                                     true : false;
6730                         } else {
6731                                 rspec[k] = BRCM_RATE_1M;
6732                         }
6733                 } else {
6734                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6735                                         NRATE_MCS_INUSE | txrate[k]->idx);
6736                 }
6737
6738                 /*
6739                  * Currently only support same setting for primay and
6740                  * fallback rates. Unify flags for each rate into a
6741                  * single value for the frame
6742                  */
6743                 use_rts |=
6744                     txrate[k]->
6745                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6746                 use_cts |=
6747                     txrate[k]->
6748                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6749
6750
6751                 /*
6752                  * (1) RATE:
6753                  *   determine and validate primary rate
6754                  *   and fallback rates
6755                  */
6756                 if (!rspec_active(rspec[k])) {
6757                         rspec[k] = BRCM_RATE_1M;
6758                 } else {
6759                         if (!is_multicast_ether_addr(h->addr1)) {
6760                                 /* set tx antenna config */
6761                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6762                                         false, 0, 0, &antcfg, &fbantcfg);
6763                         }
6764                 }
6765         }
6766
6767         phyctl1_stf = wlc->stf->ss_opmode;
6768
6769         if (wlc->pub->_n_enab & SUPPORT_11N) {
6770                 for (k = 0; k < hw->max_rates; k++) {
6771                         /*
6772                          * apply siso/cdd to single stream mcs's or ofdm
6773                          * if rspec is auto selected
6774                          */
6775                         if (((is_mcs_rate(rspec[k]) &&
6776                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6777                              is_ofdm_rate(rspec[k]))
6778                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6779                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6780                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6781
6782                                 /* For SISO MCS use STBC if possible */
6783                                 if (is_mcs_rate(rspec[k])
6784                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6785                                         u8 stc;
6786
6787                                         /* Nss for single stream is always 1 */
6788                                         stc = 1;
6789                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6790                                                         RSPEC_STF_SHIFT) |
6791                                                     (stc << RSPEC_STC_SHIFT);
6792                                 } else
6793                                         rspec[k] |=
6794                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6795                         }
6796
6797                         /*
6798                          * Is the phy configured to use 40MHZ frames? If
6799                          * so then pick the desired txbw
6800                          */
6801                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6802                                 /* default txbw is 20in40 SB */
6803                                 mimo_ctlchbw = mimo_txbw =
6804                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6805                                                                  wlc->band->pi))
6806                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6807
6808                                 if (is_mcs_rate(rspec[k])) {
6809                                         /* mcs 32 must be 40b/w DUP */
6810                                         if ((rspec[k] & RSPEC_RATE_MASK)
6811                                             == 32) {
6812                                                 mimo_txbw =
6813                                                     PHY_TXC1_BW_40MHZ_DUP;
6814                                                 /* use override */
6815                                         } else if (wlc->mimo_40txbw != AUTO)
6816                                                 mimo_txbw = wlc->mimo_40txbw;
6817                                         /* else check if dst is using 40 Mhz */
6818                                         else if (scb->flags & SCB_IS40)
6819                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
6820                                 } else if (is_ofdm_rate(rspec[k])) {
6821                                         if (wlc->ofdm_40txbw != AUTO)
6822                                                 mimo_txbw = wlc->ofdm_40txbw;
6823                                 } else if (wlc->cck_40txbw != AUTO) {
6824                                         mimo_txbw = wlc->cck_40txbw;
6825                                 }
6826                         } else {
6827                                 /*
6828                                  * mcs32 is 40 b/w only.
6829                                  * This is possible for probe packets on
6830                                  * a STA during SCAN
6831                                  */
6832                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6833                                         /* mcs 0 */
6834                                         rspec[k] = RSPEC_MIMORATE;
6835
6836                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
6837                         }
6838
6839                         /* Set channel width */
6840                         rspec[k] &= ~RSPEC_BW_MASK;
6841                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6842                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6843                         else
6844                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6845
6846                         /* Disable short GI, not supported yet */
6847                         rspec[k] &= ~RSPEC_SHORT_GI;
6848
6849                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
6850                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6851                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6852
6853                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6854                             && (!is_mcs_rate(rspec[k]))) {
6855                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6856                                           "RC_MCS != is_mcs_rate(rspec)\n",
6857                                           wlc->pub->unit, __func__);
6858                         }
6859
6860                         if (is_mcs_rate(rspec[k])) {
6861                                 preamble_type[k] = mimo_preamble_type;
6862
6863                                 /*
6864                                  * if SGI is selected, then forced mm
6865                                  * for single stream
6866                                  */
6867                                 if ((rspec[k] & RSPEC_SHORT_GI)
6868                                     && is_single_stream(rspec[k] &
6869                                                         RSPEC_RATE_MASK))
6870                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
6871                         }
6872
6873                         /* should be better conditionalized */
6874                         if (!is_mcs_rate(rspec[0])
6875                             && (tx_info->control.rates[0].
6876                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6877                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6878                 }
6879         } else {
6880                 for (k = 0; k < hw->max_rates; k++) {
6881                         /* Set ctrlchbw as 20Mhz */
6882                         rspec[k] &= ~RSPEC_BW_MASK;
6883                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6884
6885                         /* for nphy, stf of ofdm frames must follow policies */
6886                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6887                                 rspec[k] &= ~RSPEC_STF_MASK;
6888                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6889                         }
6890                 }
6891         }
6892
6893         /* Reset these for use with AMPDU's */
6894         txrate[0]->count = 0;
6895         txrate[1]->count = 0;
6896
6897         /* (2) PROTECTION, may change rspec */
6898         if ((ieee80211_is_data(h->frame_control) ||
6899             ieee80211_is_mgmt(h->frame_control)) &&
6900             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6901                 use_rts = true;
6902
6903         /* (3) PLCP: determine PLCP header and MAC duration,
6904          * fill struct d11txh */
6905         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6906         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6907         memcpy(&txh->FragPLCPFallback,
6908                plcp_fallback, sizeof(txh->FragPLCPFallback));
6909
6910         /* Length field now put in CCK FBR CRC field */
6911         if (is_cck_rate(rspec[1])) {
6912                 txh->FragPLCPFallback[4] = phylen & 0xff;
6913                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6914         }
6915
6916         /* MIMO-RATE: need validation ?? */
6917         mainrates = is_ofdm_rate(rspec[0]) ?
6918                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6919                         plcp[0];
6920
6921         /* DUR field for main rate */
6922         if (!ieee80211_is_pspoll(h->frame_control) &&
6923             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6924                 durid =
6925                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6926                                           next_frag_len);
6927                 h->duration_id = cpu_to_le16(durid);
6928         } else if (use_rifs) {
6929                 /* NAV protect to end of next max packet size */
6930                 durid =
6931                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6932                                                  preamble_type[0],
6933                                                  DOT11_MAX_FRAG_LEN);
6934                 durid += RIFS_11N_TIME;
6935                 h->duration_id = cpu_to_le16(durid);
6936         }
6937
6938         /* DUR field for fallback rate */
6939         if (ieee80211_is_pspoll(h->frame_control))
6940                 txh->FragDurFallback = h->duration_id;
6941         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6942                 txh->FragDurFallback = 0;
6943         else {
6944                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6945                                               preamble_type[1], next_frag_len);
6946                 txh->FragDurFallback = cpu_to_le16(durid);
6947         }
6948
6949         /* (4) MAC-HDR: MacTxControlLow */
6950         if (frag == 0)
6951                 mcl |= TXC_STARTMSDU;
6952
6953         if (!is_multicast_ether_addr(h->addr1))
6954                 mcl |= TXC_IMMEDACK;
6955
6956         if (wlc->band->bandtype == BRCM_BAND_5G)
6957                 mcl |= TXC_FREQBAND_5G;
6958
6959         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6960                 mcl |= TXC_BW_40;
6961
6962         /* set AMIC bit if using hardware TKIP MIC */
6963         if (hwtkmic)
6964                 mcl |= TXC_AMIC;
6965
6966         txh->MacTxControlLow = cpu_to_le16(mcl);
6967
6968         /* MacTxControlHigh */
6969         mch = 0;
6970
6971         /* Set fallback rate preamble type */
6972         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6973             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6974                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6975                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6976         }
6977
6978         /* MacFrameControl */
6979         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6980         txh->TxFesTimeNormal = cpu_to_le16(0);
6981
6982         txh->TxFesTimeFallback = cpu_to_le16(0);
6983
6984         /* TxFrameRA */
6985         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6986
6987         /* TxFrameID */
6988         txh->TxFrameID = cpu_to_le16(frameid);
6989
6990         /*
6991          * TxStatus, Note the case of recreating the first frag of a suppressed
6992          * frame then we may need to reset the retry cnt's via the status reg
6993          */
6994         txh->TxStatus = cpu_to_le16(status);
6995
6996         /*
6997          * extra fields for ucode AMPDU aggregation, the new fields are added to
6998          * the END of previous structure so that it's compatible in driver.
6999          */
7000         txh->MaxNMpdus = cpu_to_le16(0);
7001         txh->MaxABytes_MRT = cpu_to_le16(0);
7002         txh->MaxABytes_FBR = cpu_to_le16(0);
7003         txh->MinMBytes = cpu_to_le16(0);
7004
7005         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7006          * furnish struct d11txh */
7007         /* RTS PLCP header and RTS frame */
7008         if (use_rts || use_cts) {
7009                 if (use_rts && use_cts)
7010                         use_cts = false;
7011
7012                 for (k = 0; k < 2; k++) {
7013                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7014                                                               false,
7015                                                               mimo_ctlchbw);
7016                 }
7017
7018                 if (!is_ofdm_rate(rts_rspec[0]) &&
7019                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7020                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7021                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7022                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7023                 }
7024
7025                 if (!is_ofdm_rate(rts_rspec[1]) &&
7026                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7027                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7028                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7029                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7030                 }
7031
7032                 /* RTS/CTS additions to MacTxControlLow */
7033                 if (use_cts) {
7034                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7035                 } else {
7036                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7037                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7038                 }
7039
7040                 /* RTS PLCP header */
7041                 rts_plcp = txh->RTSPhyHeader;
7042                 if (use_cts)
7043                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7044                 else
7045                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7046
7047                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7048
7049                 /* fallback rate version of RTS PLCP header */
7050                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7051                                  rts_plcp_fallback);
7052                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7053                        sizeof(txh->RTSPLCPFallback));
7054
7055                 /* RTS frame fields... */
7056                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7057
7058                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7059                                                rspec[0], rts_preamble_type[0],
7060                                                preamble_type[0], phylen, false);
7061                 rts->duration = cpu_to_le16(durid);
7062                 /* fallback rate version of RTS DUR field */
7063                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7064                                                rts_rspec[1], rspec[1],
7065                                                rts_preamble_type[1],
7066                                                preamble_type[1], phylen, false);
7067                 txh->RTSDurFallback = cpu_to_le16(durid);
7068
7069                 if (use_cts) {
7070                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7071                                                          IEEE80211_STYPE_CTS);
7072
7073                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7074                 } else {
7075                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7076                                                          IEEE80211_STYPE_RTS);
7077
7078                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7079                 }
7080
7081                 /* mainrate
7082                  *    low 8 bits: main frag rate/mcs,
7083                  *    high 8 bits: rts/cts rate/mcs
7084                  */
7085                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7086                                 D11A_PHY_HDR_GRATE(
7087                                         (struct ofdm_phy_hdr *) rts_plcp) :
7088                                 rts_plcp[0]) << 8;
7089         } else {
7090                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7091                 memset((char *)&txh->rts_frame, 0,
7092                         sizeof(struct ieee80211_rts));
7093                 memset((char *)txh->RTSPLCPFallback, 0,
7094                       sizeof(txh->RTSPLCPFallback));
7095                 txh->RTSDurFallback = 0;
7096         }
7097
7098 #ifdef SUPPORT_40MHZ
7099         /* add null delimiter count */
7100         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7101                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7102                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7103
7104 #endif
7105
7106         /*
7107          * Now that RTS/RTS FB preamble types are updated, write
7108          * the final value
7109          */
7110         txh->MacTxControlHigh = cpu_to_le16(mch);
7111
7112         /*
7113          * MainRates (both the rts and frag plcp rates have
7114          * been calculated now)
7115          */
7116         txh->MainRates = cpu_to_le16(mainrates);
7117
7118         /* XtraFrameTypes */
7119         xfts = frametype(rspec[1], wlc->mimoft);
7120         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7121         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7122         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7123                                                              XFTS_CHANNEL_SHIFT;
7124         txh->XtraFrameTypes = cpu_to_le16(xfts);
7125
7126         /* PhyTxControlWord */
7127         phyctl = frametype(rspec[0], wlc->mimoft);
7128         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7129             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7130                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7131                         phyctl |= PHY_TXC_SHORT_HDR;
7132         }
7133
7134         /* phytxant is properly bit shifted */
7135         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7136         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7137
7138         /* PhyTxControlWord_1 */
7139         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7140                 u16 phyctl1 = 0;
7141
7142                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7143                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7144                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7145                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7146
7147                 if (use_rts || use_cts) {
7148                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7149                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7150                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7151                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7152                 }
7153
7154                 /*
7155                  * For mcs frames, if mixedmode(overloaded with long preamble)
7156                  * is going to be set, fill in non-zero MModeLen and/or
7157                  * MModeFbrLen it will be unnecessary if they are separated
7158                  */
7159                 if (is_mcs_rate(rspec[0]) &&
7160                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7161                         u16 mmodelen =
7162                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7163                         txh->MModeLen = cpu_to_le16(mmodelen);
7164                 }
7165
7166                 if (is_mcs_rate(rspec[1]) &&
7167                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7168                         u16 mmodefbrlen =
7169                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7170                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7171                 }
7172         }
7173
7174         ac = skb_get_queue_mapping(p);
7175         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7176                 uint frag_dur, dur, dur_fallback;
7177
7178                 /* WME: Update TXOP threshold */
7179                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7180                         frag_dur =
7181                             brcms_c_calc_frame_time(wlc, rspec[0],
7182                                         preamble_type[0], phylen);
7183
7184                         if (rts) {
7185                                 /* 1 RTS or CTS-to-self frame */
7186                                 dur =
7187                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7188                                                       rts_preamble_type[0]);
7189                                 dur_fallback =
7190                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7191                                                       rts_preamble_type[1]);
7192                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7193                                 dur += le16_to_cpu(rts->duration);
7194                                 dur_fallback +=
7195                                         le16_to_cpu(txh->RTSDurFallback);
7196                         } else if (use_rifs) {
7197                                 dur = frag_dur;
7198                                 dur_fallback = 0;
7199                         } else {
7200                                 /* frame + SIFS + ACK */
7201                                 dur = frag_dur;
7202                                 dur +=
7203                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7204                                                           preamble_type[0], 0);
7205
7206                                 dur_fallback =
7207                                     brcms_c_calc_frame_time(wlc, rspec[1],
7208                                                         preamble_type[1],
7209                                                         phylen);
7210                                 dur_fallback +=
7211                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7212                                                           preamble_type[1], 0);
7213                         }
7214                         /* NEED to set TxFesTimeNormal (hard) */
7215                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7216                         /*
7217                          * NEED to set fallback rate version of
7218                          * TxFesTimeNormal (hard)
7219                          */
7220                         txh->TxFesTimeFallback =
7221                                 cpu_to_le16((u16) dur_fallback);
7222
7223                         /*
7224                          * update txop byte threshold (txop minus intraframe
7225                          * overhead)
7226                          */
7227                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7228                                 uint newfragthresh;
7229
7230                                 newfragthresh =
7231                                     brcms_c_calc_frame_len(wlc,
7232                                         rspec[0], preamble_type[0],
7233                                         (wlc->edcf_txop[ac] -
7234                                                 (dur - frag_dur)));
7235                                 /* range bound the fragthreshold */
7236                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7237                                         newfragthresh =
7238                                             DOT11_MIN_FRAG_LEN;
7239                                 else if (newfragthresh >
7240                                          wlc->usr_fragthresh)
7241                                         newfragthresh =
7242                                             wlc->usr_fragthresh;
7243                                 /* update the fragthresh and do txc update */
7244                                 if (wlc->fragthresh[queue] !=
7245                                     (u16) newfragthresh)
7246                                         wlc->fragthresh[queue] =
7247                                             (u16) newfragthresh;
7248                         } else {
7249                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7250                                           "for rate %d\n",
7251                                           wlc->pub->unit, fifo_names[queue],
7252                                           rspec2rate(rspec[0]));
7253                         }
7254
7255                         if (dur > wlc->edcf_txop[ac])
7256                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7257                                           "exceeded phylen %d/%d dur %d/%d\n",
7258                                           wlc->pub->unit, __func__,
7259                                           fifo_names[queue],
7260                                           phylen, wlc->fragthresh[queue],
7261                                           dur, wlc->edcf_txop[ac]);
7262                 }
7263         }
7264
7265         return 0;
7266 }
7267
7268 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7269                               struct ieee80211_hw *hw)
7270 {
7271         u8 prio;
7272         uint fifo;
7273         struct scb *scb = &wlc->pri_scb;
7274         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7275
7276         /*
7277          * 802.11 standard requires management traffic
7278          * to go at highest priority
7279          */
7280         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7281                 MAXPRIO;
7282         fifo = prio2fifo[prio];
7283         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7284                 return;
7285         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7286         brcms_c_send_q(wlc);
7287 }
7288
7289 void brcms_c_send_q(struct brcms_c_info *wlc)
7290 {
7291         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7292         int prec;
7293         u16 prec_map;
7294         int err = 0, i, count;
7295         uint fifo;
7296         struct brcms_txq_info *qi = wlc->pkt_queue;
7297         struct pktq *q = &qi->q;
7298         struct ieee80211_tx_info *tx_info;
7299
7300         prec_map = wlc->tx_prec_map;
7301
7302         /* Send all the enq'd pkts that we can.
7303          * Dequeue packets with precedence with empty HW fifo only
7304          */
7305         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7306                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7307                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7308                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7309                 } else {
7310                         count = 1;
7311                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7312                         if (!err) {
7313                                 for (i = 0; i < count; i++)
7314                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7315                                                        1);
7316                         }
7317                 }
7318
7319                 if (err == -EBUSY) {
7320                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7321                         /*
7322                          * If send failed due to any other reason than a
7323                          * change in HW FIFO condition, quit. Otherwise,
7324                          * read the new prec_map!
7325                          */
7326                         if (prec_map == wlc->tx_prec_map)
7327                                 break;
7328                         prec_map = wlc->tx_prec_map;
7329                 }
7330         }
7331 }
7332
7333 void
7334 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7335                bool commit, s8 txpktpend)
7336 {
7337         u16 frameid = INVALIDFID;
7338         struct d11txh *txh;
7339
7340         txh = (struct d11txh *) (p->data);
7341
7342         /* When a BC/MC frame is being committed to the BCMC fifo
7343          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7344          */
7345         if (fifo == TX_BCMC_FIFO)
7346                 frameid = le16_to_cpu(txh->TxFrameID);
7347
7348         /*
7349          * Bump up pending count for if not using rpc. If rpc is
7350          * used, this will be handled in brcms_b_txfifo()
7351          */
7352         if (commit) {
7353                 wlc->core->txpktpend[fifo] += txpktpend;
7354                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7355                          txpktpend, wlc->core->txpktpend[fifo]);
7356         }
7357
7358         /* Commit BCMC sequence number in the SHM frame ID location */
7359         if (frameid != INVALIDFID) {
7360                 /*
7361                  * To inform the ucode of the last mcast frame posted
7362                  * so that it can clear moredata bit
7363                  */
7364                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7365         }
7366
7367         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7368                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7369 }
7370
7371 u32
7372 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7373                            bool use_rspec, u16 mimo_ctlchbw)
7374 {
7375         u32 rts_rspec = 0;
7376
7377         if (use_rspec)
7378                 /* use frame rate as rts rate */
7379                 rts_rspec = rspec;
7380         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7381                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7382                  * Use the brcms_basic_rate() lookup to find the best basic rate
7383                  * under the target in case 11 Mbps is not Basic.
7384                  * 6 and 9 Mbps are not usually selected by rate selection, but
7385                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7386                  * is more robust.
7387                  */
7388                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7389         else
7390                 /* calculate RTS rate and fallback rate based on the frame rate
7391                  * RTS must be sent at a basic rate since it is a
7392                  * control frame, sec 9.6 of 802.11 spec
7393                  */
7394                 rts_rspec = brcms_basic_rate(wlc, rspec);
7395
7396         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7397                 /* set rts txbw to correct side band */
7398                 rts_rspec &= ~RSPEC_BW_MASK;
7399
7400                 /*
7401                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7402                  * 20MHz channel (DUP), otherwise send RTS on control channel
7403                  */
7404                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7405                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7406                 else
7407                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7408
7409                 /* pick siso/cdd as default for ofdm */
7410                 if (is_ofdm_rate(rts_rspec)) {
7411                         rts_rspec &= ~RSPEC_STF_MASK;
7412                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7413                 }
7414         }
7415         return rts_rspec;
7416 }
7417
7418 void
7419 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7420 {
7421         wlc->core->txpktpend[fifo] -= txpktpend;
7422         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7423                wlc->core->txpktpend[fifo]);
7424
7425         /* There is more room; mark precedences related to this FIFO sendable */
7426         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7427
7428         /* figure out which bsscfg is being worked on... */
7429 }
7430
7431 /* Update beacon listen interval in shared memory */
7432 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7433 {
7434         /* wake up every DTIM is the default */
7435         if (wlc->bcn_li_dtim == 1)
7436                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7437         else
7438                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7439                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7440 }
7441
7442 static void
7443 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7444                   u32 *tsf_h_ptr)
7445 {
7446         struct bcma_device *core = wlc_hw->d11core;
7447
7448         /* read the tsf timer low, then high to get an atomic read */
7449         *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7450         *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7451 }
7452
7453 /*
7454  * recover 64bit TSF value from the 16bit TSF value in the rx header
7455  * given the assumption that the TSF passed in header is within 65ms
7456  * of the current tsf.
7457  *
7458  * 6       5       4       4       3       2       1
7459  * 3.......6.......8.......0.......2.......4.......6.......8......0
7460  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7461  *
7462  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7463  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7464  * receive call sequence after rx interrupt. Only the higher 16 bits
7465  * are used. Finally, the tsf_h is read from the tsf register.
7466  */
7467 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7468                                  struct d11rxhdr *rxh)
7469 {
7470         u32 tsf_h, tsf_l;
7471         u16 rx_tsf_0_15, rx_tsf_16_31;
7472
7473         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7474
7475         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7476         rx_tsf_0_15 = rxh->RxTSFTime;
7477
7478         /*
7479          * a greater tsf time indicates the low 16 bits of
7480          * tsf_l wrapped, so decrement the high 16 bits.
7481          */
7482         if ((u16)tsf_l < rx_tsf_0_15) {
7483                 rx_tsf_16_31 -= 1;
7484                 if (rx_tsf_16_31 == 0xffff)
7485                         tsf_h -= 1;
7486         }
7487
7488         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7489 }
7490
7491 static void
7492 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7493                      struct sk_buff *p,
7494                      struct ieee80211_rx_status *rx_status)
7495 {
7496         int preamble;
7497         int channel;
7498         u32 rspec;
7499         unsigned char *plcp;
7500
7501         /* fill in TSF and flag its presence */
7502         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7503         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7504
7505         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7506
7507         if (channel > 14) {
7508                 rx_status->band = IEEE80211_BAND_5GHZ;
7509                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7510                                         WF_CHAN_FACTOR_5_G/2, channel);
7511
7512         } else {
7513                 rx_status->band = IEEE80211_BAND_2GHZ;
7514                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7515         }
7516
7517         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7518
7519         /* noise */
7520         /* qual */
7521         rx_status->antenna =
7522                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7523
7524         plcp = p->data;
7525
7526         rspec = brcms_c_compute_rspec(rxh, plcp);
7527         if (is_mcs_rate(rspec)) {
7528                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7529                 rx_status->flag |= RX_FLAG_HT;
7530                 if (rspec_is40mhz(rspec))
7531                         rx_status->flag |= RX_FLAG_40MHZ;
7532         } else {
7533                 switch (rspec2rate(rspec)) {
7534                 case BRCM_RATE_1M:
7535                         rx_status->rate_idx = 0;
7536                         break;
7537                 case BRCM_RATE_2M:
7538                         rx_status->rate_idx = 1;
7539                         break;
7540                 case BRCM_RATE_5M5:
7541                         rx_status->rate_idx = 2;
7542                         break;
7543                 case BRCM_RATE_11M:
7544                         rx_status->rate_idx = 3;
7545                         break;
7546                 case BRCM_RATE_6M:
7547                         rx_status->rate_idx = 4;
7548                         break;
7549                 case BRCM_RATE_9M:
7550                         rx_status->rate_idx = 5;
7551                         break;
7552                 case BRCM_RATE_12M:
7553                         rx_status->rate_idx = 6;
7554                         break;
7555                 case BRCM_RATE_18M:
7556                         rx_status->rate_idx = 7;
7557                         break;
7558                 case BRCM_RATE_24M:
7559                         rx_status->rate_idx = 8;
7560                         break;
7561                 case BRCM_RATE_36M:
7562                         rx_status->rate_idx = 9;
7563                         break;
7564                 case BRCM_RATE_48M:
7565                         rx_status->rate_idx = 10;
7566                         break;
7567                 case BRCM_RATE_54M:
7568                         rx_status->rate_idx = 11;
7569                         break;
7570                 default:
7571                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7572                 }
7573
7574                 /*
7575                  * For 5GHz, we should decrease the index as it is
7576                  * a subset of the 2.4G rates. See bitrates field
7577                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7578                  */
7579                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7580                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7581
7582                 /* Determine short preamble and rate_idx */
7583                 preamble = 0;
7584                 if (is_cck_rate(rspec)) {
7585                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7586                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7587                 } else if (is_ofdm_rate(rspec)) {
7588                         rx_status->flag |= RX_FLAG_SHORTPRE;
7589                 } else {
7590                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7591                                   __func__);
7592                 }
7593         }
7594
7595         if (plcp3_issgi(plcp[3]))
7596                 rx_status->flag |= RX_FLAG_SHORT_GI;
7597
7598         if (rxh->RxStatus1 & RXS_DECERR) {
7599                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7600                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7601                           __func__);
7602         }
7603         if (rxh->RxStatus1 & RXS_FCSERR) {
7604                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7605                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7606                           __func__);
7607         }
7608 }
7609
7610 static void
7611 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7612                 struct sk_buff *p)
7613 {
7614         int len_mpdu;
7615         struct ieee80211_rx_status rx_status;
7616         struct ieee80211_hdr *hdr;
7617
7618         memset(&rx_status, 0, sizeof(rx_status));
7619         prep_mac80211_status(wlc, rxh, p, &rx_status);
7620
7621         /* mac header+body length, exclude CRC and plcp header */
7622         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7623         skb_pull(p, D11_PHY_HDR_LEN);
7624         __skb_trim(p, len_mpdu);
7625
7626         /* unmute transmit */
7627         if (wlc->hw->suspended_fifos) {
7628                 hdr = (struct ieee80211_hdr *)p->data;
7629                 if (ieee80211_is_beacon(hdr->frame_control))
7630                         brcms_b_mute(wlc->hw, false);
7631         }
7632
7633         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7634         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7635 }
7636
7637 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7638  * number of bytes goes in the length field
7639  *
7640  * Formula given by HT PHY Spec v 1.13
7641  *   len = 3(nsyms + nstream + 3) - 3
7642  */
7643 u16
7644 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7645                       uint mac_len)
7646 {
7647         uint nsyms, len = 0, kNdps;
7648
7649         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7650                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7651
7652         if (is_mcs_rate(ratespec)) {
7653                 uint mcs = ratespec & RSPEC_RATE_MASK;
7654                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7655                                   rspec_stc(ratespec);
7656
7657                 /*
7658                  * the payload duration calculation matches that
7659                  * of regular ofdm
7660                  */
7661                 /* 1000Ndbps = kbps * 4 */
7662                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7663                                    rspec_issgi(ratespec)) * 4;
7664
7665                 if (rspec_stc(ratespec) == 0)
7666                         nsyms =
7667                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7668                                   APHY_TAIL_NBITS) * 1000, kNdps);
7669                 else
7670                         /* STBC needs to have even number of symbols */
7671                         nsyms =
7672                             2 *
7673                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7674                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7675
7676                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7677                 nsyms += (tot_streams + 3);
7678                 /*
7679                  * 3 bytes/symbol @ legacy 6Mbps rate
7680                  * (-3) excluding service bits and tail bits
7681                  */
7682                 len = (3 * nsyms) - 3;
7683         }
7684
7685         return (u16) len;
7686 }
7687
7688 static void
7689 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7690 {
7691         const struct brcms_c_rateset *rs_dflt;
7692         struct brcms_c_rateset rs;
7693         u8 rate;
7694         u16 entry_ptr;
7695         u8 plcp[D11_PHY_HDR_LEN];
7696         u16 dur, sifs;
7697         uint i;
7698
7699         sifs = get_sifs(wlc->band);
7700
7701         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7702
7703         brcms_c_rateset_copy(rs_dflt, &rs);
7704         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7705
7706         /*
7707          * walk the phy rate table and update MAC core SHM
7708          * basic rate table entries
7709          */
7710         for (i = 0; i < rs.count; i++) {
7711                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7712
7713                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7714
7715                 /* Calculate the Probe Response PLCP for the given rate */
7716                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7717
7718                 /*
7719                  * Calculate the duration of the Probe Response
7720                  * frame plus SIFS for the MAC
7721                  */
7722                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7723                                                 BRCMS_LONG_PREAMBLE, frame_len);
7724                 dur += sifs;
7725
7726                 /* Update the SHM Rate Table entry Probe Response values */
7727                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7728                               (u16) (plcp[0] + (plcp[1] << 8)));
7729                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7730                               (u16) (plcp[2] + (plcp[3] << 8)));
7731                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7732         }
7733 }
7734
7735 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7736  *
7737  *      PLCP header is 6 bytes.
7738  *      802.11 A3 header is 24 bytes.
7739  *      Max beacon frame body template length is 112 bytes.
7740  *      Max probe resp frame body template length is 110 bytes.
7741  *
7742  *      *len on input contains the max length of the packet available.
7743  *
7744  *      The *len value is set to the number of bytes in buf used, and starts
7745  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7746  */
7747 static void
7748 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7749                          u32 bcn_rspec,
7750                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7751 {
7752         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7753         struct cck_phy_hdr *plcp;
7754         struct ieee80211_mgmt *h;
7755         int hdr_len, body_len;
7756
7757         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7758
7759         /* calc buffer size provided for frame body */
7760         body_len = *len - hdr_len;
7761         /* return actual size */
7762         *len = hdr_len + body_len;
7763
7764         /* format PHY and MAC headers */
7765         memset((char *)buf, 0, hdr_len);
7766
7767         plcp = (struct cck_phy_hdr *) buf;
7768
7769         /*
7770          * PLCP for Probe Response frames are filled in from
7771          * core's rate table
7772          */
7773         if (type == IEEE80211_STYPE_BEACON)
7774                 /* fill in PLCP */
7775                 brcms_c_compute_plcp(wlc, bcn_rspec,
7776                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7777                                  (u8 *) plcp);
7778
7779         /* "Regular" and 16 MBSS but not for 4 MBSS */
7780         /* Update the phytxctl for the beacon based on the rspec */
7781         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7782
7783         h = (struct ieee80211_mgmt *)&plcp[1];
7784
7785         /* fill in 802.11 header */
7786         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7787
7788         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7789         /* A1 filled in by MAC for prb resp, broadcast for bcn */
7790         if (type == IEEE80211_STYPE_BEACON)
7791                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
7792         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7793         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7794
7795         /* SEQ filled in by MAC */
7796 }
7797
7798 int brcms_c_get_header_len(void)
7799 {
7800         return TXOFF;
7801 }
7802
7803 /*
7804  * Update all beacons for the system.
7805  */
7806 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7807 {
7808         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7809
7810         if (bsscfg->up && !bsscfg->BSS)
7811                 /* Clear the soft intmask */
7812                 wlc->defmacintmask &= ~MI_BCNTPL;
7813 }
7814
7815 /* Write ssid into shared memory */
7816 static void
7817 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7818 {
7819         u8 *ssidptr = cfg->SSID;
7820         u16 base = M_SSID;
7821         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7822
7823         /* padding the ssid with zero and copy it into shm */
7824         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7825         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7826
7827         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7828         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7829 }
7830
7831 static void
7832 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7833                               struct brcms_bss_cfg *cfg,
7834                               bool suspend)
7835 {
7836         u16 prb_resp[BCN_TMPL_LEN / 2];
7837         int len = BCN_TMPL_LEN;
7838
7839         /*
7840          * write the probe response to hardware, or save in
7841          * the config structure
7842          */
7843
7844         /* create the probe response template */
7845         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7846                                  cfg, prb_resp, &len);
7847
7848         if (suspend)
7849                 brcms_c_suspend_mac_and_wait(wlc);
7850
7851         /* write the probe response into the template region */
7852         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7853                                     (len + 3) & ~3, prb_resp);
7854
7855         /* write the length of the probe response frame (+PLCP/-FCS) */
7856         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7857
7858         /* write the SSID and SSID length */
7859         brcms_c_shm_ssid_upd(wlc, cfg);
7860
7861         /*
7862          * Write PLCP headers and durations for probe response frames
7863          * at all rates. Use the actual frame length covered by the
7864          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7865          * by subtracting the PLCP len and adding the FCS.
7866          */
7867         len += (-D11_PHY_HDR_LEN + FCS_LEN);
7868         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7869
7870         if (suspend)
7871                 brcms_c_enable_mac(wlc);
7872 }
7873
7874 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7875 {
7876         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7877
7878         /* update AP or IBSS probe responses */
7879         if (bsscfg->up && !bsscfg->BSS)
7880                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7881 }
7882
7883 /* prepares pdu for transmission. returns BCM error codes */
7884 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7885 {
7886         uint fifo;
7887         struct d11txh *txh;
7888         struct ieee80211_hdr *h;
7889         struct scb *scb;
7890
7891         txh = (struct d11txh *) (pdu->data);
7892         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7893
7894         /* get the pkt queue info. This was put at brcms_c_sendctl or
7895          * brcms_c_send for PDU */
7896         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7897
7898         scb = NULL;
7899
7900         *fifop = fifo;
7901
7902         /* return if insufficient dma resources */
7903         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7904                 /* Mark precedences related to this FIFO, unsendable */
7905                 /* A fifo is full. Clear precedences related to that FIFO */
7906                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7907                 return -EBUSY;
7908         }
7909         return 0;
7910 }
7911
7912 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7913                            uint *blocks)
7914 {
7915         if (fifo >= NFIFO)
7916                 return -EINVAL;
7917
7918         *blocks = wlc_hw->xmtfifo_sz[fifo];
7919
7920         return 0;
7921 }
7922
7923 void
7924 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7925                   const u8 *addr)
7926 {
7927         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7928         if (match_reg_offset == RCM_BSSID_OFFSET)
7929                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7930 }
7931
7932 /*
7933  * Flag 'scan in progress' to withhold dynamic phy calibration
7934  */
7935 void brcms_c_scan_start(struct brcms_c_info *wlc)
7936 {
7937         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7938 }
7939
7940 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7941 {
7942         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7943 }
7944
7945 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7946 {
7947         wlc->pub->associated = state;
7948         wlc->bsscfg->associated = state;
7949 }
7950
7951 /*
7952  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7953  * AMPDU traffic, packets pending in hardware have to be invalidated so that
7954  * when later on hardware releases them, they can be handled appropriately.
7955  */
7956 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7957                                struct ieee80211_sta *sta,
7958                                void (*dma_callback_fn))
7959 {
7960         struct dma_pub *dmah;
7961         int i;
7962         for (i = 0; i < NFIFO; i++) {
7963                 dmah = hw->di[i];
7964                 if (dmah != NULL)
7965                         dma_walk_packets(dmah, dma_callback_fn, sta);
7966         }
7967 }
7968
7969 int brcms_c_get_curband(struct brcms_c_info *wlc)
7970 {
7971         return wlc->band->bandunit;
7972 }
7973
7974 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7975 {
7976         int timeout = 20;
7977
7978         /* flush packet queue when requested */
7979         if (drop)
7980                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
7981
7982         /* wait for queue and DMA fifos to run dry */
7983         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) {
7984                 brcms_msleep(wlc->wl, 1);
7985
7986                 if (--timeout == 0)
7987                         break;
7988         }
7989
7990         WARN_ON_ONCE(timeout == 0);
7991 }
7992
7993 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
7994 {
7995         wlc->bcn_li_bcn = interval;
7996         if (wlc->pub->up)
7997                 brcms_c_bcn_li_upd(wlc);
7998 }
7999
8000 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8001 {
8002         uint qdbm;
8003
8004         /* Remove override bit and clip to max qdbm value */
8005         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8006         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8007 }
8008
8009 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8010 {
8011         uint qdbm;
8012         bool override;
8013
8014         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8015
8016         /* Return qdbm units */
8017         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8018 }
8019
8020 /* Process received frames */
8021 /*
8022  * Return true if more frames need to be processed. false otherwise.
8023  * Param 'bound' indicates max. # frames to process before break out.
8024  */
8025 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8026 {
8027         struct d11rxhdr *rxh;
8028         struct ieee80211_hdr *h;
8029         uint len;
8030         bool is_amsdu;
8031
8032         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8033
8034         /* frame starts with rxhdr */
8035         rxh = (struct d11rxhdr *) (p->data);
8036
8037         /* strip off rxhdr */
8038         skb_pull(p, BRCMS_HWRXOFF);
8039
8040         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8041         if (rxh->RxStatus1 & RXS_PBPRES) {
8042                 if (p->len < 2) {
8043                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8044                                   "len %d\n", wlc->pub->unit, p->len);
8045                         goto toss;
8046                 }
8047                 skb_pull(p, 2);
8048         }
8049
8050         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8051         len = p->len;
8052
8053         if (rxh->RxStatus1 & RXS_FCSERR) {
8054                 if (!(wlc->filter_flags & FIF_FCSFAIL))
8055                         goto toss;
8056         }
8057
8058         /* check received pkt has at least frame control field */
8059         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8060                 goto toss;
8061
8062         /* not supporting A-MSDU */
8063         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8064         if (is_amsdu)
8065                 goto toss;
8066
8067         brcms_c_recvctl(wlc, rxh, p);
8068         return;
8069
8070  toss:
8071         brcmu_pkt_buf_free_skb(p);
8072 }
8073
8074 /* Process received frames */
8075 /*
8076  * Return true if more frames need to be processed. false otherwise.
8077  * Param 'bound' indicates max. # frames to process before break out.
8078  */
8079 static bool
8080 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8081 {
8082         struct sk_buff *p;
8083         struct sk_buff *next = NULL;
8084         struct sk_buff_head recv_frames;
8085
8086         uint n = 0;
8087         uint bound_limit = bound ? RXBND : -1;
8088
8089         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8090         skb_queue_head_init(&recv_frames);
8091
8092         /* gather received frames */
8093         while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
8094
8095                 /* !give others some time to run! */
8096                 if (++n >= bound_limit)
8097                         break;
8098         }
8099
8100         /* post more rbufs */
8101         dma_rxfill(wlc_hw->di[fifo]);
8102
8103         /* process each frame */
8104         skb_queue_walk_safe(&recv_frames, p, next) {
8105                 struct d11rxhdr_le *rxh_le;
8106                 struct d11rxhdr *rxh;
8107
8108                 skb_unlink(p, &recv_frames);
8109                 rxh_le = (struct d11rxhdr_le *)p->data;
8110                 rxh = (struct d11rxhdr *)p->data;
8111
8112                 /* fixup rx header endianness */
8113                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8114                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8115                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8116                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8117                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8118                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8119                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8120                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8121                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8122                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8123                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8124
8125                 brcms_c_recv(wlc_hw->wlc, p);
8126         }
8127
8128         return n >= bound_limit;
8129 }
8130
8131 /* second-level interrupt processing
8132  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8133  *   Param 'bounded' indicates if applicable loops should be bounded.
8134  */
8135 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8136 {
8137         u32 macintstatus;
8138         struct brcms_hardware *wlc_hw = wlc->hw;
8139         struct bcma_device *core = wlc_hw->d11core;
8140         struct wiphy *wiphy = wlc->wiphy;
8141
8142         if (brcms_deviceremoved(wlc)) {
8143                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8144                           __func__);
8145                 brcms_down(wlc->wl);
8146                 return false;
8147         }
8148
8149         /* grab and clear the saved software intstatus bits */
8150         macintstatus = wlc->macintstatus;
8151         wlc->macintstatus = 0;
8152
8153         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8154                wlc_hw->unit, macintstatus);
8155
8156         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8157
8158         /* tx status */
8159         if (macintstatus & MI_TFS) {
8160                 bool fatal;
8161                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8162                         wlc->macintstatus |= MI_TFS;
8163                 if (fatal) {
8164                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8165                         goto fatal;
8166                 }
8167         }
8168
8169         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8170                 brcms_c_tbtt(wlc);
8171
8172         /* ATIM window end */
8173         if (macintstatus & MI_ATIMWINEND) {
8174                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8175                 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
8176                 wlc->qvalid = 0;
8177         }
8178
8179         /*
8180          * received data or control frame, MI_DMAINT is
8181          * indication of RX_FIFO interrupt
8182          */
8183         if (macintstatus & MI_DMAINT)
8184                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8185                         wlc->macintstatus |= MI_DMAINT;
8186
8187         /* noise sample collected */
8188         if (macintstatus & MI_BG_NOISE)
8189                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8190
8191         if (macintstatus & MI_GP0) {
8192                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8193                           "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8194
8195                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8196                             __func__, ai_get_chip_id(wlc_hw->sih),
8197                             ai_get_chiprev(wlc_hw->sih));
8198                 brcms_fatal_error(wlc_hw->wlc->wl);
8199         }
8200
8201         /* gptimer timeout */
8202         if (macintstatus & MI_TO)
8203                 bcma_write32(core, D11REGOFFS(gptimer), 0);
8204
8205         if (macintstatus & MI_RFDISABLE) {
8206                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8207                        " RF Disable Input\n", wlc_hw->unit);
8208                 brcms_rfkill_set_hw_state(wlc->wl);
8209         }
8210
8211         /* send any enq'd tx packets. Just makes sure to jump start tx */
8212         if (!pktq_empty(&wlc->pkt_queue->q))
8213                 brcms_c_send_q(wlc);
8214
8215         /* it isn't done and needs to be resched if macintstatus is non-zero */
8216         return wlc->macintstatus != 0;
8217
8218  fatal:
8219         brcms_fatal_error(wlc_hw->wlc->wl);
8220         return wlc->macintstatus != 0;
8221 }
8222
8223 void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8224 {
8225         struct bcma_device *core = wlc->hw->d11core;
8226         u16 chanspec;
8227
8228         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8229
8230         /*
8231          * This will happen if a big-hammer was executed. In
8232          * that case, we want to go back to the channel that
8233          * we were on and not new channel
8234          */
8235         if (wlc->pub->associated)
8236                 chanspec = wlc->home_chanspec;
8237         else
8238                 chanspec = brcms_c_init_chanspec(wlc);
8239
8240         brcms_b_init(wlc->hw, chanspec);
8241
8242         /* update beacon listen interval */
8243         brcms_c_bcn_li_upd(wlc);
8244
8245         /* write ethernet address to core */
8246         brcms_c_set_mac(wlc->bsscfg);
8247         brcms_c_set_bssid(wlc->bsscfg);
8248
8249         /* Update tsf_cfprep if associated and up */
8250         if (wlc->pub->associated && wlc->bsscfg->up) {
8251                 u32 bi;
8252
8253                 /* get beacon period and convert to uS */
8254                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8255                 /*
8256                  * update since init path would reset
8257                  * to default value
8258                  */
8259                 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8260                              bi << CFPREP_CBI_SHIFT);
8261
8262                 /* Update maccontrol PM related bits */
8263                 brcms_c_set_ps_ctrl(wlc);
8264         }
8265
8266         brcms_c_bandinit_ordered(wlc, chanspec);
8267
8268         /* init probe response timeout */
8269         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8270
8271         /* init max burst txop (framebursting) */
8272         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8273                       (wlc->
8274                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8275
8276         /* initialize maximum allowed duty cycle */
8277         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8278         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8279
8280         /*
8281          * Update some shared memory locations related to
8282          * max AMPDU size allowed to received
8283          */
8284         brcms_c_ampdu_shm_upd(wlc->ampdu);
8285
8286         /* band-specific inits */
8287         brcms_c_bsinit(wlc);
8288
8289         /* Enable EDCF mode (while the MAC is suspended) */
8290         bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8291         brcms_c_edcf_setparams(wlc, false);
8292
8293         /* Init precedence maps for empty FIFOs */
8294         brcms_c_tx_prec_map_init(wlc);
8295
8296         /* read the ucode version if we have not yet done so */
8297         if (wlc->ucode_rev == 0) {
8298                 wlc->ucode_rev =
8299                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8300                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8301         }
8302
8303         /* ..now really unleash hell (allow the MAC out of suspend) */
8304         brcms_c_enable_mac(wlc);
8305
8306         /* suspend the tx fifos and mute the phy for preism cac time */
8307         if (mute_tx)
8308                 brcms_b_mute(wlc->hw, true);
8309
8310         /* clear tx flow control */
8311         brcms_c_txflowcontrol_reset(wlc);
8312
8313         /* enable the RF Disable Delay timer */
8314         bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8315
8316         /*
8317          * Initialize WME parameters; if they haven't been set by some other
8318          * mechanism (IOVar, etc) then read them from the hardware.
8319          */
8320         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8321                 /* Uninitialized; read from HW */
8322                 int ac;
8323
8324                 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8325                         wlc->wme_retries[ac] =
8326                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8327         }
8328 }
8329
8330 /*
8331  * The common driver entry routine. Error codes should be unique
8332  */
8333 struct brcms_c_info *
8334 brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8335                bool piomode, uint *perr)
8336 {
8337         struct brcms_c_info *wlc;
8338         uint err = 0;
8339         uint i, j;
8340         struct brcms_pub *pub;
8341
8342         /* allocate struct brcms_c_info state and its substructures */
8343         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, 0);
8344         if (wlc == NULL)
8345                 goto fail;
8346         wlc->wiphy = wl->wiphy;
8347         pub = wlc->pub;
8348
8349 #if defined(DEBUG)
8350         wlc_info_dbg = wlc;
8351 #endif
8352
8353         wlc->band = wlc->bandstate[0];
8354         wlc->core = wlc->corestate;
8355         wlc->wl = wl;
8356         pub->unit = unit;
8357         pub->_piomode = piomode;
8358         wlc->bandinit_pending = false;
8359
8360         /* populate struct brcms_c_info with default values  */
8361         brcms_c_info_init(wlc, unit);
8362
8363         /* update sta/ap related parameters */
8364         brcms_c_ap_upd(wlc);
8365
8366         /*
8367          * low level attach steps(all hw accesses go
8368          * inside, no more in rest of the attach)
8369          */
8370         err = brcms_b_attach(wlc, core, unit, piomode);
8371         if (err)
8372                 goto fail;
8373
8374         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8375
8376         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8377
8378         /* disable allowed duty cycle */
8379         wlc->tx_duty_cycle_ofdm = 0;
8380         wlc->tx_duty_cycle_cck = 0;
8381
8382         brcms_c_stf_phy_chain_calc(wlc);
8383
8384         /* txchain 1: txant 0, txchain 2: txant 1 */
8385         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8386                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8387
8388         /* push to BMAC driver */
8389         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8390                                wlc->stf->hw_rxchain);
8391
8392         /* pull up some info resulting from the low attach */
8393         for (i = 0; i < NFIFO; i++)
8394                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8395
8396         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8397         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8398
8399         for (j = 0; j < wlc->pub->_nbands; j++) {
8400                 wlc->band = wlc->bandstate[j];
8401
8402                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8403                         err = 24;
8404                         goto fail;
8405                 }
8406
8407                 /* default contention windows size limits */
8408                 wlc->band->CWmin = APHY_CWMIN;
8409                 wlc->band->CWmax = PHY_CWMAX;
8410
8411                 /* init gmode value */
8412                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8413                         wlc->band->gmode = GMODE_AUTO;
8414                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8415                                            wlc->band->gmode);
8416                 }
8417
8418                 /* init _n_enab supported mode */
8419                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8420                         pub->_n_enab = SUPPORT_11N;
8421                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8422                                                    ((pub->_n_enab ==
8423                                                      SUPPORT_11N) ? WL_11N_2x2 :
8424                                                     WL_11N_3x3));
8425                 }
8426
8427                 /* init per-band default rateset, depend on band->gmode */
8428                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8429
8430                 /* fill in hw_rateset */
8431                 brcms_c_rateset_filter(&wlc->band->defrateset,
8432                                    &wlc->band->hw_rateset, false,
8433                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8434                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8435         }
8436
8437         /*
8438          * update antenna config due to
8439          * wlc->stf->txant/txchain/ant_rx_ovr change
8440          */
8441         brcms_c_stf_phy_txant_upd(wlc);
8442
8443         /* attach each modules */
8444         err = brcms_c_attach_module(wlc);
8445         if (err != 0)
8446                 goto fail;
8447
8448         if (!brcms_c_timers_init(wlc, unit)) {
8449                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8450                           __func__);
8451                 err = 32;
8452                 goto fail;
8453         }
8454
8455         /* depend on rateset, gmode */
8456         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8457         if (!wlc->cmi) {
8458                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8459                           "\n", unit, __func__);
8460                 err = 33;
8461                 goto fail;
8462         }
8463
8464         /* init default when all parameters are ready, i.e. ->rateset */
8465         brcms_c_bss_default_init(wlc);
8466
8467         /*
8468          * Complete the wlc default state initializations..
8469          */
8470
8471         /* allocate our initial queue */
8472         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8473         if (wlc->pkt_queue == NULL) {
8474                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8475                           unit, __func__);
8476                 err = 100;
8477                 goto fail;
8478         }
8479
8480         wlc->bsscfg->wlc = wlc;
8481
8482         wlc->mimoft = FT_HT;
8483         wlc->mimo_40txbw = AUTO;
8484         wlc->ofdm_40txbw = AUTO;
8485         wlc->cck_40txbw = AUTO;
8486         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8487
8488         /* Set default values of SGI */
8489         if (BRCMS_SGI_CAP_PHY(wlc)) {
8490                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8491                                                BRCMS_N_SGI_40));
8492         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8493                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8494                                                BRCMS_N_SGI_40));
8495         } else {
8496                 brcms_c_ht_update_sgi_rx(wlc, 0);
8497         }
8498
8499         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8500
8501         if (perr)
8502                 *perr = 0;
8503
8504         return wlc;
8505
8506  fail:
8507         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8508                   unit, __func__, err);
8509         if (wlc)
8510                 brcms_c_detach(wlc);
8511
8512         if (perr)
8513                 *perr = err;
8514         return NULL;
8515 }