drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46
  47         struct edid *edid;
  48
  49         int fitting_mode;
  50         u32 pfit_control;
  51         u32 pfit_pgm_ratios;
  52         bool pfit_dirty;
  53
  54         struct drm_display_mode *fixed_mode;
  55 };
  56
  57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds, base.base);
  60 }
  61
  62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  63 {
  64         return container_of(intel_attached_encoder(connector),
  65                             struct intel_lvds, base);
  66 }
  67
  68 /**
  69  * Sets the power state for the panel.
  70  */
  71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  72 {
  73         struct drm_device *dev = intel_lvds->base.base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg, stat_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80                 stat_reg = PCH_PP_STATUS;
  81         } else {
  82                 ctl_reg = PP_CONTROL;
  83                 lvds_reg = LVDS;
  84                 stat_reg = PP_STATUS;
  85         }
  86
  87         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  88
  89         if (intel_lvds->pfit_dirty) {
  90                 /*
  91                  * Enable automatic panel scaling so that non-native modes
  92                  * fill the screen.  The panel fitter should only be
  93                  * adjusted whilst the pipe is disabled, according to
  94                  * register description and PRM.
  95                  */
  96                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  97                               intel_lvds->pfit_control,
  98                               intel_lvds->pfit_pgm_ratios);
  99
 100                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                 intel_lvds->pfit_dirty = false;
 103         }
 104
 105         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 106         POSTING_READ(lvds_reg);
 107         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 108                 DRM_ERROR("timed out waiting for panel to power on\n");
 109
 110         intel_panel_enable_backlight(dev);
 111 }
 112
 113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 114 {
 115         struct drm_device *dev = intel_lvds->base.base.dev;
 116         struct drm_i915_private *dev_priv = dev->dev_private;
 117         u32 ctl_reg, lvds_reg, stat_reg;
 118
 119         if (HAS_PCH_SPLIT(dev)) {
 120                 ctl_reg = PCH_PP_CONTROL;
 121                 lvds_reg = PCH_LVDS;
 122                 stat_reg = PCH_PP_STATUS;
 123         } else {
 124                 ctl_reg = PP_CONTROL;
 125                 lvds_reg = LVDS;
 126                 stat_reg = PP_STATUS;
 127         }
 128
 129         intel_panel_disable_backlight(dev);
 130
 131         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 132         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 133                 DRM_ERROR("timed out waiting for panel to power off\n");
 134
 135         if (intel_lvds->pfit_control) {
 136                 I915_WRITE(PFIT_CONTROL, 0);
 137                 intel_lvds->pfit_dirty = true;
 138         }
 139
 140         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 141         POSTING_READ(lvds_reg);
 142 }
 143
 144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 145 {
 146         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 147
 148         if (mode == DRM_MODE_DPMS_ON)
 149                 intel_lvds_enable(intel_lvds);
 150         else
 151                 intel_lvds_disable(intel_lvds);
 152
 153         /* XXX: We never power down the LVDS pairs. */
 154 }
 155
 156 static int intel_lvds_mode_valid(struct drm_connector *connector,
 157                                  struct drm_display_mode *mode)
 158 {
 159         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 160         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 161
 162         if (mode->hdisplay > fixed_mode->hdisplay)
 163                 return MODE_PANEL;
 164         if (mode->vdisplay > fixed_mode->vdisplay)
 165                 return MODE_PANEL;
 166
 167         return MODE_OK;
 168 }
 169
 170 static void
 171 centre_horizontally(struct drm_display_mode *mode,
 172                     int width)
 173 {
 174         u32 border, sync_pos, blank_width, sync_width;
 175
 176         /* keep the hsync and hblank widths constant */
 177         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 178         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 179         sync_pos = (blank_width - sync_width + 1) / 2;
 180
 181         border = (mode->hdisplay - width + 1) / 2;
 182         border += border & 1; /* make the border even */
 183
 184         mode->crtc_hdisplay = width;
 185         mode->crtc_hblank_start = width + border;
 186         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 187
 188         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 189         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 190
 191         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 192 }
 193
 194 static void
 195 centre_vertically(struct drm_display_mode *mode,
 196                   int height)
 197 {
 198         u32 border, sync_pos, blank_width, sync_width;
 199
 200         /* keep the vsync and vblank widths constant */
 201         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 202         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 203         sync_pos = (blank_width - sync_width + 1) / 2;
 204
 205         border = (mode->vdisplay - height + 1) / 2;
 206
 207         mode->crtc_vdisplay = height;
 208         mode->crtc_vblank_start = height + border;
 209         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 210
 211         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 212         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 213
 214         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 215 }
 216
 217 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 218 {
 219         /*
 220          * Floating point operation is not supported. So the FACTOR
 221          * is defined, which can avoid the floating point computation
 222          * when calculating the panel ratio.
 223          */
 224 #define ACCURACY 12
 225 #define FACTOR (1 << ACCURACY)
 226         u32 ratio = source * FACTOR / target;
 227         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 228 }
 229
 230 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 231                                   struct drm_display_mode *mode,
 232                                   struct drm_display_mode *adjusted_mode)
 233 {
 234         struct drm_device *dev = encoder->dev;
 235         struct drm_i915_private *dev_priv = dev->dev_private;
 236         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 237         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 238         struct drm_encoder *tmp_encoder;
 239         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 240         int pipe;
 241
 242         /* Should never happen!! */
 243         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 244                 DRM_ERROR("Can't support LVDS on pipe A\n");
 245                 return false;
 246         }
 247
 248         /* Should never happen!! */
 249         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 250                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 251                         DRM_ERROR("Can't enable LVDS and another "
 252                                "encoder on the same pipe\n");
 253                         return false;
 254                 }
 255         }
 256
 257         /*
 258          * We have timings from the BIOS for the panel, put them in
 259          * to the adjusted mode.  The CRTC will be set up for this mode,
 260          * with the panel scaling set up to source from the H/VDisplay
 261          * of the original mode.
 262          */
 263         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 264
 265         if (HAS_PCH_SPLIT(dev)) {
 266                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 267                                         mode, adjusted_mode);
 268                 return true;
 269         }
 270
 271         /* Native modes don't need fitting */
 272         if (adjusted_mode->hdisplay == mode->hdisplay &&
 273             adjusted_mode->vdisplay == mode->vdisplay)
 274                 goto out;
 275
 276         /* 965+ wants fuzzy fitting */
 277         if (INTEL_INFO(dev)->gen >= 4)
 278                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 279                                  PFIT_FILTER_FUZZY);
 280
 281         /*
 282          * Enable automatic panel scaling for non-native modes so that they fill
 283          * the screen.  Should be enabled before the pipe is enabled, according
 284          * to register description and PRM.
 285          * Change the value here to see the borders for debugging
 286          */
 287         for_each_pipe(pipe)
 288                 I915_WRITE(BCLRPAT(pipe), 0);
 289
 290         drm_mode_set_crtcinfo(adjusted_mode, 0);
 291
 292         switch (intel_lvds->fitting_mode) {
 293         case DRM_MODE_SCALE_CENTER:
 294                 /*
 295                  * For centered modes, we have to calculate border widths &
 296                  * heights and modify the values programmed into the CRTC.
 297                  */
 298                 centre_horizontally(adjusted_mode, mode->hdisplay);
 299                 centre_vertically(adjusted_mode, mode->vdisplay);
 300                 border = LVDS_BORDER_ENABLE;
 301                 break;
 302
 303         case DRM_MODE_SCALE_ASPECT:
 304                 /* Scale but preserve the aspect ratio */
 305                 if (INTEL_INFO(dev)->gen >= 4) {
 306                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 307                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 308
 309                         /* 965+ is easy, it does everything in hw */
 310                         if (scaled_width > scaled_height)
 311                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 312                         else if (scaled_width < scaled_height)
 313                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 314                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 315                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 316                 } else {
 317                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 318                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 319                         /*
 320                          * For earlier chips we have to calculate the scaling
 321                          * ratio by hand and program it into the
 322                          * PFIT_PGM_RATIO register
 323                          */
 324                         if (scaled_width > scaled_height) { /* pillar */
 325                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 326
 327                                 border = LVDS_BORDER_ENABLE;
 328                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 329                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 330                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 331                                                             bits << PFIT_VERT_SCALE_SHIFT);
 332                                         pfit_control |= (PFIT_ENABLE |
 333                                                          VERT_INTERP_BILINEAR |
 334                                                          HORIZ_INTERP_BILINEAR);
 335                                 }
 336                         } else if (scaled_width < scaled_height) { /* letter */
 337                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 338
 339                                 border = LVDS_BORDER_ENABLE;
 340                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 341                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 342                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 343                                                             bits << PFIT_VERT_SCALE_SHIFT);
 344                                         pfit_control |= (PFIT_ENABLE |
 345                                                          VERT_INTERP_BILINEAR |
 346                                                          HORIZ_INTERP_BILINEAR);
 347                                 }
 348                         } else
 349                                 /* Aspects match, Let hw scale both directions */
 350                                 pfit_control |= (PFIT_ENABLE |
 351                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 352                                                  VERT_INTERP_BILINEAR |
 353                                                  HORIZ_INTERP_BILINEAR);
 354                 }
 355                 break;
 356
 357         case DRM_MODE_SCALE_FULLSCREEN:
 358                 /*
 359                  * Full scaling, even if it changes the aspect ratio.
 360                  * Fortunately this is all done for us in hw.
 361                  */
 362                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 363                     mode->hdisplay != adjusted_mode->hdisplay) {
 364                         pfit_control |= PFIT_ENABLE;
 365                         if (INTEL_INFO(dev)->gen >= 4)
 366                                 pfit_control |= PFIT_SCALING_AUTO;
 367                         else
 368                                 pfit_control |= (VERT_AUTO_SCALE |
 369                                                  VERT_INTERP_BILINEAR |
 370                                                  HORIZ_AUTO_SCALE |
 371                                                  HORIZ_INTERP_BILINEAR);
 372                 }
 373                 break;
 374
 375         default:
 376                 break;
 377         }
 378
 379 out:
 380         /* If not enabling scaling, be consistent and always use 0. */
 381         if ((pfit_control & PFIT_ENABLE) == 0) {
 382                 pfit_control = 0;
 383                 pfit_pgm_ratios = 0;
 384         }
 385
 386         /* Make sure pre-965 set dither correctly */
 387         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 388                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 389
 390         if (pfit_control != intel_lvds->pfit_control ||
 391             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 392                 intel_lvds->pfit_control = pfit_control;
 393                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 394                 intel_lvds->pfit_dirty = true;
 395         }
 396         dev_priv->lvds_border_bits = border;
 397
 398         /*
 399          * XXX: It would be nice to support lower refresh rates on the
 400          * panels to reduce power consumption, and perhaps match the
 401          * user's requested refresh rate.
 402          */
 403
 404         return true;
 405 }
 406
 407 static void intel_lvds_prepare(struct drm_encoder *encoder)
 408 {
 409         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 410
 411         /*
 412          * Prior to Ironlake, we must disable the pipe if we want to adjust
 413          * the panel fitter. However at all other times we can just reset
 414          * the registers regardless.
 415          */
 416         if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
 417                 intel_lvds_disable(intel_lvds);
 418 }
 419
 420 static void intel_lvds_commit(struct drm_encoder *encoder)
 421 {
 422         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 423
 424         /* Always do a full power on as we do not know what state
 425          * we were left in.
 426          */
 427         intel_lvds_enable(intel_lvds);
 428 }
 429
 430 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 431                                 struct drm_display_mode *mode,
 432                                 struct drm_display_mode *adjusted_mode)
 433 {
 434         /*
 435          * The LVDS pin pair will already have been turned on in the
 436          * intel_crtc_mode_set since it has a large impact on the DPLL
 437          * settings.
 438          */
 439 }
 440
 441 /**
 442  * Detect the LVDS connection.
 443  *
 444  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 445  * connected and closed means disconnected.  We also send hotplug events as
 446  * needed, using lid status notification from the input layer.
 447  */
 448 static enum drm_connector_status
 449 intel_lvds_detect(struct drm_connector *connector, bool force)
 450 {
 451         struct drm_device *dev = connector->dev;
 452         enum drm_connector_status status;
 453
 454         status = intel_panel_detect(dev);
 455         if (status != connector_status_unknown)
 456                 return status;
 457
 458         return connector_status_connected;
 459 }
 460
 461 /**
 462  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 463  */
 464 static int intel_lvds_get_modes(struct drm_connector *connector)
 465 {
 466         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 467         struct drm_device *dev = connector->dev;
 468         struct drm_display_mode *mode;
 469
 470         if (intel_lvds->edid)
 471                 return drm_add_edid_modes(connector, intel_lvds->edid);
 472
 473         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 474         if (mode == NULL)
 475                 return 0;
 476
 477         drm_mode_probed_add(connector, mode);
 478         return 1;
 479 }
 480
 481 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 482 {
 483         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 484         return 1;
 485 }
 486
 487 /* The GPU hangs up on these systems if modeset is performed on LID open */
 488 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 489         {
 490                 .callback = intel_no_modeset_on_lid_dmi_callback,
 491                 .ident = "Toshiba Tecra A11",
 492                 .matches = {
 493                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 494                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 495                 },
 496         },
 497
 498         { }     /* terminating entry */
 499 };
 500
 501 /*
 502  * Lid events. Note the use of 'modeset_on_lid':
 503  *  - we set it on lid close, and reset it on open
 504  *  - we use it as a "only once" bit (ie we ignore
 505  *    duplicate events where it was already properly
 506  *    set/reset)
 507  *  - the suspend/resume paths will also set it to
 508  *    zero, since they restore the mode ("lid open").
 509  */
 510 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 511                             void *unused)
 512 {
 513         struct drm_i915_private *dev_priv =
 514                 container_of(nb, struct drm_i915_private, lid_notifier);
 515         struct drm_device *dev = dev_priv->dev;
 516         struct drm_connector *connector = dev_priv->int_lvds_connector;
 517
 518         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 519                 return NOTIFY_OK;
 520
 521         /*
 522          * check and update the status of LVDS connector after receiving
 523          * the LID nofication event.
 524          */
 525         if (connector)
 526                 connector->status = connector->funcs->detect(connector,
 527                                                              false);
 528
 529         /* Don't force modeset on machines where it causes a GPU lockup */
 530         if (dmi_check_system(intel_no_modeset_on_lid))
 531                 return NOTIFY_OK;
 532         if (!acpi_lid_open()) {
 533                 dev_priv->modeset_on_lid = 1;
 534                 return NOTIFY_OK;
 535         }
 536
 537         if (!dev_priv->modeset_on_lid)
 538                 return NOTIFY_OK;
 539
 540         dev_priv->modeset_on_lid = 0;
 541
 542         mutex_lock(&dev->mode_config.mutex);
 543         drm_helper_resume_force_mode(dev);
 544         mutex_unlock(&dev->mode_config.mutex);
 545
 546         return NOTIFY_OK;
 547 }
 548
 549 /**
 550  * intel_lvds_destroy - unregister and free LVDS structures
 551  * @connector: connector to free
 552  *
 553  * Unregister the DDC bus for this connector then free the driver private
 554  * structure.
 555  */
 556 static void intel_lvds_destroy(struct drm_connector *connector)
 557 {
 558         struct drm_device *dev = connector->dev;
 559         struct drm_i915_private *dev_priv = dev->dev_private;
 560
 561         intel_panel_destroy_backlight(dev);
 562
 563         if (dev_priv->lid_notifier.notifier_call)
 564                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 565         drm_sysfs_connector_remove(connector);
 566         drm_connector_cleanup(connector);
 567         kfree(connector);
 568 }
 569
 570 static int intel_lvds_set_property(struct drm_connector *connector,
 571                                    struct drm_property *property,
 572                                    uint64_t value)
 573 {
 574         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 575         struct drm_device *dev = connector->dev;
 576
 577         if (property == dev->mode_config.scaling_mode_property) {
 578                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 579
 580                 if (value == DRM_MODE_SCALE_NONE) {
 581                         DRM_DEBUG_KMS("no scaling not supported\n");
 582                         return -EINVAL;
 583                 }
 584
 585                 if (intel_lvds->fitting_mode == value) {
 586                         /* the LVDS scaling property is not changed */
 587                         return 0;
 588                 }
 589                 intel_lvds->fitting_mode = value;
 590                 if (crtc && crtc->enabled) {
 591                         /*
 592                          * If the CRTC is enabled, the display will be changed
 593                          * according to the new panel fitting mode.
 594                          */
 595                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 596                                 crtc->x, crtc->y, crtc->fb);
 597                 }
 598         }
 599
 600         return 0;
 601 }
 602
 603 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 604         .dpms = intel_lvds_dpms,
 605         .mode_fixup = intel_lvds_mode_fixup,
 606         .prepare = intel_lvds_prepare,
 607         .mode_set = intel_lvds_mode_set,
 608         .commit = intel_lvds_commit,
 609 };
 610
 611 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 612         .get_modes = intel_lvds_get_modes,
 613         .mode_valid = intel_lvds_mode_valid,
 614         .best_encoder = intel_best_encoder,
 615 };
 616
 617 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 618         .dpms = drm_helper_connector_dpms,
 619         .detect = intel_lvds_detect,
 620         .fill_modes = drm_helper_probe_single_connector_modes,
 621         .set_property = intel_lvds_set_property,
 622         .destroy = intel_lvds_destroy,
 623 };
 624
 625 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 626         .destroy = intel_encoder_destroy,
 627 };
 628
 629 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 630 {
 631         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 632         return 1;
 633 }
 634
 635 /* These systems claim to have LVDS, but really don't */
 636 static const struct dmi_system_id intel_no_lvds[] = {
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "Apple Mac Mini (Core series)",
 640                 .matches = {
 641                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 642                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "Apple Mac Mini (Core 2 series)",
 648                 .matches = {
 649                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 650                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "MSI IM-945GSE-A",
 656                 .matches = {
 657                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 658                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 659                 },
 660         },
 661         {
 662                 .callback = intel_no_lvds_dmi_callback,
 663                 .ident = "Dell Studio Hybrid",
 664                 .matches = {
 665                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 666                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 667                 },
 668         },
 669         {
 670                 .callback = intel_no_lvds_dmi_callback,
 671                 .ident = "Dell OptiPlex FX170",
 672                 .matches = {
 673                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 674                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 675                 },
 676         },
 677         {
 678                 .callback = intel_no_lvds_dmi_callback,
 679                 .ident = "AOpen Mini PC",
 680                 .matches = {
 681                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 682                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 683                 },
 684         },
 685         {
 686                 .callback = intel_no_lvds_dmi_callback,
 687                 .ident = "AOpen Mini PC MP915",
 688                 .matches = {
 689                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 690                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 691                 },
 692         },
 693         {
 694                 .callback = intel_no_lvds_dmi_callback,
 695                 .ident = "AOpen i915GMm-HFS",
 696                 .matches = {
 697                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 698                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 699                 },
 700         },
 701         {
 702                 .callback = intel_no_lvds_dmi_callback,
 703                 .ident = "AOpen i45GMx-I",
 704                 .matches = {
 705                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 706                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 707                 },
 708         },
 709         {
 710                 .callback = intel_no_lvds_dmi_callback,
 711                 .ident = "Aopen i945GTt-VFA",
 712                 .matches = {
 713                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 714                 },
 715         },
 716         {
 717                 .callback = intel_no_lvds_dmi_callback,
 718                 .ident = "Clientron U800",
 719                 .matches = {
 720                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 721                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 722                 },
 723         },
 724         {
 725                 .callback = intel_no_lvds_dmi_callback,
 726                 .ident = "Clientron E830",
 727                 .matches = {
 728                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 729                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 730                 },
 731         },
 732         {
 733                 .callback = intel_no_lvds_dmi_callback,
 734                 .ident = "Asus EeeBox PC EB1007",
 735                 .matches = {
 736                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 737                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 738                 },
 739         },
 740         {
 741                 .callback = intel_no_lvds_dmi_callback,
 742                 .ident = "Asus AT5NM10T-I",
 743                 .matches = {
 744                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 745                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 746                 },
 747         },
 748         {
 749                 .callback = intel_no_lvds_dmi_callback,
 750                 .ident = "Hewlett-Packard t5745",
 751                 .matches = {
 752                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 753                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 754                 },
 755         },
 756         {
 757                 .callback = intel_no_lvds_dmi_callback,
 758                 .ident = "Hewlett-Packard st5747",
 759                 .matches = {
 760                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 761                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 762                 },
 763         },
 764         {
 765                 .callback = intel_no_lvds_dmi_callback,
 766                 .ident = "MSI Wind Box DC500",
 767                 .matches = {
 768                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 769                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 770                 },
 771         },
 772
 773         { }     /* terminating entry */
 774 };
 775
 776 /**
 777  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 778  * @dev: drm device
 779  * @connector: LVDS connector
 780  *
 781  * Find the reduced downclock for LVDS in EDID.
 782  */
 783 static void intel_find_lvds_downclock(struct drm_device *dev,
 784                                       struct drm_display_mode *fixed_mode,
 785                                       struct drm_connector *connector)
 786 {
 787         struct drm_i915_private *dev_priv = dev->dev_private;
 788         struct drm_display_mode *scan;
 789         int temp_downclock;
 790
 791         temp_downclock = fixed_mode->clock;
 792         list_for_each_entry(scan, &connector->probed_modes, head) {
 793                 /*
 794                  * If one mode has the same resolution with the fixed_panel
 795                  * mode while they have the different refresh rate, it means
 796                  * that the reduced downclock is found for the LVDS. In such
 797                  * case we can set the different FPx0/1 to dynamically select
 798                  * between low and high frequency.
 799                  */
 800                 if (scan->hdisplay == fixed_mode->hdisplay &&
 801                     scan->hsync_start == fixed_mode->hsync_start &&
 802                     scan->hsync_end == fixed_mode->hsync_end &&
 803                     scan->htotal == fixed_mode->htotal &&
 804                     scan->vdisplay == fixed_mode->vdisplay &&
 805                     scan->vsync_start == fixed_mode->vsync_start &&
 806                     scan->vsync_end == fixed_mode->vsync_end &&
 807                     scan->vtotal == fixed_mode->vtotal) {
 808                         if (scan->clock < temp_downclock) {
 809                                 /*
 810                                  * The downclock is already found. But we
 811                                  * expect to find the lower downclock.
 812                                  */
 813                                 temp_downclock = scan->clock;
 814                         }
 815                 }
 816         }
 817         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 818                 /* We found the downclock for LVDS. */
 819                 dev_priv->lvds_downclock_avail = 1;
 820                 dev_priv->lvds_downclock = temp_downclock;
 821                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 822                               "Normal clock %dKhz, downclock %dKhz\n",
 823                               fixed_mode->clock, temp_downclock);
 824         }
 825 }
 826
 827 /*
 828  * Enumerate the child dev array parsed from VBT to check whether
 829  * the LVDS is present.
 830  * If it is present, return 1.
 831  * If it is not present, return false.
 832  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 833  */
 834 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 835                                    u8 *i2c_pin)
 836 {
 837         struct drm_i915_private *dev_priv = dev->dev_private;
 838         int i;
 839
 840         if (!dev_priv->child_dev_num)
 841                 return true;
 842
 843         for (i = 0; i < dev_priv->child_dev_num; i++) {
 844                 struct child_device_config *child = dev_priv->child_dev + i;
 845
 846                 /* If the device type is not LFP, continue.
 847                  * We have to check both the new identifiers as well as the
 848                  * old for compatibility with some BIOSes.
 849                  */
 850                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 851                     child->device_type != DEVICE_TYPE_LFP)
 852                         continue;
 853
 854                 if (child->i2c_pin)
 855                     *i2c_pin = child->i2c_pin;
 856
 857                 /* However, we cannot trust the BIOS writers to populate
 858                  * the VBT correctly.  Since LVDS requires additional
 859                  * information from AIM blocks, a non-zero addin offset is
 860                  * a good indicator that the LVDS is actually present.
 861                  */
 862                 if (child->addin_offset)
 863                         return true;
 864
 865                 /* But even then some BIOS writers perform some black magic
 866                  * and instantiate the device without reference to any
 867                  * additional data.  Trust that if the VBT was written into
 868                  * the OpRegion then they have validated the LVDS's existence.
 869                  */
 870                 if (dev_priv->opregion.vbt)
 871                         return true;
 872         }
 873
 874         return false;
 875 }
 876
 877 static bool intel_lvds_supported(struct drm_device *dev)
 878 {
 879         /* With the introduction of the PCH we gained a dedicated
 880          * LVDS presence pin, use it. */
 881         if (HAS_PCH_SPLIT(dev))
 882                 return true;
 883
 884         /* Otherwise LVDS was only attached to mobile products,
 885          * except for the inglorious 830gm */
 886         return IS_MOBILE(dev) && !IS_I830(dev);
 887 }
 888
 889 /**
 890  * intel_lvds_init - setup LVDS connectors on this device
 891  * @dev: drm device
 892  *
 893  * Create the connector, register the LVDS DDC bus, and try to figure out what
 894  * modes we can display on the LVDS panel (if present).
 895  */
 896 bool intel_lvds_init(struct drm_device *dev)
 897 {
 898         struct drm_i915_private *dev_priv = dev->dev_private;
 899         struct intel_lvds *intel_lvds;
 900         struct intel_encoder *intel_encoder;
 901         struct intel_connector *intel_connector;
 902         struct drm_connector *connector;
 903         struct drm_encoder *encoder;
 904         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 905         struct drm_crtc *crtc;
 906         u32 lvds;
 907         int pipe;
 908         u8 pin;
 909
 910         if (!intel_lvds_supported(dev))
 911                 return false;
 912
 913         /* Skip init on machines we know falsely report LVDS */
 914         if (dmi_check_system(intel_no_lvds))
 915                 return false;
 916
 917         pin = GMBUS_PORT_PANEL;
 918         if (!lvds_is_present_in_vbt(dev, &pin)) {
 919                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 920                 return false;
 921         }
 922
 923         if (HAS_PCH_SPLIT(dev)) {
 924                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 925                         return false;
 926                 if (dev_priv->edp.support) {
 927                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 928                         return false;
 929                 }
 930         }
 931
 932         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 933         if (!intel_lvds) {
 934                 return false;
 935         }
 936
 937         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 938         if (!intel_connector) {
 939                 kfree(intel_lvds);
 940                 return false;
 941         }
 942
 943         if (!HAS_PCH_SPLIT(dev)) {
 944                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 945         }
 946
 947         intel_encoder = &intel_lvds->base;
 948         encoder = &intel_encoder->base;
 949         connector = &intel_connector->base;
 950         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 951                            DRM_MODE_CONNECTOR_LVDS);
 952
 953         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 954                          DRM_MODE_ENCODER_LVDS);
 955
 956         intel_connector_attach_encoder(intel_connector, intel_encoder);
 957         intel_encoder->type = INTEL_OUTPUT_LVDS;
 958
 959         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 960         if (HAS_PCH_SPLIT(dev))
 961                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 962         else
 963                 intel_encoder->crtc_mask = (1 << 1);
 964
 965         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 966         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 967         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 968         connector->interlace_allowed = false;
 969         connector->doublescan_allowed = false;
 970
 971         /* create the scaling mode property */
 972         drm_mode_create_scaling_mode_property(dev);
 973         /*
 974          * the initial panel fitting mode will be FULL_SCREEN.
 975          */
 976
 977         drm_connector_attach_property(&intel_connector->base,
 978                                       dev->mode_config.scaling_mode_property,
 979                                       DRM_MODE_SCALE_ASPECT);
 980         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 981         /*
 982          * LVDS discovery:
 983          * 1) check for EDID on DDC
 984          * 2) check for VBT data
 985          * 3) check to see if LVDS is already on
 986          *    if none of the above, no panel
 987          * 4) make sure lid is open
 988          *    if closed, act like it's not there for now
 989          */
 990
 991         /*
 992          * Attempt to get the fixed panel mode from DDC.  Assume that the
 993          * preferred mode is the right one.
 994          */
 995         intel_lvds->edid = drm_get_edid(connector,
 996                                         &dev_priv->gmbus[pin].adapter);
 997         if (intel_lvds->edid) {
 998                 if (drm_add_edid_modes(connector,
 999                                        intel_lvds->edid)) {
1000                         drm_mode_connector_update_edid_property(connector,
1001                                                                 intel_lvds->edid);
1002                 } else {
1003                         kfree(intel_lvds->edid);
1004                         intel_lvds->edid = NULL;
1005                 }
1006         }
1007         if (!intel_lvds->edid) {
1008                 /* Didn't get an EDID, so
1009                  * Set wide sync ranges so we get all modes
1010                  * handed to valid_mode for checking
1011                  */
1012                 connector->display_info.min_vfreq = 0;
1013                 connector->display_info.max_vfreq = 200;
1014                 connector->display_info.min_hfreq = 0;
1015                 connector->display_info.max_hfreq = 200;
1016         }
1017
1018         list_for_each_entry(scan, &connector->probed_modes, head) {
1019                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1020                         intel_lvds->fixed_mode =
1021                                 drm_mode_duplicate(dev, scan);
1022                         intel_find_lvds_downclock(dev,
1023                                                   intel_lvds->fixed_mode,
1024                                                   connector);
1025                         goto out;
1026                 }
1027         }
1028
1029         /* Failed to get EDID, what about VBT? */
1030         if (dev_priv->lfp_lvds_vbt_mode) {
1031                 intel_lvds->fixed_mode =
1032                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1033                 if (intel_lvds->fixed_mode) {
1034                         intel_lvds->fixed_mode->type |=
1035                                 DRM_MODE_TYPE_PREFERRED;
1036                         goto out;
1037                 }
1038         }
1039
1040         /*
1041          * If we didn't get EDID, try checking if the panel is already turned
1042          * on.  If so, assume that whatever is currently programmed is the
1043          * correct mode.
1044          */
1045
1046         /* Ironlake: FIXME if still fail, not try pipe mode now */
1047         if (HAS_PCH_SPLIT(dev))
1048                 goto failed;
1049
1050         lvds = I915_READ(LVDS);
1051         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1052         crtc = intel_get_crtc_for_pipe(dev, pipe);
1053
1054         if (crtc && (lvds & LVDS_PORT_EN)) {
1055                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1056                 if (intel_lvds->fixed_mode) {
1057                         intel_lvds->fixed_mode->type |=
1058                                 DRM_MODE_TYPE_PREFERRED;
1059                         goto out;
1060                 }
1061         }
1062
1063         /* If we still don't have a mode after all that, give up. */
1064         if (!intel_lvds->fixed_mode)
1065                 goto failed;
1066
1067 out:
1068         if (HAS_PCH_SPLIT(dev)) {
1069                 u32 pwm;
1070
1071                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1072
1073                 /* make sure PWM is enabled and locked to the LVDS pipe */
1074                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1075                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1076                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1077                 if (pipe)
1078                         pwm |= PWM_PIPE_B;
1079                 else
1080                         pwm &= ~PWM_PIPE_B;
1081                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1082
1083                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1084                 pwm |= PWM_PCH_ENABLE;
1085                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1086                 /*
1087                  * Unlock registers and just
1088                  * leave them unlocked
1089                  */
1090                 I915_WRITE(PCH_PP_CONTROL,
1091                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1092         } else {
1093                 /*
1094                  * Unlock registers and just
1095                  * leave them unlocked
1096                  */
1097                 I915_WRITE(PP_CONTROL,
1098                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1099         }
1100         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1101         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1102                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1103                 dev_priv->lid_notifier.notifier_call = NULL;
1104         }
1105         /* keep the LVDS connector */
1106         dev_priv->int_lvds_connector = connector;
1107         drm_sysfs_connector_add(connector);
1108
1109         intel_panel_setup_backlight(dev);
1110
1111         return true;
1112
1113 failed:
1114         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1115         drm_connector_cleanup(connector);
1116         drm_encoder_cleanup(encoder);
1117         kfree(intel_lvds);
1118         kfree(intel_connector);
1119         return false;
1120 }