1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <linux/stackprotector.h>
16 #include <linux/tick.h>
17 #include <linux/cpuidle.h>
18 #include <trace/events/power.h>
19 #include <linux/hw_breakpoint.h>
22 #include <asm/syscalls.h>
24 #include <asm/uaccess.h>
26 #include <asm/fpu-internal.h>
27 #include <asm/debugreg.h>
29 #include <xen/evtchn.h>
32 static DEFINE_PER_CPU(unsigned char, is_idle);
33 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
35 void idle_notifier_register(struct notifier_block *n)
37 atomic_notifier_chain_register(&idle_notifier, n);
39 EXPORT_SYMBOL_GPL(idle_notifier_register);
41 void idle_notifier_unregister(struct notifier_block *n)
43 atomic_notifier_chain_unregister(&idle_notifier, n);
45 EXPORT_SYMBOL_GPL(idle_notifier_unregister);
48 struct kmem_cache *task_xstate_cachep;
49 EXPORT_SYMBOL_GPL(task_xstate_cachep);
51 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
56 if (fpu_allocated(&src->thread.fpu)) {
57 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
58 ret = fpu_alloc(&dst->thread.fpu);
61 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
66 void free_thread_xstate(struct task_struct *tsk)
68 fpu_free(&tsk->thread.fpu);
71 void free_thread_info(struct thread_info *ti)
73 free_thread_xstate(ti->task);
74 free_pages((unsigned long)ti, THREAD_ORDER);
77 void arch_task_cache_init(void)
80 kmem_cache_create("task_xstate", xstate_size,
81 __alignof__(union thread_xstate),
82 SLAB_PANIC | SLAB_NOTRACK, NULL);
86 * Free current thread data structures etc..
88 void exit_thread(void)
90 struct task_struct *me = current;
91 struct thread_struct *t = &me->thread;
92 unsigned long *bp = t->io_bitmap_ptr;
95 struct physdev_set_iobitmap set_iobitmap;
97 t->io_bitmap_ptr = NULL;
98 clear_thread_flag(TIF_IO_BITMAP);
100 * Careful, clear this in the TSS too:
102 memset(&set_iobitmap, 0, sizeof(set_iobitmap));
103 WARN_ON(HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap,
105 t->io_bitmap_max = 0;
110 void show_regs(struct pt_regs *regs)
112 show_registers(regs);
113 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);
116 void show_regs_common(void)
118 const char *vendor, *product, *board;
120 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
123 product = dmi_get_system_info(DMI_PRODUCT_NAME);
127 /* Board Name is optional */
128 board = dmi_get_system_info(DMI_BOARD_NAME);
130 printk(KERN_CONT "\n");
131 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
132 current->pid, current->comm, print_tainted(),
133 init_utsname()->release,
134 (int)strcspn(init_utsname()->version, " "),
135 init_utsname()->version);
136 printk(KERN_CONT " %s %s", vendor, product);
138 printk(KERN_CONT "/%s", board);
139 printk(KERN_CONT "\n");
142 void flush_thread(void)
144 struct task_struct *tsk = current;
146 flush_ptrace_hw_breakpoint(tsk);
147 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
149 * Forget coprocessor state..
151 tsk->fpu_counter = 0;
156 static void hard_disable_TSC(void)
158 write_cr4(read_cr4() | X86_CR4_TSD);
161 void disable_TSC(void)
164 if (!test_and_set_thread_flag(TIF_NOTSC))
166 * Must flip the CPU state synchronously with
167 * TIF_NOTSC in the current running context.
173 static void hard_enable_TSC(void)
175 write_cr4(read_cr4() & ~X86_CR4_TSD);
178 static void enable_TSC(void)
181 if (test_and_clear_thread_flag(TIF_NOTSC))
183 * Must flip the CPU state synchronously with
184 * TIF_NOTSC in the current running context.
190 int get_tsc_mode(unsigned long adr)
194 if (test_thread_flag(TIF_NOTSC))
195 val = PR_TSC_SIGSEGV;
199 return put_user(val, (unsigned int __user *)adr);
202 int set_tsc_mode(unsigned int val)
204 if (val == PR_TSC_SIGSEGV)
206 else if (val == PR_TSC_ENABLE)
214 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p)
216 struct thread_struct *prev, *next;
218 prev = &prev_p->thread;
219 next = &next_p->thread;
221 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
222 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
223 unsigned long debugctl = get_debugctlmsr();
225 debugctl &= ~DEBUGCTLMSR_BTF;
226 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
227 debugctl |= DEBUGCTLMSR_BTF;
229 update_debugctlmsr(debugctl);
232 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
233 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
234 /* prev and next are different */
235 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
240 propagate_user_return_notify(prev_p, next_p);
243 int sys_fork(struct pt_regs *regs)
245 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
249 * This is trivial, and on the face of it looks like it
250 * could equally well be done in user mode.
252 * Not so, for quite unobvious reasons - register pressure.
253 * In user mode vfork() cannot have a stack frame, and if
254 * done by calling the "clone()" system call directly, you
255 * do not have enough call-clobbered registers to hold all
256 * the information you need.
258 int sys_vfork(struct pt_regs *regs)
260 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
265 sys_clone(unsigned long clone_flags, unsigned long newsp,
266 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
270 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
274 * This gets run with %si containing the
275 * function to call, and %di containing
278 extern void kernel_thread_helper(void);
281 * Create a kernel thread
283 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
287 memset(®s, 0, sizeof(regs));
289 regs.si = (unsigned long) fn;
290 regs.di = (unsigned long) arg;
295 regs.fs = __KERNEL_PERCPU;
296 regs.gs = __KERNEL_STACK_CANARY;
298 regs.ss = __KERNEL_DS;
302 regs.ip = (unsigned long) kernel_thread_helper;
303 regs.cs = __KERNEL_CS | get_kernel_rpl();
304 regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
306 /* Ok, create the new process.. */
307 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
309 EXPORT_SYMBOL(kernel_thread);
312 * sys_execve() executes a new program.
314 long sys_execve(const char __user *name,
315 const char __user *const __user *argv,
316 const char __user *const __user *envp, struct pt_regs *regs)
321 filename = getname(name);
322 error = PTR_ERR(filename);
323 if (IS_ERR(filename))
325 error = do_execve(filename, argv, envp, regs);
329 /* Make sure we don't return using sysenter.. */
330 set_thread_flag(TIF_IRET);
339 * Idle related variables and functions
341 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
342 EXPORT_SYMBOL(boot_option_idle_override);
345 * Powermanagement idle function, if any..
347 void (*pm_idle)(void);
348 #ifdef CONFIG_APM_MODULE
349 EXPORT_SYMBOL(pm_idle);
353 static inline void play_dead(void)
360 void enter_idle(void)
362 percpu_write(is_idle, 1);
363 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
366 static void __exit_idle(void)
368 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
370 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
373 /* Called from interrupts to signify idle end */
376 /* idle loop has pid 0 */
384 * The idle thread. There's no useful work to be
385 * done, so just try to conserve power and have a
386 * low exit latency (ie sit in a loop waiting for
387 * somebody to say that they'd like to reschedule)
392 * If we're the non-boot CPU, nothing set the stack canary up
393 * for us. CPU0 already has it initialized but no harm in
394 * doing it again. This is a good place for updating it, as
395 * we wont ever return from this function (so the invalid
396 * canaries already on the stack wont ever trigger).
398 boot_init_stack_canary();
399 current_thread_info()->status |= TS_POLLING;
401 /* endless idle loop with no priority at all */
403 tick_nohz_idle_enter();
405 while (!need_resched()) {
408 if (cpu_is_offline(smp_processor_id()))
412 * Idle routines should keep interrupts disabled
413 * from here on, until they go to idle.
414 * Otherwise, idle callbacks can misfire.
421 /* Don't trace irqs off for idle */
422 stop_critical_timings();
424 /* enter_idle() needs rcu for notifiers */
427 if (cpuidle_idle_call())
431 start_critical_timings();
433 /* In many cases the interrupt that ended idle
434 has already called exit_idle. But some idle
435 loops can be woken up without interrupt. */
439 tick_nohz_idle_exit();
440 preempt_enable_no_resched();
447 * We use this if we don't have any better
452 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
453 trace_cpu_idle_rcuidle(1, smp_processor_id());
454 current_thread_info()->status &= ~TS_POLLING;
456 * TS_POLLING-cleared state must be visible before we
462 safe_halt(); /* enables interrupts racelessly */
465 current_thread_info()->status |= TS_POLLING;
466 trace_power_end_rcuidle(smp_processor_id());
467 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
469 #ifdef CONFIG_APM_MODULE
470 EXPORT_SYMBOL(default_idle);
473 bool __init set_pm_idle_to_default(void)
475 bool ret = !!pm_idle;
481 void stop_this_cpu(void *dummy)
487 set_cpu_online(smp_processor_id(), false);
488 disable_all_local_evtchn();
491 if (hlt_works(smp_processor_id()))
496 static void do_nothing(void *unused)
501 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
502 * pm_idle and update to new pm_idle value. Required while changing pm_idle
503 * handler on SMP systems.
505 * Caller must have changed pm_idle to the new value before the call. Old
506 * pm_idle value will not be used by any CPU after the return of this function.
508 void cpu_idle_wait(void)
511 /* kick all the CPUs so that they exit out of pm_idle */
512 smp_call_function(do_nothing, NULL, 1);
514 EXPORT_SYMBOL_GPL(cpu_idle_wait);
517 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
518 static void mwait_idle(void)
520 if (!need_resched()) {
521 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
522 trace_cpu_idle_rcuidle(1, smp_processor_id());
523 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
524 clflush((void *)¤t_thread_info()->flags);
526 __monitor((void *)¤t_thread_info()->flags, 0, 0);
532 trace_power_end_rcuidle(smp_processor_id());
533 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
540 * On SMP it's slightly faster (but much more power-consuming!)
541 * to poll the ->work.need_resched flag instead of waiting for the
542 * cross-CPU IPI to arrive. Use this option with caution.
544 static void poll_idle(void)
546 trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
547 trace_cpu_idle_rcuidle(0, smp_processor_id());
549 while (!need_resched())
551 trace_power_end_rcuidle(smp_processor_id());
552 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
557 * mwait selection logic:
559 * It depends on the CPU. For AMD CPUs that support MWAIT this is
560 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
561 * then depend on a clock divisor and current Pstate of the core. If
562 * all cores of a processor are in halt state (C1) the processor can
563 * enter the C1E (C1 enhanced) state. If mwait is used this will never
566 * idle=mwait overrides this decision and forces the usage of mwait.
569 #define MWAIT_INFO 0x05
570 #define MWAIT_ECX_EXTENDED_INFO 0x01
571 #define MWAIT_EDX_C1 0xf0
573 int mwait_usable(const struct cpuinfo_x86 *c)
575 u32 eax, ebx, ecx, edx;
577 if (boot_option_idle_override == IDLE_FORCE_MWAIT)
580 if (c->cpuid_level < MWAIT_INFO)
583 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
584 /* Check, whether EDX has extended info about MWAIT */
585 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
589 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
592 return (edx & MWAIT_EDX_C1);
595 bool amd_e400_c1e_detected;
596 EXPORT_SYMBOL(amd_e400_c1e_detected);
598 static cpumask_var_t amd_e400_c1e_mask;
600 void amd_e400_remove_cpu(int cpu)
602 if (amd_e400_c1e_mask != NULL)
603 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
607 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
608 * pending message MSR. If we detect C1E, then we handle it the same
609 * way as C3 power states (local apic timer and TSC stop)
611 static void amd_e400_idle(void)
616 if (!amd_e400_c1e_detected) {
619 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
621 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
622 amd_e400_c1e_detected = true;
623 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
624 mark_tsc_unstable("TSC halt in AMD C1E");
625 printk(KERN_INFO "System has AMD C1E enabled\n");
629 if (amd_e400_c1e_detected) {
630 int cpu = smp_processor_id();
632 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
633 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
635 * Force broadcast so ACPI can not interfere.
637 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
639 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
642 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
647 * The switch back from broadcast mode needs to be
648 * called with interrupts disabled.
651 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
658 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
662 if (pm_idle == poll_idle && smp_num_siblings > 1) {
663 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
664 " performance may degrade.\n");
670 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
672 * One CPU supports mwait => All CPUs supports mwait
674 printk(KERN_INFO "using mwait in idle threads.\n");
675 pm_idle = mwait_idle;
676 } else if (cpu_has_amd_erratum(amd_erratum_400)) {
677 /* E400: APIC timer interrupt does not wake up CPU from C1e */
678 printk(KERN_INFO "using AMD E400 aware idle routine\n");
679 pm_idle = amd_e400_idle;
681 pm_idle = default_idle;
685 void __init init_amd_e400_c1e_mask(void)
688 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
689 if (pm_idle == amd_e400_idle)
690 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
694 static int __init idle_setup(char *str)
699 if (!strcmp(str, "poll")) {
700 printk("using polling idle threads.\n");
702 boot_option_idle_override = IDLE_POLL;
704 } else if (!strcmp(str, "mwait")) {
705 boot_option_idle_override = IDLE_FORCE_MWAIT;
706 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
707 } else if (!strcmp(str, "halt")) {
709 * When the boot option of idle=halt is added, halt is
710 * forced to be used for CPU idle. In such case CPU C2/C3
711 * won't be used again.
712 * To continue to load the CPU idle driver, don't touch
713 * the boot_option_idle_override.
715 pm_idle = default_idle;
716 boot_option_idle_override = IDLE_HALT;
717 } else if (!strcmp(str, "nomwait")) {
719 * If the boot option of "idle=nomwait" is added,
720 * it means that mwait will be disabled for CPU C2/C3
721 * states. In such case it won't touch the variable
722 * of boot_option_idle_override.
724 boot_option_idle_override = IDLE_NOMWAIT;
731 early_param("idle", idle_setup);
733 unsigned long arch_align_stack(unsigned long sp)
735 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
736 sp -= get_random_int() % 8192;
740 unsigned long arch_randomize_brk(struct mm_struct *mm)
742 unsigned long range_end = mm->brk + 0x02000000;
743 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;