2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/memblock.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/mc146818rtc.h>
17 #include <linux/bitops.h>
18 #include <linux/acpi.h>
19 #include <linux/module.h>
20 #include <linux/smp.h>
21 #include <linux/pci.h>
24 #include <asm/mpspec.h>
25 #include <asm/pgalloc.h>
26 #include <asm/io_apic.h>
27 #include <asm/proto.h>
28 #include <asm/bios_ebda.h>
30 #include <asm/trampoline.h>
31 #include <asm/setup.h>
36 static void *_bus_to_virt(unsigned long ma)
38 return is_ISA_range(ma, ma) ? isa_bus_to_virt(ma) : bus_to_virt(ma);
42 * Checksum an MP configuration block.
45 static int __init mpf_checksum(unsigned char *mp, int len)
56 int __init default_mpc_apic_id(struct mpc_cpu *m)
62 static void __init MP_processor_info(struct mpc_cpu *m)
66 char *bootup_cpu = "";
68 if (!(m->cpuflag & CPU_ENABLED)) {
73 apicid = x86_init.mpparse.mpc_apic_id(m);
75 if (m->cpuflag & CPU_BOOTPROCESSOR) {
76 bootup_cpu = " (Bootup-CPU)";
77 boot_cpu_physical_apicid = m->apicid;
80 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
81 generic_processor_info(apicid, m->apicver);
82 #else /* CONFIG_XEN */
87 #ifdef CONFIG_X86_IO_APIC
88 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
90 memcpy(str, m->bustype, 6);
92 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
95 static void __init MP_bus_info(struct mpc_bus *m)
99 x86_init.mpparse.mpc_oem_bus_info(m, str);
101 #if MAX_MP_BUSSES < 256
102 if (m->busid >= MAX_MP_BUSSES) {
103 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
104 " is too large, max. supported is %d\n",
105 m->busid, str, MAX_MP_BUSSES - 1);
110 set_bit(m->busid, mp_bus_not_pci);
111 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
112 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
113 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
115 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
116 if (x86_init.mpparse.mpc_oem_pci_bus)
117 x86_init.mpparse.mpc_oem_pci_bus(m);
119 clear_bit(m->busid, mp_bus_not_pci);
120 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
121 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
122 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
123 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
124 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
125 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
128 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
131 static void __init MP_ioapic_info(struct mpc_ioapic *m)
133 if (m->flags & MPC_APIC_USABLE)
134 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
137 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
139 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
140 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
141 mp_irq->irqtype, mp_irq->irqflag & 3,
142 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
143 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
146 #else /* CONFIG_X86_IO_APIC */
147 static inline void __init MP_bus_info(struct mpc_bus *m) {}
148 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
149 #endif /* CONFIG_X86_IO_APIC */
151 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
153 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
154 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
155 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
156 m->srcbusirq, m->destapic, m->destapiclint);
162 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
165 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
166 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
167 mpc->signature[0], mpc->signature[1],
168 mpc->signature[2], mpc->signature[3]);
171 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
172 printk(KERN_ERR "MPTABLE: checksum error!\n");
175 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
176 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
181 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
184 memcpy(oem, mpc->oem, 8);
186 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
188 memcpy(str, mpc->productid, 12);
191 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
194 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
200 static void skip_entry(unsigned char **ptr, int *count, int size)
206 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
208 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
210 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
211 1, mpc, mpc->length, 1);
214 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
216 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
221 int count = sizeof(*mpc);
222 unsigned char *mpt = ((unsigned char *)mpc) + count;
224 if (!smp_check_mpc(mpc, oem, str))
229 generic_mps_oem_check(mpc, oem, str);
231 /* Initialize the lapic mapping */
233 register_lapic_address(mpc->lapic);
240 x86_init.mpparse.smp_read_mpc_oem(mpc);
243 * Now process the configuration blocks.
245 x86_init.mpparse.mpc_record(0);
247 while (count < mpc->length) {
250 /* ACPI may have already provided this data */
252 MP_processor_info((struct mpc_cpu *)mpt);
253 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
256 MP_bus_info((struct mpc_bus *)mpt);
257 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
260 MP_ioapic_info((struct mpc_ioapic *)mpt);
261 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
264 mp_save_irq((struct mpc_intsrc *)mpt);
265 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
268 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
269 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
273 smp_dump_mptable(mpc, mpt);
277 x86_init.mpparse.mpc_record(1);
281 printk(KERN_ERR "MPTABLE: no processors registered!\n");
282 return num_processors;
285 #ifdef CONFIG_X86_IO_APIC
287 static int __init ELCR_trigger(unsigned int irq)
291 port = 0x4d0 + (irq >> 3);
292 return (inb(port) >> (irq & 7)) & 1;
295 static void __init construct_default_ioirq_mptable(int mpc_default_type)
297 struct mpc_intsrc intsrc;
299 int ELCR_fallback = 0;
301 intsrc.type = MP_INTSRC;
302 intsrc.irqflag = 0; /* conforming */
304 intsrc.dstapic = mpc_ioapic_id(0);
306 intsrc.irqtype = mp_INT;
309 * If true, we have an ISA/PCI system with no IRQ entries
310 * in the MP table. To prevent the PCI interrupts from being set up
311 * incorrectly, we try to use the ELCR. The sanity check to see if
312 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
313 * never be level sensitive, so we simply see if the ELCR agrees.
314 * If it does, we assume it's valid.
316 if (mpc_default_type == 5) {
317 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
318 "falling back to ELCR\n");
320 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
322 printk(KERN_ERR "ELCR contains invalid data... "
326 "Using ELCR to identify PCI interrupts\n");
331 for (i = 0; i < 16; i++) {
332 switch (mpc_default_type) {
334 if (i == 0 || i == 13)
335 continue; /* IRQ0 & IRQ13 not connected */
339 continue; /* IRQ2 is never connected */
344 * If the ELCR indicates a level-sensitive interrupt, we
345 * copy that information over to the MP table in the
346 * irqflag field (level sensitive, active high polarity).
354 intsrc.srcbusirq = i;
355 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
356 mp_save_irq(&intsrc);
359 intsrc.irqtype = mp_ExtINT;
360 intsrc.srcbusirq = 0;
361 intsrc.dstirq = 0; /* 8259A to INTIN0 */
362 mp_save_irq(&intsrc);
366 static void __init construct_ioapic_table(int mpc_default_type)
368 struct mpc_ioapic ioapic;
373 switch (mpc_default_type) {
375 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
380 memcpy(bus.bustype, "ISA ", 6);
385 memcpy(bus.bustype, "EISA ", 6);
389 memcpy(bus.bustype, "MCA ", 6);
392 if (mpc_default_type > 4) {
394 memcpy(bus.bustype, "PCI ", 6);
398 ioapic.type = MP_IOAPIC;
400 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
401 ioapic.flags = MPC_APIC_USABLE;
402 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
403 MP_ioapic_info(&ioapic);
406 * We set up most of the low 16 IO-APIC pins according to MPS rules.
408 construct_default_ioirq_mptable(mpc_default_type);
411 static inline void __init construct_ioapic_table(int mpc_default_type) { }
414 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
416 struct mpc_cpu processor;
417 struct mpc_lintsrc lintsrc;
418 int linttypes[2] = { mp_ExtINT, mp_NMI };
423 * local APIC has default address
425 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
429 * 2 CPUs, numbered 0 & 1.
431 processor.type = MP_PROCESSOR;
432 /* Either an integrated APIC or a discrete 82489DX. */
433 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
434 processor.cpuflag = CPU_ENABLED;
435 processor.cpufeature = (boot_cpu_data.x86 << 8) |
436 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
437 processor.featureflag = boot_cpu_data.x86_capability[0];
438 processor.reserved[0] = 0;
439 processor.reserved[1] = 0;
440 for (i = 0; i < 2; i++) {
441 processor.apicid = i;
442 MP_processor_info(&processor);
445 construct_ioapic_table(mpc_default_type);
447 lintsrc.type = MP_LINTSRC;
448 lintsrc.irqflag = 0; /* conforming */
449 lintsrc.srcbusid = 0;
450 lintsrc.srcbusirq = 0;
451 lintsrc.destapic = MP_APIC_ALL;
452 for (i = 0; i < 2; i++) {
453 lintsrc.irqtype = linttypes[i];
454 lintsrc.destapiclint = i;
455 MP_lintsrc_info(&lintsrc);
459 static struct mpf_intel *mpf_found;
461 static unsigned long __init get_mpc_size(unsigned long physptr)
463 struct mpc_table *mpc;
466 mpc = early_ioremap(physptr, PAGE_SIZE);
468 early_iounmap(mpc, PAGE_SIZE);
469 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
474 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
476 struct mpc_table *mpc;
479 size = get_mpc_size(mpf->physptr);
480 mpc = early_ioremap(mpf->physptr, size);
482 * Read the physical hardware table. Anything here will
483 * override the defaults.
485 if (!smp_read_mpc(mpc, early)) {
486 #ifdef CONFIG_X86_LOCAL_APIC
487 smp_found_config = 0;
489 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
490 "... disabling SMP support. (tell your hw vendor)\n");
491 early_iounmap(mpc, size);
494 early_iounmap(mpc, size);
499 #ifdef CONFIG_X86_IO_APIC
501 * If there are no explicit MP IRQ entries, then we are
502 * broken. We set up most of the low 16 IO-APIC pins to
503 * ISA defaults and hope it will work.
505 if (!mp_irq_entries) {
508 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
509 "using default mptable. (tell your hw vendor)\n");
513 memcpy(bus.bustype, "ISA ", 6);
516 construct_default_ioirq_mptable(0);
524 * Scan the memory blocks for an SMP configuration block.
526 void __init default_get_smp_config(unsigned int early)
528 struct mpf_intel *mpf = mpf_found;
538 if (acpi_lapic && early)
542 * MPS doesn't support hyperthreading, aka only have
543 * thread 0 apic id in MPS table
545 if (acpi_lapic && acpi_ioapic)
548 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
550 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) && !defined(CONFIG_XEN)
551 if (mpf->feature2 & (1 << 7)) {
552 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
555 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
560 * Now see if we need to read further.
562 if (mpf->feature1 != 0) {
566 * local APIC has default address
568 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
573 printk(KERN_INFO "Default MP configuration #%d\n",
575 construct_default_ISA_mptable(mpf->feature1);
577 } else if (mpf->physptr) {
578 if (check_physptr(mpf, early))
584 printk(KERN_INFO "Processors: %d\n", num_processors);
586 * Only use the first configuration found.
592 static void __init smp_reserve_memory(struct mpf_intel *mpf)
594 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
598 static int __init smp_scan_config(unsigned long base, unsigned long length)
600 unsigned int *bp = _bus_to_virt(base);
601 struct mpf_intel *mpf;
606 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
608 BUILD_BUG_ON(sizeof(*mpf) != 16);
611 mpf = (struct mpf_intel *)bp;
612 if ((*bp == SMP_MAGIC_IDENT) &&
613 (mpf->length == 1) &&
614 !mpf_checksum((unsigned char *)bp, 16) &&
615 ((mpf->specification == 1)
616 || (mpf->specification == 4))) {
617 #ifdef CONFIG_X86_LOCAL_APIC
618 smp_found_config = 1;
623 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
624 mpf, (u64)virt_to_phys(mpf));
626 mem = virt_to_phys(mpf);
627 memblock_reserve(mem, sizeof(*mpf));
629 smp_reserve_memory(mpf);
631 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
632 mpf, ((void *)bp - _bus_to_virt(base)) + base);
642 void __init default_find_smp_config(void)
645 unsigned int address;
649 * FIXME: Linux assumes you have 640K of base ram..
650 * this continues the error...
652 * 1) Scan the bottom 1K for a signature
653 * 2) Scan the top 1K of base RAM
654 * 3) Scan the 64K of bios
656 if (smp_scan_config(0x0, 0x400) ||
657 smp_scan_config(639 * 0x400, 0x400) ||
658 smp_scan_config(0xF0000, 0x10000))
661 * If it is an SMP machine we should know now, unless the
662 * configuration is in an EISA/MCA bus machine with an
663 * extended bios data area.
665 * there is a real-mode segmented pointer pointing to the
666 * 4K EBDA area at 0x40E, calculate and scan it here.
668 * NOTE! There are Linux loaders that will corrupt the EBDA
669 * area, and as such this kind of SMP config may be less
670 * trustworthy, simply because the SMP table may have been
671 * stomped on during early boot. These loaders are buggy and
674 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
678 address = get_bios_ebda();
680 smp_scan_config(address, 0x400);
684 #ifdef CONFIG_X86_IO_APIC
685 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
687 static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
691 if (m->irqtype != mp_INT)
694 if (m->irqflag != 0x0f)
699 for (i = 0; i < mp_irq_entries; i++) {
700 if (mp_irqs[i].irqtype != mp_INT)
703 if (mp_irqs[i].irqflag != 0x0f)
706 if (mp_irqs[i].srcbus != m->srcbus)
708 if (mp_irqs[i].srcbusirq != m->srcbusirq)
711 /* already claimed */
722 #define SPARE_SLOT_NUM 20
724 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
726 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
730 apic_printk(APIC_VERBOSE, "OLD ");
731 print_mp_irq_info(m);
733 i = get_MP_intsrc_index(m);
735 memcpy(m, &mp_irqs[i], sizeof(*m));
736 apic_printk(APIC_VERBOSE, "NEW ");
737 print_mp_irq_info(&mp_irqs[i]);
741 /* legacy, do nothing */
744 if (*nr_m_spare < SPARE_SLOT_NUM) {
746 * not found (-1), or duplicated (-2) are invalid entries,
747 * we need to use the slot later
749 m_spare[*nr_m_spare] = m;
755 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
757 if (!mpc_new_phys || count <= mpc_new_length) {
758 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
764 #else /* CONFIG_X86_IO_APIC */
766 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
767 #endif /* CONFIG_X86_IO_APIC */
769 static int __init replace_intsrc_all(struct mpc_table *mpc,
770 unsigned long mpc_new_phys,
771 unsigned long mpc_new_length)
773 #ifdef CONFIG_X86_IO_APIC
776 int count = sizeof(*mpc);
778 unsigned char *mpt = ((unsigned char *)mpc) + count;
780 printk(KERN_INFO "mpc_length %x\n", mpc->length);
781 while (count < mpc->length) {
784 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
787 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
790 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
793 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
794 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
797 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
801 smp_dump_mptable(mpc, mpt);
806 #ifdef CONFIG_X86_IO_APIC
807 for (i = 0; i < mp_irq_entries; i++) {
811 if (mp_irqs[i].irqtype != mp_INT)
814 if (mp_irqs[i].irqflag != 0x0f)
817 if (nr_m_spare > 0) {
818 apic_printk(APIC_VERBOSE, "*NEW* found\n");
820 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i]));
821 m_spare[nr_m_spare] = NULL;
823 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
824 count += sizeof(struct mpc_intsrc);
825 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
827 memcpy(m, &mp_irqs[i], sizeof(*m));
829 mpt += sizeof(struct mpc_intsrc);
831 print_mp_irq_info(&mp_irqs[i]);
835 /* update checksum */
837 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
842 int enable_update_mptable;
844 static int __init update_mptable_setup(char *str)
846 enable_update_mptable = 1;
852 early_param("update_mptable", update_mptable_setup);
854 static unsigned long __initdata mpc_new_phys;
855 static unsigned long mpc_new_length __initdata = 4096;
857 /* alloc_mptable or alloc_mptable=4k */
858 static int __initdata alloc_mptable;
859 static int __init parse_alloc_mptable_opt(char *p)
861 enable_update_mptable = 1;
868 mpc_new_length = memparse(p, &p);
871 early_param("alloc_mptable", parse_alloc_mptable_opt);
873 void __init early_reserve_e820_mpc_new(void)
875 if (enable_update_mptable && alloc_mptable)
876 mpc_new_phys = early_reserve_e820(mpc_new_length, 4);
879 static int __init update_mp_table(void)
883 struct mpf_intel *mpf;
884 struct mpc_table *mpc, *mpc_new;
886 if (!enable_update_mptable)
894 * Now see if we need to go further.
896 if (mpf->feature1 != 0)
902 mpc = _bus_to_virt(mpf->physptr);
904 if (!smp_check_mpc(mpc, oem, str))
907 printk(KERN_INFO "mpf: %llx\n", (u64)arbitrary_virt_to_machine(mpf));
908 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
910 if (mpc_new_phys && mpc->length > mpc_new_length) {
912 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
917 unsigned char old, new;
918 /* check if we can change the position */
920 old = mpf_checksum((unsigned char *)mpc, mpc->length);
921 mpc->checksum = 0xff;
922 new = mpf_checksum((unsigned char *)mpc, mpc->length);
924 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
927 printk(KERN_INFO "use in-position replacing\n");
931 mpc_new_bus = phys_to_machine(mpc_new_phys);
932 mpf->physptr = mpc_new_bus;
933 mpc_new = phys_to_virt(mpc_new_phys);
934 memcpy(mpc_new, mpc, mpc->length);
936 /* check if we can modify that */
937 if (mpc_new_bus - mpf->physptr) {
938 struct mpf_intel *mpf_new;
939 /* steal 16 bytes from [0, 1k) */
940 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
941 mpf_new = isa_bus_to_virt(0x400 - 16);
942 memcpy(mpf_new, mpf, 16);
944 mpf->physptr = mpc_new_bus;
947 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
948 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
952 * only replace the one with mp_INT and
953 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
954 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
955 * may need pci=routeirq for all coverage
957 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
962 late_initcall(update_mp_table);