2 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; version 2 of the
11 #ifndef _ASM_MPIC_MSGR_H
12 #define _ASM_MPIC_MSGR_H
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
26 /* Get a message register
28 * @reg_num: the MPIC message register to get
30 * A pointer to the message register is returned. If
31 * the message register asked for is already in use, then
32 * EBUSY is returned. If the number given is not associated
33 * with an actual message register, then ENODEV is returned.
34 * Successfully getting the register marks it as in use.
36 extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num);
38 /* Relinquish a message register
40 * @msgr: the message register to return
42 * Disables the given message register and marks it as free.
43 * After this call has completed successully the message
44 * register is available to be acquired by a call to
47 extern void mpic_msgr_put(struct mpic_msgr *msgr);
49 /* Enable a message register
51 * @msgr: the message register to enable
53 * The given message register is enabled for sending
56 extern void mpic_msgr_enable(struct mpic_msgr *msgr);
58 /* Disable a message register
60 * @msgr: the message register to disable
62 * The given message register is disabled for sending
65 extern void mpic_msgr_disable(struct mpic_msgr *msgr);
67 /* Write a message to a message register
69 * @msgr: the message register to write to
70 * @message: the message to write
72 * The given 32-bit message is written to the given message
73 * register. Writing to an enabled message registers fires
76 static inline void mpic_msgr_write(struct mpic_msgr *msgr, u32 message)
78 out_be32(msgr->base, message);
81 /* Read a message from a message register
83 * @msgr: the message register to read from
85 * Returns the 32-bit value currently in the given message register.
86 * Upon reading the register any interrupts for that register are
89 static inline u32 mpic_msgr_read(struct mpic_msgr *msgr)
91 return in_be32(msgr->base);
94 /* Clear a message register
96 * @msgr: the message register to clear
98 * Clears any interrupts associated with the given message register.
100 static inline void mpic_msgr_clear(struct mpic_msgr *msgr)
102 (void) mpic_msgr_read(msgr);
105 /* Set the destination CPU for the message register
107 * @msgr: the message register whose destination is to be set
108 * @cpu_num: the Linux CPU number to bind the message register to
110 * Note that the CPU number given is the CPU number used by the kernel
111 * and *not* the actual hardware CPU number.
113 static inline void mpic_msgr_set_destination(struct mpic_msgr *msgr,
116 out_be32(msgr->base, 1 << get_hard_smp_processor_id(cpu_num));
119 /* Get the IRQ number for the message register
120 * @msgr: the message register whose IRQ is to be returned
122 * Returns the IRQ number associated with the given message register.
123 * NO_IRQ is returned if this message register is not capable of
124 * receiving interrupts. What message register can and cannot receive
125 * interrupts is specified in the device tree for the system.
127 static inline int mpic_msgr_get_irq(struct mpic_msgr *msgr)