drivers/char/agp/i460-agp.c

   1 /*
   2  * For documentation on the i460 AGP interface, see Chapter 7 (AGP Subsystem) of
   3  * the "Intel 460GTX Chipset Software Developer's Manual":
   4  * http://developer.intel.com/design/itanium/downloads/24870401s.htm
   5  */
   6 /*
   7  * 460GX support by Chris Ahna <christopher.j.ahna@intel.com>
   8  * Clean up & simplification by David Mosberger-Tang <davidm@hpl.hp.com>
   9  */
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/init.h>
  13 #include <linux/agp_backend.h>
  14
  15 #include "agp.h"
  16
  17 /*
  18  * The i460 can operate with large (4MB) pages, but there is no sane way to support this
  19  * within the current kernel/DRM environment, so we disable the relevant code for now.
  20  * See also comments in ia64_alloc_page()...
  21  */
  22 #define I460_LARGE_IO_PAGES             0
  23
  24 #if I460_LARGE_IO_PAGES
  25 # define I460_IO_PAGE_SHIFT             i460.io_page_shift
  26 #else
  27 # define I460_IO_PAGE_SHIFT             12
  28 #endif
  29
  30 #define I460_IOPAGES_PER_KPAGE          (PAGE_SIZE >> I460_IO_PAGE_SHIFT)
  31 #define I460_KPAGES_PER_IOPAGE          (1 << (I460_IO_PAGE_SHIFT - PAGE_SHIFT))
  32 #define I460_SRAM_IO_DISABLE            (1 << 4)
  33 #define I460_BAPBASE_ENABLE             (1 << 3)
  34 #define I460_AGPSIZ_MASK                0x7
  35 #define I460_4M_PS                      (1 << 1)
  36
  37 /* Control bits for Out-Of-GART coherency and Burst Write Combining */
  38 #define I460_GXBCTL_OOG         (1UL << 0)
  39 #define I460_GXBCTL_BWC         (1UL << 2)
  40
  41 /*
  42  * gatt_table entries are 32-bits wide on the i460; the generic code ought to declare the
  43  * gatt_table and gatt_table_real pointers a "void *"...
  44  */
  45 #define RD_GATT(index)          readl((u32 *) i460.gatt + (index))
  46 #define WR_GATT(index, val)     writel((val), (u32 *) i460.gatt + (index))
  47 /*
  48  * The 460 spec says we have to read the last location written to make sure that all
  49  * writes have taken effect
  50  */
  51 #define WR_FLUSH_GATT(index)    RD_GATT(index)
  52
  53 #define log2(x)                 ffz(~(x))
  54
  55 static struct {
  56         void *gatt;                             /* ioremap'd GATT area */
  57
  58         /* i460 supports multiple GART page sizes, so GART pageshift is dynamic: */
  59         u8 io_page_shift;
  60
  61         /* BIOS configures chipset to one of 2 possible apbase values: */
  62         u8 dynamic_apbase;
  63
  64         /* structure for tracking partial use of 4MB GART pages: */
  65         struct lp_desc {
  66                 unsigned long *alloced_map;     /* bitmap of kernel-pages in use */
  67                 int refcount;                   /* number of kernel pages using the large page */
  68                 u64 paddr;                      /* physical address of large page */
  69         } *lp_desc;
  70 } i460;
  71
  72 static struct aper_size_info_8 i460_sizes[3] =
  73 {
  74         /*
  75          * The 32GB aperture is only available with a 4M GART page size.  Due to the
  76          * dynamic GART page size, we can't figure out page_order or num_entries until
  77          * runtime.
  78          */
  79         {32768, 0, 0, 4},
  80         {1024, 0, 0, 2},
  81         {256, 0, 0, 1}
  82 };
  83
  84 static struct gatt_mask i460_masks[] =
  85 {
  86         {
  87           .mask = INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT,
  88           .type = 0
  89         }
  90 };
  91
  92 static int i460_fetch_size (void)
  93 {
  94         int i;
  95         u8 temp;
  96         struct aper_size_info_8 *values;
  97
  98         /* Determine the GART page size */
  99         pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp);
 100         i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12;
 101         pr_debug("i460_fetch_size: io_page_shift=%d\n", i460.io_page_shift);
 102
 103         if (i460.io_page_shift != I460_IO_PAGE_SHIFT) {
 104                 printk(KERN_ERR PFX
 105                        "I/O (GART) page-size %ZuKB doesn't match expected size %ZuKB\n",
 106                        1UL << (i460.io_page_shift - 10), 1UL << (I460_IO_PAGE_SHIFT));
 107                 return 0;
 108         }
 109
 110         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
 111
 112         pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp);
 113
 114         /* Exit now if the IO drivers for the GART SRAMS are turned off */
 115         if (temp & I460_SRAM_IO_DISABLE) {
 116                 printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n");
 117                 printk(KERN_ERR PFX "AGPGART operation not possible\n");
 118                 return 0;
 119         }
 120
 121         /* Make sure we don't try to create an 2 ^ 23 entry GATT */
 122         if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) {
 123                 printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n");
 124                 return 0;
 125         }
 126
 127         /* Determine the proper APBASE register */
 128         if (temp & I460_BAPBASE_ENABLE)
 129                 i460.dynamic_apbase = INTEL_I460_BAPBASE;
 130         else
 131                 i460.dynamic_apbase = INTEL_I460_APBASE;
 132
 133         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 134                 /*
 135                  * Dynamically calculate the proper num_entries and page_order values for
 136                  * the define aperture sizes. Take care not to shift off the end of
 137                  * values[i].size.
 138                  */
 139                 values[i].num_entries = (values[i].size << 8) >> (I460_IO_PAGE_SHIFT - 12);
 140                 values[i].page_order = log2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT);
 141         }
 142
 143         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 144                 /* Neglect control bits when matching up size_value */
 145                 if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) {
 146                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 147                         agp_bridge->aperture_size_idx = i;
 148                         return values[i].size;
 149                 }
 150         }
 151
 152         return 0;
 153 }
 154
 155 /* There isn't anything to do here since 460 has no GART TLB. */
 156 static void i460_tlb_flush (struct agp_memory *mem)
 157 {
 158         return;
 159 }
 160
 161 /*
 162  * This utility function is needed to prevent corruption of the control bits
 163  * which are stored along with the aperture size in 460's AGPSIZ register
 164  */
 165 static void i460_write_agpsiz (u8 size_value)
 166 {
 167         u8 temp;
 168
 169         pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp);
 170         pci_write_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ,
 171                               ((temp & ~I460_AGPSIZ_MASK) | size_value));
 172 }
 173
 174 static void i460_cleanup (void)
 175 {
 176         struct aper_size_info_8 *previous_size;
 177
 178         previous_size = A_SIZE_8(agp_bridge->previous_size);
 179         i460_write_agpsiz(previous_size->size_value);
 180
 181         if (I460_IO_PAGE_SHIFT > PAGE_SHIFT)
 182                 kfree(i460.lp_desc);
 183 }
 184
 185 static int i460_configure (void)
 186 {
 187         union {
 188                 u32 small[2];
 189                 u64 large;
 190         } temp;
 191         size_t size;
 192         u8 scratch;
 193         struct aper_size_info_8 *current_size;
 194
 195         temp.large = 0;
 196
 197         current_size = A_SIZE_8(agp_bridge->current_size);
 198         i460_write_agpsiz(current_size->size_value);
 199
 200         /*
 201          * Do the necessary rigmarole to read all eight bytes of APBASE.
 202          * This has to be done since the AGP aperture can be above 4GB on
 203          * 460 based systems.
 204          */
 205         pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0]));
 206         pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1]));
 207
 208         /* Clear BAR control bits */
 209         agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1);
 210
 211         pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &scratch);
 212         pci_write_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL,
 213                               (scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC);
 214
 215         /*
 216          * Initialize partial allocation trackers if a GART page is bigger than a kernel
 217          * page.
 218          */
 219         if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) {
 220                 size = current_size->num_entries * sizeof(i460.lp_desc[0]);
 221                 i460.lp_desc = kmalloc(size, GFP_KERNEL);
 222                 if (!i460.lp_desc)
 223                         return -ENOMEM;
 224                 memset(i460.lp_desc, 0, size);
 225         }
 226         return 0;
 227 }
 228
 229 static int i460_create_gatt_table (void)
 230 {
 231         int page_order, num_entries, i;
 232         void *temp;
 233
 234         /*
 235          * Load up the fixed address of the GART SRAMS which hold our GATT table.
 236          */
 237         temp = agp_bridge->current_size;
 238         page_order = A_SIZE_8(temp)->page_order;
 239         num_entries = A_SIZE_8(temp)->num_entries;
 240
 241         i460.gatt = ioremap(INTEL_I460_ATTBASE, PAGE_SIZE << page_order);
 242
 243         /* These are no good, the should be removed from the agp_bridge strucure... */
 244         agp_bridge->gatt_table_real = NULL;
 245         agp_bridge->gatt_table = NULL;
 246         agp_bridge->gatt_bus_addr = 0;
 247
 248         for (i = 0; i < num_entries; ++i)
 249                 WR_GATT(i, 0);
 250         WR_FLUSH_GATT(i - 1);
 251         return 0;
 252 }
 253
 254 static int i460_free_gatt_table (void)
 255 {
 256         int num_entries, i;
 257         void *temp;
 258
 259         temp = agp_bridge->current_size;
 260
 261         num_entries = A_SIZE_8(temp)->num_entries;
 262
 263         for (i = 0; i < num_entries; ++i)
 264                 WR_GATT(i, 0);
 265         WR_FLUSH_GATT(num_entries - 1);
 266
 267         iounmap(i460.gatt);
 268         return 0;
 269 }
 270
 271 /*
 272  * The following functions are called when the I/O (GART) page size is smaller than
 273  * PAGE_SIZE.
 274  */
 275
 276 static int i460_insert_memory_small_io_page (struct agp_memory *mem,
 277                                 off_t pg_start, int type)
 278 {
 279         unsigned long paddr, io_pg_start, io_page_size;
 280         int i, j, k, num_entries;
 281         void *temp;
 282
 283         pr_debug("i460_insert_memory_small_io_page(mem=%p, pg_start=%ld, type=%d, paddr0=0x%lx)\n",
 284                  mem, pg_start, type, mem->memory[0]);
 285
 286         io_pg_start = I460_IOPAGES_PER_KPAGE * pg_start;
 287
 288         temp = agp_bridge->current_size;
 289         num_entries = A_SIZE_8(temp)->num_entries;
 290
 291         if ((io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count) > num_entries) {
 292                 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n");
 293                 return -EINVAL;
 294         }
 295
 296         j = io_pg_start;
 297         while (j < (io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count)) {
 298                 if (!PGE_EMPTY(agp_bridge, RD_GATT(j))) {
 299                         pr_debug("i460_insert_memory_small_io_page: GATT[%d]=0x%x is busy\n",
 300                                  j, RD_GATT(j));
 301                         return -EBUSY;
 302                 }
 303                 j++;
 304         }
 305
 306         io_page_size = 1UL << I460_IO_PAGE_SHIFT;
 307         for (i = 0, j = io_pg_start; i < mem->page_count; i++) {
 308                 paddr = mem->memory[i];
 309                 for (k = 0; k < I460_IOPAGES_PER_KPAGE; k++, j++, paddr += io_page_size)
 310                         WR_GATT(j, agp_bridge->driver->mask_memory(paddr, mem->type));
 311         }
 312         WR_FLUSH_GATT(j - 1);
 313         return 0;
 314 }
 315
 316 static int i460_remove_memory_small_io_page(struct agp_memory *mem,
 317                                 off_t pg_start, int type)
 318 {
 319         int i;
 320
 321         pr_debug("i460_remove_memory_small_io_page(mem=%p, pg_start=%ld, type=%d)\n",
 322                  mem, pg_start, type);
 323
 324         pg_start = I460_IOPAGES_PER_KPAGE * pg_start;
 325
 326         for (i = pg_start; i < (pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count); i++)
 327                 WR_GATT(i, 0);
 328         WR_FLUSH_GATT(i - 1);
 329         return 0;
 330 }
 331
 332 #if I460_LARGE_IO_PAGES
 333
 334 /*
 335  * These functions are called when the I/O (GART) page size exceeds PAGE_SIZE.
 336  *
 337  * This situation is interesting since AGP memory allocations that are smaller than a
 338  * single GART page are possible.  The i460.lp_desc array tracks partial allocation of the
 339  * large GART pages to work around this issue.
 340  *
 341  * i460.lp_desc[pg_num].refcount tracks the number of kernel pages in use within GART page
 342  * pg_num.  i460.lp_desc[pg_num].paddr is the physical address of the large page and
 343  * i460.lp_desc[pg_num].alloced_map is a bitmap of kernel pages that are in use (allocated).
 344  */
 345
 346 static int i460_alloc_large_page (struct lp_desc *lp)
 347 {
 348         unsigned long order = I460_IO_PAGE_SHIFT - PAGE_SHIFT;
 349         size_t map_size;
 350         void *lpage;
 351
 352         lpage = (void *) __get_free_pages(GFP_KERNEL, order);
 353         if (!lpage) {
 354                 printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n");
 355                 return -ENOMEM;
 356         }
 357
 358         map_size = ((I460_KPAGES_PER_IOPAGE + BITS_PER_LONG - 1) & -BITS_PER_LONG)/8;
 359         lp->alloced_map = kmalloc(map_size, GFP_KERNEL);
 360         if (!lp->alloced_map) {
 361                 free_pages((unsigned long) lpage, order);
 362                 printk(KERN_ERR PFX "Out of memory, we're in trouble...\n");
 363                 return -ENOMEM;
 364         }
 365         memset(lp->alloced_map, 0, map_size);
 366
 367         lp->paddr = virt_to_phys(lpage);
 368         lp->refcount = 0;
 369         atomic_add(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp);
 370         return 0;
 371 }
 372
 373 static void i460_free_large_page (struct lp_desc *lp)
 374 {
 375         kfree(lp->alloced_map);
 376         lp->alloced_map = NULL;
 377
 378         free_pages((unsigned long) phys_to_virt(lp->paddr), I460_IO_PAGE_SHIFT - PAGE_SHIFT);
 379         atomic_sub(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp);
 380 }
 381
 382 static int i460_insert_memory_large_io_page (struct agp_memory *mem,
 383                                 off_t pg_start, int type)
 384 {
 385         int i, start_offset, end_offset, idx, pg, num_entries;
 386         struct lp_desc *start, *end, *lp;
 387         void *temp;
 388
 389         temp = agp_bridge->current_size;
 390         num_entries = A_SIZE_8(temp)->num_entries;
 391
 392         /* Figure out what pg_start means in terms of our large GART pages */
 393         start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
 394         end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
 395         start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
 396         end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 397
 398         if (end > i460.lp_desc + num_entries) {
 399                 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n");
 400                 return -EINVAL;
 401         }
 402
 403         /* Check if the requested region of the aperture is free */
 404         for (lp = start; lp <= end; ++lp) {
 405                 if (!lp->alloced_map)
 406                         continue;       /* OK, the entire large page is available... */
 407
 408                 for (idx = ((lp == start) ? start_offset : 0);
 409                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 410                      idx++)
 411                 {
 412                         if (test_bit(idx, lp->alloced_map))
 413                                 return -EBUSY;
 414                 }
 415         }
 416
 417         for (lp = start, i = 0; lp <= end; ++lp) {
 418                 if (!lp->alloced_map) {
 419                         /* Allocate new GART pages... */
 420                         if (i460_alloc_large_page(lp) < 0)
 421                                 return -ENOMEM;
 422                         pg = lp - i460.lp_desc;
 423                         WR_GATT(pg, agp_bridge->driver->mask_memory(lp->paddr, 0));
 424                         WR_FLUSH_GATT(pg);
 425                 }
 426
 427                 for (idx = ((lp == start) ? start_offset : 0);
 428                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 429                      idx++, i++)
 430                 {
 431                         mem->memory[i] = lp->paddr + idx*PAGE_SIZE;
 432                         __set_bit(idx, lp->alloced_map);
 433                         ++lp->refcount;
 434                 }
 435         }
 436         return 0;
 437 }
 438
 439 static int i460_remove_memory_large_io_page (struct agp_memory *mem,
 440                                 off_t pg_start, int type)
 441 {
 442         int i, pg, start_offset, end_offset, idx, num_entries;
 443         struct lp_desc *start, *end, *lp;
 444         void *temp;
 445
 446         temp = agp_bridge->driver->current_size;
 447         num_entries = A_SIZE_8(temp)->num_entries;
 448
 449         /* Figure out what pg_start means in terms of our large GART pages */
 450         start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
 451         end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
 452         start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
 453         end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 454
 455         for (i = 0, lp = start; lp <= end; ++lp) {
 456                 for (idx = ((lp == start) ? start_offset : 0);
 457                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 458                      idx++, i++)
 459                 {
 460                         mem->memory[i] = 0;
 461                         __clear_bit(idx, lp->alloced_map);
 462                         --lp->refcount;
 463                 }
 464
 465                 /* Free GART pages if they are unused */
 466                 if (lp->refcount == 0) {
 467                         pg = lp - i460.lp_desc;
 468                         WR_GATT(pg, 0);
 469                         WR_FLUSH_GATT(pg);
 470                         i460_free_large_page(lp);
 471                 }
 472         }
 473         return 0;
 474 }
 475
 476 /* Wrapper routines to call the approriate {small_io_page,large_io_page} function */
 477
 478 static int i460_insert_memory (struct agp_memory *mem,
 479                                 off_t pg_start, int type)
 480 {
 481         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 482                 return i460_insert_memory_small_io_page(mem, pg_start, type);
 483         else
 484                 return i460_insert_memory_large_io_page(mem, pg_start, type);
 485 }
 486
 487 static int i460_remove_memory (struct agp_memory *mem,
 488                                 off_t pg_start, int type)
 489 {
 490         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 491                 return i460_remove_memory_small_io_page(mem, pg_start, type);
 492         else
 493                 return i460_remove_memory_large_io_page(mem, pg_start, type);
 494 }
 495
 496 /*
 497  * If the I/O (GART) page size is bigger than the kernel page size, we don't want to
 498  * allocate memory until we know where it is to be bound in the aperture (a
 499  * multi-kernel-page alloc might fit inside of an already allocated GART page).
 500  *
 501  * Let's just hope nobody counts on the allocated AGP memory being there before bind time
 502  * (I don't think current drivers do)...
 503  */
 504 static void *i460_alloc_page (void)
 505 {
 506         void *page;
 507
 508         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 509                 page = agp_generic_alloc_page();
 510         else
 511                 /* Returning NULL would cause problems */
 512                 /* AK: really dubious code. */
 513                 page = (void *)~0UL;
 514         return page;
 515 }
 516
 517 static void i460_destroy_page (void *page)
 518 {
 519         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 520                 agp_generic_destroy_page(page);
 521 }
 522
 523 #endif /* I460_LARGE_IO_PAGES */
 524
 525 static unsigned long i460_mask_memory (unsigned long addr, int type)
 526 {
 527         /* Make sure the returned address is a valid GATT entry */
 528         return (agp_bridge->driver->masks[0].mask
 529                 | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xffffff000) >> 12));
 530 }
 531
 532 struct agp_bridge_driver intel_i460_driver = {
 533         .owner                  = THIS_MODULE,
 534         .aperture_sizes         = i460_sizes,
 535         .size_type              = U8_APER_SIZE,
 536         .num_aperture_sizes     = 3,
 537         .configure              = i460_configure,
 538         .fetch_size             = i460_fetch_size,
 539         .cleanup                = i460_cleanup,
 540         .tlb_flush              = i460_tlb_flush,
 541         .mask_memory            = i460_mask_memory,
 542         .masks                  = i460_masks,
 543         .agp_enable             = agp_generic_enable,
 544         .cache_flush            = global_cache_flush,
 545         .create_gatt_table      = i460_create_gatt_table,
 546         .free_gatt_table        = i460_free_gatt_table,
 547 #if I460_LARGE_IO_PAGES
 548         .insert_memory          = i460_insert_memory,
 549         .remove_memory          = i460_remove_memory,
 550         .agp_alloc_page         = i460_alloc_page,
 551         .agp_destroy_page       = i460_destroy_page,
 552 #else
 553         .insert_memory          = i460_insert_memory_small_io_page,
 554         .remove_memory          = i460_remove_memory_small_io_page,
 555         .agp_alloc_page         = agp_generic_alloc_page,
 556         .agp_destroy_page       = agp_generic_destroy_page,
 557 #endif
 558         .alloc_by_type          = agp_generic_alloc_by_type,
 559         .free_by_type           = agp_generic_free_by_type,
 560         .cant_use_aperture      = 1,
 561 };
 562
 563 static int __init agp_intel_i460_probe(struct pci_dev *pdev,
 564                                        const struct pci_device_id *ent)
 565 {
 566         struct agp_bridge_data *bridge;
 567         u8 cap_ptr;
 568
 569         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 570         if (!cap_ptr)
 571                 return -ENODEV;
 572
 573         bridge = agp_alloc_bridge();
 574         if (!bridge)
 575                 return -ENOMEM;
 576
 577         bridge->driver = &intel_i460_driver;
 578         bridge->dev = pdev;
 579         bridge->capndx = cap_ptr;
 580
 581         pci_set_drvdata(pdev, bridge);
 582         return agp_add_bridge(bridge);
 583 }
 584
 585 static void __devexit agp_intel_i460_remove(struct pci_dev *pdev)
 586 {
 587         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
 588
 589         agp_remove_bridge(bridge);
 590         agp_put_bridge(bridge);
 591 }
 592
 593 static struct pci_device_id agp_intel_i460_pci_table[] __initdata = {
 594         {
 595         .class          = (PCI_CLASS_BRIDGE_HOST << 8),
 596         .class_mask     = ~0,
 597         .vendor         = PCI_VENDOR_ID_INTEL,
 598         .device         = PCI_DEVICE_ID_INTEL_84460GX,
 599         .subvendor      = PCI_ANY_ID,
 600         .subdevice      = PCI_ANY_ID,
 601         },
 602         { }
 603 };
 604
 605 MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table);
 606
 607 static struct pci_driver agp_intel_i460_pci_driver = {
 608         .name           = "agpgart-intel-i460",
 609         .id_table       = agp_intel_i460_pci_table,
 610         .probe          = agp_intel_i460_probe,
 611         .remove         = agp_intel_i460_remove,
 612 };
 613
 614 static int __init agp_intel_i460_init(void)
 615 {
 616         return pci_module_init(&agp_intel_i460_pci_driver);
 617 }
 618
 619 static void __exit agp_intel_i460_cleanup(void)
 620 {
 621         pci_unregister_driver(&agp_intel_i460_pci_driver);
 622 }
 623
 624 module_init(agp_intel_i460_init);
 625 module_exit(agp_intel_i460_cleanup);
 626
 627 MODULE_AUTHOR("Chris Ahna <Christopher.J.Ahna@intel.com>");
 628 MODULE_LICENSE("GPL and additional rights");