1 /****************************************************************************
2 * Driver for Solarflare network controllers -
3 * resource management for Xen backend, OpenOnload, etc
4 * (including support for SFE4001 10GBT NIC)
6 * This file contains type definitions for VI resource. These types
7 * may be used outside of the SFC resource driver, but such use is not
10 * Copyright 2005-2007: Solarflare Communications Inc,
11 * 9501 Jeronimo Road, Suite 250,
12 * Irvine, CA 92618, USA
14 * Developed and maintained by Solarflare Communications:
15 * <linux-xen-drivers@solarflare.com>
16 * <onload-dev@solarflare.com>
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License version 2 as published
21 * by the Free Software Foundation, incorporated herein by reference.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 ****************************************************************************
34 #ifndef __CI_DRIVER_EFAB_VI_RESOURCE_MANAGER_H__
35 #define __CI_DRIVER_EFAB_VI_RESOURCE_MANAGER_H__
37 #include <ci/efhw/common.h>
38 #include <ci/efrm/vi_resource.h>
41 #define EFRM_VI_RM_DMA_QUEUE_COUNT 2
42 #define EFRM_VI_RM_DMA_QUEUE_TX 0
43 #define EFRM_VI_RM_DMA_QUEUE_RX 1
45 /** Numbers of bits which can be set in the evq_state member of
46 * vi_resource_evq_info. */
48 /** This bit is set if a wakeup has been requested on the NIC. */
49 VI_RESOURCE_EVQ_STATE_WAKEUP_PENDING,
50 /** This bit is set if the wakeup is valid for the sleeping
52 VI_RESOURCE_EVQ_STATE_CALLBACK_REGISTERED,
53 /** This bit is set if a wakeup or timeout event is currently being
55 VI_RESOURCE_EVQ_STATE_BUSY,
57 #define VI_RESOURCE_EVQ_STATE(X) \
58 (((int32_t)1) << (VI_RESOURCE_EVQ_STATE_##X))
61 /*! Global information for the VI resource manager. */
62 struct vi_resource_manager {
63 struct efrm_resource_manager rm;
65 struct kfifo *instances_with_timer;
68 struct kfifo *instances_with_interrupt;
69 int with_interrupt_base;
70 int with_interrupt_limit;
72 bool iscsi_dmaq_instance_is_free;
74 /* We keep VI resources which need flushing on these lists. The VI
75 * is put on the outstanding list when the flush request is issued
76 * to the hardware and removed when the flush event arrives. The
77 * hardware can only handle a limited number of RX flush requests at
78 * once, so VIs are placed in the waiting list until the flush can
79 * be issued. Flushes can be requested by the client or internally
80 * by the VI resource manager. In the former case, the reference
81 * count must be non-zero for the duration of the flush and in the
82 * later case, the reference count must be zero. */
83 struct list_head rx_flush_waiting_list;
84 struct list_head rx_flush_outstanding_list;
85 struct list_head tx_flush_outstanding_list;
86 int rx_flush_outstanding_count;
88 /* once the flush has happened we push the close into the work queue
89 * so its OK on Windows to free the resources (Bug 3469). Resources
90 * on this list have zero reference count.
92 struct list_head close_pending;
93 struct work_struct work_item;
94 struct workqueue_struct *workqueue;
97 struct vi_resource_nic_info {
98 struct eventq_resource_hardware evq_pages;
99 struct efhw_iopages dmaq_pages[EFRM_VI_RM_DMA_QUEUE_COUNT];
103 /* Some macros make the assumption that the struct efrm_resource is
104 * the first member of a struct vi_resource. */
105 struct efrm_resource rs;
106 atomic_t evq_refs; /*!< Number of users of the event queue. */
108 uint32_t bar_mmap_bytes;
109 uint32_t mem_mmap_bytes;
111 int32_t evq_capacity;
112 int32_t dmaq_capacity[EFRM_VI_RM_DMA_QUEUE_COUNT];
114 uint8_t dmaq_tag[EFRM_VI_RM_DMA_QUEUE_COUNT];
117 /* we keep PT endpoints that have been destroyed on a list
118 * until we have seen their TX and RX DMAQs flush complete
121 struct list_head rx_flush_link;
122 struct list_head tx_flush_link;
124 int rx_flush_outstanding;
129 void (*flush_callback_fn)(void *);
130 void *flush_callback_arg;
132 void (*evq_callback_fn) (void *arg, int is_timeout,
133 struct efhw_nic *nic);
134 void *evq_callback_arg;
136 struct vi_resource *evq_virs; /*!< EVQ for DMA queues */
138 struct efhw_buffer_table_allocation
139 dmaq_buf_tbl_alloc[EFRM_VI_RM_DMA_QUEUE_COUNT];
141 struct vi_resource_nic_info nic_info;
145 #define vi_resource(rs1) container_of((rs1), struct vi_resource, rs)
147 static inline dma_addr_t
148 efrm_eventq_dma_addr(struct vi_resource *virs)
150 struct eventq_resource_hardware *hw;
151 hw = &virs->nic_info.evq_pages;
152 return efhw_iopages_dma_addr(&hw->iobuff) + hw->iobuff_off;
155 #endif /* __CI_DRIVER_EFAB_VI_RESOURCE_MANAGER_H__ */