drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/idr.h>
  37 #include <linux/pci.h>
  38 #include <linux/io.h>
  39 #include <linux/delay.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/bitmap.h>
  43
  44 #include "ipath_kernel.h"
  45 #include "ipath_verbs.h"
  46
  47 static void ipath_update_pio_bufs(struct ipath_devdata *);
  48
  49 const char *ipath_get_unit_name(int unit)
  50 {
  51         static char iname[16];
  52         snprintf(iname, sizeof iname, "infinipath%u", unit);
  53         return iname;
  54 }
  55
  56 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  57 #define PFX IPATH_DRV_NAME ": "
  58
  59 /*
  60  * The size has to be longer than this string, so we can append
  61  * board/chip information to it in the init code.
  62  */
  63 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  64
  65 static struct idr unit_table;
  66 DEFINE_SPINLOCK(ipath_devs_lock);
  67 LIST_HEAD(ipath_dev_list);
  68
  69 wait_queue_head_t ipath_state_wait;
  70
  71 unsigned ipath_debug = __IPATH_INFO;
  72
  73 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(debug, "mask for debug prints");
  75 EXPORT_SYMBOL_GPL(ipath_debug);
  76
  77 unsigned ipath_mtu4096 = 1; /* max 4KB IB mtu by default, if supported */
  78 module_param_named(mtu4096, ipath_mtu4096, uint, S_IRUGO);
  79 MODULE_PARM_DESC(mtu4096, "enable MTU of 4096 bytes, if supported");
  80
  81 static unsigned ipath_hol_timeout_ms = 13000;
  82 module_param_named(hol_timeout_ms, ipath_hol_timeout_ms, uint, S_IRUGO);
  83 MODULE_PARM_DESC(hol_timeout_ms,
  84         "duration of user app suspension after link failure");
  85
  86 unsigned ipath_linkrecovery = 1;
  87 module_param_named(linkrecovery, ipath_linkrecovery, uint, S_IWUSR | S_IRUGO);
  88 MODULE_PARM_DESC(linkrecovery, "enable workaround for link recovery issue");
  89
  90 MODULE_LICENSE("GPL");
  91 MODULE_AUTHOR("QLogic <support@qlogic.com>");
  92 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  93
  94 /*
  95  * Table to translate the LINKTRAININGSTATE portion of
  96  * IBCStatus to a human-readable form.
  97  */
  98 const char *ipath_ibcstatus_str[] = {
  99         "Disabled",
 100         "LinkUp",
 101         "PollActive",
 102         "PollQuiet",
 103         "SleepDelay",
 104         "SleepQuiet",
 105         "LState6",              /* unused */
 106         "LState7",              /* unused */
 107         "CfgDebounce",
 108         "CfgRcvfCfg",
 109         "CfgWaitRmt",
 110         "CfgIdle",
 111         "RecovRetrain",
 112         "CfgTxRevLane",         /* unused before IBA7220 */
 113         "RecovWaitRmt",
 114         "RecovIdle",
 115         /* below were added for IBA7220 */
 116         "CfgEnhanced",
 117         "CfgTest",
 118         "CfgWaitRmtTest",
 119         "CfgWaitCfgEnhanced",
 120         "SendTS_T",
 121         "SendTstIdles",
 122         "RcvTS_T",
 123         "SendTst_TS1s",
 124         "LTState18", "LTState19", "LTState1A", "LTState1B",
 125         "LTState1C", "LTState1D", "LTState1E", "LTState1F"
 126 };
 127
 128 static void __devexit ipath_remove_one(struct pci_dev *);
 129 static int __devinit ipath_init_one(struct pci_dev *,
 130                                     const struct pci_device_id *);
 131
 132 /* Only needed for registration, nothing else needs this info */
 133 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 134 #define PCI_VENDOR_ID_QLOGIC 0x1077
 135 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 136 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 137 #define PCI_DEVICE_ID_INFINIPATH_7220 0x7220
 138
 139 /* Number of seconds before our card status check...  */
 140 #define STATUS_TIMEOUT 60
 141
 142 static const struct pci_device_id ipath_pci_tbl[] = {
 143         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 144         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 145         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_INFINIPATH_7220) },
 146         { 0, }
 147 };
 148
 149 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 150
 151 static struct pci_driver ipath_driver = {
 152         .name = IPATH_DRV_NAME,
 153         .probe = ipath_init_one,
 154         .remove = __devexit_p(ipath_remove_one),
 155         .id_table = ipath_pci_tbl,
 156         .driver = {
 157                 .groups = ipath_driver_attr_groups,
 158         },
 159 };
 160
 161 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 162                              u32 *bar0, u32 *bar1)
 163 {
 164         int ret;
 165
 166         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 167         if (ret)
 168                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 169                               "error %d\n", -ret);
 170
 171         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 172         if (ret)
 173                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 174                               "error %d\n", -ret);
 175
 176         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 177 }
 178
 179 static void ipath_free_devdata(struct pci_dev *pdev,
 180                                struct ipath_devdata *dd)
 181 {
 182         unsigned long flags;
 183
 184         pci_set_drvdata(pdev, NULL);
 185
 186         if (dd->ipath_unit != -1) {
 187                 spin_lock_irqsave(&ipath_devs_lock, flags);
 188                 idr_remove(&unit_table, dd->ipath_unit);
 189                 list_del(&dd->ipath_list);
 190                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 191         }
 192         vfree(dd);
 193 }
 194
 195 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 196 {
 197         unsigned long flags;
 198         struct ipath_devdata *dd;
 199         int ret;
 200
 201         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 202                 dd = ERR_PTR(-ENOMEM);
 203                 goto bail;
 204         }
 205
 206         dd = vmalloc(sizeof(*dd));
 207         if (!dd) {
 208                 dd = ERR_PTR(-ENOMEM);
 209                 goto bail;
 210         }
 211         memset(dd, 0, sizeof(*dd));
 212         dd->ipath_unit = -1;
 213
 214         spin_lock_irqsave(&ipath_devs_lock, flags);
 215
 216         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 217         if (ret < 0) {
 218                 printk(KERN_ERR IPATH_DRV_NAME
 219                        ": Could not allocate unit ID: error %d\n", -ret);
 220                 ipath_free_devdata(pdev, dd);
 221                 dd = ERR_PTR(ret);
 222                 goto bail_unlock;
 223         }
 224
 225         dd->pcidev = pdev;
 226         pci_set_drvdata(pdev, dd);
 227
 228         list_add(&dd->ipath_list, &ipath_dev_list);
 229
 230 bail_unlock:
 231         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 232
 233 bail:
 234         return dd;
 235 }
 236
 237 static inline struct ipath_devdata *__ipath_lookup(int unit)
 238 {
 239         return idr_find(&unit_table, unit);
 240 }
 241
 242 struct ipath_devdata *ipath_lookup(int unit)
 243 {
 244         struct ipath_devdata *dd;
 245         unsigned long flags;
 246
 247         spin_lock_irqsave(&ipath_devs_lock, flags);
 248         dd = __ipath_lookup(unit);
 249         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 250
 251         return dd;
 252 }
 253
 254 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp)
 255 {
 256         int nunits, npresent, nup;
 257         struct ipath_devdata *dd;
 258         unsigned long flags;
 259         int maxports;
 260
 261         nunits = npresent = nup = maxports = 0;
 262
 263         spin_lock_irqsave(&ipath_devs_lock, flags);
 264
 265         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 266                 nunits++;
 267                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 268                         npresent++;
 269                 if (dd->ipath_lid &&
 270                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 271                                          | IPATH_LINKUNK)))
 272                         nup++;
 273                 if (dd->ipath_cfgports > maxports)
 274                         maxports = dd->ipath_cfgports;
 275         }
 276
 277         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 278
 279         if (npresentp)
 280                 *npresentp = npresent;
 281         if (nupp)
 282                 *nupp = nup;
 283         if (maxportsp)
 284                 *maxportsp = maxports;
 285
 286         return nunits;
 287 }
 288
 289 /*
 290  * These next two routines are placeholders in case we don't have per-arch
 291  * code for controlling write combining.  If explicit control of write
 292  * combining is not available, performance will probably be awful.
 293  */
 294
 295 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 296 {
 297         return -EOPNOTSUPP;
 298 }
 299
 300 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 301 {
 302 }
 303
 304 /*
 305  * Perform a PIO buffer bandwidth write test, to verify proper system
 306  * configuration.  Even when all the setup calls work, occasionally
 307  * BIOS or other issues can prevent write combining from working, or
 308  * can cause other bandwidth problems to the chip.
 309  *
 310  * This test simply writes the same buffer over and over again, and
 311  * measures close to the peak bandwidth to the chip (not testing
 312  * data bandwidth to the wire).   On chips that use an address-based
 313  * trigger to send packets to the wire, this is easy.  On chips that
 314  * use a count to trigger, we want to make sure that the packet doesn't
 315  * go out on the wire, or trigger flow control checks.
 316  */
 317 static void ipath_verify_pioperf(struct ipath_devdata *dd)
 318 {
 319         u32 pbnum, cnt, lcnt;
 320         u32 __iomem *piobuf;
 321         u32 *addr;
 322         u64 msecs, emsecs;
 323
 324         piobuf = ipath_getpiobuf(dd, 0, &pbnum);
 325         if (!piobuf) {
 326                 dev_info(&dd->pcidev->dev,
 327                         "No PIObufs for checking perf, skipping\n");
 328                 return;
 329         }
 330
 331         /*
 332          * Enough to give us a reasonable test, less than piobuf size, and
 333          * likely multiple of store buffer length.
 334          */
 335         cnt = 1024;
 336
 337         addr = vmalloc(cnt);
 338         if (!addr) {
 339                 dev_info(&dd->pcidev->dev,
 340                         "Couldn't get memory for checking PIO perf,"
 341                         " skipping\n");
 342                 goto done;
 343         }
 344
 345         preempt_disable();  /* we want reasonably accurate elapsed time */
 346         msecs = 1 + jiffies_to_msecs(jiffies);
 347         for (lcnt = 0; lcnt < 10000U; lcnt++) {
 348                 /* wait until we cross msec boundary */
 349                 if (jiffies_to_msecs(jiffies) >= msecs)
 350                         break;
 351                 udelay(1);
 352         }
 353
 354         ipath_disable_armlaunch(dd);
 355
 356         /*
 357          * length 0, no dwords actually sent, and mark as VL15
 358          * on chips where that may matter (due to IB flowcontrol)
 359          */
 360         if ((dd->ipath_flags & IPATH_HAS_PBC_CNT))
 361                 writeq(1UL << 63, piobuf);
 362         else
 363                 writeq(0, piobuf);
 364         ipath_flush_wc();
 365
 366         /*
 367          * this is only roughly accurate, since even with preempt we
 368          * still take interrupts that could take a while.   Running for
 369          * >= 5 msec seems to get us "close enough" to accurate values
 370          */
 371         msecs = jiffies_to_msecs(jiffies);
 372         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
 373                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
 374                 emsecs = jiffies_to_msecs(jiffies) - msecs;
 375         }
 376
 377         /* 1 GiB/sec, slightly over IB SDR line rate */
 378         if (lcnt < (emsecs * 1024U))
 379                 ipath_dev_err(dd,
 380                         "Performance problem: bandwidth to PIO buffers is "
 381                         "only %u MiB/sec\n",
 382                         lcnt / (u32) emsecs);
 383         else
 384                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
 385                         lcnt / (u32) emsecs);
 386
 387         preempt_enable();
 388
 389         vfree(addr);
 390
 391 done:
 392         /* disarm piobuf, so it's available again */
 393         ipath_disarm_piobufs(dd, pbnum, 1);
 394         ipath_enable_armlaunch(dd);
 395 }
 396
 397 static int __devinit ipath_init_one(struct pci_dev *pdev,
 398                                     const struct pci_device_id *ent)
 399 {
 400         int ret, len, j;
 401         struct ipath_devdata *dd;
 402         unsigned long long addr;
 403         u32 bar0 = 0, bar1 = 0;
 404         u8 rev;
 405
 406         dd = ipath_alloc_devdata(pdev);
 407         if (IS_ERR(dd)) {
 408                 ret = PTR_ERR(dd);
 409                 printk(KERN_ERR IPATH_DRV_NAME
 410                        ": Could not allocate devdata: error %d\n", -ret);
 411                 goto bail;
 412         }
 413
 414         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 415
 416         ret = pci_enable_device(pdev);
 417         if (ret) {
 418                 /* This can happen iff:
 419                  *
 420                  * We did a chip reset, and then failed to reprogram the
 421                  * BAR, or the chip reset due to an internal error.  We then
 422                  * unloaded the driver and reloaded it.
 423                  *
 424                  * Both reset cases set the BAR back to initial state.  For
 425                  * the latter case, the AER sticky error bit at offset 0x718
 426                  * should be set, but the Linux kernel doesn't yet know
 427                  * about that, it appears.  If the original BAR was retained
 428                  * in the kernel data structures, this may be OK.
 429                  */
 430                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 431                               dd->ipath_unit, -ret);
 432                 goto bail_devdata;
 433         }
 434         addr = pci_resource_start(pdev, 0);
 435         len = pci_resource_len(pdev, 0);
 436         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %d, vend %x/%x "
 437                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 438                    ent->device, ent->driver_data);
 439
 440         read_bars(dd, pdev, &bar0, &bar1);
 441
 442         if (!bar1 && !(bar0 & ~0xf)) {
 443                 if (addr) {
 444                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 445                                  "rewriting as %llx\n", addr);
 446                         ret = pci_write_config_dword(
 447                                 pdev, PCI_BASE_ADDRESS_0, addr);
 448                         if (ret) {
 449                                 ipath_dev_err(dd, "rewrite of BAR0 "
 450                                               "failed: err %d\n", -ret);
 451                                 goto bail_disable;
 452                         }
 453                         ret = pci_write_config_dword(
 454                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 455                         if (ret) {
 456                                 ipath_dev_err(dd, "rewrite of BAR1 "
 457                                               "failed: err %d\n", -ret);
 458                                 goto bail_disable;
 459                         }
 460                 } else {
 461                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 462                                       "not usable until reboot\n");
 463                         ret = -ENODEV;
 464                         goto bail_disable;
 465                 }
 466         }
 467
 468         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 469         if (ret) {
 470                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 471                          "err %d\n", dd->ipath_unit, -ret);
 472                 goto bail_disable;
 473         }
 474
 475         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 476         if (ret) {
 477                 /*
 478                  * if the 64 bit setup fails, try 32 bit.  Some systems
 479                  * do not setup 64 bit maps on systems with 2GB or less
 480                  * memory installed.
 481                  */
 482                 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 483                 if (ret) {
 484                         dev_info(&pdev->dev,
 485                                 "Unable to set DMA mask for unit %u: %d\n",
 486                                 dd->ipath_unit, ret);
 487                         goto bail_regions;
 488                 }
 489                 else {
 490                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 491                         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 492                         if (ret)
 493                                 dev_info(&pdev->dev,
 494                                         "Unable to set DMA consistent mask "
 495                                         "for unit %u: %d\n",
 496                                         dd->ipath_unit, ret);
 497
 498                 }
 499         }
 500         else {
 501                 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 502                 if (ret)
 503                         dev_info(&pdev->dev,
 504                                 "Unable to set DMA consistent mask "
 505                                 "for unit %u: %d\n",
 506                                 dd->ipath_unit, ret);
 507         }
 508
 509         pci_set_master(pdev);
 510
 511         /*
 512          * Save BARs to rewrite after device reset.  Save all 64 bits of
 513          * BAR, just in case.
 514          */
 515         dd->ipath_pcibar0 = addr;
 516         dd->ipath_pcibar1 = addr >> 32;
 517         dd->ipath_deviceid = ent->device;       /* save for later use */
 518         dd->ipath_vendorid = ent->vendor;
 519
 520         /* setup the chip-specific functions, as early as possible. */
 521         switch (ent->device) {
 522         case PCI_DEVICE_ID_INFINIPATH_HT:
 523 #ifdef CONFIG_HT_IRQ
 524                 ipath_init_iba6110_funcs(dd);
 525                 break;
 526 #else
 527                 ipath_dev_err(dd, "QLogic HT device 0x%x cannot work if "
 528                               "CONFIG_HT_IRQ is not enabled\n", ent->device);
 529                 return -ENODEV;
 530 #endif
 531         case PCI_DEVICE_ID_INFINIPATH_PE800:
 532 #ifdef CONFIG_PCI_MSI
 533                 ipath_init_iba6120_funcs(dd);
 534                 break;
 535 #else
 536                 ipath_dev_err(dd, "QLogic PCIE device 0x%x cannot work if "
 537                               "CONFIG_PCI_MSI is not enabled\n", ent->device);
 538                 return -ENODEV;
 539 #endif
 540         case PCI_DEVICE_ID_INFINIPATH_7220:
 541 #ifndef CONFIG_PCI_MSI
 542                 ipath_dbg("CONFIG_PCI_MSI is not enabled, "
 543                           "using INTx for unit %u\n", dd->ipath_unit);
 544 #endif
 545                 ipath_init_iba7220_funcs(dd);
 546                 break;
 547         default:
 548                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 549                               "failing\n", ent->device);
 550                 return -ENODEV;
 551         }
 552
 553         for (j = 0; j < 6; j++) {
 554                 if (!pdev->resource[j].start)
 555                         continue;
 556                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 557                            j, (unsigned long long)pdev->resource[j].start,
 558                            (unsigned long long)pdev->resource[j].end,
 559                            (unsigned long long)pci_resource_len(pdev, j));
 560         }
 561
 562         if (!addr) {
 563                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 564                 ret = -ENODEV;
 565                 goto bail_regions;
 566         }
 567
 568         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 569         if (ret) {
 570                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
 571                               "%u: err %d\n", dd->ipath_unit, -ret);
 572                 goto bail_regions;      /* shouldn't ever happen */
 573         }
 574         dd->ipath_pcirev = rev;
 575
 576 #if defined(__powerpc__)
 577         /* There isn't a generic way to specify writethrough mappings */
 578         dd->ipath_kregbase = __ioremap(addr, len,
 579                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 580 #else
 581         dd->ipath_kregbase = ioremap_nocache(addr, len);
 582 #endif
 583
 584         if (!dd->ipath_kregbase) {
 585                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 586                           addr);
 587                 ret = -ENOMEM;
 588                 goto bail_iounmap;
 589         }
 590         dd->ipath_kregend = (u64 __iomem *)
 591                 ((void __iomem *)dd->ipath_kregbase + len);
 592         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 593         /* for user mmap */
 594         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 595                    addr, dd->ipath_kregbase);
 596
 597         if (dd->ipath_f_bus(dd, pdev))
 598                 ipath_dev_err(dd, "Failed to setup config space; "
 599                               "continuing anyway\n");
 600
 601         /*
 602          * set up our interrupt handler; IRQF_SHARED probably not needed,
 603          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 604          * check 0 irq after we return from chip-specific bus setup, since
 605          * that can affect this due to setup
 606          */
 607         if (!dd->ipath_irq)
 608                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 609                               "work\n");
 610         else {
 611                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 612                                   IPATH_DRV_NAME, dd);
 613                 if (ret) {
 614                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 615                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 616                         goto bail_iounmap;
 617                 }
 618         }
 619
 620         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 621         if (ret)
 622                 goto bail_irqsetup;
 623
 624         ret = ipath_enable_wc(dd);
 625
 626         if (ret) {
 627                 ipath_dev_err(dd, "Write combining not enabled "
 628                               "(err %d): performance may be poor\n",
 629                               -ret);
 630                 ret = 0;
 631         }
 632
 633         ipath_verify_pioperf(dd);
 634
 635         ipath_device_create_group(&pdev->dev, dd);
 636         ipathfs_add_device(dd);
 637         ipath_user_add(dd);
 638         ipath_diag_add(dd);
 639         ipath_register_ib_device(dd);
 640
 641         goto bail;
 642
 643 bail_irqsetup:
 644         if (pdev->irq)
 645                 free_irq(pdev->irq, dd);
 646
 647 bail_iounmap:
 648         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 649
 650 bail_regions:
 651         pci_release_regions(pdev);
 652
 653 bail_disable:
 654         pci_disable_device(pdev);
 655
 656 bail_devdata:
 657         ipath_free_devdata(pdev, dd);
 658
 659 bail:
 660         return ret;
 661 }
 662
 663 static void __devexit cleanup_device(struct ipath_devdata *dd)
 664 {
 665         int port;
 666         struct ipath_portdata **tmp;
 667         unsigned long flags;
 668
 669         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 670                 /* can't do anything more with chip; needs re-init */
 671                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 672                 if (dd->ipath_kregbase) {
 673                         /*
 674                          * if we haven't already cleaned up before these are
 675                          * to ensure any register reads/writes "fail" until
 676                          * re-init
 677                          */
 678                         dd->ipath_kregbase = NULL;
 679                         dd->ipath_uregbase = 0;
 680                         dd->ipath_sregbase = 0;
 681                         dd->ipath_cregbase = 0;
 682                         dd->ipath_kregsize = 0;
 683                 }
 684                 ipath_disable_wc(dd);
 685         }
 686
 687         if (dd->ipath_spectriggerhit)
 688                 dev_info(&dd->pcidev->dev, "%lu special trigger hits\n",
 689                          dd->ipath_spectriggerhit);
 690
 691         if (dd->ipath_pioavailregs_dma) {
 692                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 693                                   (void *) dd->ipath_pioavailregs_dma,
 694                                   dd->ipath_pioavailregs_phys);
 695                 dd->ipath_pioavailregs_dma = NULL;
 696         }
 697         if (dd->ipath_dummy_hdrq) {
 698                 dma_free_coherent(&dd->pcidev->dev,
 699                         dd->ipath_pd[0]->port_rcvhdrq_size,
 700                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 701                 dd->ipath_dummy_hdrq = NULL;
 702         }
 703
 704         if (dd->ipath_pageshadow) {
 705                 struct page **tmpp = dd->ipath_pageshadow;
 706                 dma_addr_t *tmpd = dd->ipath_physshadow;
 707                 int i, cnt = 0;
 708
 709                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 710                            "locked\n");
 711                 for (port = 0; port < dd->ipath_cfgports; port++) {
 712                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 713                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 714                         for (i = port_tidbase; i < maxtid; i++) {
 715                                 if (!tmpp[i])
 716                                         continue;
 717                                 pci_unmap_page(dd->pcidev, tmpd[i],
 718                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 719                                 ipath_release_user_pages(&tmpp[i], 1);
 720                                 tmpp[i] = NULL;
 721                                 cnt++;
 722                         }
 723                 }
 724                 if (cnt) {
 725                         ipath_stats.sps_pageunlocks += cnt;
 726                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 727                                    "entries locked\n", cnt);
 728                 }
 729                 if (ipath_stats.sps_pagelocks ||
 730                     ipath_stats.sps_pageunlocks)
 731                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 732                                    "unlocked via ipath_m{un}lock\n",
 733                                    (unsigned long long)
 734                                    ipath_stats.sps_pagelocks,
 735                                    (unsigned long long)
 736                                    ipath_stats.sps_pageunlocks);
 737
 738                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 739                            dd->ipath_pageshadow);
 740                 tmpp = dd->ipath_pageshadow;
 741                 dd->ipath_pageshadow = NULL;
 742                 vfree(tmpp);
 743
 744                 dd->ipath_egrtidbase = NULL;
 745         }
 746
 747         /*
 748          * free any resources still in use (usually just kernel ports)
 749          * at unload; we do for portcnt, because that's what we allocate.
 750          * We acquire lock to be really paranoid that ipath_pd isn't being
 751          * accessed from some interrupt-related code (that should not happen,
 752          * but best to be sure).
 753          */
 754         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
 755         tmp = dd->ipath_pd;
 756         dd->ipath_pd = NULL;
 757         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
 758         for (port = 0; port < dd->ipath_portcnt; port++) {
 759                 struct ipath_portdata *pd = tmp[port];
 760                 tmp[port] = NULL; /* debugging paranoia */
 761                 ipath_free_pddata(dd, pd);
 762         }
 763         kfree(tmp);
 764 }
 765
 766 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 767 {
 768         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 769
 770         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 771
 772         /*
 773          * disable the IB link early, to be sure no new packets arrive, which
 774          * complicates the shutdown process
 775          */
 776         ipath_shutdown_device(dd);
 777
 778         flush_scheduled_work();
 779
 780         if (dd->verbs_dev)
 781                 ipath_unregister_ib_device(dd->verbs_dev);
 782
 783         ipath_diag_remove(dd);
 784         ipath_user_remove(dd);
 785         ipathfs_remove_device(dd);
 786         ipath_device_remove_group(&pdev->dev, dd);
 787
 788         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 789                    "unit %u\n", dd, (u32) dd->ipath_unit);
 790
 791         cleanup_device(dd);
 792
 793         /*
 794          * turn off rcv, send, and interrupts for all ports, all drivers
 795          * should also hard reset the chip here?
 796          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 797          * for all versions of the driver, if they were allocated
 798          */
 799         if (dd->ipath_irq) {
 800                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 801                            dd->ipath_unit, dd->ipath_irq);
 802                 dd->ipath_f_free_irq(dd);
 803         } else
 804                 ipath_dbg("irq is 0, not doing free_irq "
 805                           "for unit %u\n", dd->ipath_unit);
 806         /*
 807          * we check for NULL here, because it's outside
 808          * the kregbase check, and we need to call it
 809          * after the free_irq.  Thus it's possible that
 810          * the function pointers were never initialized.
 811          */
 812         if (dd->ipath_f_cleanup)
 813                 /* clean up chip-specific stuff */
 814                 dd->ipath_f_cleanup(dd);
 815
 816         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 817         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 818         pci_release_regions(pdev);
 819         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 820         pci_disable_device(pdev);
 821
 822         ipath_free_devdata(pdev, dd);
 823 }
 824
 825 /* general driver use */
 826 DEFINE_MUTEX(ipath_mutex);
 827
 828 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 829
 830 /**
 831  * ipath_disarm_piobufs - cancel a range of PIO buffers
 832  * @dd: the infinipath device
 833  * @first: the first PIO buffer to cancel
 834  * @cnt: the number of PIO buffers to cancel
 835  *
 836  * cancel a range of PIO buffers, used when they might be armed, but
 837  * not triggered.  Used at init to ensure buffer state, and also user
 838  * process close, in case it died while writing to a PIO buffer
 839  * Also after errors.
 840  */
 841 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 842                           unsigned cnt)
 843 {
 844         unsigned i, last = first + cnt;
 845         unsigned long flags;
 846
 847         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 848         for (i = first; i < last; i++) {
 849                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 850                 /*
 851                  * The disarm-related bits are write-only, so it
 852                  * is ok to OR them in with our copy of sendctrl
 853                  * while we hold the lock.
 854                  */
 855                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 856                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
 857                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
 858                 /* can't disarm bufs back-to-back per iba7220 spec */
 859                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 860                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 861         }
 862         /* on some older chips, update may not happen after cancel */
 863         ipath_force_pio_avail_update(dd);
 864 }
 865
 866 /**
 867  * ipath_wait_linkstate - wait for an IB link state change to occur
 868  * @dd: the infinipath device
 869  * @state: the state to wait for
 870  * @msecs: the number of milliseconds to wait
 871  *
 872  * wait up to msecs milliseconds for IB link state change to occur for
 873  * now, take the easy polling route.  Currently used only by
 874  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 875  * -ETIMEDOUT state can have multiple states set, for any of several
 876  * transitions.
 877  */
 878 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 879 {
 880         dd->ipath_state_wanted = state;
 881         wait_event_interruptible_timeout(ipath_state_wait,
 882                                          (dd->ipath_flags & state),
 883                                          msecs_to_jiffies(msecs));
 884         dd->ipath_state_wanted = 0;
 885
 886         if (!(dd->ipath_flags & state)) {
 887                 u64 val;
 888                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 889                            " ms\n",
 890                            /* test INIT ahead of DOWN, both can be set */
 891                            (state & IPATH_LINKINIT) ? "INIT" :
 892                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 893                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 894                            msecs);
 895                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 896                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 897                            (unsigned long long) ipath_read_kreg64(
 898                                    dd, dd->ipath_kregs->kr_ibcctrl),
 899                            (unsigned long long) val,
 900                            ipath_ibcstatus_str[val & dd->ibcs_lts_mask]);
 901         }
 902         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 903 }
 904
 905 static void decode_sdma_errs(struct ipath_devdata *dd, ipath_err_t err,
 906         char *buf, size_t blen)
 907 {
 908         static const struct {
 909                 ipath_err_t err;
 910                 const char *msg;
 911         } errs[] = {
 912                 { INFINIPATH_E_SDMAGENMISMATCH, "SDmaGenMismatch" },
 913                 { INFINIPATH_E_SDMAOUTOFBOUND, "SDmaOutOfBound" },
 914                 { INFINIPATH_E_SDMATAILOUTOFBOUND, "SDmaTailOutOfBound" },
 915                 { INFINIPATH_E_SDMABASE, "SDmaBase" },
 916                 { INFINIPATH_E_SDMA1STDESC, "SDma1stDesc" },
 917                 { INFINIPATH_E_SDMARPYTAG, "SDmaRpyTag" },
 918                 { INFINIPATH_E_SDMADWEN, "SDmaDwEn" },
 919                 { INFINIPATH_E_SDMAMISSINGDW, "SDmaMissingDw" },
 920                 { INFINIPATH_E_SDMAUNEXPDATA, "SDmaUnexpData" },
 921                 { INFINIPATH_E_SDMADESCADDRMISALIGN, "SDmaDescAddrMisalign" },
 922                 { INFINIPATH_E_SENDBUFMISUSE, "SendBufMisuse" },
 923                 { INFINIPATH_E_SDMADISABLED, "SDmaDisabled" },
 924         };
 925         int i;
 926         int expected;
 927         size_t bidx = 0;
 928
 929         for (i = 0; i < ARRAY_SIZE(errs); i++) {
 930                 expected = (errs[i].err != INFINIPATH_E_SDMADISABLED) ? 0 :
 931                         test_bit(IPATH_SDMA_ABORTING, &dd->ipath_sdma_status);
 932                 if ((err & errs[i].err) && !expected)
 933                         bidx += snprintf(buf + bidx, blen - bidx,
 934                                          "%s ", errs[i].msg);
 935         }
 936 }
 937
 938 /*
 939  * Decode the error status into strings, deciding whether to always
 940  * print * it or not depending on "normal packet errors" vs everything
 941  * else.   Return 1 if "real" errors, otherwise 0 if only packet
 942  * errors, so caller can decide what to print with the string.
 943  */
 944 int ipath_decode_err(struct ipath_devdata *dd, char *buf, size_t blen,
 945         ipath_err_t err)
 946 {
 947         int iserr = 1;
 948         *buf = '\0';
 949         if (err & INFINIPATH_E_PKTERRS) {
 950                 if (!(err & ~INFINIPATH_E_PKTERRS))
 951                         iserr = 0; // if only packet errors.
 952                 if (ipath_debug & __IPATH_ERRPKTDBG) {
 953                         if (err & INFINIPATH_E_REBP)
 954                                 strlcat(buf, "EBP ", blen);
 955                         if (err & INFINIPATH_E_RVCRC)
 956                                 strlcat(buf, "VCRC ", blen);
 957                         if (err & INFINIPATH_E_RICRC) {
 958                                 strlcat(buf, "CRC ", blen);
 959                                 // clear for check below, so only once
 960                                 err &= INFINIPATH_E_RICRC;
 961                         }
 962                         if (err & INFINIPATH_E_RSHORTPKTLEN)
 963                                 strlcat(buf, "rshortpktlen ", blen);
 964                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 965                                 strlcat(buf, "sdroppeddatapkt ", blen);
 966                         if (err & INFINIPATH_E_SPKTLEN)
 967                                 strlcat(buf, "spktlen ", blen);
 968                 }
 969                 if ((err & INFINIPATH_E_RICRC) &&
 970                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
 971                         strlcat(buf, "CRC ", blen);
 972                 if (!iserr)
 973                         goto done;
 974         }
 975         if (err & INFINIPATH_E_RHDRLEN)
 976                 strlcat(buf, "rhdrlen ", blen);
 977         if (err & INFINIPATH_E_RBADTID)
 978                 strlcat(buf, "rbadtid ", blen);
 979         if (err & INFINIPATH_E_RBADVERSION)
 980                 strlcat(buf, "rbadversion ", blen);
 981         if (err & INFINIPATH_E_RHDR)
 982                 strlcat(buf, "rhdr ", blen);
 983         if (err & INFINIPATH_E_SENDSPECIALTRIGGER)
 984                 strlcat(buf, "sendspecialtrigger ", blen);
 985         if (err & INFINIPATH_E_RLONGPKTLEN)
 986                 strlcat(buf, "rlongpktlen ", blen);
 987         if (err & INFINIPATH_E_RMAXPKTLEN)
 988                 strlcat(buf, "rmaxpktlen ", blen);
 989         if (err & INFINIPATH_E_RMINPKTLEN)
 990                 strlcat(buf, "rminpktlen ", blen);
 991         if (err & INFINIPATH_E_SMINPKTLEN)
 992                 strlcat(buf, "sminpktlen ", blen);
 993         if (err & INFINIPATH_E_RFORMATERR)
 994                 strlcat(buf, "rformaterr ", blen);
 995         if (err & INFINIPATH_E_RUNSUPVL)
 996                 strlcat(buf, "runsupvl ", blen);
 997         if (err & INFINIPATH_E_RUNEXPCHAR)
 998                 strlcat(buf, "runexpchar ", blen);
 999         if (err & INFINIPATH_E_RIBFLOW)
1000                 strlcat(buf, "ribflow ", blen);
1001         if (err & INFINIPATH_E_SUNDERRUN)
1002                 strlcat(buf, "sunderrun ", blen);
1003         if (err & INFINIPATH_E_SPIOARMLAUNCH)
1004                 strlcat(buf, "spioarmlaunch ", blen);
1005         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
1006                 strlcat(buf, "sunexperrpktnum ", blen);
1007         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
1008                 strlcat(buf, "sdroppedsmppkt ", blen);
1009         if (err & INFINIPATH_E_SMAXPKTLEN)
1010                 strlcat(buf, "smaxpktlen ", blen);
1011         if (err & INFINIPATH_E_SUNSUPVL)
1012                 strlcat(buf, "sunsupVL ", blen);
1013         if (err & INFINIPATH_E_INVALIDADDR)
1014                 strlcat(buf, "invalidaddr ", blen);
1015         if (err & INFINIPATH_E_RRCVEGRFULL)
1016                 strlcat(buf, "rcvegrfull ", blen);
1017         if (err & INFINIPATH_E_RRCVHDRFULL)
1018                 strlcat(buf, "rcvhdrfull ", blen);
1019         if (err & INFINIPATH_E_IBSTATUSCHANGED)
1020                 strlcat(buf, "ibcstatuschg ", blen);
1021         if (err & INFINIPATH_E_RIBLOSTLINK)
1022                 strlcat(buf, "riblostlink ", blen);
1023         if (err & INFINIPATH_E_HARDWARE)
1024                 strlcat(buf, "hardware ", blen);
1025         if (err & INFINIPATH_E_RESET)
1026                 strlcat(buf, "reset ", blen);
1027         if (err & INFINIPATH_E_SDMAERRS)
1028                 decode_sdma_errs(dd, err, buf, blen);
1029         if (err & INFINIPATH_E_INVALIDEEPCMD)
1030                 strlcat(buf, "invalideepromcmd ", blen);
1031 done:
1032         return iserr;
1033 }
1034
1035 /**
1036  * get_rhf_errstring - decode RHF errors
1037  * @err: the err number
1038  * @msg: the output buffer
1039  * @len: the length of the output buffer
1040  *
1041  * only used one place now, may want more later
1042  */
1043 static void get_rhf_errstring(u32 err, char *msg, size_t len)
1044 {
1045         /* if no errors, and so don't need to check what's first */
1046         *msg = '\0';
1047
1048         if (err & INFINIPATH_RHF_H_ICRCERR)
1049                 strlcat(msg, "icrcerr ", len);
1050         if (err & INFINIPATH_RHF_H_VCRCERR)
1051                 strlcat(msg, "vcrcerr ", len);
1052         if (err & INFINIPATH_RHF_H_PARITYERR)
1053                 strlcat(msg, "parityerr ", len);
1054         if (err & INFINIPATH_RHF_H_LENERR)
1055                 strlcat(msg, "lenerr ", len);
1056         if (err & INFINIPATH_RHF_H_MTUERR)
1057                 strlcat(msg, "mtuerr ", len);
1058         if (err & INFINIPATH_RHF_H_IHDRERR)
1059                 /* infinipath hdr checksum error */
1060                 strlcat(msg, "ipathhdrerr ", len);
1061         if (err & INFINIPATH_RHF_H_TIDERR)
1062                 strlcat(msg, "tiderr ", len);
1063         if (err & INFINIPATH_RHF_H_MKERR)
1064                 /* bad port, offset, etc. */
1065                 strlcat(msg, "invalid ipathhdr ", len);
1066         if (err & INFINIPATH_RHF_H_IBERR)
1067                 strlcat(msg, "iberr ", len);
1068         if (err & INFINIPATH_RHF_L_SWA)
1069                 strlcat(msg, "swA ", len);
1070         if (err & INFINIPATH_RHF_L_SWB)
1071                 strlcat(msg, "swB ", len);
1072 }
1073
1074 /**
1075  * ipath_get_egrbuf - get an eager buffer
1076  * @dd: the infinipath device
1077  * @bufnum: the eager buffer to get
1078  *
1079  * must only be called if ipath_pd[port] is known to be allocated
1080  */
1081 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1082 {
1083         return dd->ipath_port0_skbinfo ?
1084                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1085 }
1086
1087 /**
1088  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1089  * @dd: the infinipath device
1090  * @gfp_mask: the sk_buff SFP mask
1091  */
1092 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1093                                 gfp_t gfp_mask)
1094 {
1095         struct sk_buff *skb;
1096         u32 len;
1097
1098         /*
1099          * Only fully supported way to handle this is to allocate lots
1100          * extra, align as needed, and then do skb_reserve().  That wastes
1101          * a lot of memory...  I'll have to hack this into infinipath_copy
1102          * also.
1103          */
1104
1105         /*
1106          * We need 2 extra bytes for ipath_ether data sent in the
1107          * key header.  In order to keep everything dword aligned,
1108          * we'll reserve 4 bytes.
1109          */
1110         len = dd->ipath_ibmaxlen + 4;
1111
1112         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1113                 /* We need a 2KB multiple alignment, and there is no way
1114                  * to do it except to allocate extra and then skb_reserve
1115                  * enough to bring it up to the right alignment.
1116                  */
1117                 len += 2047;
1118         }
1119
1120         skb = __dev_alloc_skb(len, gfp_mask);
1121         if (!skb) {
1122                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1123                               len);
1124                 goto bail;
1125         }
1126
1127         skb_reserve(skb, 4);
1128
1129         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1130                 u32 una = (unsigned long)skb->data & 2047;
1131                 if (una)
1132                         skb_reserve(skb, 2048 - una);
1133         }
1134
1135 bail:
1136         return skb;
1137 }
1138
1139 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1140                              u32 eflags,
1141                              u32 l,
1142                              u32 etail,
1143                              __le32 *rhf_addr,
1144                              struct ipath_message_header *hdr)
1145 {
1146         char emsg[128];
1147
1148         get_rhf_errstring(eflags, emsg, sizeof emsg);
1149         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1150                    "tlen=%x opcode=%x egridx=%x: %s\n",
1151                    eflags, l,
1152                    ipath_hdrget_rcv_type(rhf_addr),
1153                    ipath_hdrget_length_in_bytes(rhf_addr),
1154                    be32_to_cpu(hdr->bth[0]) >> 24,
1155                    etail, emsg);
1156
1157         /* Count local link integrity errors. */
1158         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1159                 u8 n = (dd->ipath_ibcctrl >>
1160                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1161                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1162
1163                 if (++dd->ipath_lli_counter > n) {
1164                         dd->ipath_lli_counter = 0;
1165                         dd->ipath_lli_errors++;
1166                 }
1167         }
1168 }
1169
1170 /*
1171  * ipath_kreceive - receive a packet
1172  * @pd: the infinipath port
1173  *
1174  * called from interrupt handler for errors or receive interrupt
1175  */
1176 void ipath_kreceive(struct ipath_portdata *pd)
1177 {
1178         struct ipath_devdata *dd = pd->port_dd;
1179         __le32 *rhf_addr;
1180         void *ebuf;
1181         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1182         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1183         u32 etail = -1, l, hdrqtail;
1184         struct ipath_message_header *hdr;
1185         u32 eflags, i, etype, tlen, pkttot = 0, updegr = 0, reloop = 0;
1186         static u64 totcalls;    /* stats, may eventually remove */
1187         int last;
1188
1189         l = pd->port_head;
1190         rhf_addr = (__le32 *) pd->port_rcvhdrq + l + dd->ipath_rhf_offset;
1191         if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1192                 u32 seq = ipath_hdrget_seq(rhf_addr);
1193
1194                 if (seq != pd->port_seq_cnt)
1195                         goto bail;
1196                 hdrqtail = 0;
1197         } else {
1198                 hdrqtail = ipath_get_rcvhdrtail(pd);
1199                 if (l == hdrqtail)
1200                         goto bail;
1201                 smp_rmb();
1202         }
1203
1204 reloop:
1205         for (last = 0, i = 1; !last; i += !last) {
1206                 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr);
1207                 eflags = ipath_hdrget_err_flags(rhf_addr);
1208                 etype = ipath_hdrget_rcv_type(rhf_addr);
1209                 /* total length */
1210                 tlen = ipath_hdrget_length_in_bytes(rhf_addr);
1211                 ebuf = NULL;
1212                 if ((dd->ipath_flags & IPATH_NODMA_RTAIL) ?
1213                     ipath_hdrget_use_egr_buf(rhf_addr) :
1214                     (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
1215                         /*
1216                          * It turns out that the chip uses an eager buffer
1217                          * for all non-expected packets, whether it "needs"
1218                          * one or not.  So always get the index, but don't
1219                          * set ebuf (so we try to copy data) unless the
1220                          * length requires it.
1221                          */
1222                         etail = ipath_hdrget_index(rhf_addr);
1223                         updegr = 1;
1224                         if (tlen > sizeof(*hdr) ||
1225                             etype == RCVHQ_RCV_TYPE_NON_KD)
1226                                 ebuf = ipath_get_egrbuf(dd, etail);
1227                 }
1228
1229                 /*
1230                  * both tiderr and ipathhdrerr are set for all plain IB
1231                  * packets; only ipathhdrerr should be set.
1232                  */
1233
1234                 if (etype != RCVHQ_RCV_TYPE_NON_KD &&
1235                     etype != RCVHQ_RCV_TYPE_ERROR &&
1236                     ipath_hdrget_ipath_ver(hdr->iph.ver_port_tid_offset) !=
1237                     IPS_PROTO_VERSION)
1238                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1239                                    "%x\n", etype);
1240
1241                 if (unlikely(eflags))
1242                         ipath_rcv_hdrerr(dd, eflags, l, etail, rhf_addr, hdr);
1243                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1244                         ipath_ib_rcv(dd->verbs_dev, (u32 *)hdr, ebuf, tlen);
1245                         if (dd->ipath_lli_counter)
1246                                 dd->ipath_lli_counter--;
1247                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
1248                         u8 opcode = be32_to_cpu(hdr->bth[0]) >> 24;
1249                         u32 qp = be32_to_cpu(hdr->bth[1]) & 0xffffff;
1250                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1251                                    "qp=%x), len %x; ignored\n",
1252                                    etype, opcode, qp, tlen);
1253                 }
1254                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1255                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1256                                   be32_to_cpu(hdr->bth[0]) >> 24);
1257                 else {
1258                         /*
1259                          * error packet, type of error unknown.
1260                          * Probably type 3, but we don't know, so don't
1261                          * even try to print the opcode, etc.
1262                          * Usually caused by a "bad packet", that has no
1263                          * BTH, when the LRH says it should.
1264                          */
1265                         ipath_cdbg(ERRPKT, "Error Pkt, but no eflags! egrbuf"
1266                                   " %x, len %x hdrq+%x rhf: %Lx\n",
1267                                   etail, tlen, l, (unsigned long long)
1268                                   le64_to_cpu(*(__le64 *) rhf_addr));
1269                         if (ipath_debug & __IPATH_ERRPKTDBG) {
1270                                 u32 j, *d, dw = rsize-2;
1271                                 if (rsize > (tlen>>2))
1272                                         dw = tlen>>2;
1273                                 d = (u32 *)hdr;
1274                                 printk(KERN_DEBUG "EPkt rcvhdr(%x dw):\n",
1275                                         dw);
1276                                 for (j = 0; j < dw; j++)
1277                                         printk(KERN_DEBUG "%8x%s", d[j],
1278                                                 (j%8) == 7 ? "\n" : " ");
1279                                 printk(KERN_DEBUG ".\n");
1280                         }
1281                 }
1282                 l += rsize;
1283                 if (l >= maxcnt)
1284                         l = 0;
1285                 rhf_addr = (__le32 *) pd->port_rcvhdrq +
1286                         l + dd->ipath_rhf_offset;
1287                 if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1288                         u32 seq = ipath_hdrget_seq(rhf_addr);
1289
1290                         if (++pd->port_seq_cnt > 13)
1291                                 pd->port_seq_cnt = 1;
1292                         if (seq != pd->port_seq_cnt)
1293                                 last = 1;
1294                 } else if (l == hdrqtail)
1295                         last = 1;
1296                 /*
1297                  * update head regs on last packet, and every 16 packets.
1298                  * Reduce bus traffic, while still trying to prevent
1299                  * rcvhdrq overflows, for when the queue is nearly full
1300                  */
1301                 if (last || !(i & 0xf)) {
1302                         u64 lval = l;
1303
1304                         /* request IBA6120 and 7220 interrupt only on last */
1305                         if (last)
1306                                 lval |= dd->ipath_rhdrhead_intr_off;
1307                         ipath_write_ureg(dd, ur_rcvhdrhead, lval,
1308                                 pd->port_port);
1309                         if (updegr) {
1310                                 ipath_write_ureg(dd, ur_rcvegrindexhead,
1311                                                  etail, pd->port_port);
1312                                 updegr = 0;
1313                         }
1314                 }
1315         }
1316
1317         if (!dd->ipath_rhdrhead_intr_off && !reloop &&
1318             !(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1319                 /* IBA6110 workaround; we can have a race clearing chip
1320                  * interrupt with another interrupt about to be delivered,
1321                  * and can clear it before it is delivered on the GPIO
1322                  * workaround.  By doing the extra check here for the
1323                  * in-memory tail register updating while we were doing
1324                  * earlier packets, we "almost" guarantee we have covered
1325                  * that case.
1326                  */
1327                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1328                 if (hqtail != hdrqtail) {
1329                         hdrqtail = hqtail;
1330                         reloop = 1; /* loop 1 extra time at most */
1331                         goto reloop;
1332                 }
1333         }
1334
1335         pkttot += i;
1336
1337         pd->port_head = l;
1338
1339         if (pkttot > ipath_stats.sps_maxpkts_call)
1340                 ipath_stats.sps_maxpkts_call = pkttot;
1341         ipath_stats.sps_port0pkts += pkttot;
1342         ipath_stats.sps_avgpkts_call =
1343                 ipath_stats.sps_port0pkts / ++totcalls;
1344
1345 bail:;
1346 }
1347
1348 /**
1349  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1350  * @dd: the infinipath device
1351  *
1352  * called whenever our local copy indicates we have run out of send buffers
1353  * NOTE: This can be called from interrupt context by some code
1354  * and from non-interrupt context by ipath_getpiobuf().
1355  */
1356
1357 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1358 {
1359         unsigned long flags;
1360         int i;
1361         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1362
1363         /* If the generation (check) bits have changed, then we update the
1364          * busy bit for the corresponding PIO buffer.  This algorithm will
1365          * modify positions to the value they already have in some cases
1366          * (i.e., no change), but it's faster than changing only the bits
1367          * that have changed.
1368          *
1369          * We would like to do this atomicly, to avoid spinlocks in the
1370          * critical send path, but that's not really possible, given the
1371          * type of changes, and that this routine could be called on
1372          * multiple cpu's simultaneously, so we lock in this routine only,
1373          * to avoid conflicting updates; all we change is the shadow, and
1374          * it's a single 64 bit memory location, so by definition the update
1375          * is atomic in terms of what other cpu's can see in testing the
1376          * bits.  The spin_lock overhead isn't too bad, since it only
1377          * happens when all buffers are in use, so only cpu overhead, not
1378          * latency or bandwidth is affected.
1379          */
1380         if (!dd->ipath_pioavailregs_dma) {
1381                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1382                 return;
1383         }
1384         if (ipath_debug & __IPATH_VERBDBG) {
1385                 /* only if packet debug and verbose */
1386                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1387                 unsigned long *shadow = dd->ipath_pioavailshadow;
1388
1389                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1390                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1391                            "s3=%lx\n",
1392                            (unsigned long long) le64_to_cpu(dma[0]),
1393                            shadow[0],
1394                            (unsigned long long) le64_to_cpu(dma[1]),
1395                            shadow[1],
1396                            (unsigned long long) le64_to_cpu(dma[2]),
1397                            shadow[2],
1398                            (unsigned long long) le64_to_cpu(dma[3]),
1399                            shadow[3]);
1400                 if (piobregs > 4)
1401                         ipath_cdbg(
1402                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1403                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1404                                 "d7=%llx s7=%lx\n",
1405                                 (unsigned long long) le64_to_cpu(dma[4]),
1406                                 shadow[4],
1407                                 (unsigned long long) le64_to_cpu(dma[5]),
1408                                 shadow[5],
1409                                 (unsigned long long) le64_to_cpu(dma[6]),
1410                                 shadow[6],
1411                                 (unsigned long long) le64_to_cpu(dma[7]),
1412                                 shadow[7]);
1413         }
1414         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1415         for (i = 0; i < piobregs; i++) {
1416                 u64 pchbusy, pchg, piov, pnew;
1417                 /*
1418                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1419                  */
1420                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
1421                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
1422                 else
1423                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1424                 pchg = dd->ipath_pioavailkernel[i] &
1425                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1426                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1427                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1428                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1429                         pnew |= piov & pchbusy;
1430                         dd->ipath_pioavailshadow[i] = pnew;
1431                 }
1432         }
1433         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1434 }
1435
1436 /*
1437  * used to force update of pioavailshadow if we can't get a pio buffer.
1438  * Needed primarily due to exitting freeze mode after recovering
1439  * from errors.  Done lazily, because it's safer (known to not
1440  * be writing pio buffers).
1441  */
1442 static void ipath_reset_availshadow(struct ipath_devdata *dd)
1443 {
1444         int i, im;
1445         unsigned long flags;
1446
1447         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1448         for (i = 0; i < dd->ipath_pioavregs; i++) {
1449                 u64 val, oldval;
1450                 /* deal with 6110 chip bug on high register #s */
1451                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1452                         i ^ 1 : i;
1453                 val = le64_to_cpu(dd->ipath_pioavailregs_dma[im]);
1454                 /*
1455                  * busy out the buffers not in the kernel avail list,
1456                  * without changing the generation bits.
1457                  */
1458                 oldval = dd->ipath_pioavailshadow[i];
1459                 dd->ipath_pioavailshadow[i] = val |
1460                         ((~dd->ipath_pioavailkernel[i] <<
1461                         INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT) &
1462                         0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
1463                 if (oldval != dd->ipath_pioavailshadow[i])
1464                         ipath_dbg("shadow[%d] was %Lx, now %lx\n",
1465                                 i, (unsigned long long) oldval,
1466                                 dd->ipath_pioavailshadow[i]);
1467         }
1468         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1469 }
1470
1471 /**
1472  * ipath_setrcvhdrsize - set the receive header size
1473  * @dd: the infinipath device
1474  * @rhdrsize: the receive header size
1475  *
1476  * called from user init code, and also layered driver init
1477  */
1478 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1479 {
1480         int ret = 0;
1481
1482         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1483                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1484                         dev_info(&dd->pcidev->dev,
1485                                  "Error: can't set protocol header "
1486                                  "size %u, already %u\n",
1487                                  rhdrsize, dd->ipath_rcvhdrsize);
1488                         ret = -EAGAIN;
1489                 } else
1490                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1491                                    "size %u\n", dd->ipath_rcvhdrsize);
1492         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1493                                (sizeof(u64) / sizeof(u32)))) {
1494                 ipath_dbg("Error: can't set protocol header size %u "
1495                           "(> max %u)\n", rhdrsize,
1496                           dd->ipath_rcvhdrentsize -
1497                           (u32) (sizeof(u64) / sizeof(u32)));
1498                 ret = -EOVERFLOW;
1499         } else {
1500                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1501                 dd->ipath_rcvhdrsize = rhdrsize;
1502                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1503                                  dd->ipath_rcvhdrsize);
1504                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1505                            dd->ipath_rcvhdrsize);
1506         }
1507         return ret;
1508 }
1509
1510 /*
1511  * debugging code and stats updates if no pio buffers available.
1512  */
1513 static noinline void no_pio_bufs(struct ipath_devdata *dd)
1514 {
1515         unsigned long *shadow = dd->ipath_pioavailshadow;
1516         __le64 *dma = (__le64 *)dd->ipath_pioavailregs_dma;
1517
1518         dd->ipath_upd_pio_shadow = 1;
1519
1520         /*
1521          * not atomic, but if we lose a stat count in a while, that's OK
1522          */
1523         ipath_stats.sps_nopiobufs++;
1524         if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1525                 ipath_force_pio_avail_update(dd); /* at start */
1526                 ipath_dbg("%u tries no piobufavail ts%lx; dmacopy: "
1527                         "%llx %llx %llx %llx\n"
1528                         "ipath  shadow:  %lx %lx %lx %lx\n",
1529                         dd->ipath_consec_nopiobuf,
1530                         (unsigned long)get_cycles(),
1531                         (unsigned long long) le64_to_cpu(dma[0]),
1532                         (unsigned long long) le64_to_cpu(dma[1]),
1533                         (unsigned long long) le64_to_cpu(dma[2]),
1534                         (unsigned long long) le64_to_cpu(dma[3]),
1535                         shadow[0], shadow[1], shadow[2], shadow[3]);
1536                 /*
1537                  * 4 buffers per byte, 4 registers above, cover rest
1538                  * below
1539                  */
1540                 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1541                     (sizeof(shadow[0]) * 4 * 4))
1542                         ipath_dbg("2nd group: dmacopy: "
1543                                   "%llx %llx %llx %llx\n"
1544                                   "ipath  shadow:  %lx %lx %lx %lx\n",
1545                                   (unsigned long long)le64_to_cpu(dma[4]),
1546                                   (unsigned long long)le64_to_cpu(dma[5]),
1547                                   (unsigned long long)le64_to_cpu(dma[6]),
1548                                   (unsigned long long)le64_to_cpu(dma[7]),
1549                                   shadow[4], shadow[5], shadow[6], shadow[7]);
1550
1551                 /* at end, so update likely happened */
1552                 ipath_reset_availshadow(dd);
1553         }
1554 }
1555
1556 /*
1557  * common code for normal driver pio buffer allocation, and reserved
1558  * allocation.
1559  *
1560  * do appropriate marking as busy, etc.
1561  * returns buffer number if one found (>=0), negative number is error.
1562  */
1563 static u32 __iomem *ipath_getpiobuf_range(struct ipath_devdata *dd,
1564         u32 *pbufnum, u32 first, u32 last, u32 firsti)
1565 {
1566         int i, j, updated = 0;
1567         unsigned piobcnt;
1568         unsigned long flags;
1569         unsigned long *shadow = dd->ipath_pioavailshadow;
1570         u32 __iomem *buf;
1571
1572         piobcnt = last - first;
1573         if (dd->ipath_upd_pio_shadow) {
1574                 /*
1575                  * Minor optimization.  If we had no buffers on last call,
1576                  * start out by doing the update; continue and do scan even
1577                  * if no buffers were updated, to be paranoid
1578                  */
1579                 ipath_update_pio_bufs(dd);
1580                 updated++;
1581                 i = first;
1582         } else
1583                 i = firsti;
1584 rescan:
1585         /*
1586          * while test_and_set_bit() is atomic, we do that and then the
1587          * change_bit(), and the pair is not.  See if this is the cause
1588          * of the remaining armlaunch errors.
1589          */
1590         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1591         for (j = 0; j < piobcnt; j++, i++) {
1592                 if (i >= last)
1593                         i = first;
1594                 if (__test_and_set_bit((2 * i) + 1, shadow))
1595                         continue;
1596                 /* flip generation bit */
1597                 __change_bit(2 * i, shadow);
1598                 break;
1599         }
1600         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1601
1602         if (j == piobcnt) {
1603                 if (!updated) {
1604                         /*
1605                          * first time through; shadow exhausted, but may be
1606                          * buffers available, try an update and then rescan.
1607                          */
1608                         ipath_update_pio_bufs(dd);
1609                         updated++;
1610                         i = first;
1611                         goto rescan;
1612                 } else if (updated == 1 && piobcnt <=
1613                         ((dd->ipath_sendctrl
1614                         >> INFINIPATH_S_UPDTHRESH_SHIFT) &
1615                         INFINIPATH_S_UPDTHRESH_MASK)) {
1616                         /*
1617                          * for chips supporting and using the update
1618                          * threshold we need to force an update of the
1619                          * in-memory copy if the count is less than the
1620                          * thershold, then check one more time.
1621                          */
1622                         ipath_force_pio_avail_update(dd);
1623                         ipath_update_pio_bufs(dd);
1624                         updated++;
1625                         i = first;
1626                         goto rescan;
1627                 }
1628
1629                 no_pio_bufs(dd);
1630                 buf = NULL;
1631         } else {
1632                 if (i < dd->ipath_piobcnt2k)
1633                         buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1634                                                i * dd->ipath_palign);
1635                 else
1636                         buf = (u32 __iomem *)
1637                                 (dd->ipath_pio4kbase +
1638                                  (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1639                 if (pbufnum)
1640                         *pbufnum = i;
1641         }
1642
1643         return buf;
1644 }
1645
1646 /**
1647  * ipath_getpiobuf - find an available pio buffer
1648  * @dd: the infinipath device
1649  * @plen: the size of the PIO buffer needed in 32-bit words
1650  * @pbufnum: the buffer number is placed here
1651  */
1652 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 plen, u32 *pbufnum)
1653 {
1654         u32 __iomem *buf;
1655         u32 pnum, nbufs;
1656         u32 first, lasti;
1657
1658         if (plen + 1 >= IPATH_SMALLBUF_DWORDS) {
1659                 first = dd->ipath_piobcnt2k;
1660                 lasti = dd->ipath_lastpioindexl;
1661         } else {
1662                 first = 0;
1663                 lasti = dd->ipath_lastpioindex;
1664         }
1665         nbufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
1666         buf = ipath_getpiobuf_range(dd, &pnum, first, nbufs, lasti);
1667
1668         if (buf) {
1669                 /*
1670                  * Set next starting place.  It's just an optimization,
1671                  * it doesn't matter who wins on this, so no locking
1672                  */
1673                 if (plen + 1 >= IPATH_SMALLBUF_DWORDS)
1674                         dd->ipath_lastpioindexl = pnum + 1;
1675                 else
1676                         dd->ipath_lastpioindex = pnum + 1;
1677                 if (dd->ipath_upd_pio_shadow)
1678                         dd->ipath_upd_pio_shadow = 0;
1679                 if (dd->ipath_consec_nopiobuf)
1680                         dd->ipath_consec_nopiobuf = 0;
1681                 ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1682                            pnum, (pnum < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1683                 if (pbufnum)
1684                         *pbufnum = pnum;
1685
1686         }
1687         return buf;
1688 }
1689
1690 /**
1691  * ipath_chg_pioavailkernel - change which send buffers are available for kernel
1692  * @dd: the infinipath device
1693  * @start: the starting send buffer number
1694  * @len: the number of send buffers
1695  * @avail: true if the buffers are available for kernel use, false otherwise
1696  */
1697 void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1698                               unsigned len, int avail)
1699 {
1700         unsigned long flags;
1701         unsigned end, cnt = 0;
1702
1703         /* There are two bits per send buffer (busy and generation) */
1704         start *= 2;
1705         end = start + len * 2;
1706
1707         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1708         /* Set or clear the busy bit in the shadow. */
1709         while (start < end) {
1710                 if (avail) {
1711                         unsigned long dma;
1712                         int i, im;
1713                         /*
1714                          * the BUSY bit will never be set, because we disarm
1715                          * the user buffers before we hand them back to the
1716                          * kernel.  We do have to make sure the generation
1717                          * bit is set correctly in shadow, since it could
1718                          * have changed many times while allocated to user.
1719                          * We can't use the bitmap functions on the full
1720                          * dma array because it is always little-endian, so
1721                          * we have to flip to host-order first.
1722                          * BITS_PER_LONG is slightly wrong, since it's
1723                          * always 64 bits per register in chip...
1724                          * We only work on 64 bit kernels, so that's OK.
1725                          */
1726                         /* deal with 6110 chip bug on high register #s */
1727                         i = start / BITS_PER_LONG;
1728                         im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1729                                 i ^ 1 : i;
1730                         __clear_bit(INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
1731                                 + start, dd->ipath_pioavailshadow);
1732                         dma = (unsigned long) le64_to_cpu(
1733                                 dd->ipath_pioavailregs_dma[im]);
1734                         if (test_bit((INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1735                                 + start) % BITS_PER_LONG, &dma))
1736                                 __set_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1737                                         + start, dd->ipath_pioavailshadow);
1738                         else
1739                                 __clear_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1740                                         + start, dd->ipath_pioavailshadow);
1741                         __set_bit(start, dd->ipath_pioavailkernel);
1742                 } else {
1743                         __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT,
1744                                 dd->ipath_pioavailshadow);
1745                         __clear_bit(start, dd->ipath_pioavailkernel);
1746                 }
1747                 start += 2;
1748         }
1749
1750         if (dd->ipath_pioupd_thresh) {
1751                 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1752                 cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
1753         }
1754         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1755
1756         /*
1757          * When moving buffers from kernel to user, if number assigned to
1758          * the user is less than the pio update threshold, and threshold
1759          * is supported (cnt was computed > 0), drop the update threshold
1760          * so we update at least once per allocated number of buffers.
1761          * In any case, if the kernel buffers are less than the threshold,
1762          * drop the threshold.  We don't bother increasing it, having once
1763          * decreased it, since it would typically just cycle back and forth.
1764          * If we don't decrease below buffers in use, we can wait a long
1765          * time for an update, until some other context uses PIO buffers.
1766          */
1767         if (!avail && len < cnt)
1768                 cnt = len;
1769         if (cnt < dd->ipath_pioupd_thresh) {
1770                 dd->ipath_pioupd_thresh = cnt;
1771                 ipath_dbg("Decreased pio update threshold to %u\n",
1772                         dd->ipath_pioupd_thresh);
1773                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1774                 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
1775                         << INFINIPATH_S_UPDTHRESH_SHIFT);
1776                 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
1777                         << INFINIPATH_S_UPDTHRESH_SHIFT;
1778                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1779                         dd->ipath_sendctrl);
1780                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1781         }
1782 }
1783
1784 /**
1785  * ipath_create_rcvhdrq - create a receive header queue
1786  * @dd: the infinipath device
1787  * @pd: the port data
1788  *
1789  * this must be contiguous memory (from an i/o perspective), and must be
1790  * DMA'able (which means for some systems, it will go through an IOMMU,
1791  * or be forced into a low address range).
1792  */
1793 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1794                          struct ipath_portdata *pd)
1795 {
1796         int ret = 0;
1797
1798         if (!pd->port_rcvhdrq) {
1799                 dma_addr_t phys_hdrqtail;
1800                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1801                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1802                                 sizeof(u32), PAGE_SIZE);
1803
1804                 pd->port_rcvhdrq = dma_alloc_coherent(
1805                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1806                         gfp_flags);
1807
1808                 if (!pd->port_rcvhdrq) {
1809                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1810                                       "for port %u rcvhdrq failed\n",
1811                                       amt, pd->port_port);
1812                         ret = -ENOMEM;
1813                         goto bail;
1814                 }
1815
1816                 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1817                         pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1818                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1819                                 GFP_KERNEL);
1820                         if (!pd->port_rcvhdrtail_kvaddr) {
1821                                 ipath_dev_err(dd, "attempt to allocate 1 page "
1822                                         "for port %u rcvhdrqtailaddr "
1823                                         "failed\n", pd->port_port);
1824                                 ret = -ENOMEM;
1825                                 dma_free_coherent(&dd->pcidev->dev, amt,
1826                                         pd->port_rcvhdrq,
1827                                         pd->port_rcvhdrq_phys);
1828                                 pd->port_rcvhdrq = NULL;
1829                                 goto bail;
1830                         }
1831                         pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1832                         ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx "
1833                                    "physical\n", pd->port_port,
1834                                    (unsigned long long) phys_hdrqtail);
1835                 }
1836
1837                 pd->port_rcvhdrq_size = amt;
1838
1839                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1840                            "for port %u rcvhdr Q\n",
1841                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1842                            (unsigned long) pd->port_rcvhdrq_phys,
1843                            (unsigned long) pd->port_rcvhdrq_size,
1844                            pd->port_port);
1845         }
1846         else
1847                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1848                            "hdrtailaddr@%p %llx physical\n",
1849                            pd->port_port, pd->port_rcvhdrq,
1850                            (unsigned long long) pd->port_rcvhdrq_phys,
1851                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1852                            pd->port_rcvhdrqtailaddr_phys);
1853
1854         /* clear for security and sanity on each use */
1855         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1856         if (pd->port_rcvhdrtail_kvaddr)
1857                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1858
1859         /*
1860          * tell chip each time we init it, even if we are re-using previous
1861          * memory (we zero the register at process close)
1862          */
1863         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1864                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1865         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1866                               pd->port_port, pd->port_rcvhdrq_phys);
1867
1868 bail:
1869         return ret;
1870 }
1871
1872
1873 /*
1874  * Flush all sends that might be in the ready to send state, as well as any
1875  * that are in the process of being sent.   Used whenever we need to be
1876  * sure the send side is idle.  Cleans up all buffer state by canceling
1877  * all pio buffers, and issuing an abort, which cleans up anything in the
1878  * launch fifo.  The cancel is superfluous on some chip versions, but
1879  * it's safer to always do it.
1880  * PIOAvail bits are updated by the chip as if normal send had happened.
1881  */
1882 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1883 {
1884         unsigned long flags;
1885
1886         if (dd->ipath_flags & IPATH_IB_AUTONEG_INPROG) {
1887                 ipath_cdbg(VERBOSE, "Ignore while in autonegotiation\n");
1888                 goto bail;
1889         }
1890         /*
1891          * If we have SDMA, and it's not disabled, we have to kick off the
1892          * abort state machine, provided we aren't already aborting.
1893          * If we are in the process of aborting SDMA (!DISABLED, but ABORTING),
1894          * we skip the rest of this routine. It is already "in progress"
1895          */
1896         if (dd->ipath_flags & IPATH_HAS_SEND_DMA) {
1897                 int skip_cancel;
1898                 unsigned long *statp = &dd->ipath_sdma_status;
1899
1900                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1901                 skip_cancel =
1902                         test_and_set_bit(IPATH_SDMA_ABORTING, statp)
1903                         && !test_bit(IPATH_SDMA_DISABLED, statp);
1904                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1905                 if (skip_cancel)
1906                         goto bail;
1907         }
1908
1909         ipath_dbg("Cancelling all in-progress send buffers\n");
1910
1911         /* skip armlaunch errs for a while */
1912         dd->ipath_lastcancel = jiffies + HZ / 2;
1913
1914         /*
1915          * The abort bit is auto-clearing.  We also don't want pioavail
1916          * update happening during this, and we don't want any other
1917          * sends going out, so turn those off for the duration.  We read
1918          * the scratch register to be sure that cancels and the abort
1919          * have taken effect in the chip.  Otherwise two parts are same
1920          * as ipath_force_pio_avail_update()
1921          */
1922         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1923         dd->ipath_sendctrl &= ~(INFINIPATH_S_PIOBUFAVAILUPD
1924                 | INFINIPATH_S_PIOENABLE);
1925         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1926                 dd->ipath_sendctrl | INFINIPATH_S_ABORT);
1927         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1928         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1929
1930         /* disarm all send buffers */
1931         ipath_disarm_piobufs(dd, 0,
1932                 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1933
1934         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1935                 set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1936
1937         if (restore_sendctrl) {
1938                 /* else done by caller later if needed */
1939                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1940                 dd->ipath_sendctrl |= INFINIPATH_S_PIOBUFAVAILUPD |
1941                         INFINIPATH_S_PIOENABLE;
1942                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1943                         dd->ipath_sendctrl);
1944                 /* and again, be sure all have hit the chip */
1945                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1946                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1947         }
1948
1949         if ((dd->ipath_flags & IPATH_HAS_SEND_DMA) &&
1950             !test_bit(IPATH_SDMA_DISABLED, &dd->ipath_sdma_status) &&
1951             test_bit(IPATH_SDMA_RUNNING, &dd->ipath_sdma_status)) {
1952                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1953                 /* only wait so long for intr */
1954                 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ;
1955                 dd->ipath_sdma_reset_wait = 200;
1956                 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status))
1957                         tasklet_hi_schedule(&dd->ipath_sdma_abort_task);
1958                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1959         }
1960 bail:;
1961 }
1962
1963 /*
1964  * Force an update of in-memory copy of the pioavail registers, when
1965  * needed for any of a variety of reasons.  We read the scratch register
1966  * to make it highly likely that the update will have happened by the
1967  * time we return.  If already off (as in cancel_sends above), this
1968  * routine is a nop, on the assumption that the caller will "do the
1969  * right thing".
1970  */
1971 void ipath_force_pio_avail_update(struct ipath_devdata *dd)
1972 {
1973         unsigned long flags;
1974
1975         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1976         if (dd->ipath_sendctrl & INFINIPATH_S_PIOBUFAVAILUPD) {
1977                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1978                         dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
1979                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1980                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1981                         dd->ipath_sendctrl);
1982                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1983         }
1984         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1985 }
1986
1987 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int linkcmd,
1988                                 int linitcmd)
1989 {
1990         u64 mod_wd;
1991         static const char *what[4] = {
1992                 [0] = "NOP",
1993                 [INFINIPATH_IBCC_LINKCMD_DOWN] = "DOWN",
1994                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1995                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1996         };
1997
1998         if (linitcmd == INFINIPATH_IBCC_LINKINITCMD_DISABLE) {
1999                 /*
2000                  * If we are told to disable, note that so link-recovery
2001                  * code does not attempt to bring us back up.
2002                  */
2003                 preempt_disable();
2004                 dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
2005                 preempt_enable();
2006         } else if (linitcmd) {
2007                 /*
2008                  * Any other linkinitcmd will lead to LINKDOWN and then
2009                  * to INIT (if all is well), so clear flag to let
2010                  * link-recovery code attempt to bring us back up.
2011                  */
2012                 preempt_disable();
2013                 dd->ipath_flags &= ~IPATH_IB_LINK_DISABLED;
2014                 preempt_enable();
2015         }
2016
2017         mod_wd = (linkcmd << dd->ibcc_lc_shift) |
2018                 (linitcmd << INFINIPATH_IBCC_LINKINITCMD_SHIFT);
2019         ipath_cdbg(VERBOSE,
2020                 "Moving unit %u to %s (initcmd=0x%x), current ltstate is %s\n",
2021                 dd->ipath_unit, what[linkcmd], linitcmd,
2022                 ipath_ibcstatus_str[ipath_ib_linktrstate(dd,
2023                         ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus))]);
2024
2025         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2026                          dd->ipath_ibcctrl | mod_wd);
2027         /* read from chip so write is flushed */
2028         (void) ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2029 }
2030
2031 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
2032 {
2033         u32 lstate;
2034         int ret;
2035
2036         switch (newstate) {
2037         case IPATH_IB_LINKDOWN_ONLY:
2038                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN, 0);
2039                 /* don't wait */
2040                 ret = 0;
2041                 goto bail;
2042
2043         case IPATH_IB_LINKDOWN:
2044                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2045                                         INFINIPATH_IBCC_LINKINITCMD_POLL);
2046                 /* don't wait */
2047                 ret = 0;
2048                 goto bail;
2049
2050         case IPATH_IB_LINKDOWN_SLEEP:
2051                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2052                                         INFINIPATH_IBCC_LINKINITCMD_SLEEP);
2053                 /* don't wait */
2054                 ret = 0;
2055                 goto bail;
2056
2057         case IPATH_IB_LINKDOWN_DISABLE:
2058                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2059                                         INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2060                 /* don't wait */
2061                 ret = 0;
2062                 goto bail;
2063
2064         case IPATH_IB_LINKARM:
2065                 if (dd->ipath_flags & IPATH_LINKARMED) {
2066                         ret = 0;
2067                         goto bail;
2068                 }
2069                 if (!(dd->ipath_flags &
2070                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
2071                         ret = -EINVAL;
2072                         goto bail;
2073                 }
2074                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED, 0);
2075
2076                 /*
2077                  * Since the port can transition to ACTIVE by receiving
2078                  * a non VL 15 packet, wait for either state.
2079                  */
2080                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
2081                 break;
2082
2083         case IPATH_IB_LINKACTIVE:
2084                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
2085                         ret = 0;
2086                         goto bail;
2087                 }
2088                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
2089                         ret = -EINVAL;
2090                         goto bail;
2091                 }
2092                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE, 0);
2093                 lstate = IPATH_LINKACTIVE;
2094                 break;
2095
2096         case IPATH_IB_LINK_LOOPBACK:
2097                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
2098                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
2099                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2100                                  dd->ipath_ibcctrl);
2101
2102                 /* turn heartbeat off, as it causes loopback to fail */
2103                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2104                                        IPATH_IB_HRTBT_OFF);
2105                 /* don't wait */
2106                 ret = 0;
2107                 goto bail;
2108
2109         case IPATH_IB_LINK_EXTERNAL:
2110                 dev_info(&dd->pcidev->dev,
2111                         "Disabling IB local loopback (normal)\n");
2112                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2113                                        IPATH_IB_HRTBT_ON);
2114                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
2115                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2116                                  dd->ipath_ibcctrl);
2117                 /* don't wait */
2118                 ret = 0;
2119                 goto bail;
2120
2121         /*
2122          * Heartbeat can be explicitly enabled by the user via
2123          * "hrtbt_enable" "file", and if disabled, trying to enable here
2124          * will have no effect.  Implicit changes (heartbeat off when
2125          * loopback on, and vice versa) are included to ease testing.
2126          */
2127         case IPATH_IB_LINK_HRTBT:
2128                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2129                         IPATH_IB_HRTBT_ON);
2130                 goto bail;
2131
2132         case IPATH_IB_LINK_NO_HRTBT:
2133                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2134                         IPATH_IB_HRTBT_OFF);
2135                 goto bail;
2136
2137         default:
2138                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
2139                 ret = -EINVAL;
2140                 goto bail;
2141         }
2142         ret = ipath_wait_linkstate(dd, lstate, 2000);
2143
2144 bail:
2145         return ret;
2146 }
2147
2148 /**
2149  * ipath_set_mtu - set the MTU
2150  * @dd: the infinipath device
2151  * @arg: the new MTU
2152  *
2153  * we can handle "any" incoming size, the issue here is whether we
2154  * need to restrict our outgoing size.   For now, we don't do any
2155  * sanity checking on this, and we don't deal with what happens to
2156  * programs that are already running when the size changes.
2157  * NOTE: changing the MTU will usually cause the IBC to go back to
2158  * link INIT state...
2159  */
2160 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
2161 {
2162         u32 piosize;
2163         int changed = 0;
2164         int ret;
2165
2166         /*
2167          * mtu is IB data payload max.  It's the largest power of 2 less
2168          * than piosize (or even larger, since it only really controls the
2169          * largest we can receive; we can send the max of the mtu and
2170          * piosize).  We check that it's one of the valid IB sizes.
2171          */
2172         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
2173             (arg != 4096 || !ipath_mtu4096)) {
2174                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
2175                 ret = -EINVAL;
2176                 goto bail;
2177         }
2178         if (dd->ipath_ibmtu == arg) {
2179                 ret = 0;        /* same as current */
2180                 goto bail;
2181         }
2182
2183         piosize = dd->ipath_ibmaxlen;
2184         dd->ipath_ibmtu = arg;
2185
2186         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
2187                 /* Only if it's not the initial value (or reset to it) */
2188                 if (piosize != dd->ipath_init_ibmaxlen) {
2189                         if (arg > piosize && arg <= dd->ipath_init_ibmaxlen)
2190                                 piosize = dd->ipath_init_ibmaxlen;
2191                         dd->ipath_ibmaxlen = piosize;
2192                         changed = 1;
2193                 }
2194         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
2195                 piosize = arg + IPATH_PIO_MAXIBHDR;
2196                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
2197                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
2198                            arg);
2199                 dd->ipath_ibmaxlen = piosize;
2200                 changed = 1;
2201         }
2202
2203         if (changed) {
2204                 u64 ibc = dd->ipath_ibcctrl, ibdw;
2205                 /*
2206                  * update our housekeeping variables, and set IBC max
2207                  * size, same as init code; max IBC is max we allow in
2208                  * buffer, less the qword pbc, plus 1 for ICRC, in dwords
2209                  */
2210                 dd->ipath_ibmaxlen = piosize - 2 * sizeof(u32);
2211                 ibdw = (dd->ipath_ibmaxlen >> 2) + 1;
2212                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
2213                          dd->ibcc_mpl_shift);
2214                 ibc |= ibdw << dd->ibcc_mpl_shift;
2215                 dd->ipath_ibcctrl = ibc;
2216                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2217                                  dd->ipath_ibcctrl);
2218                 dd->ipath_f_tidtemplate(dd);
2219         }
2220
2221         ret = 0;
2222
2223 bail:
2224         return ret;
2225 }
2226
2227 int ipath_set_lid(struct ipath_devdata *dd, u32 lid, u8 lmc)
2228 {
2229         dd->ipath_lid = lid;
2230         dd->ipath_lmc = lmc;
2231
2232         dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_LIDLMC, lid |
2233                 (~((1U << lmc) - 1)) << 16);
2234
2235         dev_info(&dd->pcidev->dev, "We got a lid: 0x%x\n", lid);
2236
2237         return 0;
2238 }
2239
2240
2241 /**
2242  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
2243  * @dd: the infinipath device
2244  * @regno: the register number to write
2245  * @port: the port containing the register
2246  * @value: the value to write
2247  *
2248  * Registers that vary with the chip implementation constants (port)
2249  * use this routine.
2250  */
2251 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
2252                           unsigned port, u64 value)
2253 {
2254         u16 where;
2255
2256         if (port < dd->ipath_portcnt &&
2257             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
2258              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
2259                 where = regno + port;
2260         else
2261                 where = -1;
2262
2263         ipath_write_kreg(dd, where, value);
2264 }
2265
2266 /*
2267  * Following deal with the "obviously simple" task of overriding the state
2268  * of the LEDS, which normally indicate link physical and logical status.
2269  * The complications arise in dealing with different hardware mappings
2270  * and the board-dependent routine being called from interrupts.
2271  * and then there's the requirement to _flash_ them.
2272  */
2273 #define LED_OVER_FREQ_SHIFT 8
2274 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
2275 /* Below is "non-zero" to force override, but both actual LEDs are off */
2276 #define LED_OVER_BOTH_OFF (8)
2277
2278 static void ipath_run_led_override(unsigned long opaque)
2279 {
2280         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2281         int timeoff;
2282         int pidx;
2283         u64 lstate, ltstate, val;
2284
2285         if (!(dd->ipath_flags & IPATH_INITTED))
2286                 return;
2287
2288         pidx = dd->ipath_led_override_phase++ & 1;
2289         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
2290         timeoff = dd->ipath_led_override_timeoff;
2291
2292         /*
2293          * below potentially restores the LED values per current status,
2294          * should also possibly setup the traffic-blink register,
2295          * but leave that to per-chip functions.
2296          */
2297         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2298         ltstate = ipath_ib_linktrstate(dd, val);
2299         lstate = ipath_ib_linkstate(dd, val);
2300
2301         dd->ipath_f_setextled(dd, lstate, ltstate);
2302         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
2303 }
2304
2305 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
2306 {
2307         int timeoff, freq;
2308
2309         if (!(dd->ipath_flags & IPATH_INITTED))
2310                 return;
2311
2312         /* First check if we are blinking. If not, use 1HZ polling */
2313         timeoff = HZ;
2314         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
2315
2316         if (freq) {
2317                 /* For blink, set each phase from one nybble of val */
2318                 dd->ipath_led_override_vals[0] = val & 0xF;
2319                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
2320                 timeoff = (HZ << 4)/freq;
2321         } else {
2322                 /* Non-blink set both phases the same. */
2323                 dd->ipath_led_override_vals[0] = val & 0xF;
2324                 dd->ipath_led_override_vals[1] = val & 0xF;
2325         }
2326         dd->ipath_led_override_timeoff = timeoff;
2327
2328         /*
2329          * If the timer has not already been started, do so. Use a "quick"
2330          * timeout so the function will be called soon, to look at our request.
2331          */
2332         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
2333                 /* Need to start timer */
2334                 init_timer(&dd->ipath_led_override_timer);
2335                 dd->ipath_led_override_timer.function =
2336                                                  ipath_run_led_override;
2337                 dd->ipath_led_override_timer.data = (unsigned long) dd;
2338                 dd->ipath_led_override_timer.expires = jiffies + 1;
2339                 add_timer(&dd->ipath_led_override_timer);
2340         } else
2341                 atomic_dec(&dd->ipath_led_override_timer_active);
2342 }
2343
2344 /**
2345  * ipath_shutdown_device - shut down a device
2346  * @dd: the infinipath device
2347  *
2348  * This is called to make the device quiet when we are about to
2349  * unload the driver, and also when the device is administratively
2350  * disabled.   It does not free any data structures.
2351  * Everything it does has to be setup again by ipath_init_chip(dd,1)
2352  */
2353 void ipath_shutdown_device(struct ipath_devdata *dd)
2354 {
2355         unsigned long flags;
2356
2357         ipath_dbg("Shutting down the device\n");
2358
2359         ipath_hol_up(dd); /* make sure user processes aren't suspended */
2360
2361         dd->ipath_flags |= IPATH_LINKUNK;
2362         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
2363                              IPATH_LINKINIT | IPATH_LINKARMED |
2364                              IPATH_LINKACTIVE);
2365         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2366                                 IPATH_STATUS_IB_READY);
2367
2368         /* mask interrupts, but not errors */
2369         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2370
2371         dd->ipath_rcvctrl = 0;
2372         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2373                          dd->ipath_rcvctrl);
2374
2375         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2376                 teardown_sdma(dd);
2377
2378         /*
2379          * gracefully stop all sends allowing any in progress to trickle out
2380          * first.
2381          */
2382         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2383         dd->ipath_sendctrl = 0;
2384         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2385         /* flush it */
2386         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2387         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2388
2389         /*
2390          * enough for anything that's going to trickle out to have actually
2391          * done so.
2392          */
2393         udelay(5);
2394
2395         dd->ipath_f_setextled(dd, 0, 0); /* make sure LEDs are off */
2396
2397         ipath_set_ib_lstate(dd, 0, INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2398         ipath_cancel_sends(dd, 0);
2399
2400         /*
2401          * we are shutting down, so tell components that care.  We don't do
2402          * this on just a link state change, much like ethernet, a cable
2403          * unplug, etc. doesn't change driver state
2404          */
2405         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2406
2407         /* disable IBC */
2408         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2409         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2410                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2411
2412         /*
2413          * clear SerdesEnable and turn the leds off; do this here because
2414          * we are unloading, so don't count on interrupts to move along
2415          * Turn the LEDs off explictly for the same reason.
2416          */
2417         dd->ipath_f_quiet_serdes(dd);
2418
2419         /* stop all the timers that might still be running */
2420         del_timer_sync(&dd->ipath_hol_timer);
2421         if (dd->ipath_stats_timer_active) {
2422                 del_timer_sync(&dd->ipath_stats_timer);
2423                 dd->ipath_stats_timer_active = 0;
2424         }
2425         if (dd->ipath_intrchk_timer.data) {
2426                 del_timer_sync(&dd->ipath_intrchk_timer);
2427                 dd->ipath_intrchk_timer.data = 0;
2428         }
2429         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2430                 del_timer_sync(&dd->ipath_led_override_timer);
2431                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2432         }
2433
2434         /*
2435          * clear all interrupts and errors, so that the next time the driver
2436          * is loaded or device is enabled, we know that whatever is set
2437          * happened while we were unloaded
2438          */
2439         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2440                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2441         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2442         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2443
2444         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2445         ipath_update_eeprom_log(dd);
2446 }
2447
2448 /**
2449  * ipath_free_pddata - free a port's allocated data
2450  * @dd: the infinipath device
2451  * @pd: the portdata structure
2452  *
2453  * free up any allocated data for a port
2454  * This should not touch anything that would affect a simultaneous
2455  * re-allocation of port data, because it is called after ipath_mutex
2456  * is released (and can be called from reinit as well).
2457  * It should never change any chip state, or global driver state.
2458  * (The only exception to global state is freeing the port0 port0_skbs.)
2459  */
2460 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2461 {
2462         if (!pd)
2463                 return;
2464
2465         if (pd->port_rcvhdrq) {
2466                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2467                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2468                            (unsigned long) pd->port_rcvhdrq_size);
2469                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2470                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2471                 pd->port_rcvhdrq = NULL;
2472                 if (pd->port_rcvhdrtail_kvaddr) {
2473                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2474                                          pd->port_rcvhdrtail_kvaddr,
2475                                          pd->port_rcvhdrqtailaddr_phys);
2476                         pd->port_rcvhdrtail_kvaddr = NULL;
2477                 }
2478         }
2479         if (pd->port_port && pd->port_rcvegrbuf) {
2480                 unsigned e;
2481
2482                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2483                         void *base = pd->port_rcvegrbuf[e];
2484                         size_t size = pd->port_rcvegrbuf_size;
2485
2486                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2487                                    "chunk %u/%u\n", base,
2488                                    (unsigned long) size,
2489                                    e, pd->port_rcvegrbuf_chunks);
2490                         dma_free_coherent(&dd->pcidev->dev, size,
2491                                 base, pd->port_rcvegrbuf_phys[e]);
2492                 }
2493                 kfree(pd->port_rcvegrbuf);
2494                 pd->port_rcvegrbuf = NULL;
2495                 kfree(pd->port_rcvegrbuf_phys);
2496                 pd->port_rcvegrbuf_phys = NULL;
2497                 pd->port_rcvegrbuf_chunks = 0;
2498         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2499                 unsigned e;
2500                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2501
2502                 dd->ipath_port0_skbinfo = NULL;
2503                 ipath_cdbg(VERBOSE, "free closed port %d "
2504                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2505                            skbinfo);
2506                 for (e = 0; e < dd->ipath_p0_rcvegrcnt; e++)
2507                         if (skbinfo[e].skb) {
2508                                 pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2509                                                  dd->ipath_ibmaxlen,
2510                                                  PCI_DMA_FROMDEVICE);
2511                                 dev_kfree_skb(skbinfo[e].skb);
2512                         }
2513                 vfree(skbinfo);
2514         }
2515         kfree(pd->port_tid_pg_list);
2516         vfree(pd->subport_uregbase);
2517         vfree(pd->subport_rcvegrbuf);
2518         vfree(pd->subport_rcvhdr_base);
2519         kfree(pd);
2520 }
2521
2522 static int __init infinipath_init(void)
2523 {
2524         int ret;
2525
2526         if (ipath_debug & __IPATH_DBG)
2527                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2528
2529         /*
2530          * These must be called before the driver is registered with
2531          * the PCI subsystem.
2532          */
2533         idr_init(&unit_table);
2534         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
2535                 printk(KERN_ERR IPATH_DRV_NAME ": idr_pre_get() failed\n");
2536                 ret = -ENOMEM;
2537                 goto bail;
2538         }
2539
2540         ret = pci_register_driver(&ipath_driver);
2541         if (ret < 0) {
2542                 printk(KERN_ERR IPATH_DRV_NAME
2543                        ": Unable to register driver: error %d\n", -ret);
2544                 goto bail_unit;
2545         }
2546
2547         ret = ipath_init_ipathfs();
2548         if (ret < 0) {
2549                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2550                        "ipathfs: error %d\n", -ret);
2551                 goto bail_pci;
2552         }
2553
2554         goto bail;
2555
2556 bail_pci:
2557         pci_unregister_driver(&ipath_driver);
2558
2559 bail_unit:
2560         idr_destroy(&unit_table);
2561
2562 bail:
2563         return ret;
2564 }
2565
2566 static void __exit infinipath_cleanup(void)
2567 {
2568         ipath_exit_ipathfs();
2569
2570         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2571         pci_unregister_driver(&ipath_driver);
2572
2573         idr_destroy(&unit_table);
2574 }
2575
2576 /**
2577  * ipath_reset_device - reset the chip if possible
2578  * @unit: the device to reset
2579  *
2580  * Whether or not reset is successful, we attempt to re-initialize the chip
2581  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2582  * so that the various entry points will fail until we reinitialize.  For
2583  * now, we only allow this if no user ports are open that use chip resources
2584  */
2585 int ipath_reset_device(int unit)
2586 {
2587         int ret, i;
2588         struct ipath_devdata *dd = ipath_lookup(unit);
2589         unsigned long flags;
2590
2591         if (!dd) {
2592                 ret = -ENODEV;
2593                 goto bail;
2594         }
2595
2596         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2597                 /* Need to stop LED timer, _then_ shut off LEDs */
2598                 del_timer_sync(&dd->ipath_led_override_timer);
2599                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2600         }
2601
2602         /* Shut off LEDs after we are sure timer is not running */
2603         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2604         dd->ipath_f_setextled(dd, 0, 0);
2605
2606         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2607
2608         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2609                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2610                          "not initialized or not present\n", unit);
2611                 ret = -ENXIO;
2612                 goto bail;
2613         }
2614
2615         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2616         if (dd->ipath_pd)
2617                 for (i = 1; i < dd->ipath_cfgports; i++) {
2618                         if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2619                                 continue;
2620                         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2621                         ipath_dbg("unit %u port %d is in use "
2622                                   "(PID %u cmd %s), can't reset\n",
2623                                   unit, i,
2624                                   pid_nr(dd->ipath_pd[i]->port_pid),
2625                                   dd->ipath_pd[i]->port_comm);
2626                         ret = -EBUSY;
2627                         goto bail;
2628                 }
2629         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2630
2631         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2632                 teardown_sdma(dd);
2633
2634         dd->ipath_flags &= ~IPATH_INITTED;
2635         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2636         ret = dd->ipath_f_reset(dd);
2637         if (ret == 1) {
2638                 ipath_dbg("Reinitializing unit %u after reset attempt\n",
2639                           unit);
2640                 ret = ipath_init_chip(dd, 1);
2641         } else
2642                 ret = -EAGAIN;
2643         if (ret)
2644                 ipath_dev_err(dd, "Reinitialize unit %u after "
2645                               "reset failed with %d\n", unit, ret);
2646         else
2647                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2648                          "resetting\n", unit);
2649
2650 bail:
2651         return ret;
2652 }
2653
2654 /*
2655  * send a signal to all the processes that have the driver open
2656  * through the normal interfaces (i.e., everything other than diags
2657  * interface).  Returns number of signalled processes.
2658  */
2659 static int ipath_signal_procs(struct ipath_devdata *dd, int sig)
2660 {
2661         int i, sub, any = 0;
2662         struct pid *pid;
2663         unsigned long flags;
2664
2665         if (!dd->ipath_pd)
2666                 return 0;
2667
2668         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2669         for (i = 1; i < dd->ipath_cfgports; i++) {
2670                 if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2671                         continue;
2672                 pid = dd->ipath_pd[i]->port_pid;
2673                 if (!pid)
2674                         continue;
2675
2676                 dev_info(&dd->pcidev->dev, "context %d in use "
2677                           "(PID %u), sending signal %d\n",
2678                           i, pid_nr(pid), sig);
2679                 kill_pid(pid, sig, 1);
2680                 any++;
2681                 for (sub = 0; sub < INFINIPATH_MAX_SUBPORT; sub++) {
2682                         pid = dd->ipath_pd[i]->port_subpid[sub];
2683                         if (!pid)
2684                                 continue;
2685                         dev_info(&dd->pcidev->dev, "sub-context "
2686                                 "%d:%d in use (PID %u), sending "
2687                                 "signal %d\n", i, sub, pid_nr(pid), sig);
2688                         kill_pid(pid, sig, 1);
2689                         any++;
2690                 }
2691         }
2692         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2693         return any;
2694 }
2695
2696 static void ipath_hol_signal_down(struct ipath_devdata *dd)
2697 {
2698         if (ipath_signal_procs(dd, SIGSTOP))
2699                 ipath_dbg("Stopped some processes\n");
2700         ipath_cancel_sends(dd, 1);
2701 }
2702
2703
2704 static void ipath_hol_signal_up(struct ipath_devdata *dd)
2705 {
2706         if (ipath_signal_procs(dd, SIGCONT))
2707                 ipath_dbg("Continued some processes\n");
2708 }
2709
2710 /*
2711  * link is down, stop any users processes, and flush pending sends
2712  * to prevent HoL blocking, then start the HoL timer that
2713  * periodically continues, then stop procs, so they can detect
2714  * link down if they want, and do something about it.
2715  * Timer may already be running, so use mod_timer, not add_timer.
2716  */
2717 void ipath_hol_down(struct ipath_devdata *dd)
2718 {
2719         dd->ipath_hol_state = IPATH_HOL_DOWN;
2720         ipath_hol_signal_down(dd);
2721         dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2722         dd->ipath_hol_timer.expires = jiffies +
2723                 msecs_to_jiffies(ipath_hol_timeout_ms);
2724         mod_timer(&dd->ipath_hol_timer, dd->ipath_hol_timer.expires);
2725 }
2726
2727 /*
2728  * link is up, continue any user processes, and ensure timer
2729  * is a nop, if running.  Let timer keep running, if set; it
2730  * will nop when it sees the link is up
2731  */
2732 void ipath_hol_up(struct ipath_devdata *dd)
2733 {
2734         ipath_hol_signal_up(dd);
2735         dd->ipath_hol_state = IPATH_HOL_UP;
2736 }
2737
2738 /*
2739  * toggle the running/not running state of user proceses
2740  * to prevent HoL blocking on chip resources, but still allow
2741  * user processes to do link down special case handling.
2742  * Should only be called via the timer
2743  */
2744 void ipath_hol_event(unsigned long opaque)
2745 {
2746         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2747
2748         if (dd->ipath_hol_next == IPATH_HOL_DOWNSTOP
2749                 && dd->ipath_hol_state != IPATH_HOL_UP) {
2750                 dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2751                 ipath_dbg("Stopping processes\n");
2752                 ipath_hol_signal_down(dd);
2753         } else { /* may do "extra" if also in ipath_hol_up() */
2754                 dd->ipath_hol_next = IPATH_HOL_DOWNSTOP;
2755                 ipath_dbg("Continuing processes\n");
2756                 ipath_hol_signal_up(dd);
2757         }
2758         if (dd->ipath_hol_state == IPATH_HOL_UP)
2759                 ipath_dbg("link's up, don't resched timer\n");
2760         else {
2761                 dd->ipath_hol_timer.expires = jiffies +
2762                         msecs_to_jiffies(ipath_hol_timeout_ms);
2763                 mod_timer(&dd->ipath_hol_timer,
2764                         dd->ipath_hol_timer.expires);
2765         }
2766 }
2767
2768 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2769 {
2770         u64 val;
2771
2772         if (new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK)
2773                 return -1;
2774         if (dd->ipath_rx_pol_inv != new_pol_inv) {
2775                 dd->ipath_rx_pol_inv = new_pol_inv;
2776                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2777                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2778                          INFINIPATH_XGXS_RX_POL_SHIFT);
2779                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2780                         INFINIPATH_XGXS_RX_POL_SHIFT;
2781                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2782         }
2783         return 0;
2784 }
2785
2786 /*
2787  * Disable and enable the armlaunch error.  Used for PIO bandwidth testing on
2788  * the 7220, which is count-based, rather than trigger-based.  Safe for the
2789  * driver check, since it's at init.   Not completely safe when used for
2790  * user-mode checking, since some error checking can be lost, but not
2791  * particularly risky, and only has problematic side-effects in the face of
2792  * very buggy user code.  There is no reference counting, but that's also
2793  * fine, given the intended use.
2794  */
2795 void ipath_enable_armlaunch(struct ipath_devdata *dd)
2796 {
2797         dd->ipath_lasterror &= ~INFINIPATH_E_SPIOARMLAUNCH;
2798         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
2799                 INFINIPATH_E_SPIOARMLAUNCH);
2800         dd->ipath_errormask |= INFINIPATH_E_SPIOARMLAUNCH;
2801         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2802                 dd->ipath_errormask);
2803 }
2804
2805 void ipath_disable_armlaunch(struct ipath_devdata *dd)
2806 {
2807         /* so don't re-enable if already set */
2808         dd->ipath_maskederrs &= ~INFINIPATH_E_SPIOARMLAUNCH;
2809         dd->ipath_errormask &= ~INFINIPATH_E_SPIOARMLAUNCH;
2810         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2811                 dd->ipath_errormask);
2812 }
2813
2814 module_init(infinipath_init);
2815 module_exit(infinipath_cleanup);