1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
17 #include <asm/system.h>
19 #include <asm/syscalls.h>
21 #include <asm/uaccess.h>
24 #include <asm/debugreg.h>
26 unsigned long idle_halt;
27 EXPORT_SYMBOL(idle_halt);
28 unsigned long idle_nomwait;
29 EXPORT_SYMBOL(idle_nomwait);
31 struct kmem_cache *task_xstate_cachep;
33 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
36 if (src->thread.xstate) {
37 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
39 if (!dst->thread.xstate)
41 WARN_ON((unsigned long)dst->thread.xstate & 15);
42 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
47 void free_thread_xstate(struct task_struct *tsk)
49 if (tsk->thread.xstate) {
50 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
51 tsk->thread.xstate = NULL;
54 WARN(tsk->thread.ds_ctx, "leaking DS context\n");
57 void free_thread_info(struct thread_info *ti)
59 free_thread_xstate(ti->task);
60 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
63 void arch_task_cache_init(void)
66 kmem_cache_create("task_xstate", xstate_size,
67 __alignof__(union thread_xstate),
68 SLAB_PANIC | SLAB_NOTRACK, NULL);
72 * Free current thread data structures etc..
74 void exit_thread(void)
76 struct task_struct *me = current;
77 struct thread_struct *t = &me->thread;
78 unsigned long *bp = t->io_bitmap_ptr;
81 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
83 t->io_bitmap_ptr = NULL;
84 clear_thread_flag(TIF_IO_BITMAP);
86 * Careful, clear this in the TSS too:
88 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
95 void show_regs_common(void)
97 const char *board, *product;
99 board = dmi_get_system_info(DMI_BOARD_NAME);
102 product = dmi_get_system_info(DMI_PRODUCT_NAME);
106 printk(KERN_CONT "\n");
107 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
108 current->pid, current->comm, print_tainted(),
109 init_utsname()->release,
110 (int)strcspn(init_utsname()->version, " "),
111 init_utsname()->version, board, product);
114 void flush_thread(void)
116 struct task_struct *tsk = current;
119 if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
120 clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
121 if (test_tsk_thread_flag(tsk, TIF_IA32)) {
122 clear_tsk_thread_flag(tsk, TIF_IA32);
124 set_tsk_thread_flag(tsk, TIF_IA32);
125 current_thread_info()->status |= TS_COMPAT;
130 flush_ptrace_hw_breakpoint(tsk);
131 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
133 * Forget coprocessor state..
135 tsk->fpu_counter = 0;
140 static void hard_disable_TSC(void)
142 write_cr4(read_cr4() | X86_CR4_TSD);
145 void disable_TSC(void)
147 #ifdef CONFIG_SECCOMP_DISABLE_TSC
149 if (!test_and_set_thread_flag(TIF_NOTSC))
151 * Must flip the CPU state synchronously with
152 * TIF_NOTSC in the current running context.
159 static void hard_enable_TSC(void)
161 write_cr4(read_cr4() & ~X86_CR4_TSD);
164 static void enable_TSC(void)
167 if (test_and_clear_thread_flag(TIF_NOTSC))
169 * Must flip the CPU state synchronously with
170 * TIF_NOTSC in the current running context.
176 int get_tsc_mode(unsigned long adr)
180 if (test_thread_flag(TIF_NOTSC))
181 val = PR_TSC_SIGSEGV;
185 return put_user(val, (unsigned int __user *)adr);
188 int set_tsc_mode(unsigned int val)
190 if (val == PR_TSC_SIGSEGV)
192 else if (val == PR_TSC_ENABLE)
200 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
201 struct tss_struct *tss)
203 struct thread_struct *prev, *next;
205 prev = &prev_p->thread;
206 next = &next_p->thread;
208 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
209 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
210 ds_switch_to(prev_p, next_p);
211 else if (next->debugctlmsr != prev->debugctlmsr)
212 update_debugctlmsr(next->debugctlmsr);
214 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
215 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
216 /* prev and next are different */
217 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
223 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
225 * Copy the relevant range of the IO bitmap.
226 * Normally this is 128 bytes or less:
228 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
229 max(prev->io_bitmap_max, next->io_bitmap_max));
230 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
232 * Clear any possible leftover bits:
234 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
236 propagate_user_return_notify(prev_p, next_p);
239 int sys_fork(struct pt_regs *regs)
241 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
245 * This is trivial, and on the face of it looks like it
246 * could equally well be done in user mode.
248 * Not so, for quite unobvious reasons - register pressure.
249 * In user mode vfork() cannot have a stack frame, and if
250 * done by calling the "clone()" system call directly, you
251 * do not have enough call-clobbered registers to hold all
252 * the information you need.
254 int sys_vfork(struct pt_regs *regs)
256 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
261 sys_clone(unsigned long clone_flags, unsigned long newsp,
262 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
266 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
270 * This gets run with %si containing the
271 * function to call, and %di containing
274 extern void kernel_thread_helper(void);
277 * Create a kernel thread
279 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
283 memset(®s, 0, sizeof(regs));
285 regs.si = (unsigned long) fn;
286 regs.di = (unsigned long) arg;
291 regs.fs = __KERNEL_PERCPU;
292 regs.gs = __KERNEL_STACK_CANARY;
294 regs.ss = __KERNEL_DS;
298 regs.ip = (unsigned long) kernel_thread_helper;
299 regs.cs = __KERNEL_CS | get_kernel_rpl();
300 regs.flags = X86_EFLAGS_IF | 0x2;
302 /* Ok, create the new process.. */
303 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
305 EXPORT_SYMBOL(kernel_thread);
308 * sys_execve() executes a new program.
310 long sys_execve(char __user *name, char __user * __user *argv,
311 char __user * __user *envp, struct pt_regs *regs)
316 filename = getname(name);
317 error = PTR_ERR(filename);
318 if (IS_ERR(filename))
320 error = do_execve(filename, argv, envp, regs);
324 /* Make sure we don't return using sysenter.. */
325 set_thread_flag(TIF_IRET);
334 * Idle related variables and functions
336 unsigned long boot_option_idle_override = 0;
337 EXPORT_SYMBOL(boot_option_idle_override);
340 * Powermanagement idle function, if any..
342 void (*pm_idle)(void);
343 EXPORT_SYMBOL(pm_idle);
347 * This halt magic was a workaround for ancient floppy DMA
348 * wreckage. It should be safe to remove.
350 static int hlt_counter;
351 void disable_hlt(void)
355 EXPORT_SYMBOL(disable_hlt);
357 void enable_hlt(void)
361 EXPORT_SYMBOL(enable_hlt);
363 static inline int hlt_use_halt(void)
365 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
368 static inline int hlt_use_halt(void)
375 * We use this if we don't have any better
378 void default_idle(void)
380 if (hlt_use_halt()) {
381 trace_power_start(POWER_CSTATE, 1);
382 current_thread_info()->status &= ~TS_POLLING;
384 * TS_POLLING-cleared state must be visible before we
390 safe_halt(); /* enables interrupts racelessly */
393 current_thread_info()->status |= TS_POLLING;
396 /* loop is done by the caller */
400 #ifdef CONFIG_APM_MODULE
401 EXPORT_SYMBOL(default_idle);
404 void stop_this_cpu(void *dummy)
410 set_cpu_online(smp_processor_id(), false);
411 disable_local_APIC();
414 if (hlt_works(smp_processor_id()))
419 static void do_nothing(void *unused)
424 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
425 * pm_idle and update to new pm_idle value. Required while changing pm_idle
426 * handler on SMP systems.
428 * Caller must have changed pm_idle to the new value before the call. Old
429 * pm_idle value will not be used by any CPU after the return of this function.
431 void cpu_idle_wait(void)
434 /* kick all the CPUs so that they exit out of pm_idle */
435 smp_call_function(do_nothing, NULL, 1);
437 EXPORT_SYMBOL_GPL(cpu_idle_wait);
440 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
441 * which can obviate IPI to trigger checking of need_resched.
442 * We execute MONITOR against need_resched and enter optimized wait state
443 * through MWAIT. Whenever someone changes need_resched, we would be woken
444 * up from MWAIT (without an IPI).
446 * New with Core Duo processors, MWAIT can take some hints based on CPU
449 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
451 trace_power_start(POWER_CSTATE, (ax>>4)+1);
452 if (!need_resched()) {
453 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
454 clflush((void *)¤t_thread_info()->flags);
456 __monitor((void *)¤t_thread_info()->flags, 0, 0);
463 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
464 static void mwait_idle(void)
466 if (!need_resched()) {
467 trace_power_start(POWER_CSTATE, 1);
468 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
469 clflush((void *)¤t_thread_info()->flags);
471 __monitor((void *)¤t_thread_info()->flags, 0, 0);
482 * On SMP it's slightly faster (but much more power-consuming!)
483 * to poll the ->work.need_resched flag instead of waiting for the
484 * cross-CPU IPI to arrive. Use this option with caution.
486 static void poll_idle(void)
488 trace_power_start(POWER_CSTATE, 0);
490 while (!need_resched())
496 * mwait selection logic:
498 * It depends on the CPU. For AMD CPUs that support MWAIT this is
499 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
500 * then depend on a clock divisor and current Pstate of the core. If
501 * all cores of a processor are in halt state (C1) the processor can
502 * enter the C1E (C1 enhanced) state. If mwait is used this will never
505 * idle=mwait overrides this decision and forces the usage of mwait.
507 static int __cpuinitdata force_mwait;
509 #define MWAIT_INFO 0x05
510 #define MWAIT_ECX_EXTENDED_INFO 0x01
511 #define MWAIT_EDX_C1 0xf0
513 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
515 u32 eax, ebx, ecx, edx;
520 if (c->cpuid_level < MWAIT_INFO)
523 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
524 /* Check, whether EDX has extended info about MWAIT */
525 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
529 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
532 return (edx & MWAIT_EDX_C1);
536 * Check for AMD CPUs, which have potentially C1E support
538 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
540 if (c->x86_vendor != X86_VENDOR_AMD)
546 /* Family 0x0f models < rev F do not have C1E */
547 if (c->x86 == 0x0f && c->x86_model < 0x40)
553 static cpumask_var_t c1e_mask;
554 static int c1e_detected;
556 void c1e_remove_cpu(int cpu)
558 if (c1e_mask != NULL)
559 cpumask_clear_cpu(cpu, c1e_mask);
563 * C1E aware idle routine. We check for C1E active in the interrupt
564 * pending message MSR. If we detect C1E, then we handle it the same
565 * way as C3 power states (local apic timer and TSC stop)
567 static void c1e_idle(void)
575 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
576 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
578 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
579 mark_tsc_unstable("TSC halt in AMD C1E");
580 printk(KERN_INFO "System has AMD C1E enabled\n");
581 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
586 int cpu = smp_processor_id();
588 if (!cpumask_test_cpu(cpu, c1e_mask)) {
589 cpumask_set_cpu(cpu, c1e_mask);
591 * Force broadcast so ACPI can not interfere.
593 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
595 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
598 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
603 * The switch back from broadcast mode needs to be
604 * called with interrupts disabled.
607 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
613 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
616 if (pm_idle == poll_idle && smp_num_siblings > 1) {
617 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
618 " performance may degrade.\n");
624 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
626 * One CPU supports mwait => All CPUs supports mwait
628 printk(KERN_INFO "using mwait in idle threads.\n");
629 pm_idle = mwait_idle;
630 } else if (check_c1e_idle(c)) {
631 printk(KERN_INFO "using C1E aware idle routine\n");
634 pm_idle = default_idle;
637 void __init init_c1e_mask(void)
639 /* If we're using c1e_idle, we need to allocate c1e_mask. */
640 if (pm_idle == c1e_idle)
641 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
644 static int __init idle_setup(char *str)
649 if (!strcmp(str, "poll")) {
650 printk("using polling idle threads.\n");
652 } else if (!strcmp(str, "mwait"))
654 else if (!strcmp(str, "halt")) {
656 * When the boot option of idle=halt is added, halt is
657 * forced to be used for CPU idle. In such case CPU C2/C3
658 * won't be used again.
659 * To continue to load the CPU idle driver, don't touch
660 * the boot_option_idle_override.
662 pm_idle = default_idle;
665 } else if (!strcmp(str, "nomwait")) {
667 * If the boot option of "idle=nomwait" is added,
668 * it means that mwait will be disabled for CPU C2/C3
669 * states. In such case it won't touch the variable
670 * of boot_option_idle_override.
677 boot_option_idle_override = 1;
680 early_param("idle", idle_setup);
682 unsigned long arch_align_stack(unsigned long sp)
684 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
685 sp -= get_random_int() % 8192;
689 unsigned long arch_randomize_brk(struct mm_struct *mm)
691 unsigned long range_end = mm->brk + 0x02000000;
692 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;