1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
4 Maintained by Jeff Garzik <jgarzik@pobox.com>
5 Copyright 2000,2001 The Linux Kernel Team
6 Written/copyright 1994-2001 by Donald Becker.
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
11 Please refer to Documentation/DocBook/tulip.{pdf,ps,html}
12 for more information on this driver, or visit the project
13 Web page at http://sourceforge.net/projects/tulip/
17 #define DRV_NAME "tulip"
18 #define DRV_VERSION "1.1.13"
19 #define DRV_RELDATE "May 11, 2002"
21 #include <linux/config.h>
22 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/init.h>
26 #include <linux/etherdevice.h>
27 #include <linux/delay.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/crc32.h>
31 #include <asm/unaligned.h>
32 #include <asm/uaccess.h>
38 static char version[] __devinitdata =
39 "Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
42 /* A few user-configurable values. */
44 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
45 static unsigned int max_interrupt_work = 25;
48 /* Used to pass the full-duplex flag, etc. */
49 static int full_duplex[MAX_UNITS];
50 static int options[MAX_UNITS];
51 static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
53 /* The possible media types that can be set in options[] are: */
54 const char * const medianame[32] = {
55 "10baseT", "10base2", "AUI", "100baseTx",
56 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
57 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
58 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
59 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
60 "","","","", "","","","", "","","","Transceiver reset",
63 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
64 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
65 || defined(__sparc_) || defined(__ia64__) \
66 || defined(__sh__) || defined(__mips__)
67 static int rx_copybreak = 1518;
69 static int rx_copybreak = 100;
73 Set the bus performance register.
74 Typical: Set 16 longword cache alignment, no burst limit.
75 Cache alignment bits 15:14 Burst length 13:8
76 0000 No alignment 0x00000000 unlimited 0800 8 longwords
77 4000 8 longwords 0100 1 longword 1000 16 longwords
78 8000 16 longwords 0200 2 longwords 2000 32 longwords
79 C000 32 longwords 0400 4 longwords
80 Warning: many older 486 systems are broken and require setting 0x00A04800
81 8 longword cache alignment, 8 longword burst.
82 ToDo: Non-Intel setting could be better.
85 #if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
86 static int csr0 = 0x01A00000 | 0xE000;
87 #elif defined(__i386__) || defined(__powerpc__)
88 static int csr0 = 0x01A00000 | 0x8000;
89 #elif defined(__sparc__) || defined(__hppa__)
90 /* The UltraSparc PCI controllers will disconnect at every 64-byte
91 * crossing anyways so it makes no sense to tell Tulip to burst
94 static int csr0 = 0x01A00000 | 0x9000;
95 #elif defined(__arm__) || defined(__sh__)
96 static int csr0 = 0x01A00000 | 0x4800;
97 #elif defined(__mips__)
98 static int csr0 = 0x00200000 | 0x4000;
100 #warning Processor architecture undefined!
101 static int csr0 = 0x00A00000 | 0x4800;
104 /* Operational parameters that usually are not changed. */
105 /* Time in jiffies before concluding the transmitter is hung. */
106 #define TX_TIMEOUT (4*HZ)
109 MODULE_AUTHOR("The Linux Kernel Team");
110 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
111 MODULE_LICENSE("GPL");
112 MODULE_PARM(tulip_debug, "i");
113 MODULE_PARM(max_interrupt_work, "i");
114 MODULE_PARM(rx_copybreak, "i");
115 MODULE_PARM(csr0, "i");
116 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
117 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
119 #define PFX DRV_NAME ": "
122 int tulip_debug = TULIP_DEBUG;
130 * This table use during operation for capabilities and media timer.
132 * It is indexed via the values in 'enum chips'
135 struct tulip_chip_table tulip_tbl[] = {
136 { }, /* placeholder for array, slot unused currently */
137 { }, /* placeholder for array, slot unused currently */
140 { "Digital DS21140 Tulip", 128, 0x0001ebef,
141 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
143 /* DC21142, DC21143 */
144 { "Digital DS21143 Tulip", 128, 0x0801fbff,
145 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
146 | HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
149 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
150 HAS_MII | HAS_PNICNWAY, pnic_timer },
153 { "Macronix 98713 PMAC", 128, 0x0001ebef,
154 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
157 { "Macronix 98715 PMAC", 256, 0x0001ebef,
158 HAS_MEDIA_TABLE, mxic_timer },
161 { "Macronix 98725 PMAC", 256, 0x0001ebef,
162 HAS_MEDIA_TABLE, mxic_timer },
165 { "ASIX AX88140", 128, 0x0001fbff,
166 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
167 | IS_ASIX, tulip_timer },
170 { "Lite-On PNIC-II", 256, 0x0801fbff,
171 HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
174 { "ADMtek Comet", 256, 0x0001abef,
175 MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
178 { "Compex 9881 PMAC", 128, 0x0001ebef,
179 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
182 { "Intel DS21145 Tulip", 128, 0x0801fbff,
183 HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
184 | HAS_NWAY | HAS_PCI_MWI, t21142_timer },
187 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
188 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
192 { "Conexant LANfinity", 256, 0x0001ebef,
193 HAS_MII | HAS_ACPI, tulip_timer },
197 static struct pci_device_id tulip_pci_tbl[] __devinitdata = {
198 { 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
199 { 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
200 { 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
201 { 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
202 { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
203 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
204 { 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
205 { 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
206 { 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
207 { 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
208 { 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
209 { 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
210 { 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
211 { 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
212 { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
213 { 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
214 { 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
215 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
216 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
217 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
218 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
219 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
220 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
221 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
222 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
223 { 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
224 { 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
225 { 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
226 { 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
227 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
228 { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, /* ALi 1563 integrated ethernet */
229 { } /* terminate list */
231 MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
234 /* A full-duplex map for media types. */
235 const char tulip_media_cap[32] =
236 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
238 static void tulip_tx_timeout(struct net_device *dev);
239 static void tulip_init_ring(struct net_device *dev);
240 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
241 static int tulip_open(struct net_device *dev);
242 static int tulip_close(struct net_device *dev);
243 static void tulip_up(struct net_device *dev);
244 static void tulip_down(struct net_device *dev);
245 static struct net_device_stats *tulip_get_stats(struct net_device *dev);
246 static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
247 static void set_rx_mode(struct net_device *dev);
251 static void tulip_set_power_state (struct tulip_private *tp,
252 int sleep, int snooze)
254 if (tp->flags & HAS_ACPI) {
256 pci_read_config_dword (tp->pdev, CFDD, &tmp);
257 newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
259 newtmp |= CFDD_Sleep;
261 newtmp |= CFDD_Snooze;
263 pci_write_config_dword (tp->pdev, CFDD, newtmp);
269 static void tulip_up(struct net_device *dev)
271 struct tulip_private *tp = (struct tulip_private *)dev->priv;
272 long ioaddr = dev->base_addr;
273 int next_tick = 3*HZ;
276 /* Wake the chip from sleep/snooze mode. */
277 tulip_set_power_state (tp, 0, 0);
279 /* On some chip revs we must set the MII/SYM port before the reset!? */
280 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
281 outl(0x00040000, ioaddr + CSR6);
283 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
284 outl(0x00000001, ioaddr + CSR0);
288 Wait the specified 50 PCI cycles after a reset by initializing
289 Tx and Rx queues and the address filter list. */
290 outl(tp->csr0, ioaddr + CSR0);
294 printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
296 outl(tp->rx_ring_dma, ioaddr + CSR3);
297 outl(tp->tx_ring_dma, ioaddr + CSR4);
298 tp->cur_rx = tp->cur_tx = 0;
299 tp->dirty_rx = tp->dirty_tx = 0;
301 if (tp->flags & MC_HASH_ONLY) {
302 u32 addr_low = cpu_to_le32(get_unaligned((u32 *)dev->dev_addr));
303 u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(dev->dev_addr+4)));
304 if (tp->chip_id == AX88140) {
305 outl(0, ioaddr + CSR13);
306 outl(addr_low, ioaddr + CSR14);
307 outl(1, ioaddr + CSR13);
308 outl(addr_high, ioaddr + CSR14);
309 } else if (tp->flags & COMET_MAC_ADDR) {
310 outl(addr_low, ioaddr + 0xA4);
311 outl(addr_high, ioaddr + 0xA8);
312 outl(0, ioaddr + 0xAC);
313 outl(0, ioaddr + 0xB0);
316 /* This is set_rx_mode(), but without starting the transmitter. */
317 u16 *eaddrs = (u16 *)dev->dev_addr;
318 u16 *setup_frm = &tp->setup_frame[15*6];
321 /* 21140 bug: you must add the broadcast address. */
322 memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
323 /* Fill the final entry of the table with our physical address. */
324 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
325 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
326 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
328 mapping = pci_map_single(tp->pdev, tp->setup_frame,
329 sizeof(tp->setup_frame),
331 tp->tx_buffers[tp->cur_tx].skb = NULL;
332 tp->tx_buffers[tp->cur_tx].mapping = mapping;
334 /* Put the setup frame on the Tx list. */
335 tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
336 tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
337 tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
342 tp->saved_if_port = dev->if_port;
343 if (dev->if_port == 0)
344 dev->if_port = tp->default_port;
346 /* Allow selecting a default media. */
348 if (tp->mtable == NULL)
351 int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
352 (dev->if_port == 12 ? 0 : dev->if_port);
353 for (i = 0; i < tp->mtable->leafcount; i++)
354 if (tp->mtable->mleaf[i].media == looking_for) {
355 printk(KERN_INFO "%s: Using user-specified media %s.\n",
356 dev->name, medianame[dev->if_port]);
360 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
361 int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
362 for (i = 0; i < tp->mtable->leafcount; i++)
363 if (tp->mtable->mleaf[i].media == looking_for) {
364 printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
365 dev->name, medianame[looking_for]);
369 /* Start sensing first non-full-duplex media. */
370 for (i = tp->mtable->leafcount - 1;
371 (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
380 if (tp->chip_id == DC21143 &&
381 (tulip_media_cap[dev->if_port] & MediaIsMII)) {
382 /* We must reset the media CSRs when we force-select MII mode. */
383 outl(0x0000, ioaddr + CSR13);
384 outl(0x0000, ioaddr + CSR14);
385 outl(0x0008, ioaddr + CSR15);
387 tulip_select_media(dev, 1);
388 } else if (tp->chip_id == DC21142) {
390 tulip_select_media(dev, 1);
392 printk(KERN_INFO "%s: Using MII transceiver %d, status "
394 dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
395 outl(csr6_mask_defstate, ioaddr + CSR6);
396 tp->csr6 = csr6_mask_hdcap;
398 outl(0x0000, ioaddr + CSR13);
399 outl(0x0000, ioaddr + CSR14);
401 t21142_start_nway(dev);
402 } else if (tp->chip_id == PNIC2) {
403 /* for initial startup advertise 10/100 Full and Half */
404 tp->sym_advertise = 0x01E0;
405 /* enable autonegotiate end interrupt */
406 outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
407 outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
408 pnic2_start_nway(dev);
409 } else if (tp->chip_id == LC82C168 && ! tp->medialock) {
412 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
413 outl(0x0001, ioaddr + CSR15);
414 } else if (inl(ioaddr + CSR5) & TPLnkPass)
417 /* Start with 10mbps to do autonegotiation. */
418 outl(0x32, ioaddr + CSR12);
419 tp->csr6 = 0x00420000;
420 outl(0x0001B078, ioaddr + 0xB8);
421 outl(0x0201B078, ioaddr + 0xB8);
424 } else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
425 && ! tp->medialock) {
427 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
428 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
429 } else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
430 /* Provided by BOLO, Macronix - 12/10/1998. */
432 tp->csr6 = 0x01a80200;
433 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
434 outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
435 } else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
436 /* Enable automatic Tx underrun recovery. */
437 outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
438 dev->if_port = tp->mii_cnt ? 11 : 0;
439 tp->csr6 = 0x00040000;
440 } else if (tp->chip_id == AX88140) {
441 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
443 tulip_select_media(dev, 1);
445 /* Start the chip's Tx to process setup frame. */
449 outl(tp->csr6 | TxOn, ioaddr + CSR6);
451 /* Enable interrupts by setting the interrupt mask. */
452 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
453 outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
454 tulip_start_rxtx(tp);
455 outl(0, ioaddr + CSR2); /* Rx poll demand */
457 if (tulip_debug > 2) {
458 printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
459 dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5),
463 /* Set the timer to switch to check for link beat and perhaps switch
464 to an alternate media type. */
465 tp->timer.expires = RUN_AT(next_tick);
466 add_timer(&tp->timer);
469 #ifdef CONFIG_NET_HW_FLOWCONTROL
470 /* Enable receiver */
471 void tulip_xon(struct net_device *dev)
473 struct tulip_private *tp = (struct tulip_private *)dev->priv;
475 clear_bit(tp->fc_bit, &netdev_fc_xoff);
476 if (netif_running(dev)){
478 tulip_refill_rx(dev);
479 outl(tulip_tbl[tp->chip_id].valid_intrs, dev->base_addr+CSR7);
485 tulip_open(struct net_device *dev)
487 #ifdef CONFIG_NET_HW_FLOWCONTROL
488 struct tulip_private *tp = (struct tulip_private *)dev->priv;
492 if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev)))
495 tulip_init_ring (dev);
499 #ifdef CONFIG_NET_HW_FLOWCONTROL
500 tp->fc_bit = netdev_register_fc(dev, tulip_xon);
503 netif_start_queue (dev);
509 static void tulip_tx_timeout(struct net_device *dev)
511 struct tulip_private *tp = (struct tulip_private *)dev->priv;
512 long ioaddr = dev->base_addr;
515 spin_lock_irqsave (&tp->lock, flags);
517 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
518 /* Do nothing -- the media monitor should handle this. */
520 printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
522 } else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
523 || tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
524 || tp->chip_id == DM910X) {
525 printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
526 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
527 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12),
528 inl(ioaddr + CSR13), inl(ioaddr + CSR14), inl(ioaddr + CSR15));
529 if ( ! tp->medialock && tp->mtable) {
532 while (tp->cur_index >= 0
533 && (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
535 if (--tp->cur_index < 0) {
536 /* We start again, but should instead look for default. */
537 tp->cur_index = tp->mtable->leafcount - 1;
539 tulip_select_media(dev, 0);
540 printk(KERN_WARNING "%s: transmit timed out, switching to %s "
541 "media.\n", dev->name, medianame[dev->if_port]);
543 } else if (tp->chip_id == PNIC2) {
544 printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
545 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
546 dev->name, (int)inl(ioaddr + CSR5), (int)inl(ioaddr + CSR6),
547 (int)inl(ioaddr + CSR7), (int)inl(ioaddr + CSR12));
549 printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
550 "%8.8x, resetting...\n",
551 dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12));
555 #if defined(way_too_many_messages)
556 if (tulip_debug > 3) {
558 for (i = 0; i < RX_RING_SIZE; i++) {
559 u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
561 printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
562 "%2.2x %2.2x %2.2x.\n",
563 i, (unsigned int)tp->rx_ring[i].status,
564 (unsigned int)tp->rx_ring[i].length,
565 (unsigned int)tp->rx_ring[i].buffer1,
566 (unsigned int)tp->rx_ring[i].buffer2,
567 buf[0], buf[1], buf[2]);
568 for (j = 0; buf[j] != 0xee && j < 1600; j++)
569 if (j < 100) printk(" %2.2x", buf[j]);
570 printk(" j=%d.\n", j);
572 printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
573 for (i = 0; i < RX_RING_SIZE; i++)
574 printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
575 printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
576 for (i = 0; i < TX_RING_SIZE; i++)
577 printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
582 /* Stop and restart the chip's Tx processes . */
583 #ifdef CONFIG_NET_HW_FLOWCONTROL
584 if (tp->fc_bit && test_bit(tp->fc_bit,&netdev_fc_xoff))
585 printk("BUG tx_timeout restarting rx when fc on\n");
587 tulip_restart_rxtx(tp);
588 /* Trigger an immediate transmit demand. */
589 outl(0, ioaddr + CSR1);
591 tp->stats.tx_errors++;
593 spin_unlock_irqrestore (&tp->lock, flags);
594 dev->trans_start = jiffies;
595 netif_wake_queue (dev);
599 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
600 static void tulip_init_ring(struct net_device *dev)
602 struct tulip_private *tp = (struct tulip_private *)dev->priv;
609 for (i = 0; i < RX_RING_SIZE; i++) {
610 tp->rx_ring[i].status = 0x00000000;
611 tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
612 tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
613 tp->rx_buffers[i].skb = NULL;
614 tp->rx_buffers[i].mapping = 0;
616 /* Mark the last entry as wrapping the ring. */
617 tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
618 tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
620 for (i = 0; i < RX_RING_SIZE; i++) {
623 /* Note the receive buffer must be longword aligned.
624 dev_alloc_skb() provides 16 byte alignment. But do *not*
625 use skb_reserve() to align the IP header! */
626 struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
627 tp->rx_buffers[i].skb = skb;
630 mapping = pci_map_single(tp->pdev, skb->tail,
631 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
632 tp->rx_buffers[i].mapping = mapping;
633 skb->dev = dev; /* Mark as being used by this device. */
634 tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
635 tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
637 tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
639 /* The Tx buffer descriptor is filled in as needed, but we
640 do need to clear the ownership bit. */
641 for (i = 0; i < TX_RING_SIZE; i++) {
642 tp->tx_buffers[i].skb = NULL;
643 tp->tx_buffers[i].mapping = 0;
644 tp->tx_ring[i].status = 0x00000000;
645 tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
647 tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
651 tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
653 struct tulip_private *tp = (struct tulip_private *)dev->priv;
658 spin_lock_irq(&tp->lock);
660 /* Calculate the next Tx descriptor entry. */
661 entry = tp->cur_tx % TX_RING_SIZE;
663 tp->tx_buffers[entry].skb = skb;
664 mapping = pci_map_single(tp->pdev, skb->data,
665 skb->len, PCI_DMA_TODEVICE);
666 tp->tx_buffers[entry].mapping = mapping;
667 tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
669 if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
670 flag = 0x60000000; /* No interrupt */
671 } else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
672 flag = 0xe0000000; /* Tx-done intr. */
673 } else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
674 flag = 0x60000000; /* No Tx-done intr. */
675 } else { /* Leave room for set_rx_mode() to fill entries. */
676 flag = 0xe0000000; /* Tx-done intr. */
677 netif_stop_queue(dev);
679 if (entry == TX_RING_SIZE-1)
680 flag = 0xe0000000 | DESC_RING_WRAP;
682 tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
683 /* if we were using Transmit Automatic Polling, we would need a
685 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
690 /* Trigger an immediate transmit demand. */
691 outl(0, dev->base_addr + CSR1);
693 spin_unlock_irq(&tp->lock);
695 dev->trans_start = jiffies;
700 static void tulip_clean_tx_ring(struct tulip_private *tp)
702 unsigned int dirty_tx;
704 for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
706 int entry = dirty_tx % TX_RING_SIZE;
707 int status = le32_to_cpu(tp->tx_ring[entry].status);
710 tp->stats.tx_errors++; /* It wasn't Txed */
711 tp->tx_ring[entry].status = 0;
714 /* Check for Tx filter setup frames. */
715 if (tp->tx_buffers[entry].skb == NULL) {
716 /* test because dummy frames not mapped */
717 if (tp->tx_buffers[entry].mapping)
718 pci_unmap_single(tp->pdev,
719 tp->tx_buffers[entry].mapping,
720 sizeof(tp->setup_frame),
725 pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
726 tp->tx_buffers[entry].skb->len,
729 /* Free the original skb. */
730 dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
731 tp->tx_buffers[entry].skb = NULL;
732 tp->tx_buffers[entry].mapping = 0;
736 static void tulip_down (struct net_device *dev)
738 long ioaddr = dev->base_addr;
739 struct tulip_private *tp = (struct tulip_private *) dev->priv;
742 del_timer_sync (&tp->timer);
744 spin_lock_irqsave (&tp->lock, flags);
746 /* Disable interrupts by clearing the interrupt mask. */
747 outl (0x00000000, ioaddr + CSR7);
749 /* Stop the Tx and Rx processes. */
752 /* prepare receive buffers */
753 tulip_refill_rx(dev);
755 /* release any unconsumed transmit buffers */
756 tulip_clean_tx_ring(tp);
758 if (inl (ioaddr + CSR6) != 0xffffffff)
759 tp->stats.rx_missed_errors += inl (ioaddr + CSR8) & 0xffff;
761 spin_unlock_irqrestore (&tp->lock, flags);
763 init_timer(&tp->timer);
764 tp->timer.data = (unsigned long)dev;
765 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
767 dev->if_port = tp->saved_if_port;
769 /* Leave the driver in snooze, not sleep, mode. */
770 tulip_set_power_state (tp, 0, 1);
774 static int tulip_close (struct net_device *dev)
776 long ioaddr = dev->base_addr;
777 struct tulip_private *tp = (struct tulip_private *) dev->priv;
780 netif_stop_queue (dev);
782 #ifdef CONFIG_NET_HW_FLOWCONTROL
784 int bit = tp->fc_bit;
786 netdev_unregister_fc(bit);
792 printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
793 dev->name, inl (ioaddr + CSR5));
795 free_irq (dev->irq, dev);
797 /* Free all the skbuffs in the Rx queue. */
798 for (i = 0; i < RX_RING_SIZE; i++) {
799 struct sk_buff *skb = tp->rx_buffers[i].skb;
800 dma_addr_t mapping = tp->rx_buffers[i].mapping;
802 tp->rx_buffers[i].skb = NULL;
803 tp->rx_buffers[i].mapping = 0;
805 tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
806 tp->rx_ring[i].length = 0;
807 tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
809 pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
814 for (i = 0; i < TX_RING_SIZE; i++) {
815 struct sk_buff *skb = tp->tx_buffers[i].skb;
818 pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
819 skb->len, PCI_DMA_TODEVICE);
822 tp->tx_buffers[i].skb = NULL;
823 tp->tx_buffers[i].mapping = 0;
829 static struct net_device_stats *tulip_get_stats(struct net_device *dev)
831 struct tulip_private *tp = (struct tulip_private *)dev->priv;
832 long ioaddr = dev->base_addr;
834 if (netif_running(dev)) {
837 spin_lock_irqsave (&tp->lock, flags);
839 tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff;
841 spin_unlock_irqrestore(&tp->lock, flags);
848 static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
850 struct tulip_private *np = dev->priv;
853 if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
857 case ETHTOOL_GDRVINFO: {
858 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
859 strcpy(info.driver, DRV_NAME);
860 strcpy(info.version, DRV_VERSION);
861 strcpy(info.bus_info, np->pdev->slot_name);
862 if (copy_to_user(useraddr, &info, sizeof(info)))
872 /* Provide ioctl() calls to examine the MII xcvr state. */
873 static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
875 struct tulip_private *tp = dev->priv;
876 long ioaddr = dev->base_addr;
877 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
878 const unsigned int phy_idx = 0;
879 int phy = tp->phys[phy_idx] & 0x1f;
880 unsigned int regnum = data->reg_num;
884 return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
886 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
889 else if (tp->flags & HAS_NWAY)
891 else if (tp->chip_id == COMET)
896 case SIOCGMIIREG: /* Read MII PHY register. */
897 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
898 int csr12 = inl (ioaddr + CSR12);
899 int csr14 = inl (ioaddr + CSR14);
902 if (((csr14<<5) & 0x1000) ||
903 (dev->if_port == 5 && tp->nwayset))
904 data->val_out = 0x1000;
906 data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
907 | (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
912 ((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
913 ((csr12&0x06) == 6 ? 0 : 4);
914 data->val_out |= 0x6048;
917 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
919 ((inl(ioaddr + CSR6) >> 3) & 0x0040) +
920 ((csr14 >> 1) & 0x20) + 1;
921 data->val_out |= ((csr14 >> 9) & 0x03C0);
923 case 5: data->val_out = tp->lpar; break;
924 default: data->val_out = 0; break;
927 data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
931 case SIOCSMIIREG: /* Write MII PHY register. */
932 if (!capable (CAP_NET_ADMIN))
936 if (data->phy_id == phy) {
937 u16 value = data->val_in;
939 case 0: /* Check for autonegotiation on or reset. */
940 tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
941 if (tp->full_duplex_lock)
942 tp->full_duplex = (value & 0x0100) ? 1 : 0;
945 tp->advertising[phy_idx] =
946 tp->mii_advertise = data->val_in;
950 if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
951 u16 value = data->val_in;
953 if ((value & 0x1200) == 0x1200) {
954 if (tp->chip_id == PNIC2) {
955 pnic2_start_nway (dev);
957 t21142_start_nway (dev);
960 } else if (regnum == 4)
961 tp->sym_advertise = value;
963 tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
974 /* Set or clear the multicast filter for this adaptor.
975 Note that we only use exclusion around actually queueing the
976 new frame, not around filling tp->setup_frame. This is non-deterministic
977 when re-entered but still correct. */
980 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
982 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
984 struct tulip_private *tp = (struct tulip_private *)dev->priv;
986 struct dev_mc_list *mclist;
990 memset(hash_table, 0, sizeof(hash_table));
991 set_bit_le(255, hash_table); /* Broadcast entry */
992 /* This should work on big-endian machines as well. */
993 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
994 i++, mclist = mclist->next) {
995 int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
997 set_bit_le(index, hash_table);
999 for (i = 0; i < 32; i++) {
1000 *setup_frm++ = hash_table[i];
1001 *setup_frm++ = hash_table[i];
1003 setup_frm = &tp->setup_frame[13*6];
1006 /* Fill the final entry with our physical address. */
1007 eaddrs = (u16 *)dev->dev_addr;
1008 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1009 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1010 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1013 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
1015 struct tulip_private *tp = (struct tulip_private *)dev->priv;
1016 struct dev_mc_list *mclist;
1020 /* We have <= 14 addresses so we can use the wonderful
1021 16 address perfect filtering of the Tulip. */
1022 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
1023 i++, mclist = mclist->next) {
1024 eaddrs = (u16 *)mclist->dmi_addr;
1025 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1026 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1027 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
1029 /* Fill the unused entries with the broadcast address. */
1030 memset(setup_frm, 0xff, (15-i)*12);
1031 setup_frm = &tp->setup_frame[15*6];
1033 /* Fill the final entry with our physical address. */
1034 eaddrs = (u16 *)dev->dev_addr;
1035 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
1036 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
1037 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
1041 static void set_rx_mode(struct net_device *dev)
1043 struct tulip_private *tp = (struct tulip_private *)dev->priv;
1044 long ioaddr = dev->base_addr;
1047 csr6 = inl(ioaddr + CSR6) & ~0x00D5;
1049 tp->csr6 &= ~0x00D5;
1050 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1051 tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
1052 csr6 |= AcceptAllMulticast | AcceptAllPhys;
1053 /* Unconditionally log net taps. */
1054 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1055 } else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
1056 /* Too many to filter well -- accept all multicasts. */
1057 tp->csr6 |= AcceptAllMulticast;
1058 csr6 |= AcceptAllMulticast;
1059 } else if (tp->flags & MC_HASH_ONLY) {
1060 /* Some work-alikes have only a 64-entry hash filter table. */
1061 /* Should verify correctness on big-endian/__powerpc__ */
1062 struct dev_mc_list *mclist;
1064 if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
1065 tp->csr6 |= AcceptAllMulticast;
1066 csr6 |= AcceptAllMulticast;
1068 u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
1070 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1071 i++, mclist = mclist->next) {
1072 if (tp->flags & COMET_MAC_ADDR)
1073 filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
1075 filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
1077 mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
1078 if (tulip_debug > 2) {
1079 printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
1080 "%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
1081 mclist->dmi_addr[0], mclist->dmi_addr[1],
1082 mclist->dmi_addr[2], mclist->dmi_addr[3],
1083 mclist->dmi_addr[4], mclist->dmi_addr[5],
1084 ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
1087 if (mc_filter[0] == tp->mc_filter[0] &&
1088 mc_filter[1] == tp->mc_filter[1])
1090 else if (tp->flags & IS_ASIX) {
1091 outl(2, ioaddr + CSR13);
1092 outl(mc_filter[0], ioaddr + CSR14);
1093 outl(3, ioaddr + CSR13);
1094 outl(mc_filter[1], ioaddr + CSR14);
1095 } else if (tp->flags & COMET_MAC_ADDR) {
1096 outl(mc_filter[0], ioaddr + 0xAC);
1097 outl(mc_filter[1], ioaddr + 0xB0);
1099 tp->mc_filter[0] = mc_filter[0];
1100 tp->mc_filter[1] = mc_filter[1];
1103 unsigned long flags;
1105 /* Note that only the low-address shortword of setup_frame is valid!
1106 The values are doubled for big-endian architectures. */
1107 if (dev->mc_count > 14) { /* Must use a multicast hash table. */
1108 build_setup_frame_hash(tp->setup_frame, dev);
1110 build_setup_frame_perfect(tp->setup_frame, dev);
1113 spin_lock_irqsave(&tp->lock, flags);
1115 if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
1116 /* Same setup recently queued, we need not add it. */
1118 u32 tx_flags = 0x08000000 | 192;
1122 /* Now add this frame to the Tx list. */
1124 entry = tp->cur_tx++ % TX_RING_SIZE;
1127 /* Avoid a chip errata by prefixing a dummy entry. */
1128 tp->tx_buffers[entry].skb = NULL;
1129 tp->tx_buffers[entry].mapping = 0;
1130 tp->tx_ring[entry].length =
1131 (entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
1132 tp->tx_ring[entry].buffer1 = 0;
1133 /* Must set DescOwned later to avoid race with chip */
1135 entry = tp->cur_tx++ % TX_RING_SIZE;
1138 tp->tx_buffers[entry].skb = NULL;
1139 tp->tx_buffers[entry].mapping =
1140 pci_map_single(tp->pdev, tp->setup_frame,
1141 sizeof(tp->setup_frame),
1143 /* Put the setup frame on the Tx list. */
1144 if (entry == TX_RING_SIZE-1)
1145 tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
1146 tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
1147 tp->tx_ring[entry].buffer1 =
1148 cpu_to_le32(tp->tx_buffers[entry].mapping);
1149 tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
1151 tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
1152 if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
1153 netif_stop_queue(dev);
1155 /* Trigger an immediate transmit demand. */
1156 outl(0, ioaddr + CSR1);
1159 spin_unlock_irqrestore(&tp->lock, flags);
1162 outl(csr6, ioaddr + CSR6);
1165 #ifdef CONFIG_TULIP_MWI
1166 static void __devinit tulip_mwi_config (struct pci_dev *pdev,
1167 struct net_device *dev)
1169 struct tulip_private *tp = dev->priv;
1174 if (tulip_debug > 3)
1175 printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pdev->slot_name);
1177 tp->csr0 = csr0 = 0;
1179 /* if we have any cache line size at all, we can do MRM */
1182 /* ...and barring hardware bugs, MWI */
1183 if (!(tp->chip_id == DC21143 && tp->revision == 65))
1186 /* set or disable MWI in the standard PCI command bit.
1187 * Check for the case where mwi is desired but not available
1189 if (csr0 & MWI) pci_set_mwi(pdev);
1190 else pci_clear_mwi(pdev);
1192 /* read result from hardware (in case bit refused to enable) */
1193 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
1194 if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
1197 /* if cache line size hardwired to zero, no MWI */
1198 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
1199 if ((csr0 & MWI) && (cache == 0)) {
1201 pci_clear_mwi(pdev);
1204 /* assign per-cacheline-size cache alignment and
1205 * burst length values
1209 csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
1212 csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
1215 csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
1222 /* if we have a good cache line size, we by now have a good
1223 * csr0, so save it and exit
1228 /* we don't have a good csr0 or cache line size, disable MWI */
1230 pci_clear_mwi(pdev);
1234 /* sane defaults for burst length and cache alignment
1235 * originally from de4x5 driver
1237 csr0 |= (8 << BurstLenShift) | (1 << CALShift);
1241 if (tulip_debug > 2)
1242 printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
1243 pdev->slot_name, cache, csr0);
1247 static int __devinit tulip_init_one (struct pci_dev *pdev,
1248 const struct pci_device_id *ent)
1250 struct tulip_private *tp;
1251 /* See note below on the multiport cards. */
1252 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1253 static int last_irq;
1254 static int multiport_cnt; /* For four-port boards w/one EEPROM */
1258 unsigned char *ee_data;
1259 struct net_device *dev;
1261 static int board_idx = -1;
1262 int chip_idx = ent->driver_data;
1263 unsigned int eeprom_missing = 0;
1264 unsigned int force_csr0 = 0;
1267 static int did_version; /* Already printed version info. */
1268 if (tulip_debug > 0 && did_version++ == 0)
1269 printk (KERN_INFO "%s", version);
1275 * Lan media wire a tulip chip to a wan interface. Needs a very
1276 * different driver (lmc driver)
1279 if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
1280 printk (KERN_ERR PFX "skipping LMC card.\n");
1285 * Early DM9100's need software CRC and the DMFE driver
1288 if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
1291 /* Read Chip revision */
1292 pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
1293 if(dev_rev < 0x02000030)
1295 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
1301 * Looks for early PCI chipsets where people report hangs
1302 * without the workarounds being on.
1305 /* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
1306 Aries might need this too. The Saturn errata are not pretty reading but
1307 thankfully it's an old 486 chipset.
1310 if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
1311 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1314 /* The dreaded SiS496 486 chipset. Same workaround as above. */
1315 if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
1316 csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
1320 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1321 if (chip_idx == AX88140) {
1322 if ((csr0 & 0x3f00) == 0)
1326 /* PNIC doesn't have MWI/MRL/MRM... */
1327 if (chip_idx == LC82C168)
1328 csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1330 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1331 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1332 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1333 csr0 &= ~0x01f100ff;
1335 #if defined(__sparc__)
1336 /* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
1337 if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
1338 || (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
1339 csr0 = (csr0 & ~0xff00) | 0xe000;
1343 * And back to business
1346 i = pci_enable_device(pdev);
1348 printk (KERN_ERR PFX
1349 "Cannot enable tulip board #%d, aborting\n",
1354 ioaddr = pci_resource_start (pdev, 0);
1357 /* alloc_etherdev ensures aligned and zeroed private structures */
1358 dev = alloc_etherdev (sizeof (*tp));
1360 printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
1364 SET_MODULE_OWNER(dev);
1365 SET_NETDEV_DEV(dev, &pdev->dev);
1366 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
1367 printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
1368 "aborting\n", pdev->slot_name,
1369 pci_resource_len (pdev, 0),
1370 pci_resource_start (pdev, 0));
1371 goto err_out_free_netdev;
1374 /* grab all resources from both PIO and MMIO regions, as we
1375 * don't want anyone else messing around with our hardware */
1376 if (pci_request_regions (pdev, "tulip"))
1377 goto err_out_free_netdev;
1380 ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
1381 tulip_tbl[chip_idx].io_size);
1383 goto err_out_free_res;
1386 pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
1389 * initialize private data structure 'tp'
1390 * it is zeroed and aligned in alloc_etherdev
1394 tp->rx_ring = pci_alloc_consistent(pdev,
1395 sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
1396 sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
1399 goto err_out_mtable;
1400 tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
1401 tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
1403 tp->chip_id = chip_idx;
1404 tp->flags = tulip_tbl[chip_idx].flags;
1406 tp->base_addr = ioaddr;
1407 tp->revision = chip_rev;
1409 spin_lock_init(&tp->lock);
1410 spin_lock_init(&tp->mii_lock);
1411 init_timer(&tp->timer);
1412 tp->timer.data = (unsigned long)dev;
1413 tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
1415 dev->base_addr = ioaddr;
1417 #ifdef CONFIG_TULIP_MWI
1418 if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
1419 tulip_mwi_config (pdev, dev);
1421 /* MWI is broken for DC21143 rev 65... */
1422 if (chip_idx == DC21143 && chip_rev == 65)
1426 /* Stop the chip's Tx and Rx processes. */
1427 tulip_stop_rxtx(tp);
1429 pci_set_master(pdev);
1431 /* Clear the missed-packet counter. */
1434 /* The station address ROM is read byte serially. The register must
1435 be polled, waiting for the value to be read bit serially from the
1438 ee_data = tp->eeprom;
1440 if (chip_idx == LC82C168) {
1441 for (i = 0; i < 3; i++) {
1442 int value, boguscnt = 100000;
1443 outl(0x600 | i, ioaddr + 0x98);
1445 value = inl(ioaddr + CSR9);
1446 while (value < 0 && --boguscnt > 0);
1447 put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
1448 sum += value & 0xffff;
1450 } else if (chip_idx == COMET) {
1451 /* No need to read the EEPROM. */
1452 put_unaligned(inl(ioaddr + 0xA4), (u32 *)dev->dev_addr);
1453 put_unaligned(inl(ioaddr + 0xA8), (u16 *)(dev->dev_addr + 4));
1454 for (i = 0; i < 6; i ++)
1455 sum += dev->dev_addr[i];
1457 /* A serial EEPROM interface, we read now and sort it out later. */
1459 int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
1461 for (i = 0; i < sizeof(tp->eeprom)/2; i++)
1462 ((u16 *)ee_data)[i] =
1463 le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
1465 /* DEC now has a specification (see Notes) but early board makers
1466 just put the address in the first EEPROM locations. */
1467 /* This does memcmp(ee_data, ee_data+16, 8) */
1468 for (i = 0; i < 8; i ++)
1469 if (ee_data[i] != ee_data[16+i])
1471 if (chip_idx == CONEXANT) {
1472 /* Check that the tuple type and length is correct. */
1473 if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
1475 } else if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
1477 sa_offset = 2; /* Grrr, damn Matrox boards. */
1480 #ifdef CONFIG_DDB5476
1481 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
1482 /* DDB5476 MAC address in first EEPROM locations. */
1484 /* No media table either */
1485 tp->flags &= ~HAS_MEDIA_TABLE;
1488 #ifdef CONFIG_DDB5477
1489 if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
1490 /* DDB5477 MAC address in first EEPROM locations. */
1492 /* No media table either */
1493 tp->flags &= ~HAS_MEDIA_TABLE;
1496 #ifdef CONFIG_MIPS_COBALT
1497 if ((pdev->bus->number == 0) &&
1498 ((PCI_SLOT(pdev->devfn) == 7) ||
1499 (PCI_SLOT(pdev->devfn) == 12))) {
1500 /* Cobalt MAC address in first EEPROM locations. */
1502 /* No media table either */
1503 tp->flags &= ~HAS_MEDIA_TABLE;
1507 /* 3x5 HSC (J3514A) has a broken srom */
1508 if(ee_data[0] == 0x61 && ee_data[1] == 0x10) {
1509 /* pci_vendor_id and subsystem_id are swapped */
1510 ee_data[0] = ee_data[2];
1511 ee_data[1] = ee_data[3];
1515 /* srom need to be byte-swaped and shifted up 1 word.
1516 * This shift needs to happen at the end of the MAC
1517 * first because of the 2 byte overlap.
1519 for(i = 4; i >= 0; i -= 2) {
1520 ee_data[17 + i + 3] = ee_data[17 + i];
1521 ee_data[16 + i + 5] = ee_data[16 + i];
1525 for (i = 0; i < 6; i ++) {
1526 dev->dev_addr[i] = ee_data[i + sa_offset];
1527 sum += ee_data[i + sa_offset];
1530 /* Lite-On boards have the address byte-swapped. */
1531 if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0)
1532 && dev->dev_addr[1] == 0x00)
1533 for (i = 0; i < 6; i+=2) {
1534 char tmp = dev->dev_addr[i];
1535 dev->dev_addr[i] = dev->dev_addr[i+1];
1536 dev->dev_addr[i+1] = tmp;
1538 /* On the Zynx 315 Etherarray and other multiport boards only the
1539 first Tulip has an EEPROM.
1540 On Sparc systems the mac address is held in the OBP property
1541 "local-mac-address".
1542 The addresses of the subsequent ports are derived from the first.
1543 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1544 that here as well. */
1545 if (sum == 0 || sum == 6*0xff) {
1546 #if defined(__sparc__)
1547 struct pcidev_cookie *pcp = pdev->sysdata;
1550 for (i = 0; i < 5; i++)
1551 dev->dev_addr[i] = last_phys_addr[i];
1552 dev->dev_addr[i] = last_phys_addr[i] + 1;
1553 #if defined(__sparc__)
1554 if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
1555 "local-mac-address") == 6) {
1556 prom_getproperty(pcp->prom_node, "local-mac-address",
1560 #if defined(__i386__) /* Patch up x86 BIOS bug. */
1566 for (i = 0; i < 6; i++)
1567 last_phys_addr[i] = dev->dev_addr[i];
1571 /* The lower four bits are the media type. */
1572 if (board_idx >= 0 && board_idx < MAX_UNITS) {
1573 if (options[board_idx] & MEDIA_MASK)
1574 tp->default_port = options[board_idx] & MEDIA_MASK;
1575 if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
1576 tp->full_duplex = 1;
1577 if (mtu[board_idx] > 0)
1578 dev->mtu = mtu[board_idx];
1580 if (dev->mem_start & MEDIA_MASK)
1581 tp->default_port = dev->mem_start & MEDIA_MASK;
1582 if (tp->default_port) {
1583 printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
1584 board_idx, medianame[tp->default_port & MEDIA_MASK]);
1586 if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
1587 tp->full_duplex = 1;
1589 if (tp->full_duplex)
1590 tp->full_duplex_lock = 1;
1592 if (tulip_media_cap[tp->default_port] & MediaIsMII) {
1593 u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1594 tp->mii_advertise = media2advert[tp->default_port - 9];
1595 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1598 if (tp->flags & HAS_MEDIA_TABLE) {
1599 sprintf(dev->name, "tulip%d", board_idx); /* hack */
1600 tulip_parse_eeprom(dev);
1601 strcpy(dev->name, "eth%d"); /* un-hack */
1604 if ((tp->flags & ALWAYS_CHECK_MII) ||
1605 (tp->mtable && tp->mtable->has_mii) ||
1606 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1607 if (tp->mtable && tp->mtable->has_mii) {
1608 for (i = 0; i < tp->mtable->leafcount; i++)
1609 if (tp->mtable->mleaf[i].media == 11) {
1611 tp->saved_if_port = dev->if_port;
1612 tulip_select_media(dev, 2);
1613 dev->if_port = tp->saved_if_port;
1618 /* Find the connected MII xcvrs.
1619 Doing this in open() would allow detecting external xcvrs
1620 later, but takes much time. */
1621 tulip_find_mii (dev, board_idx);
1624 /* The Tulip-specific entries in the device structure. */
1625 dev->open = tulip_open;
1626 dev->hard_start_xmit = tulip_start_xmit;
1627 dev->tx_timeout = tulip_tx_timeout;
1628 dev->watchdog_timeo = TX_TIMEOUT;
1629 dev->stop = tulip_close;
1630 dev->get_stats = tulip_get_stats;
1631 dev->do_ioctl = private_ioctl;
1632 dev->set_multicast_list = set_rx_mode;
1634 if (register_netdev(dev))
1635 goto err_out_free_ring;
1637 printk(KERN_INFO "%s: %s rev %d at %#3lx,",
1638 dev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
1639 pci_set_drvdata(pdev, dev);
1642 printk(" EEPROM not present,");
1643 for (i = 0; i < 6; i++)
1644 printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
1645 printk(", IRQ %d.\n", irq);
1647 if (tp->chip_id == PNIC2)
1648 tp->link_change = pnic2_lnk_change;
1649 else if (tp->flags & HAS_NWAY)
1650 tp->link_change = t21142_lnk_change;
1651 else if (tp->flags & HAS_PNICNWAY)
1652 tp->link_change = pnic_lnk_change;
1654 /* Reset the xcvr interface and turn on heartbeat. */
1660 outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1663 if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
1664 outl(csr6_mask_defstate, ioaddr + CSR6);
1665 outl(0x0000, ioaddr + CSR13);
1666 outl(0x0000, ioaddr + CSR14);
1667 outl(csr6_mask_hdcap, ioaddr + CSR6);
1669 t21142_start_nway(dev);
1672 /* just do a reset for sanity sake */
1673 outl(0x0000, ioaddr + CSR13);
1674 outl(0x0000, ioaddr + CSR14);
1677 if ( ! tp->mii_cnt) {
1680 outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
1681 outl(0x30, ioaddr + CSR12);
1682 outl(0x0001F078, ioaddr + CSR6);
1683 outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
1688 outl(0x00000000, ioaddr + CSR6);
1689 outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1690 outl(0x00000001, ioaddr + CSR13);
1694 outl(0x01a80000, ioaddr + CSR6);
1695 outl(0xFFFFFFFF, ioaddr + CSR14);
1696 outl(0x00001000, ioaddr + CSR12);
1699 /* No initialization necessary. */
1703 /* put the chip in snooze mode until opened */
1704 tulip_set_power_state (tp, 0, 1);
1709 pci_free_consistent (pdev,
1710 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1711 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1712 tp->rx_ring, tp->rx_ring_dma);
1718 iounmap((void *)ioaddr);
1722 pci_release_regions (pdev);
1724 err_out_free_netdev:
1732 static int tulip_suspend (struct pci_dev *pdev, u32 state)
1734 struct net_device *dev = pci_get_drvdata(pdev);
1736 if (dev && netif_running (dev) && netif_device_present (dev)) {
1737 netif_device_detach (dev);
1739 /* pci_power_off(pdev, -1); */
1745 static int tulip_resume(struct pci_dev *pdev)
1747 struct net_device *dev = pci_get_drvdata(pdev);
1749 if (dev && netif_running (dev) && !netif_device_present (dev)) {
1751 pci_enable_device (pdev);
1753 /* pci_power_on(pdev); */
1755 netif_device_attach (dev);
1760 #endif /* CONFIG_PM */
1763 static void __devexit tulip_remove_one (struct pci_dev *pdev)
1765 struct net_device *dev = pci_get_drvdata (pdev);
1766 struct tulip_private *tp;
1772 pci_free_consistent (pdev,
1773 sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
1774 sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
1775 tp->rx_ring, tp->rx_ring_dma);
1776 unregister_netdev (dev);
1780 iounmap((void *)dev->base_addr);
1783 pci_release_regions (pdev);
1784 pci_set_drvdata (pdev, NULL);
1786 /* pci_power_off (pdev, -1); */
1790 static struct pci_driver tulip_driver = {
1792 .id_table = tulip_pci_tbl,
1793 .probe = tulip_init_one,
1794 .remove = __devexit_p(tulip_remove_one),
1796 .suspend = tulip_suspend,
1797 .resume = tulip_resume,
1798 #endif /* CONFIG_PM */
1802 static int __init tulip_init (void)
1805 printk (KERN_INFO "%s", version);
1808 /* copy module parms into globals */
1809 tulip_rx_copybreak = rx_copybreak;
1810 tulip_max_interrupt_work = max_interrupt_work;
1812 /* probe for and init boards */
1813 return pci_module_init (&tulip_driver);
1817 static void __exit tulip_cleanup (void)
1819 pci_unregister_driver (&tulip_driver);
1823 module_init(tulip_init);
1824 module_exit(tulip_cleanup);