1 #ifndef _ASM_IA64_IA32_H
2 #define _ASM_IA64_IA32_H
4 #include <linux/config.h>
6 #ifdef CONFIG_IA32_SUPPORT
8 #include <linux/binfmts.h>
9 #include <linux/compat.h>
12 * 32 bit structures for IA32 support.
15 #define IA32_PAGE_SHIFT 12 /* 4KB pages */
16 #define IA32_PAGE_SIZE (1UL << IA32_PAGE_SHIFT)
17 #define IA32_PAGE_MASK (~(IA32_PAGE_SIZE - 1))
18 #define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK)
19 #define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */
23 * As documented in the iBCS2 standard..
25 * The first part of "struct _fpstate" is just the
26 * normal i387 hardware setup, the extra "status"
27 * word is used to save the coprocessor status word
28 * before entering the handler.
31 unsigned short significand[4];
32 unsigned short exponent;
36 unsigned short significand[4];
37 unsigned short exponent;
38 unsigned short padding[3];
42 unsigned int element[4];
46 struct _fpstate_ia32 {
54 struct _fpreg_ia32 _st[8];
55 unsigned short status;
56 unsigned short magic; /* 0xffff = regular FPU data only */
58 /* FXSR FPU environment */
59 unsigned int _fxsr_env[6]; /* FXSR FPU env is ignored */
61 unsigned int reserved;
62 struct _fpxreg_ia32 _fxsr_st[8]; /* FXSR FPU reg data is ignored */
63 struct _xmmreg_ia32 _xmm[8];
64 unsigned int padding[56];
67 struct sigcontext_ia32 {
68 unsigned short gs, __gsh;
69 unsigned short fs, __fsh;
70 unsigned short es, __esh;
71 unsigned short ds, __dsh;
83 unsigned short cs, __csh;
85 unsigned int esp_at_signal;
86 unsigned short ss, __ssh;
87 unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
94 * IA32 (Pentium III/4) FXSR, SSE support
96 * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
97 * interacting with the FXSR-format floating point environment. Floating
98 * point data can be accessed in the regular format in the usual manner,
99 * and both the standard and SIMD floating point data can be accessed via
100 * the new ptrace requests. In either case, changes to the FPU environment
101 * will be reflected in the task's state as expected.
103 struct ia32_user_i387_struct {
111 int st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */
114 struct ia32_user_fxsr_struct {
125 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
126 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
131 #define IA32_SET_SA_HANDLER(ka,handler,restorer) \
132 ((ka)->sa.sa_handler = (__sighandler_t) \
133 (((unsigned long)(restorer) << 32) \
134 | ((handler) & 0xffffffff)))
135 #define IA32_SA_HANDLER(ka) ((unsigned long) (ka)->sa.sa_handler & 0xffffffff)
136 #define IA32_SA_RESTORER(ka) ((unsigned long) (ka)->sa.sa_handler >> 32)
139 unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */
140 unsigned int sa_flags;
141 unsigned int sa_restorer; /* Another 32 bit pointer */
142 compat_sigset_t sa_mask; /* A 32 bit mask */
145 struct old_sigaction32 {
146 unsigned int sa_handler; /* Really a pointer, but need to deal
148 compat_old_sigset_t sa_mask; /* A 32 bit mask */
149 unsigned int sa_flags;
150 unsigned int sa_restorer; /* Another 32 bit pointer */
153 typedef struct sigaltstack_ia32 {
156 unsigned int ss_size;
159 struct ucontext_ia32 {
160 unsigned int uc_flags;
161 unsigned int uc_link;
162 stack_ia32_t uc_stack;
163 struct sigcontext_ia32 uc_mcontext;
164 sigset_t uc_sigmask; /* mask last for extensibility */
168 unsigned short st_dev;
169 unsigned char __pad0[10];
170 unsigned int __st_ino;
171 unsigned int st_mode;
172 unsigned int st_nlink;
175 unsigned short st_rdev;
176 unsigned char __pad3[10];
177 unsigned int st_size_lo;
178 unsigned int st_size_hi;
179 unsigned int st_blksize;
180 unsigned int st_blocks; /* Number 512-byte blocks allocated. */
181 unsigned int __pad4; /* future possible st_blocks high bits */
182 unsigned int st_atime;
183 unsigned int st_atime_nsec;
184 unsigned int st_mtime;
185 unsigned int st_mtime_nsec;
186 unsigned int st_ctime;
187 unsigned int st_ctime_nsec;
188 unsigned int st_ino_lo;
189 unsigned int st_ino_hi;
192 typedef union sigval32 {
194 unsigned int sival_ptr;
197 typedef struct siginfo32 {
203 int _pad[((128/sizeof(int)) - 3)];
207 unsigned int _pid; /* sender's pid */
208 unsigned int _uid; /* sender's uid */
211 /* POSIX.1b timers */
213 timer_t _tid; /* timer id */
214 int _overrun; /* overrun count */
215 char _pad[sizeof(unsigned int) - sizeof(int)];
216 sigval_t32 _sigval; /* same as below */
217 int _sys_private; /* not to be passed to user */
220 /* POSIX.1b signals */
222 unsigned int _pid; /* sender's pid */
223 unsigned int _uid; /* sender's uid */
229 unsigned int _pid; /* which child */
230 unsigned int _uid; /* sender's uid */
231 int _status; /* exit code */
232 compat_clock_t _utime;
233 compat_clock_t _stime;
236 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
238 unsigned int _addr; /* faulting insn/memory ref. */
243 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
249 struct linux32_dirent {
256 struct old_linux32_dirent {
264 * IA-32 ELF specific definitions for IA-64.
267 #define _ASM_IA64_ELF_H /* Don't include elf.h */
269 #include <linux/sched.h>
270 #include <asm/processor.h>
273 * This is used to ensure we don't load something for the wrong architecture.
275 #define elf_check_arch(x) ((x)->e_machine == EM_386)
278 * These are used to set parameters in the core dumps.
280 #define ELF_CLASS ELFCLASS32
281 #define ELF_DATA ELFDATA2LSB
282 #define ELF_ARCH EM_386
284 #define IA32_PAGE_OFFSET 0xc0000000
285 #define IA32_STACK_TOP IA32_PAGE_OFFSET
288 * The system segments (GDT, TSS, LDT) have to be mapped below 4GB so the IA-32 engine can
291 #define IA32_GDT_OFFSET (IA32_PAGE_OFFSET)
292 #define IA32_TSS_OFFSET (IA32_PAGE_OFFSET + PAGE_SIZE)
293 #define IA32_LDT_OFFSET (IA32_PAGE_OFFSET + 2*PAGE_SIZE)
295 #define USE_ELF_CORE_DUMP
296 #define ELF_EXEC_PAGESIZE IA32_PAGE_SIZE
299 * This is the location that an ET_DYN program is loaded if exec'ed.
300 * Typical use of this is to invoke "./ld.so someprog" to test out a
301 * new version of the loader. We need to make sure that it is out of
302 * the way of the program that it will "exec", and that there is
303 * sufficient room for the brk.
305 #define ELF_ET_DYN_BASE (IA32_PAGE_OFFSET/3 + 0x1000000)
307 void ia64_elf32_init(struct pt_regs *regs);
308 #define ELF_PLAT_INIT(_r, load_addr) ia64_elf32_init(_r)
310 #define elf_addr_t u32
312 /* ELF register definitions. This is needed for core dump support. */
314 #define ELF_NGREG 128 /* XXX fix me */
315 #define ELF_NFPREG 128 /* XXX fix me */
317 typedef unsigned long elf_greg_t;
318 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
324 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
326 /* This macro yields a bitmask that programs can use to figure out
327 what instruction set this CPU supports. */
330 /* This macro yields a string that ld.so will use to load
331 implementation specific libraries for optimization. Not terribly
332 relevant until we have real hardware to play with... */
333 #define ELF_PLATFORM 0
336 # define SET_PERSONALITY(EX,IBCS2) \
337 (current->personality = (IBCS2) ? PER_SVR4 : PER_LINUX)
340 #define IA32_EFLAG 0x200
343 * IA-32 ELF specific definitions for IA-64.
346 #define __USER_CS 0x23
347 #define __USER_DS 0x2B
349 #define FIRST_TSS_ENTRY 6
350 #define FIRST_LDT_ENTRY (FIRST_TSS_ENTRY+1)
351 #define _TSS(n) ((((unsigned long) n)<<4)+(FIRST_TSS_ENTRY<<3))
352 #define _LDT(n) ((((unsigned long) n)<<4)+(FIRST_LDT_ENTRY<<3))
354 #define IA32_SEGSEL_RPL (0x3 << 0)
355 #define IA32_SEGSEL_TI (0x1 << 2)
356 #define IA32_SEGSEL_INDEX_SHIFT 3
358 #define IA32_SEG_BASE 16
359 #define IA32_SEG_TYPE 40
360 #define IA32_SEG_SYS 44
361 #define IA32_SEG_DPL 45
362 #define IA32_SEG_P 47
363 #define IA32_SEG_HIGH_LIMIT 48
364 #define IA32_SEG_AVL 52
365 #define IA32_SEG_DB 54
366 #define IA32_SEG_G 55
367 #define IA32_SEG_HIGH_BASE 56
369 #define IA32_SEG_DESCRIPTOR(base, limit, segtype, nonsysseg, dpl, segpresent, avl, segdb, gran) \
370 (((limit) & 0xffff) \
371 | (((unsigned long) (base) & 0xffffff) << IA32_SEG_BASE) \
372 | ((unsigned long) (segtype) << IA32_SEG_TYPE) \
373 | ((unsigned long) (nonsysseg) << IA32_SEG_SYS) \
374 | ((unsigned long) (dpl) << IA32_SEG_DPL) \
375 | ((unsigned long) (segpresent) << IA32_SEG_P) \
376 | ((((unsigned long) (limit) >> 16) & 0xf) << IA32_SEG_HIGH_LIMIT) \
377 | ((unsigned long) (avl) << IA32_SEG_AVL) \
378 | ((unsigned long) (segdb) << IA32_SEG_DB) \
379 | ((unsigned long) (gran) << IA32_SEG_G) \
380 | ((((unsigned long) (base) >> 24) & 0xff) << IA32_SEG_HIGH_BASE))
391 /* Unscramble an IA-32 segment descriptor into the IA-64 format. */
392 #define IA32_SEG_UNSCRAMBLE(sd) \
393 ( (((sd) >> IA32_SEG_BASE) & 0xffffff) | ((((sd) >> IA32_SEG_HIGH_BASE) & 0xff) << 24) \
394 | ((((sd) & 0xffff) | ((((sd) >> IA32_SEG_HIGH_LIMIT) & 0xf) << 16)) << SEG_LIM) \
395 | ((((sd) >> IA32_SEG_TYPE) & 0xf) << SEG_TYPE) \
396 | ((((sd) >> IA32_SEG_SYS) & 0x1) << SEG_SYS) \
397 | ((((sd) >> IA32_SEG_DPL) & 0x3) << SEG_DPL) \
398 | ((((sd) >> IA32_SEG_P) & 0x1) << SEG_P) \
399 | ((((sd) >> IA32_SEG_AVL) & 0x1) << SEG_AVL) \
400 | ((((sd) >> IA32_SEG_DB) & 0x1) << SEG_DB) \
401 | ((((sd) >> IA32_SEG_G) & 0x1) << SEG_G))
403 #define IA32_IOBASE 0x2000000000000000 /* Virtual address for I/O space */
405 #define IA32_CR0 0x80000001 /* Enable PG and PE bits */
406 #define IA32_CR4 0x600 /* MMXEX and FXSR on */
409 * IA32 floating point control registers starting values
412 #define IA32_FSR_DEFAULT 0x55550000 /* set all tag bits */
413 #define IA32_FCR_DEFAULT 0x17800000037fUL /* extended precision, all masks */
415 #define IA32_PTRACE_GETREGS 12
416 #define IA32_PTRACE_SETREGS 13
417 #define IA32_PTRACE_GETFPREGS 14
418 #define IA32_PTRACE_SETFPREGS 15
419 #define IA32_PTRACE_GETFPXREGS 18
420 #define IA32_PTRACE_SETFPXREGS 19
422 #define ia32_start_thread(regs,new_ip,new_sp) do { \
424 ia64_psr(regs)->cpl = 3; /* set user mode */ \
425 ia64_psr(regs)->ri = 0; /* clear return slot number */ \
426 ia64_psr(regs)->is = 1; /* IA-32 instruction set */ \
427 regs->cr_iip = new_ip; \
428 regs->ar_rsc = 0xc; /* enforced lazy mode, priv. level 3 */ \
431 regs->r12 = new_sp; \
435 * Local Descriptor Table (LDT) related declarations.
438 #define IA32_LDT_ENTRIES 8192 /* Maximum number of LDT entries supported. */
439 #define IA32_LDT_ENTRY_SIZE 8 /* The size of each LDT entry. */
441 struct ia32_modify_ldt_ldt_s {
442 unsigned int entry_number;
443 unsigned int base_addr;
445 unsigned int seg_32bit:1;
446 unsigned int contents:2;
447 unsigned int read_exec_only:1;
448 unsigned int limit_in_pages:1;
449 unsigned int seg_not_present:1;
450 unsigned int useable:1;
455 extern void ia32_gdt_init (void);
456 extern void ia32_init_addr_space (struct pt_regs *regs);
457 extern int ia32_setup_arg_pages (struct linux_binprm *bprm);
458 extern int ia32_exception (struct pt_regs *regs, unsigned long isr);
459 extern int ia32_intercept (struct pt_regs *regs, unsigned long isr);
460 extern unsigned long ia32_do_mmap (struct file *, unsigned long, unsigned long, int, int, loff_t);
461 extern void ia32_load_segment_descriptors (struct task_struct *task);
463 #define ia32f2ia64f(dst,src) \
465 register double f6 asm ("f6"); \
466 asm volatile ("ldfe f6=[%2];; stf.spill [%1]=f6" : "=f"(f6): "r"(dst), "r"(src) : "memory"); \
469 #define ia64f2ia32f(dst,src) \
471 register double f6 asm ("f6"); \
472 asm volatile ("ldf.fill f6=[%2];; stfe [%1]=f6" : "=f"(f6): "r"(dst), "r"(src) : "memory"); \
475 #endif /* !CONFIG_IA32_SUPPORT */
477 /* Declare this uncondiontally, so we don't get warnings for unreachable code. */
478 extern int ia32_setup_frame1 (int sig, struct k_sigaction *ka, siginfo_t *info,
479 sigset_t *set, struct pt_regs *regs);
481 #endif /* _ASM_IA64_IA32_H */