1155463c80155555208f7caa06a7874ff778a91e
[linux-flexiantxendom0-3.2.10.git] / sound / oss / trident.c
1 /*
2  *      OSS driver for Linux 2.4.x for
3  *
4  *      Trident 4D-Wave
5  *      SiS 7018
6  *      ALi 5451
7  *      Tvia/IGST CyberPro 5050
8  *
9  *      Driver: Alan Cox <alan@redhat.com>
10  *
11  *  Built from:
12  *      Low level code: <audio@tridentmicro.com> from ALSA
13  *      Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
14  *      Extended by: Zach Brown <zab@redhat.com>  
15  *
16  *  Hacked up by:
17  *      Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
18  *      Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support
19  *      Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support 
20  *      Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support
21  *      Peter Wächtler <pwaechtler@loewe-komp.de> CyberPro5050 support
22  *      Muli Ben-Yehuda <mulix@mulix.org>
23  *
24  *
25  *      This program is free software; you can redistribute it and/or modify
26  *      it under the terms of the GNU General Public License as published by
27  *      the Free Software Foundation; either version 2 of the License, or
28  *      (at your option) any later version.
29  *
30  *      This program is distributed in the hope that it will be useful,
31  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
32  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
33  *      GNU General Public License for more details.
34  *
35  *      You should have received a copy of the GNU General Public License
36  *      along with this program; if not, write to the Free Software
37  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38  *
39  *  History
40  *  v0.14.10h
41  *      Sept 10 2002 Pascal Schmidt <der.eremit@email.de>
42  *      added support for ALi 5451 joystick port
43  *  v0.14.10g
44  *      Sept 05 2002 Alan Cox <alan@redhat.com>
45  *      adapt to new pci joystick attachment interface
46  *  v0.14.10f
47  *      July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
48  *      patch from Eric Lemar (via Ian Soboroff): in suspend and resume, 
49  *      fix wrong cast from pci_dev* to struct trident_card*. 
50  *  v0.14.10e
51  *      July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
52  *      rewrite the DMA buffer allocation/deallcoation functions, to make it 
53  *      modular and fix a bug where we would call free_pages on memory 
54  *      obtained with pci_alloc_consistent. Also remove unnecessary #ifdef 
55  *      CONFIG_PROC_FS and various other cleanups.
56  *  v0.14.10d
57  *      July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
58  *      made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming
59  *      my syslog with hundreds of messages. 
60  *  v0.14.10c
61  *      July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
62  *      Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle
63  *      and the coding style used in the rest of the file. 
64  *  v0.14.10b
65  *      June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il>
66  *      add a missing unlock_set_fmt, remove a superflous lock/unlock pair 
67  *      with nothing in between. 
68  *  v0.14.10a
69  *      June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 
70  *      use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns 
71  *      per line, use 'do {} while (0)' in statement macros. 
72  *  v0.14.10
73  *      June 6 2002 Lei Hu <Lei_hu@ali.com.tw>
74  *      rewrite the part to read/write registers of audio codec for Ali5451 
75  *  v0.14.9e
76  *      January 2 2002 Vojtech Pavlik <vojtech@ucw.cz> added gameport
77  *      support to avoid resource conflict with pcigame.c
78  *  v0.14.9d
79  *      October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br>
80  *      use set_current_state, properly release resources on failure in
81  *      trident_probe, get rid of check_region
82  *  v0.14.9c
83  *      August 10 2001 Peter Wächtler <pwaechtler@loewe-komp.de>
84  *      added support for Tvia (formerly Integraphics/IGST) CyberPro5050
85  *      this chip is often found in settop boxes (combined video+audio)
86  *  v0.14.9b
87  *      Switch to static inline not extern inline (gcc 3)
88  *  v0.14.9a
89  *      Aug 6 2001 Alan Cox
90  *      0.14.9 crashed on rmmod due to a timer/bh left running. Simplified
91  *      the existing logic (the BH doesn't help as ac97 is lock_irqsave)
92  *      and used del_timer_sync to clean up
93  *      Fixed a problem where the ALi change broke my generic card
94  *  v0.14.9
95  *      Jul 10 2001 Matt Wu
96  *      Add H/W Volume Control
97  *  v0.14.8a
98  *      July 7 2001 Alan Cox
99  *      Moved Matt Wu's ac97 register cache into the card structure
100  *  v0.14.8
101  *      Apr 30 2001 Matt Wu
102  *      Set EBUF1 and EBUF2 to still mode
103  *      Add dc97/ac97 reset function
104  *      Fix power management: ali_restore_regs
105  *  unreleased 
106  *      Mar 09 2001 Matt Wu
107  *      Add cache for ac97 access
108  *  v0.14.7
109  *      Feb 06 2001 Matt Wu
110  *      Fix ac97 initialization
111  *      Fix bug: an extra tail will be played when playing
112  *      Jan 05 2001 Matt Wu
113  *      Implement multi-channels and S/PDIF in support for ALi 1535+
114  *  v0.14.6 
115  *      Nov 1 2000 Ching-Ling Lee
116  *      Fix the bug of memory leak when switching 5.1-channels to 2 channels.
117  *      Add lock protection into dynamic changing format of data.
118  *      Oct 18 2000 Ching-Ling Lee
119  *      5.1-channels support for ALi
120  *      June 28 2000 Ching-Ling Lee
121  *      S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user
122  *      Simple Power Management support for ALi
123  *  v0.14.5 May 23 2000 Ollie Lho
124  *      Misc bug fix from the Net
125  *  v0.14.4 May 20 2000 Aaron Holtzman
126  *      Fix kfree'd memory access in release
127  *      Fix race in open while looking for a free virtual channel slot
128  *      remove open_wait wq (which appears to be unused)
129  *  v0.14.3 May 10 2000 Ollie Lho
130  *      fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU
131  *  v0.14.2 Mar 29 2000 Ching-Ling Lee
132  *      Add clear to silence advance in trident_update_ptr 
133  *      fix invalid data of the end of the sound
134  *  v0.14.1 Mar 24 2000 Ching-Ling Lee
135  *      ALi 5451 support added, playback and recording O.K.
136  *      ALi 5451 originally developed and structured based on sonicvibes, and
137  *      suggested to merge into this file by Alan Cox.
138  *  v0.14 Mar 15 2000 Ollie Lho
139  *      5.1 channel output support with channel binding. What's the Matrix ?
140  *  v0.13.1 Mar 10 2000 Ollie Lho
141  *      few minor bugs on dual codec support, needs more testing
142  *  v0.13 Mar 03 2000 Ollie Lho
143  *      new pci_* for 2.4 kernel, back ported to 2.2
144  *  v0.12 Feb 23 2000 Ollie Lho
145  *      Preliminary Recording support
146  *  v0.11.2 Feb 19 2000 Ollie Lho
147  *      removed incomplete full-dulplex support
148  *  v0.11.1 Jan 28 2000 Ollie Lho
149  *      small bug in setting sample rate for 4d-nx (reported by Aaron)
150  *  v0.11 Jan 27 2000 Ollie Lho
151  *      DMA bug, scheduler latency, second try
152  *  v0.10 Jan 24 2000 Ollie Lho
153  *      DMA bug fixed, found kernel scheduling problem
154  *  v0.09 Jan 20 2000 Ollie Lho
155  *      Clean up of channel register access routine (prepare for channel binding)
156  *  v0.08 Jan 14 2000 Ollie Lho
157  *      Isolation of AC97 codec code
158  *  v0.07 Jan 13 2000 Ollie Lho
159  *      Get rid of ugly old low level access routines (e.g. CHRegs.lp****)
160  *  v0.06 Jan 11 2000 Ollie Lho
161  *      Preliminary support for dual (more ?) AC97 codecs
162  *  v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com>
163  *      adapt to 2.3.x new __setup/__init call
164  *  v0.04 Dec 31 1999 Ollie Lho
165  *      Multiple Open, using Middle Loop Interrupt to smooth playback
166  *  v0.03 Dec 24 1999 Ollie Lho
167  *      mem leak in prog_dmabuf and dealloc_dmabuf removed
168  *  v0.02 Dec 15 1999 Ollie Lho
169  *      SiS 7018 support added, playback O.K.
170  *  v0.01 Alan Cox et. al.
171  *      Initial Release in kernel 2.3.30, does not work
172  * 
173  *  ToDo
174  *      Clean up of low level channel register access code. (done)
175  *      Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done)
176  *      Dual AC97 codecs support (done)
177  *      Recording support (done)
178  *      Mmap support
179  *      "Channel Binding" ioctl extension (done)
180  *      new pci device driver interface for 2.4 kernel (done)
181  *
182  *      Lock order (high->low)
183  *              lock    -       hardware lock
184  *              open_sem -      guard opens
185  *              sem     -       guard dmabuf, write re-entry etc
186  */
187
188 #include <linux/config.h>
189 #include <linux/module.h>
190 #include <linux/string.h>
191 #include <linux/ctype.h>
192 #include <linux/ioport.h>
193 #include <linux/sched.h>
194 #include <linux/delay.h>
195 #include <linux/sound.h>
196 #include <linux/slab.h>
197 #include <linux/soundcard.h>
198 #include <linux/pci.h>
199 #include <linux/init.h>
200 #include <linux/poll.h>
201 #include <linux/spinlock.h>
202 #include <linux/smp_lock.h>
203 #include <linux/ac97_codec.h>
204 #include <linux/bitops.h>
205 #include <linux/proc_fs.h>
206 #include <linux/interrupt.h>
207 #include <linux/pm.h>
208 #include <linux/gameport.h>
209 #include <linux/kernel.h> 
210 #include <asm/uaccess.h>
211 #include <asm/hardirq.h>
212 #include <asm/io.h>
213 #include <asm/dma.h>
214
215 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
216 #include <asm/hwrpb.h>
217 #endif
218
219 #include "trident.h"
220
221 #define DRIVER_VERSION "0.14.10h-2.5"
222
223 /* magic numbers to protect our data structures */
224 #define TRIDENT_CARD_MAGIC      0x5072696E /* "Prin" */
225 #define TRIDENT_STATE_MAGIC     0x63657373 /* "cess" */
226
227 #define TRIDENT_DMA_MASK        0x3fffffff /* DMA buffer mask for pci_alloc_consist */
228 #define ALI_DMA_MASK            0x7fffffff /* ALI Tridents have 31-bit DMA. Wow. */
229
230 #define NR_HW_CH                32
231
232 /* maximum number of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only
233    have 2 SDATA_IN lines (currently) */
234 #define NR_AC97         2       
235
236 /* minor number of /dev/swmodem (temporary, experimental) */
237 #define SND_DEV_SWMODEM 7
238
239 static const unsigned ali_multi_channels_5_1[] = { 
240         /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL,*/
241         ALI_CENTER_CHANNEL, 
242         ALI_LEF_CHANNEL, 
243         ALI_SURR_LEFT_CHANNEL, 
244         ALI_SURR_RIGHT_CHANNEL
245 };
246
247 static const unsigned sample_size[] = { 1, 2, 2, 4 };
248 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
249
250 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
251
252 enum {
253         TRIDENT_4D_DX = 0,
254         TRIDENT_4D_NX,
255         SIS_7018,
256         ALI_5451,
257         CYBER5050
258 };
259
260 static char * card_names[] = {
261         "Trident 4DWave DX",
262         "Trident 4DWave NX",
263         "SiS 7018 PCI Audio",
264         "ALi Audio Accelerator",
265         "Tvia/IGST CyberPro 5050"
266 };
267
268 static struct pci_device_id trident_pci_tbl [] __devinitdata = {
269         {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX,
270          PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_DX},
271         {PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX,
272          PCI_ANY_ID, PCI_ANY_ID, 0, 0, TRIDENT_4D_NX},
273         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018,
274          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7018},
275         {PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451,
276          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALI_5451},
277         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050, 
278          PCI_ANY_ID, PCI_ANY_ID, 0, 0, CYBER5050},
279         {0,}
280 };
281
282 MODULE_DEVICE_TABLE (pci, trident_pci_tbl);
283
284 /* "software" or virtual channel, an instance of opened /dev/dsp */
285 struct trident_state {
286         unsigned int magic;
287         struct trident_card *card;      /* Card info */
288
289         /* file mode */
290         mode_t open_mode;
291
292         /* virtual channel number */
293         int virt;
294
295         struct dmabuf {
296                 /* wave sample stuff */
297                 unsigned int rate;
298                 unsigned char fmt, enable;
299
300                 /* hardware channel */
301                 struct trident_channel *channel;
302
303                 /* OSS buffer management stuff */
304                 void *rawbuf;
305                 dma_addr_t dma_handle;
306                 unsigned buforder;
307                 unsigned numfrag;
308                 unsigned fragshift;
309
310                 /* our buffer acts like a circular ring */
311                 unsigned hwptr;         /* where dma last started, updated by update_ptr */
312                 unsigned swptr;         /* where driver last clear/filled, updated by read/write */
313                 int count;              /* bytes to be comsumed or been generated by dma machine */
314                 unsigned total_bytes;   /* total bytes dmaed by hardware */
315
316                 unsigned error;         /* number of over/underruns */
317                 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
318
319                 /* redundant, but makes calculations easier */
320                 unsigned fragsize;
321                 unsigned dmasize;
322                 unsigned fragsamples;
323
324                 /* OSS stuff */
325                 unsigned mapped:1;
326                 unsigned ready:1;
327                 unsigned endcleared:1;
328                 unsigned update_flag;
329                 unsigned ossfragshift;
330                 int ossmaxfrags;
331                 unsigned subdivision;
332                 
333         } dmabuf;
334
335         /* 5.1 channels */      
336         struct trident_state *other_states[4];
337         int multi_channels_adjust_count;
338         unsigned chans_num;
339         unsigned fmt_flag:1;
340         /* Guard against mmap/write/read races */
341         struct semaphore sem;
342
343 };
344
345 /* hardware channels */
346 struct trident_channel {
347         int  num;       /* channel number */
348         u32 lba;        /* Loop Begine Address, where dma buffer starts */
349         u32 eso;        /* End Sample Offset, wehre dma buffer ends (in the unit of samples) */
350         u32 delta;      /* delta value, sample rate / 48k for playback, 48k/sample rate for recording */
351         u16 attribute;  /* control where PCM data go and come  */
352         u16 fm_vol;
353         u32 control;    /* signed/unsigned, 8/16 bits, mono/stereo */
354 };
355
356 struct trident_pcm_bank_address {
357         u32 start;
358         u32 stop;
359         u32 aint;
360         u32 aint_en;
361 };
362
363 static struct trident_pcm_bank_address bank_a_addrs =
364 {
365         T4D_START_A,
366         T4D_STOP_A,
367         T4D_AINT_A,
368         T4D_AINTEN_A
369 };
370
371 static struct trident_pcm_bank_address bank_b_addrs =
372 {
373         T4D_START_B,
374         T4D_STOP_B,
375         T4D_AINT_B,
376         T4D_AINTEN_B
377 };
378
379 struct trident_pcm_bank {
380         /* register addresses to control bank operations */
381         struct trident_pcm_bank_address *addresses;
382         /* each bank has 32 channels */
383         u32 bitmap; /* channel allocation bitmap */
384         struct trident_channel channels[32];
385 };
386
387 struct trident_card {
388         unsigned int magic;
389
390         /* We keep trident cards in a linked list */
391         struct trident_card *next;
392
393         /* single open lock mechanism, only used for recording */
394         struct semaphore open_sem;
395
396         /* The trident has a certain amount of cross channel interaction
397            so we use a single per card lock */
398         spinlock_t lock;
399         
400         /* PCI device stuff */
401         struct pci_dev * pci_dev;
402         u16 pci_id;
403         u8 revision;
404
405         /* soundcore stuff */
406         int dev_audio;
407
408         /* structures for abstraction of hardware facilities, codecs, banks and channels*/
409         struct ac97_codec *ac97_codec[NR_AC97];
410         struct trident_pcm_bank banks[NR_BANKS];
411         struct trident_state *states[NR_HW_CH];
412
413         /* hardware resources */
414         unsigned long iobase;
415         u32 irq;
416         
417         /* Function support */
418         struct trident_channel *(*alloc_pcm_channel)(struct trident_card *);
419         struct trident_channel *(*alloc_rec_pcm_channel)(struct trident_card *);
420         void (*free_pcm_channel)(struct trident_card *, unsigned int chan);
421         void (*address_interrupt)(struct trident_card *);
422         
423         /* Added by Matt Wu 01-05-2001 for spdif in */
424         int multi_channel_use_count;
425         int rec_channel_use_count;
426         u16 mixer_regs[64][NR_AC97];    /* Made card local by Alan */
427         int mixer_regs_ready;
428
429         /* Added for hardware volume control */
430         int hwvolctl;
431         struct timer_list timer;
432
433         /* Game port support */
434         struct gameport gameport;
435 };
436
437 /* table to map from CHANNELMASK to channel attribute for SiS 7018 */
438 static u16 mask2attr [] =
439 {
440         PCM_LR, PCM_LR, SURR_LR, CENTER_LFE,
441         HSET, MIC, MODEM_LINE1, MODEM_LINE2,
442         I2S_LR, SPDIF_LR
443 };
444
445 /* table to map from channel attribute to CHANNELMASK for SiS 7018 */
446 static int attr2mask [] = {
447         DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET,
448         DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF
449 };
450
451 /* Added by Matt Wu 01-05-2001 for spdif in */
452 static int ali_close_multi_channels(void);
453 static void ali_delay(struct trident_card *card, int interval);
454 static void ali_detect_spdif_rate(struct trident_card *card);
455
456 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val);
457 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg);
458
459 static struct trident_card *devs;
460
461 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val);
462 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg);
463
464 static int trident_open_mixdev(struct inode *inode, struct file *file);
465 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
466                                 unsigned long arg);
467
468 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val);
469 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg);
470 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate);
471 static void ali_enable_special_channel(struct trident_state *stat);
472 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card);
473 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card);
474 static void ali_restore_regs(struct trident_card *card);
475 static void ali_save_regs(struct trident_card *card);
476 static int trident_suspend(struct pci_dev *dev, u32 unused);
477 static int trident_resume(struct pci_dev *dev);
478 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel);
479 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums);
480 static unsigned int ali_get_spdif_in_rate(struct trident_card *card);
481 static void ali_setup_spdif_in(struct trident_card *card);
482 static void ali_disable_spdif_in(struct trident_card *card);
483 static void ali_disable_special_channel(struct trident_card *card, int ch);
484 static void ali_setup_spdif_out(struct trident_card *card, int flag);
485 static int ali_write_5_1(struct trident_state *state, const char *buffer,
486                          int cnt_for_multi_channel, unsigned int *copy_count, 
487                          unsigned int *state_cnt);
488 static int ali_allocate_other_states_resources(struct trident_state *state, 
489                                                int chan_nums);
490 static void ali_free_other_states_resources(struct trident_state *state);
491
492
493 /* save registers for ALi Power Management */
494 static struct ali_saved_registers {
495         unsigned long global_regs[ALI_GLOBAL_REGS];
496         unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
497         unsigned mixer_regs[ALI_MIXER_REGS];
498 } ali_registers;
499
500 #define seek_offset(dma_ptr, buffer, cnt, offset, copy_count)   do { \
501         (dma_ptr) += (offset);    \
502         (buffer) += (offset);     \
503         (cnt) -= (offset);        \
504         (copy_count) += (offset); \
505 } while (0)
506           
507
508 #define lock_set_fmt(state) do { \
509         spin_lock_irqsave(&state->card->lock, flags);                   \
510         if (state->fmt_flag) {                                          \
511                spin_unlock_irqrestore(&state->card->lock, flags);       \
512                return -EFAULT;                                          \
513         }                                                               \
514         state->fmt_flag = 1;                                            \
515         spin_unlock_irqrestore(&state->card->lock, flags);              \
516 } while (0)
517                                 
518 #define unlock_set_fmt(state)  do {                             \
519         spin_lock_irqsave(&state->card->lock, flags);           \
520         state->fmt_flag = 0;                                    \
521         spin_unlock_irqrestore(&state->card->lock, flags);      \
522 } while (0)
523
524 static int trident_enable_loop_interrupts(struct trident_card * card)
525 {
526         u32 global_control;
527
528         global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
529
530         switch (card->pci_id)
531         {
532         case PCI_DEVICE_ID_SI_7018:
533                 global_control |= (ENDLP_IE | MIDLP_IE| BANK_B_EN);
534                 break;
535         case PCI_DEVICE_ID_ALI_5451:
536         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
537         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
538         case PCI_DEVICE_ID_INTERG_5050:
539                 global_control |= (ENDLP_IE | MIDLP_IE);
540                 break;
541         default:
542                 return FALSE;
543         }
544
545         outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
546
547         TRDBG("trident: Enable Loop Interrupts, globctl = 0x%08X\n",
548               inl(TRID_REG(card, T4D_LFO_GC_CIR)));
549
550         return (TRUE);
551 }
552
553 static int trident_disable_loop_interrupts(struct trident_card * card)
554 {
555         u32 global_control;
556
557         global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR));
558         global_control &= ~(ENDLP_IE | MIDLP_IE);
559         outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR));
560
561         TRDBG("trident: Disabled Loop Interrupts, globctl = 0x%08X\n",
562               global_control);
563
564         return (TRUE);
565 }
566
567 static void trident_enable_voice_irq(struct trident_card * card, unsigned int channel)
568 {
569         unsigned int mask = 1 << (channel & 0x1f);
570         struct trident_pcm_bank *bank = &card->banks[channel >> 5];
571         u32 reg, addr = bank->addresses->aint_en;
572
573         reg = inl(TRID_REG(card, addr));
574         reg |= mask;
575         outl(reg, TRID_REG(card, addr));
576
577 #ifdef DEBUG
578         reg = inl(TRID_REG(card, addr));
579         TRDBG("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
580               channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr);
581 #endif /* DEBUG */ 
582 }
583
584 static void trident_disable_voice_irq(struct trident_card * card, unsigned int channel)
585 {
586         unsigned int mask = 1 << (channel & 0x1f);
587         struct trident_pcm_bank *bank = &card->banks[channel >> 5];
588         u32 reg, addr = bank->addresses->aint_en;
589         
590         reg = inl(TRID_REG(card, addr));
591         reg &= ~mask;
592         outl(reg, TRID_REG(card, addr));
593         
594         /* Ack the channel in case the interrupt was set before we disable it. */
595         outl(mask, TRID_REG(card, bank->addresses->aint));
596
597 #ifdef DEBUG
598         reg = inl(TRID_REG(card, addr));
599         TRDBG("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n",
600               channel, addr==T4D_AINTEN_B? "AINTEN_B":"AINTEN_A",reg,addr);
601 #endif /* DEBUG */ 
602 }
603
604 static void trident_start_voice(struct trident_card * card, unsigned int channel)
605 {
606         unsigned int mask = 1 << (channel & 0x1f);
607         struct trident_pcm_bank *bank = &card->banks[channel >> 5];
608         u32 addr = bank->addresses->start;
609
610 #ifdef DEBUG
611         u32 reg;
612 #endif /* DEBUG */ 
613
614         outl(mask, TRID_REG(card, addr));
615
616 #ifdef DEBUG 
617         reg = inl(TRID_REG(card, addr));
618         TRDBG("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n",
619               channel, addr==T4D_START_B? "START_B":"START_A",reg,addr);
620 #endif /* DEBUG */ 
621 }
622
623 static void trident_stop_voice(struct trident_card * card, unsigned int channel)
624 {
625         unsigned int mask = 1 << (channel & 0x1f);
626         struct trident_pcm_bank *bank = &card->banks[channel >> 5];
627         u32 addr = bank->addresses->stop;
628
629 #ifdef DEBUG
630         u32 reg;
631 #endif /* DEBUG */ 
632
633         outl(mask, TRID_REG(card, addr));
634
635 #ifdef DEBUG
636         reg = inl(TRID_REG(card, addr));
637         TRDBG("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n",
638               channel, addr==T4D_STOP_B? "STOP_B":"STOP_A",reg,addr);
639 #endif /* DEBUG */ 
640 }
641
642 static u32 trident_get_interrupt_mask (struct trident_card * card, unsigned int channel)
643 {
644         struct trident_pcm_bank *bank = &card->banks[channel];
645         u32 addr = bank->addresses->aint;
646         return inl(TRID_REG(card, addr));
647 }
648
649 static int trident_check_channel_interrupt(struct trident_card * card, unsigned int channel)
650 {
651         unsigned int mask = 1 << (channel & 0x1f);
652         u32 reg = trident_get_interrupt_mask (card, channel >> 5);
653
654 #ifdef DEBUG
655         if (reg & mask)
656                 TRDBG("trident: channel %d has interrupt, %s = 0x%08x\n",
657                       channel,reg==T4D_AINT_B? "AINT_B":"AINT_A", reg);
658 #endif /* DEBUG */ 
659         return (reg & mask) ? TRUE : FALSE;
660 }
661
662 static void trident_ack_channel_interrupt(struct trident_card * card, unsigned int channel)
663 {
664         unsigned int mask = 1 << (channel & 0x1f);
665         struct trident_pcm_bank *bank = &card->banks[channel >> 5];
666         u32 reg, addr = bank->addresses->aint;
667
668         reg = inl(TRID_REG(card, addr));
669         reg &= mask;
670         outl(reg, TRID_REG(card, addr));
671
672 #ifdef DEBUG
673         reg = inl(TRID_REG(card, T4D_AINT_B));
674         TRDBG("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n",
675               channel, reg);
676 #endif /* DEBUG */ 
677 }
678
679 static struct trident_channel * trident_alloc_pcm_channel(struct trident_card *card)
680 {
681         struct trident_pcm_bank *bank;
682         int idx;
683
684         bank = &card->banks[BANK_B];
685
686         for (idx = 31; idx >= 0; idx--) {
687                 if (!(bank->bitmap & (1 << idx))) {
688                         struct trident_channel *channel = &bank->channels[idx];
689                         bank->bitmap |= 1 << idx;
690                         channel->num = idx + 32;
691                         return channel;
692                 }
693         }
694
695         /* no more free channels available */
696         printk(KERN_ERR "trident: no more channels available on Bank B.\n");
697         return NULL;
698 }
699
700 static void trident_free_pcm_channel(struct trident_card *card, unsigned int channel)
701 {
702         int bank;
703         unsigned char b;
704
705         if (channel < 31 || channel > 63)
706                 return;
707
708         if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX ||
709             card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) {
710           b = inb (TRID_REG(card, T4D_REC_CH));
711           if ((b & ~0x80) == channel)
712             outb(0x0, TRID_REG(card, T4D_REC_CH));
713         }
714             
715         bank = channel >> 5;
716         channel = channel & 0x1f;
717         
718         card->banks[bank].bitmap &= ~(1 << (channel));
719 }
720
721 static struct trident_channel * cyber_alloc_pcm_channel(struct trident_card *card)
722 {
723         struct trident_pcm_bank *bank;
724         int idx;
725
726         /* The cyberpro 5050 has only 32 voices and one bank */
727         /* .. at least they are not documented (if you want to call that 
728          * crap documentation), perhaps broken ? */
729
730         bank = &card->banks[BANK_A];
731
732         for (idx = 31; idx >= 0; idx--) {
733                 if (!(bank->bitmap & (1 << idx))) {
734                         struct trident_channel *channel = &bank->channels[idx];
735                         bank->bitmap |= 1 << idx;
736                         channel->num = idx;
737                         return channel;
738                 }
739         }
740
741         /* no more free channels available */
742         printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n");
743         return NULL;
744 }
745
746 static void cyber_free_pcm_channel(struct trident_card *card, unsigned int channel)
747 {
748         if (channel > 31)
749                 return;
750         card->banks[BANK_A].bitmap &= ~(1 << (channel));
751 }
752
753 static inline void cyber_outidx(int port,int idx,int data)
754 {
755         outb(idx,port);
756         outb(data,port+1);
757 }
758
759 static inline int cyber_inidx(int port,int idx)
760 {
761         outb(idx,port);
762         return inb(port+1);
763 }
764
765 static int cyber_init_ritual(struct trident_card *card)
766 {
767         /* some black magic, taken from SDK samples */
768         /* remove this and nothing will work */
769         int portDat;
770         int ret = 0;
771         unsigned long flags;
772
773         /*
774          *      Keep interrupts off for the configure - we don't want to
775          *      clash with another cyberpro config event
776          */
777         
778         spin_lock_irqsave(&card->lock, flags); 
779         portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
780         /* enable, if it was disabled */
781         if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE ) {
782                 printk(KERN_INFO "cyberpro5050: enabling audio controller\n" );
783                 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE,
784                         portDat | CYBER_BMSK_AUENZ_ENABLE );
785                 /* check again if hardware is enabled now */
786                 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE);
787         }
788         if( (portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE )
789         {
790                 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n" );
791                 ret = -1;
792         }
793         else
794         {
795                 cyber_outidx( CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE, CYBER_BMSK_AUDIO_INT_ENABLE );
796                 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x01 );
797                 cyber_outidx( CYBER_PORT_AUDIO, 0xba, 0x20 );
798                 cyber_outidx( CYBER_PORT_AUDIO, 0xbb, 0x08 );
799                 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x02 );
800                 cyber_outidx( CYBER_PORT_AUDIO, 0xb3, 0x06 );
801                 cyber_outidx( CYBER_PORT_AUDIO, 0xbf, 0x00 );
802         }
803         spin_unlock_irqrestore(&card->lock, flags); 
804         return ret;
805 }
806
807 /*  called with spin lock held */
808
809 static int trident_load_channel_registers(struct trident_card *card, u32 *data, unsigned int channel)
810 {
811         int i;
812
813         if (channel > 63)
814                 return FALSE;
815
816         /* select hardware channel to write */
817         outb(channel, TRID_REG(card, T4D_LFO_GC_CIR));
818
819         /* Output the channel registers, but don't write register
820            three to an ALI chip. */
821         for (i = 0; i < CHANNEL_REGS; i++) {
822                 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451)
823                         continue;
824                 outl(data[i], TRID_REG(card, CHANNEL_START + 4*i));
825         }
826         if (card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
827                 card->pci_id == PCI_DEVICE_ID_INTERG_5050) {
828                 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1));
829                 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2));
830         }
831         return TRUE;
832 }
833
834 /* called with spin lock held */
835 static int trident_write_voice_regs(struct trident_state *state)
836 {
837         unsigned int data[CHANNEL_REGS + 1];
838         struct trident_channel *channel;
839
840         channel = state->dmabuf.channel;
841
842         data[1] = channel->lba;
843         data[4] = channel->control;
844
845         switch (state->card->pci_id)
846         {
847         case PCI_DEVICE_ID_ALI_5451:
848                 data[0] = 0; /* Current Sample Offset */
849                 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
850                 data[3] = 0;
851                 break;  
852         case PCI_DEVICE_ID_SI_7018:
853         case PCI_DEVICE_ID_INTERG_5050:
854                 data[0] = 0; /* Current Sample Offset */
855                 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
856                 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff);
857                 break;
858         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
859                 data[0] = 0; /* Current Sample Offset */
860                 data[2] = (channel->eso << 16) | (channel->delta & 0xffff);
861                 data[3] = channel->fm_vol & 0xffff;
862                 break;
863         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
864                 data[0] = (channel->delta << 24);
865                 data[2] = ((channel->delta << 16) & 0xff000000) | (channel->eso & 0x00ffffff);
866                 data[3] = channel->fm_vol & 0xffff;
867                 break;
868         default:
869                 return FALSE;
870         }
871
872         return trident_load_channel_registers(state->card, data, channel->num);
873 }
874
875 static int compute_rate_play(u32 rate)
876 {
877         int delta;
878         /* We special case 44100 and 8000 since rounding with the equation
879            does not give us an accurate enough value. For 11025 and 22050
880            the equation gives us the best answer. All other frequencies will
881            also use the equation. JDW */
882         if (rate == 44100)
883                 delta = 0xeb3;
884         else if (rate == 8000)
885                 delta = 0x2ab;
886         else if (rate == 48000)
887                 delta = 0x1000;
888         else
889                 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
890         return delta;
891 }
892
893 static int compute_rate_rec(u32 rate)
894 {
895         int delta;
896
897         if (rate == 44100)
898                 delta = 0x116a;
899         else if (rate == 8000)
900                 delta = 0x6000;
901         else if (rate == 48000)
902                 delta = 0x1000;
903         else
904                 delta = ((48000 << 12) / rate) & 0x0000ffff;
905
906         return delta;
907 }
908 /* set playback sample rate */
909 static unsigned int trident_set_dac_rate(struct trident_state * state, unsigned int rate)
910 {       
911         struct dmabuf *dmabuf = &state->dmabuf;
912
913         if (rate > 48000)
914                 rate = 48000;
915         if (rate < 4000)
916                 rate = 4000;
917
918         dmabuf->rate = rate;
919         dmabuf->channel->delta = compute_rate_play(rate);
920
921         trident_write_voice_regs(state);
922
923         TRDBG("trident: called trident_set_dac_rate : rate = %d\n", rate);
924
925         return rate;
926 }
927
928 /* set recording sample rate */
929 static unsigned int trident_set_adc_rate(struct trident_state * state, unsigned int rate)
930 {
931         struct dmabuf *dmabuf = &state->dmabuf;
932
933         if (rate > 48000)
934                 rate = 48000;
935         if (rate < 4000)
936                 rate = 4000;
937
938         dmabuf->rate = rate;
939         dmabuf->channel->delta = compute_rate_rec(rate);
940
941         trident_write_voice_regs(state);
942
943         TRDBG("trident: called trident_set_adc_rate : rate = %d\n", rate);
944
945         return rate;
946 }
947
948 /* prepare channel attributes for playback */ 
949 static void trident_play_setup(struct trident_state *state)
950 {
951         struct dmabuf *dmabuf = &state->dmabuf;
952         struct trident_channel *channel = dmabuf->channel;
953
954         channel->lba = dmabuf->dma_handle;
955         channel->delta = compute_rate_play(dmabuf->rate);
956
957         channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
958         channel->eso -= 1;
959
960         if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
961                 channel->attribute = 0;
962                 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) {
963                         if ((channel->num == ALI_SPDIF_IN_CHANNEL) || (channel->num == ALI_PCM_IN_CHANNEL))
964                                 ali_disable_special_channel(state->card, channel->num);
965                         else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_OUT_CH_ENABLE) 
966                                                                 && (channel->num == ALI_SPDIF_OUT_CHANNEL))
967                         {
968                                 ali_set_spdif_out_rate(state->card, state->dmabuf.rate);
969                                 state->dmabuf.channel->delta = 0x1000;
970                         }
971                 }
972         }
973
974         channel->fm_vol = 0x0;
975         
976         channel->control = CHANNEL_LOOP;
977         if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
978                 /* 16-bits */
979                 channel->control |= CHANNEL_16BITS;
980                 /* signed */
981                 channel->control |= CHANNEL_SIGNED;
982         }
983         if (dmabuf->fmt & TRIDENT_FMT_STEREO)
984                 /* stereo */
985                 channel->control |= CHANNEL_STEREO;
986
987         TRDBG("trident: trident_play_setup, LBA = 0x%08x, "
988               "Delta = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
989               channel->lba, channel->delta, channel->eso, channel->control);
990
991         trident_write_voice_regs(state);
992 }
993
994 /* prepare channel attributes for recording */
995 static void trident_rec_setup(struct trident_state *state)
996 {
997         u16 w;
998         u8  bval;
999
1000         struct trident_card *card = state->card;
1001         struct dmabuf *dmabuf = &state->dmabuf;
1002         struct trident_channel *channel = dmabuf->channel;
1003         unsigned int rate;
1004
1005         /* Enable AC-97 ADC (capture) */
1006         switch (card->pci_id) 
1007         {
1008         case PCI_DEVICE_ID_ALI_5451:
1009                 ali_enable_special_channel(state);
1010                 break;
1011         case PCI_DEVICE_ID_SI_7018:
1012                 /* for 7018, the ac97 is always in playback/record (duplex) mode */
1013                 break;
1014         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1015                 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1016                 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1017                 /* enable and set record channel */
1018                 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1019                 break;
1020         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1021                 w = inw(TRID_REG(card, T4D_MISCINT));
1022                 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT));
1023                 /* enable and set record channel */
1024                 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH));
1025                 break;
1026         case PCI_DEVICE_ID_INTERG_5050:
1027                 /* don't know yet, using special channel 22 in GC1(0xd4)? */
1028                 break;
1029         default:
1030                 return;
1031         }
1032
1033         channel->lba = dmabuf->dma_handle;
1034         channel->delta = compute_rate_rec(dmabuf->rate);
1035         if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) && (channel->num == ALI_SPDIF_IN_CHANNEL)) {
1036                 rate = ali_get_spdif_in_rate(card);
1037                 if (rate == 0)
1038                 {
1039                         printk(KERN_WARNING "trident: ALi 5451 S/PDIF input setup error!\n");
1040                         rate = 48000;
1041                 }
1042                 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL));
1043                 if (bval & 0x10)
1044                 {
1045                         outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
1046                         printk(KERN_WARNING "trident: cleared ALi 5451 S/PDIF parity error flag.\n");
1047                 }
1048
1049                 if (rate != 48000)
1050                         channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff;
1051         }
1052         
1053         channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt];
1054         channel->eso -= 1;
1055
1056         if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) {
1057                 channel->attribute = 0;
1058         }
1059
1060         channel->fm_vol = 0x0;
1061         
1062         channel->control = CHANNEL_LOOP;
1063         if (dmabuf->fmt & TRIDENT_FMT_16BIT) {
1064                 /* 16-bits */
1065                 channel->control |= CHANNEL_16BITS;
1066                 /* signed */
1067                 channel->control |= CHANNEL_SIGNED;
1068         }
1069         if (dmabuf->fmt & TRIDENT_FMT_STEREO)
1070                 /* stereo */
1071                 channel->control |= CHANNEL_STEREO;
1072         
1073         TRDBG("trident: trident_rec_setup, LBA = 0x%08x, "
1074               "Delat = 0x%08x, ESO = 0x%08x, Control = 0x%08x\n",
1075               channel->lba, channel->delta, channel->eso, channel->control);
1076
1077         trident_write_voice_regs(state);
1078 }
1079
1080 /* get current playback/recording dma buffer pointer (byte offset from LBA),
1081    called with spinlock held! */
1082 static inline unsigned trident_get_dma_addr(struct trident_state *state)
1083 {
1084         struct dmabuf *dmabuf = &state->dmabuf;
1085         u32 cso;
1086
1087         if (!dmabuf->enable)
1088                 return 0;
1089
1090         outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR));
1091
1092         switch (state->card->pci_id) 
1093         {
1094         case PCI_DEVICE_ID_ALI_5451:
1095         case PCI_DEVICE_ID_SI_7018:
1096         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
1097         case PCI_DEVICE_ID_INTERG_5050:
1098                 /* 16 bits ESO, CSO for 7018 and DX */
1099                 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2));
1100                 break;
1101         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
1102                 /* 24 bits ESO, CSO for NX */
1103                 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1104                 break;
1105         default:
1106                 return 0;
1107         }
1108
1109         
1110         TRDBG("trident: trident_get_dma_addr: chip reported channel: %d, "
1111               "cso = 0x%04x\n", dmabuf->channel->num, cso);
1112
1113         /* ESO and CSO are in units of Samples, convert to byte offset */
1114         cso <<= sample_shift[dmabuf->fmt];
1115
1116         return (cso % dmabuf->dmasize);
1117 }
1118
1119 /* Stop recording (lock held) */
1120 static inline void __stop_adc(struct trident_state *state)
1121 {
1122         struct dmabuf *dmabuf = &state->dmabuf;
1123         unsigned int chan_num = dmabuf->channel->num;
1124         struct trident_card *card = state->card;
1125
1126         dmabuf->enable &= ~ADC_RUNNING;
1127         trident_stop_voice(card, chan_num);
1128         trident_disable_voice_irq(card, chan_num);
1129 }
1130
1131 static void stop_adc(struct trident_state *state)
1132 {
1133         struct trident_card *card = state->card;
1134         unsigned long flags;
1135
1136         spin_lock_irqsave(&card->lock, flags);
1137         __stop_adc(state);
1138         spin_unlock_irqrestore(&card->lock, flags);
1139 }
1140
1141 static void start_adc(struct trident_state *state)
1142 {
1143         struct dmabuf *dmabuf = &state->dmabuf;
1144         unsigned int chan_num = dmabuf->channel->num;
1145         struct trident_card *card = state->card;
1146         unsigned long flags;
1147
1148         spin_lock_irqsave(&card->lock, flags);
1149         if ((dmabuf->mapped || dmabuf->count < (signed)dmabuf->dmasize) && dmabuf->ready) {
1150                 dmabuf->enable |= ADC_RUNNING;
1151                 trident_enable_voice_irq(card, chan_num);
1152                 trident_start_voice(card, chan_num);
1153         }
1154         spin_unlock_irqrestore(&card->lock, flags);
1155 }
1156
1157 /* stop playback (lock held) */
1158 static inline void __stop_dac(struct trident_state *state)
1159 {
1160         struct dmabuf *dmabuf = &state->dmabuf;
1161         unsigned int chan_num = dmabuf->channel->num;
1162         struct trident_card *card = state->card;
1163
1164         dmabuf->enable &= ~DAC_RUNNING;
1165         trident_stop_voice(card, chan_num);
1166         if (state->chans_num == 6) {
1167                 trident_stop_voice(card, state->other_states[0]->dmabuf.channel->num);
1168                 trident_stop_voice(card, state->other_states[1]->dmabuf.channel->num);
1169                 trident_stop_voice(card, state->other_states[2]->dmabuf.channel->num);
1170                 trident_stop_voice(card, state->other_states[3]->dmabuf.channel->num);
1171         }
1172         trident_disable_voice_irq(card, chan_num);
1173 }
1174
1175 static void stop_dac(struct trident_state *state)
1176 {
1177         struct trident_card *card = state->card;
1178         unsigned long flags;
1179
1180         spin_lock_irqsave(&card->lock, flags);
1181         __stop_dac(state);
1182         spin_unlock_irqrestore(&card->lock, flags);
1183 }       
1184
1185 static void start_dac(struct trident_state *state)
1186 {
1187         struct dmabuf *dmabuf = &state->dmabuf;
1188         unsigned int chan_num = dmabuf->channel->num;
1189         struct trident_card *card = state->card;
1190         unsigned long flags;
1191
1192         spin_lock_irqsave(&card->lock, flags);
1193         if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) {
1194                 dmabuf->enable |= DAC_RUNNING;
1195                 trident_enable_voice_irq(card, chan_num);
1196                 trident_start_voice(card, chan_num);
1197                 if (state->chans_num == 6) {
1198                         trident_start_voice(card, state->other_states[0]->dmabuf.channel->num);
1199                         trident_start_voice(card, state->other_states[1]->dmabuf.channel->num);
1200                         trident_start_voice(card, state->other_states[2]->dmabuf.channel->num);
1201                         trident_start_voice(card, state->other_states[3]->dmabuf.channel->num);
1202                 }
1203         }
1204         spin_unlock_irqrestore(&card->lock, flags);
1205 }
1206
1207 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
1208 #define DMABUF_MINORDER 1
1209
1210 /* alloc a DMA buffer of with a buffer of this order */ 
1211 static int alloc_dmabuf(struct dmabuf* dmabuf, struct pci_dev* pci_dev, int order)
1212 {
1213         void *rawbuf = NULL;
1214         struct page *page, *pend;
1215
1216         if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order,
1217                                             &dmabuf->dma_handle)))
1218                 return -ENOMEM;
1219
1220         TRDBG("trident: allocated %ld (order = %d) bytes at %p\n",
1221               PAGE_SIZE << order, order, rawbuf);
1222
1223         dmabuf->ready  = dmabuf->mapped = 0;
1224         dmabuf->rawbuf = rawbuf;
1225         dmabuf->buforder = order;
1226         
1227         /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
1228         pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
1229         for (page = virt_to_page(rawbuf); page <= pend; page++)
1230                 SetPageReserved(page);
1231
1232         return 0;
1233 }
1234
1235 /* allocate the main DMA buffer, playback and recording buffer should be */ 
1236 /* allocated separately */
1237 static int alloc_main_dmabuf(struct trident_state *state)
1238 {
1239         struct dmabuf *dmabuf = &state->dmabuf;
1240         int order;
1241         int ret = -ENOMEM; 
1242
1243         /* alloc as big a chunk as we can, FIXME: is this necessary ?? */
1244         for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
1245                 if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order)))
1246                         return 0; 
1247                 /* else try again */ 
1248         }
1249         return ret; 
1250 }
1251
1252 /* deallocate a DMA buffer */ 
1253 static void dealloc_dmabuf(struct dmabuf* dmabuf, struct pci_dev* pci_dev)
1254 {
1255         struct page *page, *pend;
1256         
1257         if (dmabuf->rawbuf) {
1258                 /* undo marking the pages as reserved */
1259                 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
1260                 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
1261                         ClearPageReserved(page);
1262                 pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder,
1263                                     dmabuf->rawbuf, dmabuf->dma_handle);
1264                 dmabuf->rawbuf = NULL;
1265         }
1266         dmabuf->mapped = dmabuf->ready = 0;
1267 }
1268
1269 static int prog_dmabuf(struct trident_state *state, unsigned rec)
1270 {
1271         struct dmabuf *dmabuf = &state->dmabuf;
1272         unsigned bytepersec;
1273         struct trident_state *s = state;
1274         unsigned bufsize, dma_nums;
1275         unsigned long flags;
1276         int ret, i, order;
1277         
1278         lock_set_fmt(state);
1279         if (state->chans_num == 6)
1280                 dma_nums = 5;
1281         else    
1282                 dma_nums = 1;
1283         
1284         for (i = 0; i < dma_nums; i++) {
1285                 if (i > 0) {
1286                         s = state->other_states[i - 1];
1287                         dmabuf = &s->dmabuf;
1288                         dmabuf->fmt = state->dmabuf.fmt;
1289                         dmabuf->rate = state->dmabuf.rate;
1290                 }
1291
1292                 spin_lock_irqsave(&s->card->lock, flags);
1293                 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0;
1294                 dmabuf->count = dmabuf->error = 0;
1295                 spin_unlock_irqrestore(&s->card->lock, flags);
1296
1297                 /* allocate DMA buffer if not allocated yet */
1298                 if (!dmabuf->rawbuf) {
1299                         if (i == 0) {
1300                                 if ((ret = alloc_main_dmabuf(state))) {
1301                                         unlock_set_fmt(state);
1302                                         return ret;
1303                                 }
1304                         } else {
1305                                 ret = -ENOMEM; 
1306                                 if ((order = state->dmabuf.buforder - 1) >= DMABUF_MINORDER) {
1307                                         ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order); 
1308                                 }
1309                                 if (ret) {
1310                                         /* release the main DMA buffer */ 
1311                                         dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 
1312                                         /* release the auxiliary DMA buffers */ 
1313                                         for (i-=2; i >= 0; i--)
1314                                                 dealloc_dmabuf(&state->other_states[i]->dmabuf, 
1315                                                                state->card->pci_dev); 
1316                                         unlock_set_fmt(state);
1317                                         return ret; 
1318                                 }
1319                         }
1320                 }
1321                 /* FIXME: figure out all this OSS fragment stuff */
1322                 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt];
1323                 bufsize = PAGE_SIZE << dmabuf->buforder;
1324                 if (dmabuf->ossfragshift) {
1325                         if ((1000 << dmabuf->ossfragshift) < bytepersec)
1326                                 dmabuf->fragshift = ld2(bytepersec/1000);
1327                         else
1328                                 dmabuf->fragshift = dmabuf->ossfragshift;
1329                 } else {
1330                         /* lets hand out reasonable big ass buffers by default */
1331                         dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT -2);
1332                 }
1333                 dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1334                 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) {
1335                         dmabuf->fragshift--;
1336                         dmabuf->numfrag = bufsize >> dmabuf->fragshift;
1337                 }
1338                 dmabuf->fragsize = 1 << dmabuf->fragshift;
1339                 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag)
1340                         dmabuf->numfrag = dmabuf->ossmaxfrags;
1341                 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt];
1342                 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift;
1343
1344                 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80,
1345                        dmabuf->dmasize);
1346
1347                 spin_lock_irqsave(&s->card->lock, flags);
1348                 if (rec) 
1349                         trident_rec_setup(s);
1350                 else 
1351                         trident_play_setup(s);
1352                 
1353                 spin_unlock_irqrestore(&s->card->lock, flags);
1354
1355                 /* set the ready flag for the dma buffer */
1356                 dmabuf->ready = 1;
1357
1358                 TRDBG("trident: prog_dmabuf(%d), sample rate = %d, format = %d, numfrag = %d, "
1359                       "fragsize = %d dmasize = %d\n",
1360                       dmabuf->channel->num, dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1361                       dmabuf->fragsize, dmabuf->dmasize);
1362         }
1363         unlock_set_fmt(state);
1364         return 0;
1365 }
1366
1367 /* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e.
1368    |------------|------------|   or   |xxxxxxxxxxxx|------------|   or   |xxxxxxxxxxxx|xxxxxxxxxxxx|
1369    but we almost always get this
1370    |xxxxxx------|------------|   or   |xxxxxxxxxxxx|xxxxx-------|
1371    so we have to clear the tail space to "silence"
1372    |xxxxxx000000|------------|   or   |xxxxxxxxxxxx|xxxxxx000000|
1373 */
1374 static void trident_clear_tail(struct trident_state *state)
1375 {
1376         struct dmabuf *dmabuf = &state->dmabuf;
1377         unsigned swptr;
1378         unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1379         unsigned int len;
1380         unsigned long flags;
1381
1382         spin_lock_irqsave(&state->card->lock, flags);
1383         swptr = dmabuf->swptr;
1384         spin_unlock_irqrestore(&state->card->lock, flags);
1385
1386         if (swptr == 0 || swptr == dmabuf->dmasize / 2 || swptr == dmabuf->dmasize)
1387                 return;
1388
1389         if (swptr < dmabuf->dmasize/2)
1390                 len = dmabuf->dmasize/2 - swptr;
1391         else
1392                 len = dmabuf->dmasize - swptr;
1393
1394         memset(dmabuf->rawbuf + swptr, silence, len);
1395         if(state->card->pci_id != PCI_DEVICE_ID_ALI_5451)
1396         {
1397                 spin_lock_irqsave(&state->card->lock, flags);
1398                 dmabuf->swptr += len;
1399                 dmabuf->count += len;
1400                 spin_unlock_irqrestore(&state->card->lock, flags);
1401         }
1402
1403         /* restart the dma machine in case it is halted */
1404         start_dac(state);
1405 }
1406
1407 static int drain_dac(struct trident_state *state, int nonblock)
1408 {
1409         DECLARE_WAITQUEUE(wait, current);
1410         struct dmabuf *dmabuf = &state->dmabuf;
1411         unsigned long flags;
1412         unsigned long tmo;
1413         int count;
1414         unsigned long diff = 0;
1415
1416         if (dmabuf->mapped || !dmabuf->ready)
1417                 return 0;
1418
1419         add_wait_queue(&dmabuf->wait, &wait);
1420         for (;;) {
1421                 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE
1422                    every time to make the process really go to sleep */
1423                 set_current_state(TASK_INTERRUPTIBLE);
1424
1425                 spin_lock_irqsave(&state->card->lock, flags);
1426                 count = dmabuf->count;
1427                 spin_unlock_irqrestore(&state->card->lock, flags);
1428
1429                 if (count <= 0)
1430                         break;
1431
1432                 if (signal_pending(current))
1433                         break;
1434
1435                 if (nonblock) {
1436                         remove_wait_queue(&dmabuf->wait, &wait);
1437                         set_current_state(TASK_RUNNING);
1438                         return -EBUSY;
1439                 }
1440
1441                 /* No matter how much data is left in the buffer, we have to wait until
1442                    CSO == ESO/2 or CSO == ESO when address engine interrupts */
1443                 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 ||
1444                     state->card->pci_id == PCI_DEVICE_ID_INTERG_5050)
1445                 {       
1446                         diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize ;
1447                         diff = diff % (dmabuf->dmasize);
1448                         tmo  = (diff * HZ) / dmabuf->rate;
1449                 }
1450                 else
1451                 {
1452                         tmo = (dmabuf->dmasize * HZ) / dmabuf->rate;
1453                 }
1454                 tmo >>= sample_shift[dmabuf->fmt];
1455                 if (!schedule_timeout(tmo ? tmo : 1) && tmo){
1456                         break;
1457                 }
1458         }
1459         remove_wait_queue(&dmabuf->wait, &wait);
1460         set_current_state(TASK_RUNNING);
1461         if (signal_pending(current))
1462                 return -ERESTARTSYS;
1463
1464         return 0;
1465 }
1466
1467 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1468 static void trident_update_ptr(struct trident_state *state)
1469 {
1470         struct dmabuf *dmabuf = &state->dmabuf;
1471         unsigned hwptr, swptr;
1472         int clear_cnt = 0;
1473         int diff;
1474         unsigned char silence;
1475         unsigned half_dmasize;
1476
1477         /* update hardware pointer */
1478         hwptr = trident_get_dma_addr(state);
1479         diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1480         dmabuf->hwptr = hwptr;
1481         dmabuf->total_bytes += diff;
1482
1483         /* error handling and process wake up for ADC */
1484         if (dmabuf->enable == ADC_RUNNING) {
1485                 if (dmabuf->mapped) {
1486                         dmabuf->count -= diff;
1487                         if (dmabuf->count >= (signed)dmabuf->fragsize)
1488                                 wake_up(&dmabuf->wait);
1489                 } else {
1490                         dmabuf->count += diff;
1491
1492                         if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1493                                 /* buffer underrun or buffer overrun, we have no way to recover
1494                                    it here, just stop the machine and let the process force hwptr
1495                                    and swptr to sync */
1496                                 __stop_adc(state);
1497                                 dmabuf->error++;
1498                         }
1499                         if (dmabuf->count < (signed)dmabuf->dmasize/2)
1500                                 wake_up(&dmabuf->wait);
1501                 }
1502         }
1503
1504         /* error handling and process wake up for DAC */
1505         if (dmabuf->enable == DAC_RUNNING) {
1506                 if (dmabuf->mapped) {
1507                         dmabuf->count += diff;
1508                         if (dmabuf->count >= (signed)dmabuf->fragsize)
1509                                 wake_up(&dmabuf->wait);
1510                 } else {
1511                         dmabuf->count -= diff;
1512
1513                         if (dmabuf->count < 0 || dmabuf->count > dmabuf->dmasize) {
1514                                 /* buffer underrun or buffer overrun, we have no way to recover
1515                                    it here, just stop the machine and let the process force hwptr
1516                                    and swptr to sync */
1517                                 __stop_dac(state);
1518                                 dmabuf->error++;
1519                         }
1520                         else if (!dmabuf->endcleared) {
1521                                 swptr = dmabuf->swptr;
1522                                 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80);
1523                                 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) {
1524                                         /* We must clear end data of 1/2 dmabuf if needed.
1525                                            According to 1/2 algorithm of Address Engine Interrupt,
1526                                            check the validation of the data of half dmasize. */
1527                                         half_dmasize = dmabuf->dmasize / 2;
1528                                         if ((diff = hwptr - half_dmasize) < 0 )
1529                                                 diff = hwptr;
1530                                         if ((dmabuf->count + diff) < half_dmasize) {
1531                                                 //there is invalid data in the end of half buffer
1532                                                 if ((clear_cnt = half_dmasize - swptr) < 0)
1533                                                         clear_cnt += half_dmasize;
1534                                                 //clear the invalid data
1535                                                 memset (dmabuf->rawbuf + swptr,
1536                                                         silence, clear_cnt);
1537                                                 if (state->chans_num == 6) {
1538                                                 clear_cnt = clear_cnt / 2;
1539                                                 swptr = swptr / 2;
1540                                                         memset (state->other_states[0]->dmabuf.rawbuf + swptr,
1541                                                                 silence, clear_cnt);
1542                                                         memset (state->other_states[1]->dmabuf.rawbuf + swptr,
1543                                                                 silence, clear_cnt);
1544                                                         memset (state->other_states[2]->dmabuf.rawbuf + swptr,
1545                                                                 silence, clear_cnt);
1546                                                         memset (state->other_states[3]->dmabuf.rawbuf + swptr,
1547                                                                 silence, clear_cnt);
1548                                                 }
1549                                                 dmabuf->endcleared = 1;
1550                                         }
1551                                 } else if (dmabuf->count < (signed) dmabuf->fragsize) {
1552                                         clear_cnt = dmabuf->fragsize;
1553                                         if ((swptr + clear_cnt) > dmabuf->dmasize)
1554                                                 clear_cnt = dmabuf->dmasize - swptr;
1555                                         memset (dmabuf->rawbuf + swptr, silence, clear_cnt);
1556                                         if (state->chans_num == 6) {
1557                                                 clear_cnt = clear_cnt / 2;
1558                                                 swptr = swptr / 2;
1559                                                 memset (state->other_states[0]->dmabuf.rawbuf + swptr,
1560                                                         silence, clear_cnt);
1561                                                 memset (state->other_states[1]->dmabuf.rawbuf + swptr,
1562                                                         silence, clear_cnt);
1563                                                 memset (state->other_states[2]->dmabuf.rawbuf + swptr,
1564                                                         silence, clear_cnt);
1565                                                 memset (state->other_states[3]->dmabuf.rawbuf + swptr,
1566                                                         silence, clear_cnt);
1567                                         }
1568                                         dmabuf->endcleared = 1;
1569                                 }
1570                         }
1571                         /* trident_update_ptr is called by interrupt handler or by process via
1572                            ioctl/poll, we only wake up the waiting process when we have more
1573                            than 1/2 buffer free (always true for interrupt handler) */
1574                         if (dmabuf->count < (signed)dmabuf->dmasize/2)
1575                                 wake_up(&dmabuf->wait);
1576                 }
1577         }
1578         dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE;
1579 }
1580
1581 static void trident_address_interrupt(struct trident_card *card)
1582 {
1583         int i;
1584         struct trident_state *state;
1585         unsigned int channel; 
1586         
1587         /* Update the pointers for all channels we are running. */
1588         /* FIXME: should read interrupt status only once */
1589         for (i = 0; i < NR_HW_CH; i++) {
1590                 channel = 63 - i; 
1591                 if (trident_check_channel_interrupt(card, channel)) {
1592                         trident_ack_channel_interrupt(card, channel);
1593                         if ((state = card->states[i]) != NULL) {
1594                                 trident_update_ptr(state);
1595                         } else {
1596                                 printk(KERN_WARNING "trident: spurious channel "
1597                                        "irq %d.\n", channel);
1598                                 trident_stop_voice(card, channel);
1599                                 trident_disable_voice_irq(card, channel);
1600                         }
1601                 }
1602         }
1603 }
1604
1605 static void ali_hwvol_control(struct trident_card *card, int opt)
1606 {
1607         u16 dwTemp, volume[2], mute, diff, *pVol[2];
1608
1609         dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02);
1610         mute = dwTemp & 0x8000;
1611         volume[0] = dwTemp & 0x001f;
1612         volume[1] = (dwTemp & 0x1f00) >> 8;
1613         if (volume[0] < volume [1]) {
1614                 pVol[0] = &volume[0];
1615                 pVol[1] = &volume[1];
1616         } else {
1617                 pVol[1] = &volume[0];
1618                 pVol[0] = &volume[1];
1619         }
1620         diff = *(pVol[1]) - *(pVol[0]);
1621
1622         if (opt == 1) {                     // MUTE
1623                 dwTemp ^= 0x8000;
1624                 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1625         } else if (opt == 2) {   // Down
1626                 if (mute)
1627                         return;
1628                 if (*(pVol[1]) < 0x001f) {
1629                         (*pVol[1])++;
1630                         *(pVol[0]) = *(pVol[1]) - diff;
1631                 }
1632                 dwTemp &= 0xe0e0;
1633                 dwTemp |= (volume[0]) | (volume[1] << 8);
1634                 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1635                 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8);
1636         } else if (opt == 4) {   // Up
1637                 if (mute)
1638                         return;
1639                 if (*(pVol[0]) >0) {
1640                         (*pVol[0])--;
1641                         *(pVol[1]) = *(pVol[0]) + diff;
1642                 }
1643                 dwTemp &= 0xe0e0;
1644                 dwTemp |= (volume[0]) | (volume[1] << 8);
1645                 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp);
1646                 card->ac97_codec[0]->mixer_state[0] = ((32-volume[0])*25/8) | (((32-volume[1])*25/8) << 8);
1647         } 
1648         else 
1649         {
1650                 /* Nothing needs doing */
1651         }
1652 }
1653
1654 /*
1655  *      Re-enable reporting of vol change after 0.1 seconds
1656  */
1657
1658 static void ali_timeout(unsigned long ptr)
1659 {
1660         struct trident_card *card = (struct trident_card *)ptr;
1661         u16 temp = 0;
1662
1663         /* Enable GPIO IRQ (MISCINT bit 18h)*/
1664         temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1665         temp |= 0x0004;
1666         outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1667 }
1668
1669 /*
1670  *      Set up the timer to clear the vol change notification
1671  */
1672  
1673 static void ali_set_timer(struct trident_card *card)
1674 {
1675         /* Add Timer Routine to Enable GPIO IRQ */
1676         del_timer(&card->timer);        /* Never queue twice */
1677         card->timer.function = ali_timeout;
1678         card->timer.data = (unsigned long) card;
1679         card->timer.expires = jiffies + HZ/10;
1680         add_timer(&card->timer);
1681 }
1682
1683 /*
1684  *      Process a GPIO event
1685  */
1686  
1687 static void ali_queue_task(struct trident_card *card, int opt)
1688 {
1689         u16 temp;
1690
1691         /* Disable GPIO IRQ (MISCINT bit 18h)*/
1692         temp = inw(TRID_REG(card, T4D_MISCINT + 2));
1693         temp &= (u16)(~0x0004);
1694         outw(temp, TRID_REG(card, T4D_MISCINT + 2));
1695
1696         /* Adjust the volume */
1697         ali_hwvol_control(card, opt);
1698         
1699         /* Set the timer for 1/10th sec */
1700         ali_set_timer(card);
1701 }
1702
1703 static void cyber_address_interrupt(struct trident_card *card)
1704 {
1705         int i,irq_status;
1706         struct trident_state *state;
1707         unsigned int channel; 
1708
1709         /* Update the pointers for all channels we are running. */
1710         /* FIXED: read interrupt status only once */
1711         irq_status=inl(TRID_REG(card, T4D_AINT_A) );
1712
1713         TRDBG("cyber_address_interrupt: irq_status 0x%X\n",irq_status);
1714
1715         for (i = 0; i < NR_HW_CH; i++) {
1716                 channel = 31 - i; 
1717                 if (irq_status & ( 1 << channel) ) {
1718                         /* clear bit by writing a 1, zeroes are ignored */              
1719                         outl( (1 << channel), TRID_REG(card, T4D_AINT_A));
1720                 
1721                         TRDBG("cyber_interrupt: channel %d\n", channel);
1722
1723                         if ((state = card->states[i]) != NULL) {
1724                                 trident_update_ptr(state);
1725                         } else {
1726                                 printk(KERN_WARNING "cyber5050: spurious "
1727                                        "channel irq %d.\n", channel); 
1728                                 trident_stop_voice(card, channel);
1729                                 trident_disable_voice_irq(card, channel);
1730                         }
1731                 }
1732         }
1733 }
1734
1735 static irqreturn_t trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1736 {
1737         struct trident_card *card = (struct trident_card *)dev_id;
1738         u32 event;
1739         u32 gpio;
1740
1741         spin_lock(&card->lock);
1742         event = inl(TRID_REG(card, T4D_MISCINT));
1743
1744         TRDBG("trident: trident_interrupt called, MISCINT = 0x%08x\n", event);
1745
1746         if (event & ADDRESS_IRQ) {
1747                 card->address_interrupt(card);
1748         }
1749
1750         if(card->pci_id == PCI_DEVICE_ID_ALI_5451)
1751         {
1752                 /* GPIO IRQ (H/W Volume Control) */
1753                 event = inl(TRID_REG(card, T4D_MISCINT));
1754                 if (event & (1<<25)) {
1755                         gpio = inl(TRID_REG(card, ALI_GPIO));
1756                         if (!timer_pending(&card->timer)) 
1757                                 ali_queue_task(card, gpio&0x07);
1758                 }
1759                 event = inl(TRID_REG(card, T4D_MISCINT));
1760                 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), TRID_REG(card, T4D_MISCINT));
1761                 spin_unlock(&card->lock);
1762                 return IRQ_HANDLED;
1763         }
1764
1765         /* manually clear interrupt status, bad hardware design, blame T^2 */
1766         outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
1767              TRID_REG(card, T4D_MISCINT));
1768         spin_unlock(&card->lock);
1769         return IRQ_HANDLED;
1770 }
1771
1772 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be copied to
1773    the user's buffer.  it is filled by the dma machine and drained by this loop. */
1774 static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1775 {
1776         struct trident_state *state = (struct trident_state *)file->private_data;
1777         struct dmabuf *dmabuf = &state->dmabuf;
1778         ssize_t ret = 0;
1779         unsigned long flags;
1780         unsigned swptr;
1781         int cnt;
1782
1783         TRDBG("trident: trident_read called, count = %d\n", count);
1784
1785         VALIDATE_STATE(state);
1786         if (ppos != &file->f_pos)
1787                 return -ESPIPE;
1788                 
1789         if (dmabuf->mapped)
1790                 return -ENXIO;
1791         if (!access_ok(VERIFY_WRITE, buffer, count))
1792                 return -EFAULT;
1793                 
1794         down(&state->sem);
1795         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1796                 goto out;
1797
1798         while (count > 0) {
1799                 spin_lock_irqsave(&state->card->lock, flags);
1800                 if (dmabuf->count > (signed) dmabuf->dmasize) {
1801                         /* buffer overrun, we are recovering from sleep_on_timeout,
1802                            resync hwptr and swptr, make process flush the buffer */
1803                         dmabuf->count = dmabuf->dmasize;
1804                         dmabuf->swptr = dmabuf->hwptr;
1805                 }
1806                 swptr = dmabuf->swptr;
1807                 cnt = dmabuf->dmasize - swptr;
1808                 if (dmabuf->count < cnt)
1809                         cnt = dmabuf->count;
1810                 spin_unlock_irqrestore(&state->card->lock, flags);
1811
1812                 if (cnt > count)
1813                         cnt = count;
1814                 if (cnt <= 0) {
1815                         unsigned long tmo;
1816                         /* buffer is empty, start the dma machine and wait for data to be
1817                            recorded */
1818                         start_adc(state);
1819                         if (file->f_flags & O_NONBLOCK) {
1820                                 if (!ret) ret = -EAGAIN;
1821                                 goto out;
1822                         }
1823                         
1824                         up(&state->sem);
1825                         /* No matter how much space left in the buffer, we have to wait until
1826                            CSO == ESO/2 or CSO == ESO when address engine interrupts */
1827                         tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1828                         tmo >>= sample_shift[dmabuf->fmt];
1829                         /* There are two situations when sleep_on_timeout returns, one is when
1830                            the interrupt is serviced correctly and the process is waked up by
1831                            ISR ON TIME. Another is when timeout is expired, which means that
1832                            either interrupt is NOT serviced correctly (pending interrupt) or it
1833                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1834                            which results in a (potential) buffer overrun. And worse, there is
1835                            NOTHING we can do to prevent it. */
1836                         if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1837                                 TRDBG(KERN_ERR "trident: recording schedule timeout, "
1838                                       "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1839                                       dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1840                                       dmabuf->hwptr, dmabuf->swptr);
1841
1842                                 /* a buffer overrun, we delay the recovery until next time the
1843                                    while loop begin and we REALLY have space to record */
1844                         }
1845                         if (signal_pending(current)) {
1846                                 if(!ret) ret = -ERESTARTSYS;
1847                                 goto out;
1848                         }
1849                         down(&state->sem);
1850                         if(dmabuf->mapped)
1851                         {
1852                                 if(!ret)
1853                                         ret = -ENXIO;
1854                                 goto out;
1855                         }
1856                         continue;
1857                 }
1858
1859                 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1860                         if (!ret) ret = -EFAULT;
1861                         goto out;
1862                 }
1863
1864                 swptr = (swptr + cnt) % dmabuf->dmasize;
1865
1866                 spin_lock_irqsave(&state->card->lock, flags);
1867                 dmabuf->swptr = swptr;
1868                 dmabuf->count -= cnt;
1869                 spin_unlock_irqrestore(&state->card->lock, flags);
1870
1871                 count -= cnt;
1872                 buffer += cnt;
1873                 ret += cnt;
1874                 start_adc(state);
1875         }
1876 out:
1877         up(&state->sem);
1878         return ret;
1879 }
1880
1881 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1882    the soundcard.  it is drained by the dma machine and filled by this loop. */
1883
1884 static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1885 {
1886         struct trident_state *state = (struct trident_state *)file->private_data;
1887         struct dmabuf *dmabuf = &state->dmabuf;
1888         ssize_t ret;
1889         unsigned long flags;
1890         unsigned swptr;
1891         int cnt;
1892         unsigned int state_cnt;
1893         unsigned int copy_count;
1894
1895         TRDBG("trident: trident_write called, count = %d\n", count);
1896
1897         VALIDATE_STATE(state);
1898         if (ppos != &file->f_pos)
1899                 return -ESPIPE;
1900         
1901         /*
1902          *      Guard against an mmap or ioctl while writing
1903          */     
1904          
1905         down(&state->sem);
1906         
1907         if (dmabuf->mapped)
1908         {
1909                 ret = -ENXIO;
1910                 goto out;
1911         }
1912         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1913                 goto out;
1914
1915         if (!access_ok(VERIFY_READ, buffer, count))
1916         {
1917                 ret= -EFAULT;
1918                 goto out;
1919         }
1920         
1921         ret = 0;
1922
1923         while (count > 0) {
1924                 spin_lock_irqsave(&state->card->lock, flags);
1925                 if (dmabuf->count < 0) {
1926                         /* buffer underrun, we are recovering from sleep_on_timeout,
1927                            resync hwptr and swptr */
1928                         dmabuf->count = 0;
1929                         dmabuf->swptr = dmabuf->hwptr;
1930                 }
1931                 swptr = dmabuf->swptr;
1932                 cnt = dmabuf->dmasize - swptr;
1933                 if (dmabuf->count + cnt > dmabuf->dmasize)
1934                         cnt = dmabuf->dmasize - dmabuf->count;
1935                 spin_unlock_irqrestore(&state->card->lock, flags);
1936
1937                 if (cnt > count)
1938                         cnt = count;
1939                 if (cnt <= 0) {
1940                         unsigned long tmo;
1941                         /* buffer is full, start the dma machine and wait for data to be
1942                            played */
1943                         start_dac(state);
1944                         if (file->f_flags & O_NONBLOCK) {
1945                                 if (!ret) ret = -EAGAIN;
1946                                 goto out;
1947                         }
1948                         /* No matter how much data left in the buffer, we have to wait until
1949                            CSO == ESO/2 or CSO == ESO when address engine interrupts */
1950                         lock_set_fmt(state);
1951                         tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2);
1952                         tmo >>= sample_shift[dmabuf->fmt];
1953                         unlock_set_fmt(state);
1954                         up(&state->sem);
1955                         
1956                         /* There are two situations when sleep_on_timeout returns, one is when
1957                            the interrupt is serviced correctly and the process is waked up by
1958                            ISR ON TIME. Another is when timeout is expired, which means that
1959                            either interrupt is NOT serviced correctly (pending interrupt) or it
1960                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1961                            which results in a (potential) buffer underrun. And worse, there is
1962                            NOTHING we can do to prevent it. */
1963                         if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) {
1964                                 TRDBG(KERN_ERR "trident: playback schedule timeout, "
1965                                       "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1966                                       dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1967                                       dmabuf->hwptr, dmabuf->swptr);
1968
1969                                 /* a buffer underrun, we delay the recovery until next time the
1970                                    while loop begin and we REALLY have data to play */
1971                         }
1972                         if (signal_pending(current)) {
1973                                 if (!ret) ret = -ERESTARTSYS;
1974                                 goto out;
1975                         }
1976                         down(&state->sem);
1977                         if(dmabuf->mapped)
1978                         {
1979                                 if(!ret)
1980                                         ret = -ENXIO;
1981                                 goto out;
1982                         }
1983                         continue;
1984                 }
1985                 lock_set_fmt(state);
1986                 if (state->chans_num == 6) {
1987                         copy_count = 0;
1988                         state_cnt = 0;
1989                         if (ali_write_5_1(state, buffer, cnt, &copy_count, &state_cnt) == -EFAULT) {
1990                                 if (state_cnt){
1991                                         swptr = (swptr + state_cnt) % dmabuf->dmasize;
1992                                         spin_lock_irqsave(&state->card->lock, flags);
1993                                         dmabuf->swptr = swptr;
1994                                         dmabuf->count += state_cnt;
1995                                         dmabuf->endcleared = 0;
1996                                         spin_unlock_irqrestore(&state->card->lock, flags);
1997                                 }
1998                                 ret += copy_count;
1999                                 if (!ret) ret = -EFAULT;
2000                                 unlock_set_fmt(state);
2001                                 goto out;
2002                         }
2003                 }
2004                 else {
2005                         if (copy_from_user(dmabuf->rawbuf + swptr, buffer, cnt)) {
2006                                 if (!ret) ret = -EFAULT;
2007                                 unlock_set_fmt(state);
2008                                 goto out;
2009                         }
2010                         state_cnt = cnt;
2011                 }
2012                 unlock_set_fmt(state);
2013                 
2014                 swptr = (swptr + state_cnt) % dmabuf->dmasize;          
2015                 
2016                 spin_lock_irqsave(&state->card->lock, flags);
2017                 dmabuf->swptr = swptr;
2018                 dmabuf->count += state_cnt;
2019                 dmabuf->endcleared = 0;
2020                 spin_unlock_irqrestore(&state->card->lock, flags);
2021
2022                 count -= cnt;
2023                 buffer += cnt;  
2024                 ret += cnt;
2025                 start_dac(state);
2026         }
2027 out:
2028         up(&state->sem);
2029         return ret;
2030 }
2031
2032
2033 /* No kernel lock - we have our own spinlock */
2034 static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait)
2035 {
2036         struct trident_state *state = (struct trident_state *)file->private_data;
2037         struct dmabuf *dmabuf = &state->dmabuf;
2038         unsigned long flags;
2039         unsigned int mask = 0;
2040
2041         VALIDATE_STATE(state);
2042
2043         /*
2044          *      Guard against a parallel poll and write causing multiple
2045          *      prog_dmabuf events
2046          */
2047          
2048         down(&state->sem);
2049
2050         if (file->f_mode & FMODE_WRITE) {
2051                 if (!dmabuf->ready && prog_dmabuf(state, 0))
2052                 {
2053                         up(&state->sem);
2054                         return 0;
2055                 }
2056                 poll_wait(file, &dmabuf->wait, wait);
2057         }
2058         if (file->f_mode & FMODE_READ) {
2059                 if (!dmabuf->ready && prog_dmabuf(state, 1))
2060                 {
2061                         up(&state->sem);
2062                         return 0;
2063                 }
2064                 poll_wait(file, &dmabuf->wait, wait);
2065         }
2066
2067         up(&state->sem);
2068         
2069         spin_lock_irqsave(&state->card->lock, flags);
2070         trident_update_ptr(state);
2071         if (file->f_mode & FMODE_READ) {
2072                 if (dmabuf->count >= (signed)dmabuf->fragsize)
2073                         mask |= POLLIN | POLLRDNORM;
2074         }
2075         if (file->f_mode & FMODE_WRITE) {
2076                 if (dmabuf->mapped) {
2077                         if (dmabuf->count >= (signed)dmabuf->fragsize)
2078                                 mask |= POLLOUT | POLLWRNORM;
2079                 } else {
2080                         if ((signed)dmabuf->dmasize >= dmabuf->count + (signed)dmabuf->fragsize)
2081                                 mask |= POLLOUT | POLLWRNORM;
2082                 }
2083         }
2084         spin_unlock_irqrestore(&state->card->lock, flags);
2085
2086         return mask;
2087 }
2088
2089 static int trident_mmap(struct file *file, struct vm_area_struct *vma)
2090 {
2091         struct trident_state *state = (struct trident_state *)file->private_data;
2092         struct dmabuf *dmabuf = &state->dmabuf;
2093         int ret = -EINVAL;
2094         unsigned long size;
2095
2096         VALIDATE_STATE(state);
2097         lock_kernel();
2098         
2099         /*
2100          *      Lock against poll read write or mmap creating buffers. Also lock
2101          *      a read or write against an mmap.
2102          */
2103          
2104         down(&state->sem);
2105         
2106         if (vma->vm_flags & VM_WRITE) {
2107                 if ((ret = prog_dmabuf(state, 0)) != 0)
2108                         goto out;
2109         } else if (vma->vm_flags & VM_READ) {
2110                 if ((ret = prog_dmabuf(state, 1)) != 0)
2111                         goto out;
2112         } else
2113                 goto out;
2114
2115         ret = -EINVAL;
2116         if (vma->vm_pgoff != 0)
2117                 goto out;
2118         size = vma->vm_end - vma->vm_start;
2119         if (size > (PAGE_SIZE << dmabuf->buforder))
2120                 goto out;
2121         ret = -EAGAIN;
2122         if (remap_page_range(vma, vma->vm_start, virt_to_phys(dmabuf->rawbuf),
2123                              size, vma->vm_page_prot))
2124                 goto out;
2125         dmabuf->mapped = 1;
2126         ret = 0;
2127 out:
2128         up(&state->sem);
2129         unlock_kernel();
2130         return ret;
2131 }
2132
2133 static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2134 {
2135         struct trident_state *state = (struct trident_state *)file->private_data;
2136         struct dmabuf *dmabuf = &state->dmabuf;
2137         unsigned long flags;
2138         audio_buf_info abinfo;
2139         count_info cinfo;
2140         int val, mapped, ret = 0;
2141
2142         struct trident_card *card = state->card;
2143
2144         VALIDATE_STATE(state);
2145         mapped = ((file->f_mode & FMODE_WRITE) && dmabuf->mapped) ||
2146                 ((file->f_mode & FMODE_READ) && dmabuf->mapped);
2147         TRDBG("trident: trident_ioctl, command = %2d, arg = 0x%08x\n",
2148               _IOC_NR(cmd), arg ? *(int *)arg : 0);
2149
2150         switch (cmd) 
2151         {
2152         case OSS_GETVERSION:
2153                 ret = put_user(SOUND_VERSION, (int *)arg);
2154                 break;
2155                 
2156         case SNDCTL_DSP_RESET:
2157                 /* FIXME: spin_lock ? */
2158                 if (file->f_mode & FMODE_WRITE) {
2159                         stop_dac(state);
2160                         synchronize_irq(card->irq);
2161                         dmabuf->ready = 0;
2162                         dmabuf->swptr = dmabuf->hwptr = 0;
2163                         dmabuf->count = dmabuf->total_bytes = 0;
2164                 }
2165                 if (file->f_mode & FMODE_READ) {
2166                         stop_adc(state);
2167                         synchronize_irq(card->irq);
2168                         dmabuf->ready = 0;
2169                         dmabuf->swptr = dmabuf->hwptr = 0;
2170                         dmabuf->count = dmabuf->total_bytes = 0;
2171                 }
2172                 break;
2173
2174         case SNDCTL_DSP_SYNC:
2175                 if (file->f_mode & FMODE_WRITE)
2176                         ret = drain_dac(state, file->f_flags & O_NONBLOCK);
2177                 break;
2178
2179         case SNDCTL_DSP_SPEED: /* set smaple rate */
2180                 if (get_user(val, (int *)arg))
2181                 {
2182                         ret = -EFAULT;
2183                         break;
2184                 }
2185                 if (val >= 0) {
2186                         if (file->f_mode & FMODE_WRITE) {
2187                                 stop_dac(state);
2188                                 dmabuf->ready = 0;
2189                                 spin_lock_irqsave(&state->card->lock, flags);
2190                                 trident_set_dac_rate(state, val);
2191                                 spin_unlock_irqrestore(&state->card->lock, flags);
2192                         }
2193                         if (file->f_mode & FMODE_READ) {
2194                                 stop_adc(state);
2195                                 dmabuf->ready = 0;
2196                                 spin_lock_irqsave(&state->card->lock, flags);
2197                                 trident_set_adc_rate(state, val);
2198                                 spin_unlock_irqrestore(&state->card->lock, flags);
2199                         }
2200                 }
2201                 ret = put_user(dmabuf->rate, (int *)arg);
2202                 break;
2203
2204         case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
2205                 if (get_user(val, (int *)arg))
2206                 {
2207                         ret = -EFAULT;
2208                         break;
2209                 }
2210                 lock_set_fmt(state);
2211                 if (file->f_mode & FMODE_WRITE) {
2212                         stop_dac(state);
2213                         dmabuf->ready = 0;
2214                         if (val)
2215                                 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2216                         else
2217                                 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2218                 }
2219                 if (file->f_mode & FMODE_READ) {
2220                         stop_adc(state);
2221                         dmabuf->ready = 0;
2222                         if (val)
2223                                 dmabuf->fmt |= TRIDENT_FMT_STEREO;
2224                         else
2225                                 dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2226                 }
2227                 unlock_set_fmt(state);
2228                 break;
2229
2230         case SNDCTL_DSP_GETBLKSIZE:
2231                 if (file->f_mode & FMODE_WRITE) {
2232                         if ((val = prog_dmabuf(state, 0)))
2233                                 ret = val;
2234                         else
2235                                 ret = put_user(dmabuf->fragsize, (int *)arg);
2236                         break;
2237                 }
2238                 if (file->f_mode & FMODE_READ) {
2239                         if ((val = prog_dmabuf(state, 1)))
2240                                 ret = val;
2241                         else
2242                                 ret = put_user(dmabuf->fragsize, (int *)arg);
2243                         break;
2244                 }
2245
2246         case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
2247                 ret = put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
2248                 break;
2249
2250         case SNDCTL_DSP_SETFMT: /* Select sample format */
2251                 if (get_user(val, (int *)arg))
2252                 {
2253                         ret = -EFAULT;
2254                         break;
2255                 }
2256                 lock_set_fmt(state);
2257                 if (val != AFMT_QUERY) {
2258                         if (file->f_mode & FMODE_WRITE) {
2259                                 stop_dac(state);
2260                                 dmabuf->ready = 0;
2261                                 if (val == AFMT_S16_LE)
2262                                         dmabuf->fmt |= TRIDENT_FMT_16BIT;
2263                                 else
2264                                         dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2265                         }
2266                         if (file->f_mode & FMODE_READ) {
2267                                 stop_adc(state);
2268                                 dmabuf->ready = 0;
2269                                 if (val == AFMT_S16_LE)
2270                                         dmabuf->fmt |= TRIDENT_FMT_16BIT;
2271                                 else
2272                                         dmabuf->fmt &= ~TRIDENT_FMT_16BIT;
2273                         }
2274                 }
2275                 unlock_set_fmt(state);
2276                 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
2277                                 AFMT_S16_LE : AFMT_U8, (int *)arg);
2278                 break;
2279
2280         case SNDCTL_DSP_CHANNELS:
2281                 if (get_user(val, (int *)arg))
2282                 {
2283                         ret = -EFAULT;
2284                         break;
2285                 }
2286                 if (val != 0) {
2287                         lock_set_fmt(state);
2288                         if (file->f_mode & FMODE_WRITE) {
2289                                 stop_dac(state);
2290                                 dmabuf->ready = 0;
2291                                                                 
2292                                 //prevent from memory leak
2293                                 if ((state->chans_num > 2) && (state->chans_num != val)) {
2294                                         ali_free_other_states_resources(state);
2295                                         state->chans_num = 1;
2296                                 }
2297                                 
2298                                 if (val >= 2)
2299                                 {
2300
2301                                         dmabuf->fmt |= TRIDENT_FMT_STEREO;
2302                                         if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) {
2303
2304                                                 if( card->rec_channel_use_count > 0 )
2305                                                 {
2306                                                         printk(KERN_ERR "trident: Record is working on the card!\n");
2307                                                         ret = -EBUSY;
2308                                                         unlock_set_fmt(state); 
2309                                                         break;
2310                                                 }
2311
2312                                                 ret = ali_setup_multi_channels(state->card, 6);
2313                                                 if (ret < 0) {
2314                                                         unlock_set_fmt(state);
2315                                                         break;
2316                                                 }
2317                                                 down(&state->card->open_sem);
2318                                                 ret = ali_allocate_other_states_resources(state, 6);
2319                                                 if (ret < 0) {
2320                                                         up(&state->card->open_sem);
2321                                                         unlock_set_fmt(state);
2322                                                         break;
2323                                                 }
2324                                                 state->card->multi_channel_use_count ++;
2325                                                 up(&state->card->open_sem);
2326                                         }
2327                                         else val = 2;   /*yield to 2-channels*/
2328                                 }
2329                                 else
2330                                         dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2331                                 state->chans_num = val;
2332                         }
2333                         if (file->f_mode & FMODE_READ) {
2334                                 stop_adc(state);
2335                                 dmabuf->ready = 0;
2336                                 if (val >= 2) {
2337                                         if (!((file->f_mode & FMODE_WRITE) && (val == 6)))
2338                                                 val = 2;
2339                                         dmabuf->fmt |= TRIDENT_FMT_STEREO;
2340                                 }
2341                                 else
2342                                         dmabuf->fmt &= ~TRIDENT_FMT_STEREO;
2343                                 state->chans_num = val;
2344                         }
2345                         unlock_set_fmt(state);
2346                 }
2347                 ret = put_user(val, (int *)arg);
2348                 break;
2349
2350         case SNDCTL_DSP_POST:
2351                 /* Cause the working fragment to be output */
2352                 break;
2353
2354         case SNDCTL_DSP_SUBDIVIDE:
2355                 if (dmabuf->subdivision)
2356                 {
2357                         ret = -EINVAL;
2358                         break;
2359                 }
2360                 if (get_user(val, (int *)arg))
2361                 {
2362                         ret = -EFAULT;
2363                         break;
2364                 }
2365                 if (val != 1 && val != 2 && val != 4)
2366                 {
2367                         ret = -EINVAL;
2368                         break;
2369                 }
2370                 dmabuf->subdivision = val;
2371                 break;
2372
2373         case SNDCTL_DSP_SETFRAGMENT:
2374                 if (get_user(val, (int *)arg))
2375                 {
2376                         ret = -EFAULT;
2377                         break;
2378                 }
2379
2380                 dmabuf->ossfragshift = val & 0xffff;
2381                 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2382                 if (dmabuf->ossfragshift < 4)
2383                         dmabuf->ossfragshift = 4;
2384                 if (dmabuf->ossfragshift > 15)
2385                         dmabuf->ossfragshift = 15;
2386                 if (dmabuf->ossmaxfrags < 4)
2387                         dmabuf->ossmaxfrags = 4;
2388
2389                 break;
2390
2391         case SNDCTL_DSP_GETOSPACE:
2392                 if (!(file->f_mode & FMODE_WRITE))
2393                 {
2394                         ret = -EINVAL;
2395                         break;
2396                 }
2397                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2398                 { 
2399                         ret = val;
2400                         break;
2401                 }
2402                 spin_lock_irqsave(&state->card->lock, flags);
2403                 trident_update_ptr(state);
2404                 abinfo.fragsize = dmabuf->fragsize;
2405                 abinfo.bytes = dmabuf->dmasize - dmabuf->count;
2406                 abinfo.fragstotal = dmabuf->numfrag;
2407                 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2408                 spin_unlock_irqrestore(&state->card->lock, flags);
2409                 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2410                 break;
2411
2412         case SNDCTL_DSP_GETISPACE:
2413                 if (!(file->f_mode & FMODE_READ))
2414                 {
2415                         ret = -EINVAL;
2416                         break;
2417                 }
2418                 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2419                 {
2420                         ret = val;
2421                         break;
2422                 }
2423                 spin_lock_irqsave(&state->card->lock, flags);
2424                 trident_update_ptr(state);
2425                 abinfo.fragsize = dmabuf->fragsize;
2426                 abinfo.bytes = dmabuf->count;
2427                 abinfo.fragstotal = dmabuf->numfrag;
2428                 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift;
2429                 spin_unlock_irqrestore(&state->card->lock, flags);
2430                 ret = copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2431                 break;
2432
2433         case SNDCTL_DSP_NONBLOCK:
2434                 file->f_flags |= O_NONBLOCK;
2435                 break;
2436
2437         case SNDCTL_DSP_GETCAPS:
2438                 ret = put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
2439                             (int *)arg);
2440                 break;
2441
2442         case SNDCTL_DSP_GETTRIGGER:
2443                 val = 0;
2444                 if ((file->f_mode & FMODE_READ) && dmabuf->enable)
2445                         val |= PCM_ENABLE_INPUT;
2446                 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable)
2447                         val |= PCM_ENABLE_OUTPUT;
2448                 ret = put_user(val, (int *)arg);
2449                 break;
2450
2451         case SNDCTL_DSP_SETTRIGGER:
2452                 if (get_user(val, (int *)arg))
2453                 {
2454                         ret = -EFAULT;
2455                         break;
2456                 }
2457                 if (file->f_mode & FMODE_READ) {
2458                         if (val & PCM_ENABLE_INPUT) {
2459                                 if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
2460                                         break;
2461                                 start_adc(state);
2462                         } else
2463                                 stop_adc(state);
2464                 }
2465                 if (file->f_mode & FMODE_WRITE) {
2466                         if (val & PCM_ENABLE_OUTPUT) {
2467                                 if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
2468                                         break;
2469                                 start_dac(state);
2470                         } else
2471                                 stop_dac(state);
2472                 }
2473                 break;
2474
2475         case SNDCTL_DSP_GETIPTR:
2476                 if (!(file->f_mode & FMODE_READ))
2477                 {
2478                         ret = -EINVAL;
2479                         break;
2480                 }
2481                 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2482                 {
2483                         ret = val;
2484                         break;
2485                 }
2486                 spin_lock_irqsave(&state->card->lock, flags);
2487                 trident_update_ptr(state);
2488                 cinfo.bytes = dmabuf->total_bytes;
2489                 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2490                 cinfo.ptr = dmabuf->hwptr;
2491                 if (dmabuf->mapped)
2492                         dmabuf->count &= dmabuf->fragsize-1;
2493                 spin_unlock_irqrestore(&state->card->lock, flags);
2494                 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo))?-EFAULT:0;
2495                 break;
2496
2497         case SNDCTL_DSP_GETOPTR:
2498                 if (!(file->f_mode & FMODE_WRITE))
2499                 {
2500                         ret = -EINVAL;
2501                         break;
2502                 }
2503                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2504                 {
2505                         ret = val;
2506                         break;
2507                 }
2508                 
2509                 spin_lock_irqsave(&state->card->lock, flags);
2510                 trident_update_ptr(state);
2511                 cinfo.bytes = dmabuf->total_bytes;
2512                 cinfo.blocks = dmabuf->count >> dmabuf->fragshift;
2513                 cinfo.ptr = dmabuf->hwptr;
2514                 if (dmabuf->mapped)
2515                         dmabuf->count &= dmabuf->fragsize-1;
2516                 spin_unlock_irqrestore(&state->card->lock, flags);
2517                 ret = copy_to_user((void *)arg, &cinfo, sizeof(cinfo))?-EFAULT:0;
2518                 break;
2519
2520         case SNDCTL_DSP_SETDUPLEX:
2521                 ret = -EINVAL;
2522                 break;
2523
2524         case SNDCTL_DSP_GETODELAY:
2525                 if (!(file->f_mode & FMODE_WRITE))
2526                 {
2527                         ret = -EINVAL;
2528                         break;
2529                 }
2530                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2531                 {
2532                         ret = val;
2533                         break;
2534                 }
2535                 spin_lock_irqsave(&state->card->lock, flags);
2536                 trident_update_ptr(state);
2537                 val = dmabuf->count;
2538                 spin_unlock_irqrestore(&state->card->lock, flags);
2539                 ret = put_user(val, (int *)arg);
2540                 break;
2541
2542         case SOUND_PCM_READ_RATE:
2543                 ret = put_user(dmabuf->rate, (int *)arg);
2544                 break;
2545
2546         case SOUND_PCM_READ_CHANNELS:
2547                 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1,
2548                                 (int *)arg);
2549                 break;
2550
2551         case SOUND_PCM_READ_BITS:
2552                 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ?
2553                                 AFMT_S16_LE : AFMT_U8, (int *)arg);
2554                 break;
2555
2556         case SNDCTL_DSP_GETCHANNELMASK:
2557                 ret = put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE,
2558                                 (int *)arg);
2559                 break;
2560
2561         case SNDCTL_DSP_BIND_CHANNEL:
2562                 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018)
2563                 {
2564                         ret = -EINVAL;
2565                         break;
2566                 }
2567
2568                 if (get_user(val, (int *)arg))
2569                 {
2570                         ret = -EFAULT;
2571                         break;
2572                 }
2573                 if (val == DSP_BIND_QUERY) {
2574                         val = dmabuf->channel->attribute | 0x3c00;
2575                         val = attr2mask[val >> 8];
2576                 } else {
2577                         dmabuf->ready = 0;
2578                         if (file->f_mode & FMODE_READ)
2579                                 dmabuf->channel->attribute = (CHANNEL_REC|SRC_ENABLE);
2580                         if (file->f_mode & FMODE_WRITE)
2581                                 dmabuf->channel->attribute = (CHANNEL_SPC_PB|SRC_ENABLE);
2582                         dmabuf->channel->attribute |= mask2attr[ffs(val)];
2583                 }
2584                 ret = put_user(val, (int *)arg);
2585                 break;
2586
2587         case SNDCTL_DSP_MAPINBUF:
2588         case SNDCTL_DSP_MAPOUTBUF:
2589         case SNDCTL_DSP_SETSYNCRO:
2590         case SOUND_PCM_WRITE_FILTER:
2591         case SOUND_PCM_READ_FILTER:
2592         default:
2593                 ret = -EINVAL;
2594                 break;
2595                 
2596         }
2597         return ret;
2598 }
2599
2600 static int trident_open(struct inode *inode, struct file *file)
2601 {
2602         int i = 0;
2603         int minor = minor(inode->i_rdev);
2604         struct trident_card *card = devs;
2605         struct trident_state *state = NULL;
2606         struct dmabuf *dmabuf = NULL;
2607         
2608         /* Added by Matt Wu 01-05-2001 */
2609         if(file->f_mode & FMODE_READ)
2610         {
2611                 if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2612                         if (card->multi_channel_use_count > 0)
2613                                 return -EBUSY;
2614                 }
2615         }
2616
2617         /* find an available virtual channel (instance of /dev/dsp) */
2618         while (card != NULL) {
2619                 down(&card->open_sem);
2620                 if(file->f_mode & FMODE_READ)
2621                 {
2622                         /* Skip opens on cards that are in 6 channel mode */
2623                         if (card->multi_channel_use_count > 0)
2624                         {
2625                                 up(&card->open_sem);
2626                                 card = card->next;
2627                                 continue;
2628                         }
2629                 }
2630                 for (i = 0; i < NR_HW_CH; i++) {
2631                         if (card->states[i] == NULL) {
2632                                 state = card->states[i] = (struct trident_state *)
2633                                         kmalloc(sizeof(struct trident_state), GFP_KERNEL);
2634                                 if (state == NULL) {
2635                                         return -ENOMEM;
2636                                 }
2637                                 memset(state, 0, sizeof(struct trident_state));
2638                                 init_MUTEX(&state->sem);
2639                                 dmabuf = &state->dmabuf;
2640                                 goto found_virt;
2641                         }
2642                 }
2643                 up(&card->open_sem);
2644                 card = card->next;
2645         }
2646         /* no more virtual channel avaiable */
2647         if (!state) {
2648                 return -ENODEV;
2649         }
2650  found_virt:
2651         /* found a free virtual channel, allocate hardware channels */
2652         if(file->f_mode & FMODE_READ)
2653                 dmabuf->channel = card->alloc_rec_pcm_channel(card);
2654         else
2655                 dmabuf->channel = card->alloc_pcm_channel(card);
2656                 
2657         if (dmabuf->channel == NULL) {
2658                 kfree (card->states[i]);
2659                 card->states[i] = NULL;
2660                 return -ENODEV;
2661         }
2662
2663         /* initialize the virtual channel */
2664         state->virt = i;
2665         state->card = card;
2666         state->magic = TRIDENT_STATE_MAGIC;
2667         init_waitqueue_head(&dmabuf->wait);
2668         file->private_data = state;
2669
2670         /* set default sample format. According to OSS Programmer's Guide  /dev/dsp
2671            should be default to unsigned 8-bits, mono, with sample rate 8kHz and
2672            /dev/dspW will accept 16-bits sample */
2673         if (file->f_mode & FMODE_WRITE) {
2674                 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2675                 if ((minor & 0x0f) == SND_DEV_DSP16)
2676                         dmabuf->fmt |= TRIDENT_FMT_16BIT;
2677                 dmabuf->ossfragshift = 0;
2678                 dmabuf->ossmaxfrags  = 0;
2679                 dmabuf->subdivision  = 0;
2680                 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2681                         /* set default channel attribute to normal playback */
2682                         dmabuf->channel->attribute = CHANNEL_PB;
2683                 }
2684                 trident_set_dac_rate(state, 8000);
2685         }
2686
2687         if (file->f_mode & FMODE_READ) {
2688                 /* FIXME: Trident 4d can only record in signed 16-bits stereo, 48kHz sample,
2689                    to be dealed with in trident_set_adc_rate() ?? */
2690                 dmabuf->fmt &= ~TRIDENT_FMT_MASK;
2691                 if ((minor & 0x0f) == SND_DEV_DSP16)
2692                         dmabuf->fmt |= TRIDENT_FMT_16BIT;
2693                 dmabuf->ossfragshift = 0;
2694                 dmabuf->ossmaxfrags  = 0;
2695                 dmabuf->subdivision  = 0;
2696                 if (card->pci_id == PCI_DEVICE_ID_SI_7018) {
2697                         /* set default channel attribute to 0x8a80, record from
2698                            PCM L/R FIFO and mono = (left + right + 1)/2*/
2699                         dmabuf->channel->attribute =
2700                                 (CHANNEL_REC|PCM_LR|MONO_MIX);
2701                 }
2702                 trident_set_adc_rate(state, 8000);
2703         
2704                 /* Added by Matt Wu 01-05-2001 */
2705                 if(card->pci_id == PCI_DEVICE_ID_ALI_5451)
2706                         card->rec_channel_use_count ++;
2707         }
2708
2709         state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2710         up(&card->open_sem);
2711
2712         TRDBG("trident: open virtual channel %d, hard channel %d\n", 
2713               state->virt, dmabuf->channel->num);
2714
2715         return 0;
2716 }
2717
2718 static int trident_release(struct inode *inode, struct file *file)
2719 {
2720         struct trident_state *state = (struct trident_state *)file->private_data;
2721         struct trident_card *card;
2722         struct dmabuf *dmabuf;
2723
2724         lock_kernel();
2725         card = state->card;
2726         dmabuf = &state->dmabuf;
2727         VALIDATE_STATE(state);
2728
2729         if (file->f_mode & FMODE_WRITE) {
2730                 trident_clear_tail(state);
2731                 drain_dac(state, file->f_flags & O_NONBLOCK);
2732         }
2733
2734         TRDBG("trident: closing virtual channel %d, hard channel %d\n", 
2735               state->virt, dmabuf->channel->num);
2736
2737         /* stop DMA state machine and free DMA buffers/channels */
2738         down(&card->open_sem);
2739
2740         if (file->f_mode & FMODE_WRITE) {
2741                 stop_dac(state);
2742                 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2743                 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2744
2745                 /* Added by Matt Wu */
2746                 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2747                         if (state->chans_num > 2) {
2748                                 if (card->multi_channel_use_count-- < 0)
2749                                         card->multi_channel_use_count = 0;
2750                                 if (card->multi_channel_use_count == 0)
2751                                         ali_close_multi_channels();
2752                                 ali_free_other_states_resources(state);
2753                         }
2754                 }
2755         }
2756         if (file->f_mode & FMODE_READ) {
2757                 stop_adc(state);
2758                 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev);
2759                 state->card->free_pcm_channel(state->card, dmabuf->channel->num);
2760
2761                 /* Added by Matt Wu */
2762                 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
2763                         if( card->rec_channel_use_count-- < 0 )
2764                                 card->rec_channel_use_count = 0;
2765                 }
2766         }
2767
2768         card->states[state->virt] = NULL;
2769         kfree(state);
2770
2771         /* we're covered by the open_sem */
2772         up(&card->open_sem);
2773         unlock_kernel();
2774
2775         return 0;
2776 }
2777
2778 static /*const*/ struct file_operations trident_audio_fops = {
2779         .owner          = THIS_MODULE,
2780         .llseek         = no_llseek,
2781         .read           = trident_read,
2782         .write          = trident_write,
2783         .poll           = trident_poll,
2784         .ioctl          = trident_ioctl,
2785         .mmap           = trident_mmap,
2786         .open           = trident_open,
2787         .release        = trident_release,
2788 };
2789
2790 /* trident specific AC97 functions */
2791 /* Write AC97 codec registers */
2792 static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val)
2793 {
2794         struct trident_card *card = (struct trident_card *)codec->private_data;
2795         unsigned int address, mask, busy;
2796         unsigned short count  = 0xffff;
2797         unsigned long flags;
2798         u32 data;
2799
2800         data = ((u32) val) << 16;
2801
2802         switch (card->pci_id)
2803         {
2804         default:
2805         case PCI_DEVICE_ID_SI_7018:
2806                 address = SI_AC97_WRITE;
2807                 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY;
2808                 if (codec->id)
2809                         mask |= SI_AC97_SECONDARY;
2810                 busy = SI_AC97_BUSY_WRITE;
2811                 break;
2812         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2813                 address = DX_ACR0_AC97_W;
2814                 mask = busy = DX_AC97_BUSY_WRITE;
2815                 break;
2816         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2817                 address = NX_ACR1_AC97_W;
2818                 mask = NX_AC97_BUSY_WRITE;
2819                 if (codec->id)
2820                         mask |= NX_AC97_WRITE_SECONDARY;
2821                 busy = NX_AC97_BUSY_WRITE;
2822                 break;
2823         case PCI_DEVICE_ID_INTERG_5050:
2824                 address = SI_AC97_WRITE;
2825                 mask = busy = SI_AC97_BUSY_WRITE;
2826                 if (codec->id)
2827                         mask |= SI_AC97_SECONDARY;
2828                 break;
2829         }
2830
2831         spin_lock_irqsave(&card->lock, flags);
2832         do {
2833                 if ((inw(TRID_REG(card, address)) & busy) == 0)
2834                         break;
2835         } while (count--);
2836
2837
2838         data |= (mask | (reg & AC97_REG_ADDR));
2839
2840         if (count == 0) {
2841                 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
2842                 spin_unlock_irqrestore(&card->lock, flags);
2843                 return;
2844         }
2845
2846         outl(data, TRID_REG(card, address));
2847         spin_unlock_irqrestore(&card->lock, flags);
2848 }
2849
2850 /* Read AC97 codec registers */
2851 static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg)
2852 {
2853         struct trident_card *card = (struct trident_card *)codec->private_data;
2854         unsigned int address, mask, busy;
2855         unsigned short count = 0xffff;
2856         unsigned long flags;
2857         u32 data;
2858
2859         switch (card->pci_id)
2860         {
2861         default:
2862         case PCI_DEVICE_ID_SI_7018:
2863                 address = SI_AC97_READ;
2864                 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY;
2865                 if (codec->id)
2866                         mask |= SI_AC97_SECONDARY;
2867                 busy = SI_AC97_BUSY_READ;
2868                 break;
2869         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
2870                 address = DX_ACR1_AC97_R;
2871                 mask = busy = DX_AC97_BUSY_READ;
2872                 break;
2873         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
2874                 if (codec->id)
2875                         address = NX_ACR3_AC97_R_SECONDARY;
2876                 else
2877                         address = NX_ACR2_AC97_R_PRIMARY;
2878                 mask = NX_AC97_BUSY_READ;
2879                 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA;
2880                 break;
2881         case PCI_DEVICE_ID_INTERG_5050:
2882                 address = SI_AC97_READ;
2883                 mask = busy = SI_AC97_BUSY_READ;
2884                 if (codec->id)
2885                         mask |= SI_AC97_SECONDARY;
2886                 break;
2887         }
2888
2889         data = (mask | (reg & AC97_REG_ADDR));
2890
2891         spin_lock_irqsave(&card->lock, flags);
2892         outl(data, TRID_REG(card, address));
2893         do {
2894                 data = inl(TRID_REG(card, address));
2895                 if ((data & busy) == 0)
2896                         break;
2897         } while (count--);
2898         spin_unlock_irqrestore(&card->lock, flags);
2899
2900         if (count == 0) {
2901                 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n");
2902                 data = 0;
2903         }
2904         return ((u16) (data >> 16));
2905 }
2906
2907 /* rewrite ac97 read and write mixer register by hulei for ALI*/
2908 static int acquirecodecaccess(struct trident_card *card)
2909 {
2910         u16 wsemamask=0x6000; /* bit 14..13 */
2911         u16 wsemabits;
2912         u16 wcontrol ;
2913         int block = 0;
2914         int ncount = 25;
2915         while (1) {
2916                 wcontrol = inw(TRID_REG(card,  ALI_AC97_WRITE));
2917                 wsemabits = wcontrol & wsemamask;
2918                 
2919                 if (wsemabits==0x4000)
2920                         return 1; /* 0x4000 is audio ,then success */
2921                 if (ncount-- < 0)
2922                         break;
2923                 if (wsemabits == 0)
2924                 {
2925                 unlock:
2926                         outl(((u32)(wcontrol & 0x1eff)|0x00004000), TRID_REG(card, ALI_AC97_WRITE));
2927                         continue;
2928                 }
2929                 udelay(20);
2930         }
2931         if(!block)
2932         {
2933                 TRDBG("accesscodecsemaphore: try unlock\n");
2934                 block = 1;
2935                 goto unlock;
2936         }
2937         return 0;
2938 }
2939
2940 static void releasecodecaccess(struct trident_card *card)
2941
2942         unsigned long wcontrol;
2943         wcontrol = inl(TRID_REG(card,  ALI_AC97_WRITE));
2944         outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE));
2945 }
2946
2947 static int waitforstimertick(struct trident_card *card)
2948 {
2949         unsigned long chk1, chk2;
2950         unsigned int wcount = 0xffff;
2951         chk1 = inl(TRID_REG(card,  ALI_STIMER));
2952         
2953         while(1) {
2954                 chk2 = inl(TRID_REG(card,  ALI_STIMER));
2955                 if( (wcount > 0) && chk1 != chk2)
2956                         return 1;
2957                 if(wcount <= 0)
2958                         break;
2959                 udelay(50);
2960         }
2961         return 0;
2962 }
2963
2964 /* Read AC97 codec registers for ALi*/
2965 static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg)
2966 {
2967         unsigned int address, mask;
2968         unsigned int ncount;
2969         unsigned long aud_reg;
2970         u32 data;
2971         u16 wcontrol;
2972         unsigned long flags;
2973
2974         if(!card)
2975                 BUG();
2976
2977         address = ALI_AC97_READ;
2978         if (card->revision == ALI_5451_V02) {
2979                 address = ALI_AC97_WRITE;
2980         }
2981         mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY;
2982         if (secondary)
2983                 mask |= ALI_AC97_SECONDARY;
2984     
2985         spin_lock_irqsave(&card->lock, flags);
2986         
2987         if (!acquirecodecaccess(card))
2988                 printk(KERN_ERR "access codec fail\n");
2989         
2990         wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
2991         wcontrol &= 0xfe00;
2992         wcontrol |= (0x8000|reg);
2993         outw(wcontrol,TRID_REG(card,  ALI_AC97_WRITE));
2994
2995         data = (mask | (reg & AC97_REG_ADDR));
2996         
2997         if(!waitforstimertick(card)) {
2998                 printk(KERN_ERR "ali_ac97_read: BIT_CLOCK is dead\n");
2999                 goto releasecodec;
3000         }
3001         
3002         udelay(20);             
3003         
3004         ncount=10;
3005         
3006         while(1) {
3007                 if ((inw(TRID_REG(card,ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ) != 0)
3008                         break;
3009                 if(ncount <=0)
3010                         break;
3011                 if(ncount--==1) {
3012                         TRDBG("ali_ac97_read :try clear busy flag\n");
3013                         aud_reg = inl(TRID_REG(card,  ALI_AC97_WRITE));
3014                         outl((aud_reg & 0xffff7fff), TRID_REG(card, ALI_AC97_WRITE));
3015                 }
3016                 udelay(10);
3017         }
3018         
3019         data = inl(TRID_REG(card, address));
3020         
3021         return ((u16) (data >> 16));
3022
3023  releasecodec: 
3024         releasecodecaccess(card);
3025         spin_unlock_irqrestore(&card->lock, flags);
3026         printk(KERN_ERR "ali_ac97_read: AC97 CODEC read timed out.\n");
3027         return 0;
3028 }
3029
3030
3031 /* Write AC97 codec registers for hulei*/
3032 static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val)
3033 {
3034         unsigned int address, mask;
3035         unsigned int ncount;
3036         u32 data;
3037         u16 wcontrol;
3038         unsigned long flags;
3039         
3040         data = ((u32) val) << 16;
3041         
3042         if(!card)
3043                 BUG();
3044         
3045         address = ALI_AC97_WRITE;
3046         mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY;
3047         if (secondary)
3048                 mask |= ALI_AC97_SECONDARY;
3049         if (card->revision == ALI_5451_V02)
3050                 mask |= ALI_AC97_WRITE_MIXER_REGISTER;
3051                 
3052         spin_lock_irqsave(&card->lock, flags);
3053         if (!acquirecodecaccess(card))      
3054                 printk(KERN_ERR "ali_ac97_write: access codec fail\n");
3055                         
3056         wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3057         wcontrol &= 0xff00;
3058         wcontrol |= (0x8100|reg);/* bit 8=1: (ali1535 )reserved /ali1535+ write */
3059         outl(( data |wcontrol), TRID_REG(card,ALI_AC97_WRITE ));
3060
3061         if(!waitforstimertick(card)) {
3062                 printk(KERN_ERR "BIT_CLOCK is dead\n");
3063                 goto releasecodec;
3064         }
3065         
3066         ncount = 10;
3067         while(1) {
3068                 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE));
3069                 if(!(wcontrol & 0x8000))
3070                         break;
3071                 if(ncount <= 0)
3072                         break;
3073                 if(ncount-- == 1) {
3074                         TRDBG("ali_ac97_set :try clear busy flag!!\n");
3075                         outw(wcontrol & 0x7fff, TRID_REG(card, ALI_AC97_WRITE));
3076                 }
3077                 udelay(10);
3078         }
3079         
3080  releasecodec:
3081         releasecodecaccess(card);
3082         spin_unlock_irqrestore(&card->lock, flags);
3083         return;
3084 }
3085
3086 static void ali_enable_special_channel(struct trident_state *stat)
3087 {
3088         struct trident_card *card = stat->card;
3089         unsigned long s_channels;
3090         
3091         s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3092         s_channels |= (1<<stat->dmabuf.channel->num);
3093         outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL));
3094 }
3095
3096 static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg)
3097 {
3098         int id;
3099         u16 data;
3100         struct trident_card *card = NULL;
3101
3102         /* Added by Matt Wu */
3103         if (!codec)
3104                 BUG();
3105                 
3106         card = (struct trident_card *)codec->private_data;
3107
3108         if(!card->mixer_regs_ready)
3109                 return ali_ac97_get(card, codec->id, reg);
3110
3111         /*
3112          *      FIXME: need to stop this caching some registers
3113          */
3114         if(codec->id)
3115                 id = 1;
3116         else
3117                 id = 0;
3118
3119         data = card->mixer_regs[reg/2][id];
3120         return data;
3121 }
3122
3123 static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val)
3124 {
3125         int id;
3126         struct trident_card *card;
3127
3128         /*  Added by Matt Wu */
3129         if (!codec)
3130                 BUG();
3131                 
3132         card = (struct trident_card *)codec->private_data;
3133
3134         if (!card->mixer_regs_ready)
3135         {
3136                 ali_ac97_set(card, codec->id, reg, val);
3137                 return;
3138         }
3139
3140         if(codec->id)
3141                 id = 1;
3142         else
3143                 id = 0;
3144
3145         card->mixer_regs[reg/2][id] = val;
3146         ali_ac97_set(card, codec->id, reg, val);
3147 }
3148
3149 /*
3150 flag:   ALI_SPDIF_OUT_TO_SPDIF_OUT
3151         ALI_PCM_TO_SPDIF_OUT
3152 */
3153
3154 static void ali_setup_spdif_out(struct trident_card *card, int flag)
3155 {
3156         unsigned long spdif;
3157         unsigned char ch;
3158
3159         char temp;
3160         struct pci_dev *pci_dev = NULL;
3161
3162         pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3163         if (pci_dev == NULL)
3164                 return;
3165         pci_read_config_byte(pci_dev, 0x61, &temp);
3166         temp |= 0x40;
3167         pci_write_config_byte(pci_dev, 0x61, temp);
3168         pci_read_config_byte(pci_dev, 0x7d, &temp);
3169         temp |= 0x01;
3170         pci_write_config_byte(pci_dev, 0x7d, temp);
3171         pci_read_config_byte(pci_dev, 0x7e, &temp);
3172         temp &= (~0x20);
3173         temp |= 0x10;
3174         pci_write_config_byte(pci_dev, 0x7e, temp);
3175
3176         ch = inb(TRID_REG(card, ALI_SCTRL));
3177         outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL));
3178         ch = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3179         outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL));
3180    
3181         if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) {
3182                 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3183                 spdif |= ALI_SPDIF_OUT_CH_ENABLE;
3184                 spdif &= ALI_SPDIF_OUT_SEL_SPDIF;
3185                 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3186                 spdif = inw(TRID_REG(card, ALI_SPDIF_CS));
3187                 if (flag & ALI_SPDIF_OUT_NON_PCM)
3188                         spdif |= 0x0002;
3189                 else    spdif &= (~0x0002);
3190                 outw(spdif, TRID_REG(card, ALI_SPDIF_CS));
3191         }
3192         else {
3193                 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
3194                 spdif |= ALI_SPDIF_OUT_SEL_PCM;
3195                 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3196         }
3197 }
3198
3199 static void ali_disable_special_channel(struct trident_card *card, int ch)
3200 {
3201         unsigned long sc;
3202         
3203         sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3204         sc &= ~(1 << ch);
3205         outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL));
3206 }
3207
3208 static void ali_disable_spdif_in(struct trident_card *card)
3209 {
3210         unsigned long spdif;
3211         
3212         spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3213         spdif &= (~ALI_SPDIF_IN_SUPPORT);
3214         outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3215         
3216         ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL);        
3217 }
3218
3219 static void ali_setup_spdif_in(struct trident_card *card)
3220 {       
3221         unsigned long spdif;
3222
3223         //Set SPDIF IN Supported
3224         spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3225         spdif |= ALI_SPDIF_IN_SUPPORT;
3226         outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3227
3228         //Set SPDIF IN Rec
3229         spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL));
3230         spdif |= ALI_SPDIF_IN_CH_ENABLE;
3231         outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL));
3232
3233         spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3234         spdif |= ALI_SPDIF_IN_CH_STATUS;
3235         outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3236 /*
3237         spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL));
3238         spdif |= ALI_SPDIF_IN_FUNC_ENABLE;
3239         outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL));
3240 */
3241 }
3242
3243 static void ali_delay(struct trident_card *card,int interval)
3244 {
3245         unsigned long  begintimer,currenttimer;
3246
3247         begintimer   = inl(TRID_REG(card,  ALI_STIMER));
3248         currenttimer = inl(TRID_REG(card,  ALI_STIMER));
3249
3250         while (currenttimer < begintimer + interval)
3251                 currenttimer = inl(TRID_REG(card,  ALI_STIMER));
3252 }
3253
3254 static void ali_detect_spdif_rate(struct trident_card *card)
3255 {
3256         u16 wval  = 0;
3257         u16 count = 0;
3258         u8  bval = 0, R1 = 0, R2 = 0;
3259
3260         bval  = inb(TRID_REG(card,ALI_SPDIF_CTRL));
3261         bval |= 0x02;
3262         outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
3263
3264         bval  = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3265         bval |= 0x1F;
3266         outb(bval,TRID_REG(card,ALI_SPDIF_CTRL + 1));
3267
3268         while (((R1 < 0x0B )||(R1 > 0x0E)) && (R1 != 0x12) && count <= 50000)
3269         {
3270                 count ++;
3271
3272                 ali_delay(card, 6);
3273
3274                 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3275                 R1 = bval & 0x1F;
3276         }
3277
3278         if (count > 50000)
3279         {
3280                 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n");
3281                 return;
3282         }
3283
3284         count = 0;
3285
3286         while (count <= 50000)
3287         {
3288                 count ++;
3289
3290                 ali_delay(card, 6);
3291
3292                 bval = inb(TRID_REG(card,ALI_SPDIF_CTRL + 1));
3293                 R2 = bval & 0x1F;
3294
3295                 if(R2 != R1)
3296                         R1 = R2;
3297                 else
3298                         break;
3299         }
3300
3301         if (count > 50000)
3302         {
3303                 printk(KERN_WARNING "trident: Error in ali_detect_spdif_rate!\n");
3304                 return;
3305         }
3306
3307         switch (R2)
3308         {
3309         case 0x0b:
3310         case 0x0c:
3311         case 0x0d:
3312         case 0x0e:
3313                 wval  = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2));
3314                 wval &= 0xE0F0;
3315                 wval |= (u16)0x09 << 8 | (u16)0x05;
3316                 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2));
3317
3318                 bval  = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0;
3319                 outb(bval|0x02,TRID_REG(card,ALI_SPDIF_CS + 3));
3320                 break;
3321
3322         case 0x12:
3323                 wval  = inw(TRID_REG(card,ALI_SPDIF_CTRL + 2));
3324                 wval &= 0xE0F0;
3325                 wval |= (u16)0x0E << 8 | (u16)0x08;
3326                 outw(wval,TRID_REG(card,ALI_SPDIF_CTRL + 2));
3327
3328                 bval  = inb(TRID_REG(card,ALI_SPDIF_CS +3)) & 0xF0;
3329                 outb(bval|0x03,TRID_REG(card,ALI_SPDIF_CS + 3));
3330                 break;
3331
3332         default:
3333                 break;
3334         }
3335
3336 }
3337
3338 static unsigned int ali_get_spdif_in_rate(struct trident_card *card)
3339 {
3340         u32     dwRate = 0;
3341         u8      bval = 0;
3342
3343         ali_detect_spdif_rate(card);
3344
3345         bval  = inb(TRID_REG(card,ALI_SPDIF_CTRL));
3346         bval &= 0x7F;
3347         bval |= 0x40;
3348         outb(bval,TRID_REG(card,ALI_SPDIF_CTRL));
3349
3350         bval  = inb(TRID_REG(card,ALI_SPDIF_CS + 3));
3351         bval &= 0x0F;
3352
3353         switch (bval)
3354         {
3355         case 0:
3356                 dwRate = 44100;
3357                 break;
3358         case 1:
3359                 dwRate = 48000;
3360                 break;
3361         case 2:
3362                 dwRate = 32000;
3363                 break;
3364         default:
3365                 // Error occurs
3366                 break;
3367         }
3368
3369         return dwRate;
3370         
3371 }
3372
3373 static int ali_close_multi_channels(void)
3374 {
3375         char temp = 0;
3376         struct pci_dev *pci_dev = NULL;
3377
3378         pci_dev = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev);
3379         if (pci_dev == NULL)
3380                 return -1;
3381         pci_read_config_byte(pci_dev, 0x59, &temp);
3382         temp &= ~0x80;
3383         pci_write_config_byte(pci_dev, 0x59, temp);
3384         
3385         pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev);
3386         if (pci_dev == NULL)
3387                 return -1;
3388
3389         pci_read_config_byte(pci_dev, 0xB8, &temp);
3390         temp &= ~0x20;
3391         pci_write_config_byte(pci_dev, 0xB8, temp);
3392
3393         return 0;
3394 }
3395
3396 static int ali_setup_multi_channels(struct trident_card *card, int chan_nums)
3397 {
3398         unsigned long dwValue;
3399         char temp = 0;
3400         struct pci_dev *pci_dev = NULL;
3401
3402         pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3403         if (pci_dev == NULL)
3404                 return -1;
3405         pci_read_config_byte(pci_dev, 0x59, &temp);
3406         temp |= 0x80;
3407         pci_write_config_byte(pci_dev, 0x59, temp);
3408         
3409         pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, pci_dev);
3410         if (pci_dev == NULL)
3411                 return -1;
3412         pci_read_config_byte(pci_dev, (int)0xB8, &temp);
3413         temp |= 0x20;
3414         pci_write_config_byte(pci_dev, (int)0xB8,(u8) temp);
3415         if (chan_nums == 6) {
3416                 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000;
3417                 outl(dwValue, TRID_REG(card, ALI_SCTRL));
3418                 mdelay(4);
3419                 dwValue = inl(TRID_REG(card, ALI_SCTRL));
3420                 if (dwValue & 0x2000000) {
3421                         ali_ac97_write(card->ac97_codec[0], 0x02, 8080);
3422                         ali_ac97_write(card->ac97_codec[0], 0x36, 0);
3423                         ali_ac97_write(card->ac97_codec[0], 0x38, 0);
3424                         /*
3425                          *      On a board with a single codec you won't get the
3426                          *      surround. On other boards configure it.
3427                          */
3428                         if(card->ac97_codec[1]!=NULL)
3429                         {
3430                                 ali_ac97_write(card->ac97_codec[1], 0x36, 0);
3431                                 ali_ac97_write(card->ac97_codec[1], 0x38, 0);
3432                                 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606);
3433                                 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303);
3434                                 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3);
3435                         }
3436                         return 1;
3437                 }
3438         }
3439         return -EINVAL;
3440 }
3441
3442 static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel)
3443 {
3444         int bank;
3445
3446         if (channel > 31)
3447                 return;
3448
3449         bank = channel >> 5;
3450         channel = channel & 0x1f;
3451
3452         card->banks[bank].bitmap &= ~(1 << (channel));
3453 }
3454
3455 static int ali_allocate_other_states_resources(struct trident_state *state, int chan_nums)
3456 {
3457         struct trident_card *card = state->card;
3458         struct trident_state *s;
3459         int i, state_count = 0;
3460         struct trident_pcm_bank *bank;
3461         struct trident_channel *channel;
3462         
3463         bank = &card->banks[BANK_A];
3464         
3465         if (chan_nums == 6) {
3466                 for(i = 0;(i < ALI_CHANNELS) && (state_count != 4); i++) {
3467                         if (!card->states[i]) {
3468                                 if (!(bank->bitmap & (1 << ali_multi_channels_5_1[state_count]))) {
3469                                         bank->bitmap |= (1 << ali_multi_channels_5_1[state_count]);
3470                                         channel = &bank->channels[ali_multi_channels_5_1[state_count]];
3471                                         channel->num = ali_multi_channels_5_1[state_count];
3472                                 }
3473                                 else {
3474                                         state_count--;
3475                                         for (; state_count >= 0; state_count--) {
3476                                                 kfree(state->other_states[state_count]);
3477                                                 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3478                                         }
3479                                         return -EBUSY;
3480                                 }
3481                                 s = card->states[i] = (struct trident_state *)
3482                                                 kmalloc(sizeof(struct trident_state), GFP_KERNEL);
3483                                 if (!s) {
3484                                         ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3485                                         state_count--;
3486                                         for (; state_count >= 0; state_count--) {                                               
3487                                                 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3488                                                 kfree(state->other_states[state_count]);
3489                                         }
3490                                         return -ENOMEM;
3491                                 }
3492                                 memset(s, 0, sizeof(struct trident_state));
3493                                 
3494                                 s->dmabuf.channel = channel;
3495                                 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags = s->dmabuf.subdivision = 0;
3496                                 init_waitqueue_head(&s->dmabuf.wait);
3497                                 s->magic = card->magic;
3498                                 s->card = card;
3499                                 s->virt = i;
3500                                 ali_enable_special_channel(s);
3501                                 state->other_states[state_count++] = s;
3502                         }
3503                 }
3504                 
3505                 if (state_count != 4) {
3506                         state_count--;
3507                         for (; state_count >= 0; state_count--) {
3508                                 kfree(state->other_states[state_count]);
3509                                 ali_free_pcm_channel(card, ali_multi_channels_5_1[state_count]);
3510                         }
3511                         return -EBUSY;
3512                 }
3513         }
3514         return 0;
3515 }
3516
3517 static void ali_save_regs(struct trident_card *card)
3518 {
3519         unsigned long flags;
3520         int i, j;
3521
3522         spin_lock_irqsave(&card->lock, flags); 
3523
3524         ali_registers.global_regs[0x2c] = inl(TRID_REG(card,T4D_MISCINT));
3525         //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A));    
3526         ali_registers.global_regs[0x21] = inl(TRID_REG(card,T4D_STOP_A));
3527         
3528         //disable all IRQ bits
3529         outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT));
3530         
3531         for (i = 1; i < ALI_MIXER_REGS; i++)
3532                 ali_registers.mixer_regs[i] = ali_ac97_read (card->ac97_codec[0], i*2);
3533         
3534         for (i = 0; i < ALI_GLOBAL_REGS; i++)
3535         {       
3536                 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A))
3537                         continue;
3538                 ali_registers.global_regs[i] = inl(TRID_REG(card, i*4));
3539         }
3540         
3541         for (i = 0; i < ALI_CHANNELS; i++) 
3542         {
3543                 outb(i,TRID_REG(card, T4D_LFO_GC_CIR));
3544                 for (j = 0; j < ALI_CHANNEL_REGS; j++) 
3545                         ali_registers.channel_regs[i][j] = inl(TRID_REG(card, j*4 + 0xe0));
3546         }
3547
3548         //Stop all HW channel
3549         outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A));
3550
3551         spin_unlock_irqrestore(&card->lock, flags); 
3552 }
3553
3554 static void ali_restore_regs(struct trident_card *card)
3555 {
3556         unsigned long flags;
3557         int i, j;
3558
3559         spin_lock_irqsave(&card->lock, flags); 
3560         
3561         for (i = 1; i < ALI_MIXER_REGS; i++)
3562                 ali_ac97_write(card->ac97_codec[0], i*2, ali_registers.mixer_regs[i]);
3563         
3564         for (i = 0; i < ALI_CHANNELS; i++) 
3565         {
3566                 outb(i,TRID_REG(card, T4D_LFO_GC_CIR));
3567                 for (j = 0; j < ALI_CHANNEL_REGS; j++) 
3568                         outl(ali_registers.channel_regs[i][j], TRID_REG(card, j*4 + 0xe0));
3569         }
3570         
3571         for (i = 0; i < ALI_GLOBAL_REGS; i++)
3572         {       
3573                 if ((i*4 == T4D_MISCINT) || (i*4 == T4D_STOP_A) || (i*4 == T4D_START_A))
3574                         continue;
3575                 outl(ali_registers.global_regs[i], TRID_REG(card, i*4));
3576         }
3577         
3578         //start HW channel
3579         outl(ali_registers.global_regs[0x20], TRID_REG(card,T4D_START_A));
3580         //restore IRQ enable bits
3581         outl(ali_registers.global_regs[0x2c], TRID_REG(card,T4D_MISCINT));
3582
3583         spin_unlock_irqrestore(&card->lock, flags); 
3584 }
3585
3586 static int trident_suspend(struct pci_dev *dev, u32 unused)
3587 {
3588         struct trident_card *card = pci_get_drvdata(dev); 
3589
3590         if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3591                 ali_save_regs(card);
3592         }
3593         return 0;
3594 }
3595
3596 static int trident_resume(struct pci_dev *dev)
3597 {
3598         struct trident_card *card = pci_get_drvdata(dev); 
3599
3600         if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
3601                 ali_restore_regs(card);
3602         }
3603         return 0;
3604 }
3605
3606 static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card)
3607 {
3608         struct trident_pcm_bank *bank;
3609         int idx;
3610
3611         bank = &card->banks[BANK_A];
3612         
3613         if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & (ALI_SPDIF_OUT_CH_ENABLE)) {
3614                 idx = ALI_SPDIF_OUT_CHANNEL;
3615                 if (!(bank->bitmap & (1 << idx))) {
3616                         struct trident_channel *channel = &bank->channels[idx];
3617                         bank->bitmap |= 1 << idx;
3618                         channel->num = idx;
3619                         return channel;
3620                 }
3621         }
3622         
3623         for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST ; idx++) {
3624                 if (!(bank->bitmap & (1 << idx))) {
3625                         struct trident_channel *channel = &bank->channels[idx];
3626                         bank->bitmap |= 1 << idx;
3627                         channel->num = idx;
3628                         return channel;
3629                 }
3630         }
3631
3632         /* no more free channels avaliable */
3633 //      printk(KERN_ERR "ali: no more channels available on Bank A.\n");
3634         return NULL;
3635 }
3636
3637 static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card)
3638 {
3639         struct trident_pcm_bank *bank;
3640         int idx;
3641         
3642         if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT)
3643                 idx = ALI_SPDIF_IN_CHANNEL;
3644         else    idx = ALI_PCM_IN_CHANNEL;
3645
3646         bank = &card->banks[BANK_A];
3647         
3648         if (!(bank->bitmap & (1 << idx))) {
3649                 struct trident_channel *channel = &bank->channels[idx];
3650                 bank->bitmap |= 1 << idx;
3651                 channel->num = idx;
3652                 return channel;
3653         }
3654         
3655         /* no free recordable channels avaliable */
3656 //      printk(KERN_ERR "ali: no recordable channels available on Bank A.\n");
3657         return NULL;
3658 }
3659
3660 static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate)
3661 {
3662         unsigned char ch_st_sel;
3663         unsigned short status_rate;
3664         
3665         switch(rate) {
3666         case 44100:
3667                 status_rate = 0;
3668                 break;
3669         case 32000:
3670                 status_rate = 0x300;
3671                 break;
3672         case 48000:
3673         default:
3674                 status_rate = 0x200;
3675                 break;
3676         }
3677         
3678         ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS;      //select spdif_out
3679         
3680         ch_st_sel |= 0x80;      //select right
3681         outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3682         outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2));
3683         
3684         ch_st_sel &= (~0x80);   //select left
3685         outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL));
3686         outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2));
3687 }
3688
3689 static void ali_address_interrupt(struct trident_card *card)
3690 {
3691         int i, channel;
3692         struct trident_state *state;
3693         u32 mask, channel_mask;
3694         
3695         mask = trident_get_interrupt_mask (card, 0);
3696         for (i = 0; i < NR_HW_CH; i++) {
3697                 if ((state = card->states[i]) == NULL)
3698                         continue;               
3699                 channel = state->dmabuf.channel->num;
3700                 if ((channel_mask = 1 << channel) & mask) {
3701                         mask &= ~channel_mask;
3702                         trident_ack_channel_interrupt(card, channel);
3703                         udelay(100);
3704                         state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE;
3705                         trident_update_ptr(state);
3706                 }
3707         }
3708         if (mask) {
3709                 for (i = 0; i < NR_HW_CH; i++) {
3710                         if (mask & (1 << i)) {
3711                                 printk("ali: spurious channel irq %d.\n", i);
3712                                 trident_ack_channel_interrupt(card, i);
3713                                 trident_stop_voice(card, i);
3714                                 trident_disable_voice_irq(card, i);
3715                         }
3716                 }
3717         }
3718 }
3719
3720 /* Updating the values of counters of other_states' DMAs without lock 
3721 protection is no harm because all DMAs of multi-channels and interrupt
3722 depend on a master state's DMA, and changing the counters of the master
3723 state DMA is protected by a spinlock.
3724 */
3725 static int ali_write_5_1(struct trident_state *state,  
3726                          const char *buf, int cnt_for_multi_channel, 
3727                          unsigned int *copy_count, 
3728                          unsigned int *state_cnt)
3729 {
3730         
3731         struct dmabuf *dmabuf = &state->dmabuf;
3732         struct dmabuf *dmabuf_temp;
3733         const char *buffer = buf;
3734         unsigned swptr, other_dma_nums, sample_s;
3735         unsigned int i, loop;
3736         
3737         other_dma_nums = 4;
3738         sample_s = sample_size[dmabuf->fmt] >> 1;
3739         swptr = dmabuf->swptr;
3740
3741         if ((i = state->multi_channels_adjust_count) > 0) {
3742                 if (i == 1) {
3743                         if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3744                                 return -EFAULT;
3745                         seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3746                         i--;
3747                         (*state_cnt) += sample_s;
3748                         state->multi_channels_adjust_count++;
3749                 }
3750                 else    i = i - (state->chans_num - other_dma_nums);
3751                 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) {
3752                         dmabuf_temp = &state->other_states[i]->dmabuf;
3753                         if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3754                                 return -EFAULT;
3755                         seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3756                 }
3757                 if (cnt_for_multi_channel == 0)
3758                         state->multi_channels_adjust_count += i;
3759         }
3760         if (cnt_for_multi_channel > 0) {
3761                 loop = cnt_for_multi_channel / (state->chans_num * sample_s);
3762                 for (i = 0; i < loop; i++) {
3763                         if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s * 2))
3764                                 return -EFAULT;
3765                         seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s * 2, *copy_count);
3766                         (*state_cnt) += (sample_s * 2);
3767                 
3768                         dmabuf_temp = &state->other_states[0]->dmabuf;
3769                         if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3770                                 return -EFAULT;
3771                         seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3772                 
3773                         dmabuf_temp = &state->other_states[1]->dmabuf;
3774                         if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3775                                 return -EFAULT;
3776                         seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3777                 
3778                         dmabuf_temp = &state->other_states[2]->dmabuf;
3779                         if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3780                                 return -EFAULT;
3781                         seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3782                                 
3783                         dmabuf_temp = &state->other_states[3]->dmabuf;
3784                         if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3785                                 return -EFAULT;
3786                         seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3787                 }
3788                 
3789                 if (cnt_for_multi_channel > 0) {
3790                         state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s;
3791                         
3792                         if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3793                                 return -EFAULT;
3794                         seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);                       
3795                         (*state_cnt) += sample_s;
3796                         
3797                         if (cnt_for_multi_channel > 0) {
3798                                 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s))
3799                                         return -EFAULT;
3800                                 seek_offset(swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3801                                 (*state_cnt) += sample_s;
3802                         
3803                                 if (cnt_for_multi_channel > 0) {
3804                                         loop = state->multi_channels_adjust_count - (state->chans_num - other_dma_nums);
3805                                         for (i = 0; i < loop; i++) {
3806                                                 dmabuf_temp = &state->other_states[i]->dmabuf;
3807                                                 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, buffer, sample_s))
3808                                                         return -EFAULT;
3809                                                 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, sample_s, *copy_count);
3810                                         }
3811                                 }
3812                         }
3813                 }
3814                 else
3815                         state->multi_channels_adjust_count = 0;
3816         }
3817         for (i = 0; i < other_dma_nums; i++) {
3818                 dmabuf_temp = &state->other_states[i]->dmabuf;
3819                 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize;
3820         }
3821         return *state_cnt;
3822 }
3823
3824 static void ali_free_other_states_resources(struct trident_state *state)
3825 {
3826         int i;
3827         struct trident_card *card = state->card;
3828         struct trident_state *s;
3829         unsigned other_states_count;
3830         
3831         other_states_count = state->chans_num - 2;      /* except PCM L/R channels*/
3832         for ( i = 0; i < other_states_count; i++) {
3833                 s = state->other_states[i];
3834                 dealloc_dmabuf(&s->dmabuf, card->pci_dev);
3835                 ali_disable_special_channel(s->card, s->dmabuf.channel->num);
3836                 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num);
3837                 card->states[s->virt] = NULL;
3838                 kfree(s);
3839         }
3840 }
3841
3842 struct proc_dir_entry *res;
3843 static int ali_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
3844 {
3845         struct trident_card *card = (struct trident_card *)data;
3846         unsigned long flags;
3847         char c;
3848
3849         if (count<0)
3850                 return -EINVAL;
3851         if (count == 0)
3852                 return 0;
3853         if (get_user(c, buffer))
3854                 return -EFAULT;
3855         
3856         spin_lock_irqsave(&card->lock, flags);
3857         switch (c) {
3858             case '0':
3859                 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
3860                 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
3861                 break;
3862             case '1':
3863                 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_PCM);
3864                 break;
3865             case '2':
3866                 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT|ALI_SPDIF_OUT_NON_PCM);
3867                 break;
3868             case '3':
3869                 ali_disable_spdif_in(card);     //default
3870                 break;
3871             case '4':
3872                 ali_setup_spdif_in(card);
3873                 break;
3874         }
3875         spin_unlock_irqrestore(&card->lock, flags);
3876
3877         return count;
3878 }
3879
3880 /* OSS /dev/mixer file operation methods */
3881 static int trident_open_mixdev(struct inode *inode, struct file *file)
3882 {
3883         int i = 0;
3884         int minor = minor(inode->i_rdev);
3885         struct trident_card *card = devs;
3886
3887         for (card = devs; card != NULL; card = card->next)
3888                 for (i = 0; i < NR_AC97; i++)
3889                         if (card->ac97_codec[i] != NULL &&
3890                             card->ac97_codec[i]->dev_mixer == minor)
3891                                 goto match;
3892
3893         if (!card) {
3894                 return -ENODEV;
3895         }
3896  match:
3897         file->private_data = card->ac97_codec[i];
3898
3899
3900         return 0;
3901 }
3902
3903 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
3904                                 unsigned long arg)
3905 {
3906         struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
3907
3908         return codec->mixer_ioctl(codec, cmd, arg);
3909 }
3910
3911 static /*const*/ struct file_operations trident_mixer_fops = {
3912         .owner          = THIS_MODULE,
3913         .llseek         = no_llseek,
3914         .ioctl          = trident_ioctl_mixdev,
3915         .open           = trident_open_mixdev,
3916 };
3917
3918 static int ali_reset_5451(struct trident_card *card)
3919 {
3920         struct pci_dev *pci_dev = NULL;
3921         unsigned int   dwVal;
3922         unsigned short wCount, wReg;
3923
3924         pci_dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pci_dev);
3925         if (pci_dev == NULL)
3926                 return -1;
3927         
3928         pci_read_config_dword(pci_dev, 0x7c, &dwVal);
3929         pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
3930         udelay(5000);
3931         pci_read_config_dword(pci_dev, 0x7c, &dwVal);
3932         pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
3933         udelay(5000);
3934
3935         pci_dev = card->pci_dev;
3936         if (pci_dev == NULL)
3937                 return -1;
3938
3939         pci_read_config_dword(pci_dev, 0x44, &dwVal);
3940         pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
3941         udelay(500);
3942         pci_read_config_dword(pci_dev, 0x44, &dwVal);
3943         pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
3944         udelay(5000);
3945
3946         wCount = 2000;
3947         while(wCount--) {
3948                 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
3949                 if((wReg & 0x000f) == 0x000f)
3950                         return 0;
3951                 udelay(5000);
3952         }
3953         /* This is non fatal if you have a non PM capable codec.. */
3954         return 0;
3955 }
3956
3957 /* AC97 codec initialisation. */
3958 static int __init trident_ac97_init(struct trident_card *card)
3959 {
3960         int num_ac97 = 0;
3961         unsigned long ready_2nd = 0;
3962         struct ac97_codec *codec;
3963         int i = 0;
3964         
3965
3966         /* initialize controller side of AC link, and find out if secondary codes
3967            really exist */
3968         switch (card->pci_id)
3969         {
3970         case PCI_DEVICE_ID_ALI_5451:
3971                 if (ali_reset_5451(card)) 
3972                 {
3973                         printk(KERN_ERR "trident_ac97_init: error resetting 5451.\n");
3974                         return -1;
3975                 }
3976                 outl(0x80000001,TRID_REG(card, ALI_GLOBAL_CONTROL));
3977                 outl(0x00000000,TRID_REG(card, T4D_AINTEN_A));
3978                 outl(0xffffffff,TRID_REG(card, T4D_AINT_A));
3979                 outl(0x00000000,TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
3980                 outb(0x10,      TRID_REG(card, ALI_MPUR2));
3981                 ready_2nd = inl(TRID_REG(card, ALI_SCTRL));
3982                 ready_2nd &= 0x3fff;
3983                 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL));
3984                 ready_2nd = inl(TRID_REG(card, ALI_SCTRL)); 
3985                 ready_2nd &= SI_AC97_SECONDARY_READY;
3986                 if (card->revision < ALI_5451_V02)
3987                         ready_2nd = 0;
3988                 break;
3989         case PCI_DEVICE_ID_SI_7018:
3990                 /* disable AC97 GPIO interrupt */
3991                 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
3992                 /* when power up the AC link is in cold reset mode so stop it */
3993                 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT|SECONDARY_ID,
3994                      TRID_REG(card, SI_SERIAL_INTF_CTRL));
3995                 /* it take a long time to recover from a cold reset (especially when you have
3996                    more than one codec) */
3997                 udelay(2000);
3998                 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
3999                 ready_2nd &= SI_AC97_SECONDARY_READY;
4000                 break;
4001         case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX:
4002                 /* playback on */
4003                 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
4004                 break;
4005         case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX:
4006                 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */
4007                 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4008                 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT));
4009                 ready_2nd &= NX_AC97_SECONDARY_READY;
4010                 break;
4011         case PCI_DEVICE_ID_INTERG_5050:
4012                 /* disable AC97 GPIO interrupt */
4013                 outl(0x00, TRID_REG(card, SI_AC97_GPIO));
4014                 /* when power up, the AC link is in cold reset mode, so stop it */
4015                 outl(PCMOUT|SURROUT|CENTEROUT|LFEOUT,
4016                      TRID_REG(card, SI_SERIAL_INTF_CTRL));
4017                 /* it take a long time to recover from a cold reset (especially when you have
4018                    more than one codec) */
4019                 udelay(2000);
4020                 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL));
4021                 ready_2nd &= SI_AC97_SECONDARY_READY;
4022                 break;
4023         }
4024
4025         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4026                 if ((codec = ac97_alloc_codec()) == NULL)
4027                         return -ENOMEM;
4028
4029                 /* initialize some basic codec information, other fields will be filled
4030                    in ac97_probe_codec */
4031                 codec->private_data = card;
4032                 codec->id = num_ac97;
4033
4034                 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4035                         codec->codec_read = ali_ac97_read;
4036                         codec->codec_write = ali_ac97_write;
4037                 }
4038                 else {
4039                         codec->codec_read = trident_ac97_get;
4040                         codec->codec_write = trident_ac97_set;
4041                 }
4042         
4043                 if (ac97_probe_codec(codec) == 0)
4044                         break;
4045
4046                 if ((codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0) {
4047                         printk(KERN_ERR "trident: couldn't register mixer!\n");
4048                         ac97_release_codec(codec);
4049                         break;
4050                 }
4051
4052                 card->ac97_codec[num_ac97] = codec;
4053
4054                 /* if there is no secondary codec at all, don't probe any more */
4055                 if (!ready_2nd)
4056                         break;
4057         }
4058
4059         if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4060                 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
4061                         if (card->ac97_codec[num_ac97] == NULL)
4062                                 break;
4063                         for (i=0; i<64;i++)
4064                                 card->mixer_regs[i][num_ac97] = ali_ac97_get(card, num_ac97,i*2);
4065                 }
4066         }
4067         return num_ac97+1;
4068 }
4069
4070 /* Gameport functions for the cards ADC gameport */
4071
4072 static unsigned char trident_game_read(struct gameport *gameport)
4073 {
4074         struct trident_card *card = gameport->driver;
4075         return inb(TRID_REG(card, T4D_GAME_LEG));
4076 }
4077
4078 static void trident_game_trigger(struct gameport *gameport)
4079 {
4080         struct trident_card *card = gameport->driver;
4081         outb(0xff, TRID_REG(card, T4D_GAME_LEG));
4082 }
4083
4084 static int trident_game_cooked_read(struct gameport *gameport, int *axes, int *buttons)
4085 {
4086         struct trident_card *card = gameport->driver;
4087         int i;
4088
4089         *buttons = (~inb(TRID_REG(card, T4D_GAME_LEG)) >> 4) & 0xf;
4090
4091         for (i = 0; i < 4; i++) {
4092                 axes[i] = inw(TRID_REG(card, T4D_GAME_AXD) + i * sizeof(u16));
4093                 if (axes[i] == 0xffff) axes[i] = -1;
4094         }
4095         
4096         return 0;
4097 }
4098
4099 static int trident_game_open(struct gameport *gameport, int mode)
4100 {
4101         struct trident_card *card = gameport->driver;
4102
4103         switch (mode) {
4104                 case GAMEPORT_MODE_COOKED:
4105                         outb(0x80, TRID_REG(card, T4D_GAME_CR));
4106                         wait_ms(20);
4107                         return 0;
4108                 case GAMEPORT_MODE_RAW:
4109                         outb(0x00, TRID_REG(card, T4D_GAME_CR));
4110                         return 0;
4111                 default:
4112                         return -1;
4113         }
4114
4115         return 0;
4116 }
4117
4118
4119 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered 
4120    until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
4121 static int __init trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
4122 {
4123         unsigned long iobase;
4124         struct trident_card *card;
4125         u8 bits;
4126         u8 revision;
4127         int i = 0;
4128         u16 temp;
4129         struct pci_dev *pci_dev_m1533 = NULL;
4130         int rc = -ENODEV;
4131         u64 dma_mask;
4132
4133         if (pci_enable_device(pci_dev))
4134                 goto out;
4135
4136         if (pci_dev->device == PCI_DEVICE_ID_ALI_5451)
4137                 dma_mask = ALI_DMA_MASK;
4138         else
4139                 dma_mask = TRIDENT_DMA_MASK;
4140         if (pci_set_dma_mask(pci_dev, dma_mask)) {
4141                 printk(KERN_ERR "trident: architecture does not support"
4142                        " %s PCI busmaster DMA\n",
4143                        pci_dev->device == PCI_DEVICE_ID_ALI_5451 ?
4144                        "32-bit" : "30-bit");
4145                 goto out;
4146         }
4147         pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
4148
4149         if (pci_id->device == PCI_DEVICE_ID_INTERG_5050)
4150                 iobase = pci_resource_start(pci_dev, 1);
4151         else
4152                 iobase = pci_resource_start(pci_dev, 0);
4153
4154         if (!request_region(iobase, 256, card_names[pci_id->driver_data])) {
4155                 printk(KERN_ERR "trident: can't allocate I/O space at 0x%4.4lx\n",
4156                        iobase);
4157                 goto out;
4158         }
4159
4160         rc = -ENOMEM;
4161         if ((card = kmalloc(sizeof(struct trident_card), GFP_KERNEL)) == NULL) {
4162                 printk(KERN_ERR "trident: out of memory\n");
4163                 goto out_release_region;
4164         }
4165         memset(card, 0, sizeof(*card));
4166
4167         init_timer(&card->timer);
4168         card->iobase = iobase;
4169         card->pci_dev = pci_dev;
4170         card->pci_id = pci_id->device;
4171         card->revision = revision;
4172         card->irq = pci_dev->irq;
4173         card->next = devs;
4174         card->magic = TRIDENT_CARD_MAGIC;
4175         card->banks[BANK_A].addresses = &bank_a_addrs;
4176         card->banks[BANK_A].bitmap = 0UL;
4177         card->banks[BANK_B].addresses = &bank_b_addrs;
4178         card->banks[BANK_B].bitmap = 0UL;
4179
4180         card->gameport.driver = card;
4181         card->gameport.fuzz = 64;
4182         card->gameport.read = trident_game_read;
4183         card->gameport.trigger = trident_game_trigger;
4184         card->gameport.cooked_read = trident_game_cooked_read;
4185         card->gameport.open = trident_game_open;
4186
4187         init_MUTEX(&card->open_sem);
4188         spin_lock_init(&card->lock);
4189         init_timer(&card->timer);
4190
4191         devs = card;
4192
4193         pci_set_master(pci_dev);
4194
4195         printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n",
4196                card_names[pci_id->driver_data], card->iobase, card->irq);
4197
4198         if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4199                 /* ALi channel Management */    
4200                 card->alloc_pcm_channel = ali_alloc_pcm_channel;
4201                 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel;
4202                 card->free_pcm_channel = ali_free_pcm_channel;
4203                 
4204                 card->address_interrupt = ali_address_interrupt;
4205
4206                 /* Added by Matt Wu 01-05-2001 for spdif in */
4207                 card->multi_channel_use_count = 0;
4208                 card->rec_channel_use_count = 0;
4209
4210                 /* ALi SPDIF OUT function */
4211                 if(card->revision == ALI_5451_V02) {
4212                         ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);                
4213                         res = create_proc_entry("ALi5451", 0, NULL);
4214                         if (res) {
4215                                 res->write_proc = ali_write_proc;
4216                                 res->data = card;
4217                         }
4218                 }
4219
4220                 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4221                 card->hwvolctl = 0;
4222                 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL,PCI_DEVICE_ID_AL_M1533, pci_dev_m1533);
4223                 rc = -ENODEV;
4224                 if (pci_dev_m1533 == NULL)
4225                         goto out_proc_fs;
4226                 pci_read_config_byte(pci_dev_m1533, 0x63, &bits);
4227                 if (bits & (1<<5))
4228                         card->hwvolctl = 1;
4229                 if (card->hwvolctl) 
4230                 {
4231                         /* Clear m1533 pci cfg 78h bit 30 to zero, which makes
4232                            GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */
4233                         pci_read_config_byte(pci_dev_m1533, 0x7b, &bits);
4234                         bits &= 0xbf; /*clear bit 6 */
4235                         pci_write_config_byte(pci_dev_m1533, 0x7b, bits);
4236                 }
4237         }
4238         else if(card->pci_id == PCI_DEVICE_ID_INTERG_5050)
4239         {
4240                 card->alloc_pcm_channel = cyber_alloc_pcm_channel;
4241                 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel;
4242                 card->free_pcm_channel = cyber_free_pcm_channel;
4243                 card->address_interrupt = cyber_address_interrupt;
4244                 cyber_init_ritual(card);
4245         }
4246         else
4247         {
4248                 card->alloc_pcm_channel = trident_alloc_pcm_channel;
4249                 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel;
4250                 card->free_pcm_channel = trident_free_pcm_channel;
4251                 card->address_interrupt = trident_address_interrupt;
4252         }
4253
4254         /* claim our irq */
4255         rc = -ENODEV;
4256         if (request_irq(card->irq, &trident_interrupt, SA_SHIRQ,
4257                         card_names[pci_id->driver_data], card)) {
4258                 printk(KERN_ERR "trident: unable to allocate irq %d\n", card->irq);
4259                 goto out_proc_fs;
4260         }
4261         /* register /dev/dsp */
4262         if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) {
4263                 printk(KERN_ERR "trident: couldn't register DSP device!\n");
4264                 goto out_free_irq;
4265         }
4266         card->mixer_regs_ready = 0;
4267         /* initialize AC97 codec and register /dev/mixer */
4268         if (trident_ac97_init(card) <= 0) {
4269                 /* unregister audio devices */
4270                 for (i = 0; i < NR_AC97; i++) {
4271                         if (card->ac97_codec[i] != NULL) {
4272                                 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4273                                 ac97_release_codec(card->ac97_codec[i]);
4274                         }
4275                 }
4276                 goto out_unregister_sound_dsp;
4277         }
4278         card->mixer_regs_ready = 1;
4279         outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
4280
4281         if (card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4282                 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */
4283                 if(card->hwvolctl) 
4284                 {
4285                         /* Enable GPIO IRQ (MISCINT bit 18h)*/
4286                         temp = inw(TRID_REG(card, T4D_MISCINT + 2));
4287                         temp |= 0x0004;
4288                         outw(temp, TRID_REG(card, T4D_MISCINT + 2));
4289
4290                         /* Enable H/W Volume Control GLOVAL CONTROL bit 0*/
4291                         temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL));
4292                         temp |= 0x0001;
4293                         outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL));
4294
4295                 }
4296                 if(card->revision == ALI_5451_V02)
4297                         ali_close_multi_channels();
4298                 /* edited by HMSEO for GT sound */
4299 #if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC)
4300                 {
4301                         u16 ac97_data;
4302                         extern struct hwrpb_struct *hwrpb;
4303                 
4304                         if ((hwrpb->sys_type) == 201) {
4305                                 printk(KERN_INFO "trident: Running on Alpha system type Nautilus\n");
4306                                 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL);
4307                                 ali_ac97_set(card, 0, AC97_POWER_CONTROL, ac97_data | ALI_EAPD_POWER_DOWN);
4308                         }
4309                 }
4310 #endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */ 
4311                 /* edited by HMSEO for GT sound*/
4312         }
4313         rc = 0;
4314         pci_set_drvdata(pci_dev, card);
4315
4316         /* Enable Address Engine Interrupts */
4317         trident_enable_loop_interrupts(card);
4318
4319         /* Register gameport */
4320         gameport_register_port(&card->gameport);
4321
4322 out:    return rc;
4323 out_unregister_sound_dsp:
4324         unregister_sound_dsp(card->dev_audio);
4325 out_free_irq:
4326         free_irq(card->irq, card);
4327 out_proc_fs:
4328         if (res) {
4329                 remove_proc_entry("ALi5451", NULL);
4330                 res = NULL;
4331         }
4332         kfree(card);
4333         devs = NULL;
4334 out_release_region:
4335         release_region(iobase, 256);
4336         goto out;
4337 }
4338
4339 static void __devexit trident_remove(struct pci_dev *pci_dev)
4340 {
4341         int i;
4342         struct trident_card *card = pci_get_drvdata(pci_dev);
4343
4344         /*
4345          *      Kill running timers before unload. We can't have them
4346          *      going off after rmmod!
4347          */
4348         if(card->hwvolctl)
4349                 del_timer_sync(&card->timer);
4350                 
4351         /* ALi S/PDIF and Power Management */
4352         if(card->pci_id == PCI_DEVICE_ID_ALI_5451) {
4353                 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT);
4354                 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL);
4355                 ali_disable_spdif_in(card);
4356                 remove_proc_entry("ALi5451", NULL);
4357         }
4358
4359         /* Unregister gameport */
4360         gameport_unregister_port(&card->gameport);
4361
4362         /* Kill interrupts, and SP/DIF */
4363         trident_disable_loop_interrupts(card);
4364
4365         /* free hardware resources */
4366         free_irq(card->irq, card);
4367         release_region(card->iobase, 256);
4368
4369         /* unregister audio devices */
4370         for (i = 0; i < NR_AC97; i++)
4371                 if (card->ac97_codec[i] != NULL) {
4372                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
4373                         ac97_release_codec(card->ac97_codec[i]);
4374                 }
4375         unregister_sound_dsp(card->dev_audio);
4376
4377         kfree(card);
4378
4379         pci_set_drvdata(pci_dev, NULL);
4380 }
4381
4382 MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee");
4383 MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI Audio Driver");
4384 MODULE_LICENSE("GPL");
4385
4386
4387 #define TRIDENT_MODULE_NAME "trident"
4388
4389 static struct pci_driver trident_pci_driver = {
4390         .name           = TRIDENT_MODULE_NAME,
4391         .id_table       = trident_pci_tbl,
4392         .probe          = trident_probe,
4393         .remove         = __devexit_p(trident_remove),
4394         .suspend        = trident_suspend,
4395         .resume         = trident_resume
4396 };
4397
4398 static int __init trident_init_module (void)
4399 {
4400         printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro "
4401                "5050 PCI Audio, version " DRIVER_VERSION ", " 
4402                __TIME__ " " __DATE__ "\n");
4403
4404         if (!pci_register_driver(&trident_pci_driver)) {
4405                 pci_unregister_driver(&trident_pci_driver);
4406                 return -ENODEV;
4407         }
4408         return 0;
4409 }
4410
4411 static void __exit trident_cleanup_module (void)
4412 {
4413         pci_unregister_driver(&trident_pci_driver);
4414 }
4415
4416 module_init(trident_init_module);
4417 module_exit(trident_cleanup_module);