2 * Copyright (C) 2000, 2001 Broadcom Corporation
3 * Copyright (C) 2002 Ralf Baechle
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 #ifndef __ASM_SIBYTE_64BIT_H
21 #define __ASM_SIBYTE_64BIT_H
23 #include <linux/config.h>
24 #include <linux/types.h>
28 #include <asm/system.h>
31 * This is annoying...we can't actually write the 64-bit IO register properly
32 * without having access to 64-bit registers... which doesn't work by default
33 * in o32 format...grrr...
35 static inline void __out64(u64 val, unsigned long addr)
39 __asm__ __volatile__ (
41 " dsll32 %L0, %L0, 0 # __out64 \n"
42 " dsrl32 %L0, %L0, 0 \n"
43 " dsll32 %M0, %M0, 0 \n"
44 " or %L0, %L0, %M0 \n"
48 : "0" (val), "r" (addr));
51 static inline void out64(u64 val, unsigned long addr)
55 local_irq_save(flags);
57 local_irq_restore(flags);
60 static inline u64 __in64(unsigned long addr)
64 __asm__ __volatile__ (
65 " .set mips3 # __in64 \n"
67 " dsra32 %M0, %L0, 0 \n"
76 static inline u64 in64(unsigned long addr)
81 local_irq_save(flags);
83 local_irq_restore(flags);
88 #endif /* CONFIG_MIPS32 */
93 * These are provided so as to be able to use common
94 * driver code for the 32-bit and 64-bit trees
96 extern inline void out64(u64 val, unsigned long addr)
98 *(volatile unsigned long *)addr = val;
101 extern inline u64 in64(unsigned long addr)
103 return *(volatile unsigned long *)addr;
106 #define __in64(a) in64(a)
107 #define __out64(v,a) out64(v,a)
109 #endif /* CONFIG_MIPS64 */
112 * Avoid interrupt mucking, just adjust the address for 4-byte access.
113 * Assume the addresses are 8-byte aligned.
117 #define __CSR_32_ADJUST 4
119 #define __CSR_32_ADJUST 0
122 #define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
123 #define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
125 #endif /* __ASM_SIBYTE_64BIT_H */