drivers/net/hamradio/scc.c

   1 #define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
   2
   3 #define VERSION "3.0"
   4
   5 /*
   6  * Please use z8530drv-utils-3.0 with this version.
   7  *            ------------------
   8  *
   9  * You can find a subset of the documentation in
  10  * linux/Documentation/networking/z8530drv.txt.
  11  */
  12
  13 /*
  14    ********************************************************************
  15    *   SCC.C - Linux driver for Z8530 based HDLC cards for AX.25      *
  16    ********************************************************************
  17
  18
  19    ********************************************************************
  20
  21         Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
  22
  23         portions (c) 1993 Guido ten Dolle PE1NNZ
  24
  25    ********************************************************************
  26
  27    The driver and the programs in the archive are UNDER CONSTRUCTION.
  28    The code is likely to fail, and so your kernel could --- even
  29    a whole network.
  30
  31    This driver is intended for Amateur Radio use. If you are running it
  32    for commercial purposes, please drop me a note. I am nosy...
  33
  34    ...BUT:
  35
  36    ! You  m u s t  recognize the appropriate legislations of your country !
  37    ! before you connect a radio to the SCC board and start to transmit or !
  38    ! receive. The GPL allows you to use the  d r i v e r,  NOT the RADIO! !
  39
  40    For non-Amateur-Radio use please note that you might need a special
  41    allowance/licence from the designer of the SCC Board and/or the
  42    MODEM.
  43
  44    This program is free software; you can redistribute it and/or modify
  45    it under the terms of the (modified) GNU General Public License
  46    delivered with the Linux kernel source.
  47
  48    This program is distributed in the hope that it will be useful,
  49    but WITHOUT ANY WARRANTY; without even the implied warranty of
  50    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  51    GNU General Public License for more details.
  52
  53    You should find a copy of the GNU General Public License in
  54    /usr/src/linux/COPYING;
  55
  56    ********************************************************************
  57
  58
  59    Incomplete history of z8530drv:
  60    -------------------------------
  61
  62    1994-09-13   started to write the driver, rescued most of my own
  63                 code (and Hans Alblas' memory buffer pool concept) from
  64                 an earlier project "sccdrv" which was initiated by
  65                 Guido ten Dolle. Not much of the old driver survived,
  66                 though. The first version I put my hands on was sccdrv1.3
  67                 from August 1993. The memory buffer pool concept
  68                 appeared in an unauthorized sccdrv version (1.5) from
  69                 August 1994.
  70
  71    1995-01-31   changed copyright notice to GPL without limitations.
  72
  73      .
  74      .  <SNIP>
  75      .
  76
  77    1996-10-05   New semester, new driver...
  78
  79                   * KISS TNC emulator removed (TTY driver)
  80                   * Source moved to drivers/net/
  81                   * Includes Z8530 defines from drivers/net/z8530.h
  82                   * Uses sk_buffer memory management
  83                   * Reduced overhead of /proc/net/z8530drv output
  84                   * Streamlined quite a lot things
  85                   * Invents brand new bugs... ;-)
  86
  87                   The move to version number 3.0 reflects theses changes.
  88                   You can use 'kissbridge' if you need a KISS TNC emulator.
  89
  90    1996-12-13   Fixed for Linux networking changes. (G4KLX)
  91    1997-01-08   Fixed the remaining problems.
  92    1997-04-02   Hopefully fixed the problems with the new *_timer()
  93                 routines, added calibration code.
  94    1997-10-12   Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
  95    1998-01-29   Small fix to avoid lock-up on initialization
  96    1998-09-29   Fixed the "grouping" bugs, tx_inhibit works again,
  97                 using dev->tx_queue_len now instead of MAXQUEUE now.
  98    1998-10-21   Postponed the spinlock changes, would need a lot of
  99                 testing I currently don't have the time to. Softdcd doesn't
 100                 work.
 101    1998-11-04   Softdcd does not work correctly in DPLL mode, in fact it
 102                 never did. The DPLL locks on noise, the SYNC unit sees
 103                 flags that aren't... Restarting the DPLL does not help
 104                 either, it resynchronizes too slow and the first received
 105                 frame gets lost.
 106    2000-02-13   Fixed for new network driver interface changes, still
 107                 does TX timeouts itself since it uses its own queue
 108                 scheme.
 109
 110    Thanks to all who contributed to this driver with ideas and bug
 111    reports!
 112
 113    NB -- if you find errors, change something, please let me know
 114          first before you distribute it... And please don't touch
 115          the version number. Just replace my callsign in
 116          "v3.0.dl1bke" with your own. Just to avoid confusion...
 117
 118    If you want to add your modification to the linux distribution
 119    please (!) contact me first.
 120
 121    New versions of the driver will be announced on the linux-hams
 122    mailing list on vger.kernel.org. To subscribe send an e-mail
 123    to majordomo@vger.kernel.org with the following line in
 124    the body of the mail:
 125
 126            subscribe linux-hams
 127
 128    The content of the "Subject" field will be ignored.
 129
 130    vy 73,
 131    Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
 132                 AX-25   : DL1BKE @ DB0ABH.#BAY.DEU.EU
 133                 Internet: jreuter@yaina.de
 134                 www     : http://yaina.de/jreuter
 135 */
 136
 137 /* ----------------------------------------------------------------------- */
 138
 139 #undef  SCC_LDELAY              /* slow it even a bit more down */
 140 #undef  SCC_DONT_CHECK          /* don't look if the SCCs you specified are available */
 141
 142 #define SCC_MAXCHIPS    4       /* number of max. supported chips */
 143 #define SCC_BUFSIZE     384     /* must not exceed 4096 */
 144 #undef  SCC_DEBUG
 145
 146 #define SCC_DEFAULT_CLOCK       4915200
 147                                 /* default pclock if nothing is specified */
 148
 149 /* ----------------------------------------------------------------------- */
 150
 151 #include <linux/config.h>
 152 #include <linux/module.h>
 153 #include <linux/errno.h>
 154 #include <linux/signal.h>
 155 #include <linux/timer.h>
 156 #include <linux/interrupt.h>
 157 #include <linux/ioport.h>
 158 #include <linux/string.h>
 159 #include <linux/in.h>
 160 #include <linux/fcntl.h>
 161 #include <linux/ptrace.h>
 162 #include <linux/slab.h>
 163 #include <linux/delay.h>
 164 #include <linux/skbuff.h>
 165 #include <linux/netdevice.h>
 166 #include <linux/if_ether.h>
 167 #include <linux/if_arp.h>
 168 #include <linux/socket.h>
 169 #include <linux/init.h>
 170 #include <linux/scc.h>
 171 #include <linux/ctype.h>
 172 #include <linux/kernel.h>
 173 #include <linux/proc_fs.h>
 174 #include <linux/seq_file.h>
 175
 176 #include <net/ax25.h>
 177
 178 #include <asm/irq.h>
 179 #include <asm/system.h>
 180 #include <asm/io.h>
 181 #include <asm/uaccess.h>
 182 #include <asm/bitops.h>
 183
 184 #include "z8530.h"
 185
 186 static char banner[] __initdata = KERN_INFO "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n";
 187
 188 static void t_dwait(unsigned long);
 189 static void t_txdelay(unsigned long);
 190 static void t_tail(unsigned long);
 191 static void t_busy(unsigned long);
 192 static void t_maxkeyup(unsigned long);
 193 static void t_idle(unsigned long);
 194 static void scc_tx_done(struct scc_channel *);
 195 static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
 196 static void scc_start_maxkeyup(struct scc_channel *);
 197 static void scc_start_defer(struct scc_channel *);
 198
 199 static void z8530_init(void);
 200
 201 static void init_channel(struct scc_channel *scc);
 202 static void scc_key_trx (struct scc_channel *scc, char tx);
 203 static irqreturn_t scc_isr(int irq, void *dev_id, struct pt_regs *regs);
 204 static void scc_init_timer(struct scc_channel *scc);
 205
 206 static int scc_net_alloc(const char *name, struct scc_channel *scc);
 207 static void scc_net_setup(struct net_device *dev);
 208 static int scc_net_open(struct net_device *dev);
 209 static int scc_net_close(struct net_device *dev);
 210 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
 211 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev);
 212 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
 213 static int scc_net_set_mac_address(struct net_device *dev, void *addr);
 214 static struct net_device_stats * scc_net_get_stats(struct net_device *dev);
 215
 216 static unsigned char SCC_DriverName[] = "scc";
 217
 218 static struct irqflags { unsigned char used : 1; } Ivec[NR_IRQS];
 219
 220 static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS];   /* information per channel */
 221
 222 static struct scc_ctrl {
 223         io_port chan_A;
 224         io_port chan_B;
 225         int irq;
 226 } SCC_ctrl[SCC_MAXCHIPS+1];
 227
 228 static unsigned char Driver_Initialized;
 229 static int Nchips;
 230 static io_port Vector_Latch;
 231
 232
 233 /* ******************************************************************** */
 234 /* *                    Port Access Functions                         * */
 235 /* ******************************************************************** */
 236
 237 /* These provide interrupt save 2-step access to the Z8530 registers */
 238
 239 static spinlock_t iolock = SPIN_LOCK_UNLOCKED;  /* Guards paired accesses */
 240
 241 static inline unsigned char InReg(io_port port, unsigned char reg)
 242 {
 243         unsigned long flags;
 244         unsigned char r;
 245
 246         spin_lock_irqsave(&iolock, flags);
 247 #ifdef SCC_LDELAY
 248         Outb(port, reg);
 249         udelay(SCC_LDELAY);
 250         r=Inb(port);
 251         udelay(SCC_LDELAY);
 252 #else
 253         Outb(port, reg);
 254         r=Inb(port);
 255 #endif
 256         spin_unlock_irqrestore(&iolock, flags);
 257         return r;
 258 }
 259
 260 static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
 261 {
 262         unsigned long flags;
 263
 264         spin_lock_irqsave(&iolock, flags);
 265 #ifdef SCC_LDELAY
 266         Outb(port, reg); udelay(SCC_LDELAY);
 267         Outb(port, val); udelay(SCC_LDELAY);
 268 #else
 269         Outb(port, reg);
 270         Outb(port, val);
 271 #endif
 272         spin_unlock_irqrestore(&iolock, flags);
 273 }
 274
 275 static inline void wr(struct scc_channel *scc, unsigned char reg,
 276         unsigned char val)
 277 {
 278         OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
 279 }
 280
 281 static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
 282 {
 283         OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
 284 }
 285
 286 static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
 287 {
 288         OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
 289 }
 290
 291 /* ******************************************************************** */
 292 /* *                    Some useful macros                            * */
 293 /* ******************************************************************** */
 294
 295 static inline void scc_discard_buffers(struct scc_channel *scc)
 296 {
 297         unsigned long flags;
 298
 299         spin_lock_irqsave(&scc->lock, flags);
 300         if (scc->tx_buff != NULL)
 301         {
 302                 dev_kfree_skb(scc->tx_buff);
 303                 scc->tx_buff = NULL;
 304         }
 305
 306         while (skb_queue_len(&scc->tx_queue))
 307                 dev_kfree_skb(skb_dequeue(&scc->tx_queue));
 308
 309         spin_unlock_irqrestore(&scc->lock, flags);
 310 }
 311
 312
 313
 314 /* ******************************************************************** */
 315 /* *                    Interrupt Service Routines                    * */
 316 /* ******************************************************************** */
 317
 318
 319 /* ----> subroutines for the interrupt handlers <---- */
 320
 321 static inline void scc_notify(struct scc_channel *scc, int event)
 322 {
 323         struct sk_buff *skb;
 324         char *bp;
 325
 326         if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
 327                 return;
 328
 329         skb = dev_alloc_skb(2);
 330         if (skb != NULL)
 331         {
 332                 bp = skb_put(skb, 2);
 333                 *bp++ = PARAM_HWEVENT;
 334                 *bp++ = event;
 335                 scc_net_rx(scc, skb);
 336         } else
 337                 scc->stat.nospace++;
 338 }
 339
 340 static inline void flush_rx_FIFO(struct scc_channel *scc)
 341 {
 342         int k;
 343
 344         for (k=0; k<3; k++)
 345                 Inb(scc->data);
 346
 347         if(scc->rx_buff != NULL)                /* did we receive something? */
 348         {
 349                 scc->stat.rxerrs++;  /* then count it as an error */
 350                 dev_kfree_skb_irq(scc->rx_buff);
 351                 scc->rx_buff = NULL;
 352         }
 353 }
 354
 355 static void start_hunt(struct scc_channel *scc)
 356 {
 357         if ((scc->modem.clocksrc != CLK_EXTERNAL))
 358                 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
 359         or(scc,R3,ENT_HM|RxENABLE);  /* enable the receiver, hunt mode */
 360 }
 361
 362 /* ----> four different interrupt handlers for Tx, Rx, changing of      */
 363 /*       DCD/CTS and Rx/Tx errors                                       */
 364
 365 /* Transmitter interrupt handler */
 366 static inline void scc_txint(struct scc_channel *scc)
 367 {
 368         struct sk_buff *skb;
 369
 370         scc->stat.txints++;
 371         skb = scc->tx_buff;
 372
 373         /* send first octet */
 374
 375         if (skb == NULL)
 376         {
 377                 skb = skb_dequeue(&scc->tx_queue);
 378                 scc->tx_buff = skb;
 379                 netif_wake_queue(scc->dev);
 380
 381                 if (skb == NULL)
 382                 {
 383                         scc_tx_done(scc);
 384                         Outb(scc->ctrl, RES_Tx_P);
 385                         return;
 386                 }
 387
 388                 if (skb->len == 0)              /* Paranoia... */
 389                 {
 390                         dev_kfree_skb_irq(skb);
 391                         scc->tx_buff = NULL;
 392                         scc_tx_done(scc);
 393                         Outb(scc->ctrl, RES_Tx_P);
 394                         return;
 395                 }
 396
 397                 scc->stat.tx_state = TXS_ACTIVE;
 398
 399                 OutReg(scc->ctrl, R0, RES_Tx_CRC);
 400                                                 /* reset CRC generator */
 401                 or(scc,R10,ABUNDER);            /* re-install underrun protection */
 402                 Outb(scc->data,*skb->data);     /* send byte */
 403                 skb_pull(skb, 1);
 404
 405                 if (!scc->enhanced)             /* reset EOM latch */
 406                         Outb(scc->ctrl,RES_EOM_L);
 407                 return;
 408         }
 409
 410         /* End Of Frame... */
 411
 412         if (skb->len == 0)
 413         {
 414                 Outb(scc->ctrl, RES_Tx_P);      /* reset pending int */
 415                 cl(scc, R10, ABUNDER);          /* send CRC */
 416                 dev_kfree_skb_irq(skb);
 417                 scc->tx_buff = NULL;
 418                 scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
 419                 return;
 420         }
 421
 422         /* send octet */
 423
 424         Outb(scc->data,*skb->data);
 425         skb_pull(skb, 1);
 426 }
 427
 428
 429 /* External/Status interrupt handler */
 430 static inline void scc_exint(struct scc_channel *scc)
 431 {
 432         unsigned char status,changes,chg_and_stat;
 433
 434         scc->stat.exints++;
 435
 436         status = InReg(scc->ctrl,R0);
 437         changes = status ^ scc->status;
 438         chg_and_stat = changes & status;
 439
 440         /* ABORT: generated whenever DCD drops while receiving */
 441
 442         if (chg_and_stat & BRK_ABRT)            /* Received an ABORT */
 443                 flush_rx_FIFO(scc);
 444
 445         /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
 446
 447         if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
 448         {
 449                 if (status & SYNC_HUNT)
 450                 {
 451                         scc->dcd = 0;
 452                         flush_rx_FIFO(scc);
 453                         if ((scc->modem.clocksrc != CLK_EXTERNAL))
 454                                 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
 455                 } else {
 456                         scc->dcd = 1;
 457                 }
 458
 459                 scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
 460         }
 461
 462         /* DCD: on = start to receive packet, off = ABORT condition */
 463         /* (a successfully received packet generates a special condition int) */
 464
 465         if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
 466         {
 467                 if(status & DCD)                /* DCD is now ON */
 468                 {
 469                         start_hunt(scc);
 470                         scc->dcd = 1;
 471                 } else {                        /* DCD is now OFF */
 472                         cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
 473                         flush_rx_FIFO(scc);
 474                         scc->dcd = 0;
 475                 }
 476
 477                 scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
 478         }
 479
 480 #ifdef notdef
 481         /* CTS: use external TxDelay (what's that good for?!)
 482          * Anyway: If we _could_ use it (BayCom USCC uses CTS for
 483          * own purposes) we _should_ use the "autoenable" feature
 484          * of the Z8530 and not this interrupt...
 485          */
 486
 487         if (chg_and_stat & CTS)                 /* CTS is now ON */
 488         {
 489                 if (scc->kiss.txdelay == 0)     /* zero TXDELAY = wait for CTS */
 490                         scc_start_tx_timer(scc, t_txdelay, 0);
 491         }
 492 #endif
 493
 494         if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
 495         {
 496                 scc->stat.tx_under++;     /* oops, an underrun! count 'em */
 497                 Outb(scc->ctrl, RES_EXT_INT);   /* reset ext/status interrupts */
 498
 499                 if (scc->tx_buff != NULL)
 500                 {
 501                         dev_kfree_skb_irq(scc->tx_buff);
 502                         scc->tx_buff = NULL;
 503                 }
 504
 505                 or(scc,R10,ABUNDER);
 506                 scc_start_tx_timer(scc, t_txdelay, 0);  /* restart transmission */
 507         }
 508
 509         scc->status = status;
 510         Outb(scc->ctrl,RES_EXT_INT);
 511 }
 512
 513
 514 /* Receiver interrupt handler */
 515 static inline void scc_rxint(struct scc_channel *scc)
 516 {
 517         struct sk_buff *skb;
 518
 519         scc->stat.rxints++;
 520
 521         if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
 522         {
 523                 Inb(scc->data);         /* discard char */
 524                 or(scc,R3,ENT_HM);      /* enter hunt mode for next flag */
 525                 return;
 526         }
 527
 528         skb = scc->rx_buff;
 529
 530         if (skb == NULL)
 531         {
 532                 skb = dev_alloc_skb(scc->stat.bufsize);
 533                 if (skb == NULL)
 534                 {
 535                         scc->dev_stat.rx_dropped++;
 536                         scc->stat.nospace++;
 537                         Inb(scc->data);
 538                         or(scc, R3, ENT_HM);
 539                         return;
 540                 }
 541
 542                 scc->rx_buff = skb;
 543                 *(skb_put(skb, 1)) = 0; /* KISS data */
 544         }
 545
 546         if (skb->len >= scc->stat.bufsize)
 547         {
 548 #ifdef notdef
 549                 printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
 550 #endif
 551                 dev_kfree_skb_irq(skb);
 552                 scc->rx_buff = NULL;
 553                 Inb(scc->data);
 554                 or(scc, R3, ENT_HM);
 555                 return;
 556         }
 557
 558         *(skb_put(skb, 1)) = Inb(scc->data);
 559 }
 560
 561
 562 /* Receive Special Condition interrupt handler */
 563 static inline void scc_spint(struct scc_channel *scc)
 564 {
 565         unsigned char status;
 566         struct sk_buff *skb;
 567
 568         scc->stat.spints++;
 569
 570         status = InReg(scc->ctrl,R1);           /* read receiver status */
 571
 572         Inb(scc->data);                         /* throw away Rx byte */
 573         skb = scc->rx_buff;
 574
 575         if(status & Rx_OVR)                     /* receiver overrun */
 576         {
 577                 scc->stat.rx_over++;             /* count them */
 578                 or(scc,R3,ENT_HM);               /* enter hunt mode for next flag */
 579
 580                 if (skb != NULL)
 581                         dev_kfree_skb_irq(skb);
 582                 scc->rx_buff = skb = NULL;
 583         }
 584
 585         if(status & END_FR && skb != NULL)      /* end of frame */
 586         {
 587                 /* CRC okay, frame ends on 8 bit boundary and received something ? */
 588
 589                 if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
 590                 {
 591                         /* ignore last received byte (first of the CRC bytes) */
 592                         skb_trim(skb, skb->len-1);
 593                         scc_net_rx(scc, skb);
 594                         scc->rx_buff = NULL;
 595                         scc->stat.rxframes++;
 596                 } else {                                /* a bad frame */
 597                         dev_kfree_skb_irq(skb);
 598                         scc->rx_buff = NULL;
 599                         scc->stat.rxerrs++;
 600                 }
 601         }
 602
 603         Outb(scc->ctrl,ERR_RES);
 604 }
 605
 606
 607 /* ----> interrupt service routine for the Z8530 <---- */
 608
 609 static void scc_isr_dispatch(struct scc_channel *scc, int vector)
 610 {
 611         spin_lock(&scc->lock);
 612         switch (vector & VECTOR_MASK)
 613         {
 614                 case TXINT: scc_txint(scc); break;
 615                 case EXINT: scc_exint(scc); break;
 616                 case RXINT: scc_rxint(scc); break;
 617                 case SPINT: scc_spint(scc); break;
 618         }
 619         spin_unlock(&scc->lock);
 620 }
 621
 622 /* If the card has a latch for the interrupt vector (like the PA0HZP card)
 623    use it to get the number of the chip that generated the int.
 624    If not: poll all defined chips.
 625  */
 626
 627 #define SCC_IRQTIMEOUT 30000
 628
 629 static irqreturn_t scc_isr(int irq, void *dev_id, struct pt_regs *regs)
 630 {
 631         unsigned char vector;
 632         struct scc_channel *scc;
 633         struct scc_ctrl *ctrl;
 634         int k;
 635
 636         if (Vector_Latch)
 637         {
 638                 for(k=0; k < SCC_IRQTIMEOUT; k++)
 639                 {
 640                         Outb(Vector_Latch, 0);      /* Generate INTACK */
 641
 642                         /* Read the vector */
 643                         if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break;
 644                         if (vector & 0x01) break;
 645
 646                         scc=&SCC_Info[vector >> 3 ^ 0x01];
 647                         if (!scc->dev) break;
 648
 649                         scc_isr_dispatch(scc, vector);
 650
 651                         OutReg(scc->ctrl,R0,RES_H_IUS);              /* Reset Highest IUS */
 652                 }
 653
 654                 if (k == SCC_IRQTIMEOUT)
 655                         printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
 656
 657                 return IRQ_HANDLED;
 658         }
 659
 660         /* Find the SCC generating the interrupt by polling all attached SCCs
 661          * reading RR3A (the interrupt pending register)
 662          */
 663
 664         ctrl = SCC_ctrl;
 665         while (ctrl->chan_A)
 666         {
 667                 if (ctrl->irq != irq)
 668                 {
 669                         ctrl++;
 670                         continue;
 671                 }
 672
 673                 scc = NULL;
 674                 for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
 675                 {
 676                         vector=InReg(ctrl->chan_B,R2);  /* Read the vector */
 677                         if (vector & 0x01) break;
 678
 679                         scc = &SCC_Info[vector >> 3 ^ 0x01];
 680                         if (!scc->dev) break;
 681
 682                         scc_isr_dispatch(scc, vector);
 683                 }
 684
 685                 if (k == SCC_IRQTIMEOUT)
 686                 {
 687                         printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
 688                         break;
 689                 }
 690
 691                 /* This looks weird and it is. At least the BayCom USCC doesn't
 692                  * use the Interrupt Daisy Chain, thus we'll have to start
 693                  * all over again to be sure not to miss an interrupt from
 694                  * (any of) the other chip(s)...
 695                  * Honestly, the situation *is* braindamaged...
 696                  */
 697
 698                 if (scc != NULL)
 699                 {
 700                         OutReg(scc->ctrl,R0,RES_H_IUS);
 701                         ctrl = SCC_ctrl;
 702                 } else
 703                         ctrl++;
 704         }
 705         return IRQ_HANDLED;
 706 }
 707
 708
 709
 710 /* ******************************************************************** */
 711 /* *                    Init Channel                                    */
 712 /* ******************************************************************** */
 713
 714
 715 /* ----> set SCC channel speed <---- */
 716
 717 static inline void set_brg(struct scc_channel *scc, unsigned int tc)
 718 {
 719         cl(scc,R14,BRENABL);            /* disable baudrate generator */
 720         wr(scc,R12,tc & 255);           /* brg rate LOW */
 721         wr(scc,R13,tc >> 8);            /* brg rate HIGH */
 722         or(scc,R14,BRENABL);            /* enable baudrate generator */
 723 }
 724
 725 static inline void set_speed(struct scc_channel *scc)
 726 {
 727         unsigned long flags;
 728         spin_lock_irqsave(&scc->lock, flags);
 729
 730         if (scc->modem.speed > 0)       /* paranoia... */
 731                 set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
 732
 733         spin_unlock_irqrestore(&scc->lock, flags);
 734 }
 735
 736
 737 /* ----> initialize a SCC channel <---- */
 738
 739 static inline void init_brg(struct scc_channel *scc)
 740 {
 741         wr(scc, R14, BRSRC);                            /* BRG source = PCLK */
 742         OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]);    /* DPLL source = BRG */
 743         OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]);   /* DPLL NRZI mode */
 744 }
 745
 746 /*
 747  * Initialization according to the Z8530 manual (SGS-Thomson's version):
 748  *
 749  * 1. Modes and constants
 750  *
 751  * WR9  11000000        chip reset
 752  * WR4  XXXXXXXX        Tx/Rx control, async or sync mode
 753  * WR1  0XX00X00        select W/REQ (optional)
 754  * WR2  XXXXXXXX        program interrupt vector
 755  * WR3  XXXXXXX0        select Rx control
 756  * WR5  XXXX0XXX        select Tx control
 757  * WR6  XXXXXXXX        sync character
 758  * WR7  XXXXXXXX        sync character
 759  * WR9  000X0XXX        select interrupt control
 760  * WR10 XXXXXXXX        miscellaneous control (optional)
 761  * WR11 XXXXXXXX        clock control
 762  * WR12 XXXXXXXX        time constant lower byte (optional)
 763  * WR13 XXXXXXXX        time constant upper byte (optional)
 764  * WR14 XXXXXXX0        miscellaneous control
 765  * WR14 XXXSSSSS        commands (optional)
 766  *
 767  * 2. Enables
 768  *
 769  * WR14 000SSSS1        baud rate enable
 770  * WR3  SSSSSSS1        Rx enable
 771  * WR5  SSSS1SSS        Tx enable
 772  * WR0  10000000        reset Tx CRG (optional)
 773  * WR1  XSS00S00        DMA enable (optional)
 774  *
 775  * 3. Interrupt status
 776  *
 777  * WR15 XXXXXXXX        enable external/status
 778  * WR0  00010000        reset external status
 779  * WR0  00010000        reset external status twice
 780  * WR1  SSSXXSXX        enable Rx, Tx and Ext/status
 781  * WR9  000SXSSS        enable master interrupt enable
 782  *
 783  * 1 = set to one, 0 = reset to zero
 784  * X = user defined, S = same as previous init
 785  *
 786  *
 787  * Note that the implementation differs in some points from above scheme.
 788  *
 789  */
 790
 791 static void init_channel(struct scc_channel *scc)
 792 {
 793         del_timer(&scc->tx_t);
 794         del_timer(&scc->tx_wdog);
 795
 796         disable_irq(scc->irq);
 797
 798         wr(scc,R4,X1CLK|SDLC);          /* *1 clock, SDLC mode */
 799         wr(scc,R1,0);                   /* no W/REQ operation */
 800         wr(scc,R3,Rx8|RxCRC_ENAB);      /* RX 8 bits/char, CRC, disabled */
 801         wr(scc,R5,Tx8|DTR|TxCRC_ENAB);  /* TX 8 bits/char, disabled, DTR */
 802         wr(scc,R6,0);                   /* SDLC address zero (not used) */
 803         wr(scc,R7,FLAG);                /* SDLC flag value */
 804         wr(scc,R9,VIS);                 /* vector includes status */
 805         wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
 806         wr(scc,R14, 0);
 807
 808
 809 /* set clock sources:
 810
 811    CLK_DPLL: normal halfduplex operation
 812
 813                 RxClk: use DPLL
 814                 TxClk: use DPLL
 815                 TRxC mode DPLL output
 816
 817    CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
 818
 819                 BayCom:                 others:
 820
 821                 TxClk = pin RTxC        TxClk = pin TRxC
 822                 RxClk = pin TRxC        RxClk = pin RTxC
 823
 824
 825    CLK_DIVIDER:
 826                 RxClk = use DPLL
 827                 TxClk = pin RTxC
 828
 829                 BayCom:                 others:
 830                 pin TRxC = DPLL         pin TRxC = BRG
 831                 (RxClk * 1)             (RxClk * 32)
 832 */
 833
 834
 835         switch(scc->modem.clocksrc)
 836         {
 837                 case CLK_DPLL:
 838                         wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
 839                         init_brg(scc);
 840                         break;
 841
 842                 case CLK_DIVIDER:
 843                         wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
 844                         init_brg(scc);
 845                         break;
 846
 847                 case CLK_EXTERNAL:
 848                         wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
 849                         OutReg(scc->ctrl, R14, DISDPLL);
 850                         break;
 851
 852         }
 853
 854         set_speed(scc);                 /* set baudrate */
 855
 856         if(scc->enhanced)
 857         {
 858                 or(scc,R15,SHDLCE|FIFOE);       /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
 859                 wr(scc,R7,AUTOEOM);
 860         }
 861
 862         if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
 863                                                 /* DCD is now ON */
 864         {
 865                 start_hunt(scc);
 866         }
 867
 868         /* enable ABORT, DCD & SYNC/HUNT interrupts */
 869
 870         wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
 871
 872         Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
 873         Outb(scc->ctrl,RES_EXT_INT);    /* must be done twice */
 874
 875         or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
 876
 877         scc->status = InReg(scc->ctrl,R0);      /* read initial status */
 878
 879         or(scc,R9,MIE);                 /* master interrupt enable */
 880
 881         scc_init_timer(scc);
 882
 883         enable_irq(scc->irq);
 884 }
 885
 886
 887
 888
 889 /* ******************************************************************** */
 890 /* *                    SCC timer functions                           * */
 891 /* ******************************************************************** */
 892
 893
 894 /* ----> scc_key_trx sets the time constant for the baudrate
 895          generator and keys the transmitter                  <---- */
 896
 897 static void scc_key_trx(struct scc_channel *scc, char tx)
 898 {
 899         unsigned int time_const;
 900
 901         if (scc->brand & PRIMUS)
 902                 Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
 903
 904         if (scc->modem.speed < 300)
 905                 scc->modem.speed = 1200;
 906
 907         time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
 908
 909         disable_irq(scc->irq);
 910
 911         if (tx)
 912         {
 913                 or(scc, R1, TxINT_ENAB);        /* t_maxkeyup may have reset these */
 914                 or(scc, R15, TxUIE);
 915         }
 916
 917         if (scc->modem.clocksrc == CLK_DPLL)
 918         {                               /* force simplex operation */
 919                 if (tx)
 920                 {
 921 #ifdef CONFIG_SCC_TRXECHO
 922                         cl(scc, R3, RxENABLE|ENT_HM);   /* switch off receiver */
 923                         cl(scc, R15, DCDIE|SYNCIE);     /* No DCD changes, please */
 924 #endif
 925                         set_brg(scc, time_const);       /* reprogram baudrate generator */
 926
 927                         /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
 928                         wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
 929
 930                         /* By popular demand: tx_inhibit */
 931                         if (scc->kiss.tx_inhibit)
 932                         {
 933                                 or(scc,R5, TxENAB);
 934                                 scc->wreg[R5] |= RTS;
 935                         } else {
 936                                 or(scc,R5,RTS|TxENAB);  /* set the RTS line and enable TX */
 937                         }
 938                 } else {
 939                         cl(scc,R5,RTS|TxENAB);
 940
 941                         set_brg(scc, time_const);       /* reprogram baudrate generator */
 942
 943                         /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
 944                         wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
 945
 946 #ifndef CONFIG_SCC_TRXECHO
 947                         if (scc->kiss.softdcd)
 948 #endif
 949                         {
 950                                 or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
 951                                 start_hunt(scc);
 952                         }
 953                 }
 954         } else {
 955                 if (tx)
 956                 {
 957 #ifdef CONFIG_SCC_TRXECHO
 958                         if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
 959                         {
 960                                 cl(scc, R3, RxENABLE);
 961                                 cl(scc, R15, DCDIE|SYNCIE);
 962                         }
 963 #endif
 964
 965                         if (scc->kiss.tx_inhibit)
 966                         {
 967                                 or(scc,R5, TxENAB);
 968                                 scc->wreg[R5] |= RTS;
 969                         } else {
 970                                 or(scc,R5,RTS|TxENAB);  /* enable tx */
 971                         }
 972                 } else {
 973                         cl(scc,R5,RTS|TxENAB);          /* disable tx */
 974
 975                         if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
 976 #ifndef CONFIG_SCC_TRXECHO
 977                             scc->kiss.softdcd)
 978 #else
 979                             1)
 980 #endif
 981                         {
 982                                 or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
 983                                 start_hunt(scc);
 984                         }
 985                 }
 986         }
 987
 988         enable_irq(scc->irq);
 989 }
 990
 991
 992 /* ----> SCC timer interrupt handler and friends. <---- */
 993
 994 static void __scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
 995 {
 996         del_timer(&scc->tx_t);
 997
 998         if (when == 0)
 999         {
1000                 handler((unsigned long) scc);
1001         } else
1002         if (when != TIMER_OFF)
1003         {
1004                 scc->tx_t.data = (unsigned long) scc;
1005                 scc->tx_t.function = handler;
1006                 scc->tx_t.expires = jiffies + (when*HZ)/100;
1007                 add_timer(&scc->tx_t);
1008         }
1009 }
1010
1011 static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
1012 {
1013         unsigned long flags;
1014
1015         spin_lock_irqsave(&scc->lock, flags);
1016         __scc_start_tx_timer(scc, handler, when);
1017         spin_unlock_irqrestore(&scc->lock, flags);
1018 }
1019
1020 static void scc_start_defer(struct scc_channel *scc)
1021 {
1022         unsigned long flags;
1023
1024         spin_lock_irqsave(&scc->lock, flags);
1025         del_timer(&scc->tx_wdog);
1026
1027         if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1028         {
1029                 scc->tx_wdog.data = (unsigned long) scc;
1030                 scc->tx_wdog.function = t_busy;
1031                 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1032                 add_timer(&scc->tx_wdog);
1033         }
1034         spin_unlock_irqrestore(&scc->lock, flags);
1035 }
1036
1037 static void scc_start_maxkeyup(struct scc_channel *scc)
1038 {
1039         unsigned long flags;
1040
1041         spin_lock_irqsave(&scc->lock, flags);
1042         del_timer(&scc->tx_wdog);
1043
1044         if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1045         {
1046                 scc->tx_wdog.data = (unsigned long) scc;
1047                 scc->tx_wdog.function = t_maxkeyup;
1048                 scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1049                 add_timer(&scc->tx_wdog);
1050         }
1051         spin_unlock_irqrestore(&scc->lock, flags);
1052 }
1053
1054 /*
1055  * This is called from scc_txint() when there are no more frames to send.
1056  * Not exactly a timer function, but it is a close friend of the family...
1057  */
1058
1059 static void scc_tx_done(struct scc_channel *scc)
1060 {
1061         /*
1062          * trx remains keyed in fulldup mode 2 until t_idle expires.
1063          */
1064
1065         switch (scc->kiss.fulldup)
1066         {
1067                 case KISS_DUPLEX_LINK:
1068                         scc->stat.tx_state = TXS_IDLE2;
1069                         if (scc->kiss.idletime != TIMER_OFF)
1070                         scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100);
1071                         break;
1072                 case KISS_DUPLEX_OPTIMA:
1073                         scc_notify(scc, HWEV_ALL_SENT);
1074                         break;
1075                 default:
1076                         scc->stat.tx_state = TXS_BUSY;
1077                         scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1078         }
1079
1080         netif_wake_queue(scc->dev);
1081 }
1082
1083
1084 static unsigned char Rand = 17;
1085
1086 static inline int is_grouped(struct scc_channel *scc)
1087 {
1088         int k;
1089         struct scc_channel *scc2;
1090         unsigned char grp1, grp2;
1091
1092         grp1 = scc->kiss.group;
1093
1094         for (k = 0; k < (Nchips * 2); k++)
1095         {
1096                 scc2 = &SCC_Info[k];
1097                 grp2 = scc2->kiss.group;
1098
1099                 if (scc2 == scc || !(scc2->dev && grp2))
1100                         continue;
1101
1102                 if ((grp1 & 0x3f) == (grp2 & 0x3f))
1103                 {
1104                         if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1105                                 return 1;
1106
1107                         if ( (grp1 & RXGROUP) && scc2->dcd )
1108                                 return 1;
1109                 }
1110         }
1111         return 0;
1112 }
1113
1114 /* DWAIT and SLOTTIME expired
1115  *
1116  * fulldup == 0:  DCD is active or Rand > P-persistence: start t_busy timer
1117  *                else key trx and start txdelay
1118  * fulldup == 1:  key trx and start txdelay
1119  * fulldup == 2:  mintime expired, reset status or key trx and start txdelay
1120  */
1121
1122 static void t_dwait(unsigned long channel)
1123 {
1124         struct scc_channel *scc = (struct scc_channel *) channel;
1125
1126         if (scc->stat.tx_state == TXS_WAIT)     /* maxkeyup or idle timeout */
1127         {
1128                 if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */
1129                 {
1130                         scc->stat.tx_state = TXS_IDLE;
1131                         netif_wake_queue(scc->dev);     /* t_maxkeyup locked it. */
1132                         return;
1133                 }
1134
1135                 scc->stat.tx_state = TXS_BUSY;
1136         }
1137
1138         if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1139         {
1140                 Rand = Rand * 17 + 31;
1141
1142                 if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1143                 {
1144                         scc_start_defer(scc);
1145                         scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1146                         return ;
1147                 }
1148         }
1149
1150         if ( !(scc->wreg[R5] & RTS) )
1151         {
1152                 scc_key_trx(scc, TX_ON);
1153                 scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1154         } else {
1155                 scc_start_tx_timer(scc, t_txdelay, 0);
1156         }
1157 }
1158
1159
1160 /* TXDELAY expired
1161  *
1162  * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1163  */
1164
1165 static void t_txdelay(unsigned long channel)
1166 {
1167         struct scc_channel *scc = (struct scc_channel *) channel;
1168
1169         scc_start_maxkeyup(scc);
1170
1171         if (scc->tx_buff == NULL)
1172         {
1173                 disable_irq(scc->irq);
1174                 scc_txint(scc);
1175                 enable_irq(scc->irq);
1176         }
1177 }
1178
1179
1180 /* TAILTIME expired
1181  *
1182  * switch off transmitter. If we were stopped by Maxkeyup restart
1183  * transmission after 'mintime' seconds
1184  */
1185
1186 static void t_tail(unsigned long channel)
1187 {
1188         struct scc_channel *scc = (struct scc_channel *) channel;
1189         unsigned long flags;
1190
1191         spin_lock_irqsave(&scc->lock, flags);
1192         del_timer(&scc->tx_wdog);
1193         scc_key_trx(scc, TX_OFF);
1194         spin_unlock_irqrestore(&scc->lock, flags);
1195
1196         if (scc->stat.tx_state == TXS_TIMEOUT)          /* we had a timeout? */
1197         {
1198                 scc->stat.tx_state = TXS_WAIT;
1199
1200                 if (scc->kiss.mintime != TIMER_OFF)     /* try it again */
1201                         scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1202                 else
1203                         scc_start_tx_timer(scc, t_dwait, 0);
1204                 return;
1205         }
1206
1207         scc->stat.tx_state = TXS_IDLE;
1208         netif_wake_queue(scc->dev);
1209 }
1210
1211
1212 /* BUSY timeout
1213  *
1214  * throw away send buffers if DCD remains active too long.
1215  */
1216
1217 static void t_busy(unsigned long channel)
1218 {
1219         struct scc_channel *scc = (struct scc_channel *) channel;
1220
1221         del_timer(&scc->tx_t);
1222         netif_stop_queue(scc->dev);     /* don't pile on the wabbit! */
1223
1224         scc_discard_buffers(scc);
1225         scc->stat.txerrs++;
1226         scc->stat.tx_state = TXS_IDLE;
1227
1228         netif_wake_queue(scc->dev);
1229 }
1230
1231 /* MAXKEYUP timeout
1232  *
1233  * this is our watchdog.
1234  */
1235
1236 static void t_maxkeyup(unsigned long channel)
1237 {
1238         struct scc_channel *scc = (struct scc_channel *) channel;
1239         unsigned long flags;
1240
1241         spin_lock_irqsave(&scc->lock, flags);
1242         /*
1243          * let things settle down before we start to
1244          * accept new data.
1245          */
1246
1247         netif_stop_queue(scc->dev);
1248         scc_discard_buffers(scc);
1249
1250         del_timer(&scc->tx_t);
1251
1252         cl(scc, R1, TxINT_ENAB);        /* force an ABORT, but don't */
1253         cl(scc, R15, TxUIE);            /* count it. */
1254         OutReg(scc->ctrl, R0, RES_Tx_P);
1255
1256         spin_unlock_irqrestore(&scc->lock, flags);
1257
1258         scc->stat.txerrs++;
1259         scc->stat.tx_state = TXS_TIMEOUT;
1260         scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1261 }
1262
1263 /* IDLE timeout
1264  *
1265  * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1266  * of inactivity. We will not restart transmission before 'mintime'
1267  * expires.
1268  */
1269
1270 static void t_idle(unsigned long channel)
1271 {
1272         struct scc_channel *scc = (struct scc_channel *) channel;
1273
1274         del_timer(&scc->tx_wdog);
1275
1276         scc_key_trx(scc, TX_OFF);
1277
1278         if (scc->kiss.mintime != TIMER_OFF)
1279                 scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1280         scc->stat.tx_state = TXS_WAIT;
1281 }
1282
1283 static void scc_init_timer(struct scc_channel *scc)
1284 {
1285         unsigned long flags;
1286
1287         spin_lock_irqsave(&scc->lock, flags);
1288         scc->stat.tx_state = TXS_IDLE;
1289         spin_unlock_irqrestore(&scc->lock, flags);
1290 }
1291
1292
1293 /* ******************************************************************** */
1294 /* *                    Set/get L1 parameters                         * */
1295 /* ******************************************************************** */
1296
1297
1298 /*
1299  * this will set the "hardware" parameters through KISS commands or ioctl()
1300  */
1301
1302 #define CAST(x) (unsigned long)(x)
1303
1304 static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1305 {
1306         switch (cmd)
1307         {
1308                 case PARAM_TXDELAY:     scc->kiss.txdelay=arg;          break;
1309                 case PARAM_PERSIST:     scc->kiss.persist=arg;          break;
1310                 case PARAM_SLOTTIME:    scc->kiss.slottime=arg;         break;
1311                 case PARAM_TXTAIL:      scc->kiss.tailtime=arg;         break;
1312                 case PARAM_FULLDUP:     scc->kiss.fulldup=arg;          break;
1313                 case PARAM_DTR:         break; /* does someone need this? */
1314                 case PARAM_GROUP:       scc->kiss.group=arg;            break;
1315                 case PARAM_IDLE:        scc->kiss.idletime=arg;         break;
1316                 case PARAM_MIN:         scc->kiss.mintime=arg;          break;
1317                 case PARAM_MAXKEY:      scc->kiss.maxkeyup=arg;         break;
1318                 case PARAM_WAIT:        scc->kiss.waittime=arg;         break;
1319                 case PARAM_MAXDEFER:    scc->kiss.maxdefer=arg;         break;
1320                 case PARAM_TX:          scc->kiss.tx_inhibit=arg;       break;
1321
1322                 case PARAM_SOFTDCD:
1323                         scc->kiss.softdcd=arg;
1324                         if (arg)
1325                         {
1326                                 or(scc, R15, SYNCIE);
1327                                 cl(scc, R15, DCDIE);
1328                                 start_hunt(scc);
1329                         } else {
1330                                 or(scc, R15, DCDIE);
1331                                 cl(scc, R15, SYNCIE);
1332                         }
1333                         break;
1334
1335                 case PARAM_SPEED:
1336                         if (arg < 256)
1337                                 scc->modem.speed=arg*100;
1338                         else
1339                                 scc->modem.speed=arg;
1340
1341                         if (scc->stat.tx_state == 0)    /* only switch baudrate on rx... ;-) */
1342                                 set_speed(scc);
1343                         break;
1344
1345                 case PARAM_RTS:
1346                         if ( !(scc->wreg[R5] & RTS) )
1347                         {
1348                                 if (arg != TX_OFF)
1349                                         scc_key_trx(scc, TX_ON);
1350                                         scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1351                         } else {
1352                                 if (arg == TX_OFF)
1353                                 {
1354                                         scc->stat.tx_state = TXS_BUSY;
1355                                         scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1356                                 }
1357                         }
1358                         break;
1359
1360                 case PARAM_HWEVENT:
1361                         scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1362                         break;
1363
1364                 default:                return -EINVAL;
1365         }
1366
1367         return 0;
1368 }
1369
1370
1371
1372 static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1373 {
1374         switch (cmd)
1375         {
1376                 case PARAM_TXDELAY:     return CAST(scc->kiss.txdelay);
1377                 case PARAM_PERSIST:     return CAST(scc->kiss.persist);
1378                 case PARAM_SLOTTIME:    return CAST(scc->kiss.slottime);
1379                 case PARAM_TXTAIL:      return CAST(scc->kiss.tailtime);
1380                 case PARAM_FULLDUP:     return CAST(scc->kiss.fulldup);
1381                 case PARAM_SOFTDCD:     return CAST(scc->kiss.softdcd);
1382                 case PARAM_DTR:         return CAST((scc->wreg[R5] & DTR)? 1:0);
1383                 case PARAM_RTS:         return CAST((scc->wreg[R5] & RTS)? 1:0);
1384                 case PARAM_SPEED:       return CAST(scc->modem.speed);
1385                 case PARAM_GROUP:       return CAST(scc->kiss.group);
1386                 case PARAM_IDLE:        return CAST(scc->kiss.idletime);
1387                 case PARAM_MIN:         return CAST(scc->kiss.mintime);
1388                 case PARAM_MAXKEY:      return CAST(scc->kiss.maxkeyup);
1389                 case PARAM_WAIT:        return CAST(scc->kiss.waittime);
1390                 case PARAM_MAXDEFER:    return CAST(scc->kiss.maxdefer);
1391                 case PARAM_TX:          return CAST(scc->kiss.tx_inhibit);
1392                 default:                return NO_SUCH_PARAM;
1393         }
1394
1395 }
1396
1397 #undef CAST
1398
1399 /* ******************************************************************* */
1400 /* *                    Send calibration pattern                     * */
1401 /* ******************************************************************* */
1402
1403 static void scc_stop_calibrate(unsigned long channel)
1404 {
1405         struct scc_channel *scc = (struct scc_channel *) channel;
1406         unsigned long flags;
1407
1408         spin_lock_irqsave(&scc->lock, flags);
1409         del_timer(&scc->tx_wdog);
1410         scc_key_trx(scc, TX_OFF);
1411         wr(scc, R6, 0);
1412         wr(scc, R7, FLAG);
1413         Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
1414         Outb(scc->ctrl,RES_EXT_INT);
1415
1416         netif_wake_queue(scc->dev);
1417         spin_unlock_irqrestore(&scc->lock, flags);
1418 }
1419
1420
1421 static void
1422 scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1423 {
1424         unsigned long flags;
1425
1426         spin_lock_irqsave(&scc->lock, flags);
1427         netif_stop_queue(scc->dev);
1428         scc_discard_buffers(scc);
1429
1430         del_timer(&scc->tx_wdog);
1431
1432         scc->tx_wdog.data = (unsigned long) scc;
1433         scc->tx_wdog.function = scc_stop_calibrate;
1434         scc->tx_wdog.expires = jiffies + HZ*duration;
1435         add_timer(&scc->tx_wdog);
1436
1437         /* This doesn't seem to work. Why not? */
1438         wr(scc, R6, 0);
1439         wr(scc, R7, pattern);
1440
1441         /*
1442          * Don't know if this works.
1443          * Damn, where is my Z8530 programming manual...?
1444          */
1445
1446         Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
1447         Outb(scc->ctrl,RES_EXT_INT);
1448
1449         scc_key_trx(scc, TX_ON);
1450         spin_unlock_irqrestore(&scc->lock, flags);
1451 }
1452
1453 /* ******************************************************************* */
1454 /* *            Init channel structures, special HW, etc...          * */
1455 /* ******************************************************************* */
1456
1457 /*
1458  * Reset the Z8530s and setup special hardware
1459  */
1460
1461 static void z8530_init(void)
1462 {
1463         struct scc_channel *scc;
1464         int chip, k;
1465         unsigned long flags;
1466         char *flag;
1467
1468
1469         printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1470
1471         flag=" ";
1472         for (k = 0; k < NR_IRQS; k++)
1473                 if (Ivec[k].used)
1474                 {
1475                         printk("%s%d", flag, k);
1476                         flag=",";
1477                 }
1478         printk("\n");
1479
1480
1481         /* reset and pre-init all chips in the system */
1482         for (chip = 0; chip < Nchips; chip++)
1483         {
1484                 scc=&SCC_Info[2*chip];
1485                 if (!scc->ctrl) continue;
1486
1487                 /* Special SCC cards */
1488
1489                 if(scc->brand & EAGLE)                  /* this is an EAGLE card */
1490                         Outb(scc->special,0x08);        /* enable interrupt on the board */
1491
1492                 if(scc->brand & (PC100 | PRIMUS))       /* this is a PC100/PRIMUS card */
1493                         Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1494
1495
1496                 /* Reset and pre-init Z8530 */
1497
1498                 spin_lock_irqsave(&scc->lock, flags);
1499
1500                 Outb(scc->ctrl, 0);
1501                 OutReg(scc->ctrl,R9,FHWRES);            /* force hardware reset */
1502                 udelay(100);                            /* give it 'a bit' more time than required */
1503                 wr(scc, R2, chip*16);                   /* interrupt vector */
1504                 wr(scc, R9, VIS);                       /* vector includes status */
1505                 spin_unlock_irqrestore(&scc->lock, flags);
1506         }
1507
1508
1509         Driver_Initialized = 1;
1510 }
1511
1512 /*
1513  * Allocate device structure, err, instance, and register driver
1514  */
1515
1516 static int scc_net_alloc(const char *name, struct scc_channel *scc)
1517 {
1518         int err;
1519         struct net_device *dev;
1520
1521         dev = alloc_netdev(0, name, scc_net_setup);
1522         if (!dev)
1523                 return -ENOMEM;
1524
1525         dev->priv = scc;
1526         scc->dev = dev;
1527         spin_lock_init(&scc->lock);
1528
1529         err = register_netdev(dev);
1530         if (err) {
1531                 printk(KERN_ERR "%s: can't register network device (%d)\n",
1532                        name, err);
1533                 free_netdev(dev);
1534                 scc->dev = NULL;
1535                 return err;
1536         }
1537
1538         return 0;
1539 }
1540
1541
1542
1543 /* ******************************************************************** */
1544 /* *                        Network driver methods                    * */
1545 /* ******************************************************************** */
1546
1547 static unsigned char ax25_bcast[AX25_ADDR_LEN] =
1548 {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
1549 static unsigned char ax25_nocall[AX25_ADDR_LEN] =
1550 {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
1551
1552 /* ----> Initialize device <----- */
1553
1554 static void scc_net_setup(struct net_device *dev)
1555 {
1556         SET_MODULE_OWNER(dev);
1557         dev->tx_queue_len    = 16;      /* should be enough... */
1558
1559         dev->open            = scc_net_open;
1560         dev->stop            = scc_net_close;
1561
1562         dev->hard_start_xmit = scc_net_tx;
1563         dev->hard_header     = ax25_encapsulate;
1564         dev->rebuild_header  = ax25_rebuild_header;
1565         dev->set_mac_address = scc_net_set_mac_address;
1566         dev->get_stats       = scc_net_get_stats;
1567         dev->do_ioctl        = scc_net_ioctl;
1568         dev->tx_timeout      = NULL;
1569
1570         memcpy(dev->broadcast, ax25_bcast,  AX25_ADDR_LEN);
1571         memcpy(dev->dev_addr,  ax25_nocall, AX25_ADDR_LEN);
1572
1573         dev->flags      = 0;
1574
1575         dev->type = ARPHRD_AX25;
1576         dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1577         dev->mtu = AX25_DEF_PACLEN;
1578         dev->addr_len = AX25_ADDR_LEN;
1579
1580 }
1581
1582 /* ----> open network device <---- */
1583
1584 static int scc_net_open(struct net_device *dev)
1585 {
1586         struct scc_channel *scc = (struct scc_channel *) dev->priv;
1587
1588         if (!scc->init)
1589                 return -EINVAL;
1590
1591         scc->tx_buff = NULL;
1592         skb_queue_head_init(&scc->tx_queue);
1593
1594         init_channel(scc);
1595
1596         netif_start_queue(dev);
1597         return 0;
1598 }
1599
1600 /* ----> close network device <---- */
1601
1602 static int scc_net_close(struct net_device *dev)
1603 {
1604         struct scc_channel *scc = (struct scc_channel *) dev->priv;
1605         unsigned long flags;
1606
1607         netif_stop_queue(dev);
1608
1609         spin_lock_irqsave(&scc->lock, flags);
1610         Outb(scc->ctrl,0);              /* Make sure pointer is written */
1611         wr(scc,R1,0);                   /* disable interrupts */
1612         wr(scc,R3,0);
1613         spin_unlock_irqrestore(&scc->lock, flags);
1614
1615         del_timer_sync(&scc->tx_t);
1616         del_timer_sync(&scc->tx_wdog);
1617
1618         scc_discard_buffers(scc);
1619
1620         return 0;
1621 }
1622
1623 /* ----> receive frame, called from scc_rxint() <---- */
1624
1625 static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1626 {
1627         if (skb->len == 0) {
1628                 dev_kfree_skb_irq(skb);
1629                 return;
1630         }
1631
1632         scc->dev_stat.rx_packets++;
1633
1634         skb->dev      = scc->dev;
1635         skb->protocol = htons(ETH_P_AX25);
1636         skb->mac.raw  = skb->data;
1637         skb->pkt_type = PACKET_HOST;
1638
1639         netif_rx(skb);
1640         scc->dev->last_rx = jiffies;
1641         return;
1642 }
1643
1644 /* ----> transmit frame <---- */
1645
1646 static int scc_net_tx(struct sk_buff *skb, struct net_device *dev)
1647 {
1648         struct scc_channel *scc = (struct scc_channel *) dev->priv;
1649         unsigned long flags;
1650         char kisscmd;
1651
1652         if (skb->len > scc->stat.bufsize || skb->len < 2) {
1653                 scc->dev_stat.tx_dropped++;     /* bogus frame */
1654                 dev_kfree_skb(skb);
1655                 return 0;
1656         }
1657
1658         scc->dev_stat.tx_packets++;
1659         scc->stat.txframes++;
1660
1661         kisscmd = *skb->data & 0x1f;
1662         skb_pull(skb, 1);
1663
1664         if (kisscmd) {
1665                 scc_set_param(scc, kisscmd, *skb->data);
1666                 dev_kfree_skb(skb);
1667                 return 0;
1668         }
1669
1670         spin_lock_irqsave(&scc->lock, flags);
1671
1672         if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) {
1673                 struct sk_buff *skb_del;
1674                 skb_del = skb_dequeue(&scc->tx_queue);
1675                 dev_kfree_skb(skb_del);
1676         }
1677         skb_queue_tail(&scc->tx_queue, skb);
1678         dev->trans_start = jiffies;
1679
1680
1681         /*
1682          * Start transmission if the trx state is idle or
1683          * t_idle hasn't expired yet. Use dwait/persistence/slottime
1684          * algorithm for normal halfduplex operation.
1685          */
1686
1687         if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) {
1688                 scc->stat.tx_state = TXS_BUSY;
1689                 if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1690                         __scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1691                 else
1692                         __scc_start_tx_timer(scc, t_dwait, 0);
1693         }
1694         spin_unlock_irqrestore(&scc->lock, flags);
1695         return 0;
1696 }
1697
1698 /* ----> ioctl functions <---- */
1699
1700 /*
1701  * SIOCSCCCFG           - configure driver      arg: (struct scc_hw_config *) arg
1702  * SIOCSCCINI           - initialize driver     arg: ---
1703  * SIOCSCCCHANINI       - initialize channel    arg: (struct scc_modem *) arg
1704  * SIOCSCCSMEM          - set memory            arg: (struct scc_mem_config *) arg
1705  * SIOCSCCGKISS         - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1706  * SIOCSCCSKISS         - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1707  * SIOCSCCGSTAT         - get driver status     arg: (struct scc_stat *) arg
1708  * SIOCSCCCAL           - send calib. pattern   arg: (struct scc_calibrate *) arg
1709  */
1710
1711 static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1712 {
1713         struct scc_kiss_cmd kiss_cmd;
1714         struct scc_mem_config memcfg;
1715         struct scc_hw_config hwcfg;
1716         struct scc_calibrate cal;
1717         struct scc_channel *scc;
1718         int chan;
1719         unsigned char device_name[IFNAMSIZ];
1720         void *arg;
1721
1722         scc = (struct scc_channel *) dev->priv;
1723         arg = (void *) ifr->ifr_data;
1724
1725         if (!Driver_Initialized)
1726         {
1727                 if (cmd == SIOCSCCCFG)
1728                 {
1729                         int found = 1;
1730
1731                         if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1732                         if (!arg) return -EFAULT;
1733
1734                         if (Nchips >= SCC_MAXCHIPS)
1735                                 return -EINVAL;
1736
1737                         if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1738                                 return -EFAULT;
1739
1740                         if (hwcfg.irq == 2) hwcfg.irq = 9;
1741
1742                         if (hwcfg.irq < 0 || hwcfg.irq >= NR_IRQS)
1743                                 return -EINVAL;
1744
1745                         if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1746                         {
1747                                 if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL))
1748                                         printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1749                                 else
1750                                         Ivec[hwcfg.irq].used = 1;
1751                         }
1752
1753                         if (hwcfg.vector_latch && !Vector_Latch) {
1754                                 if (!request_region(hwcfg.vector_latch, 1, "scc vector latch"))
1755                                         printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch);
1756                                 else
1757                                         Vector_Latch = hwcfg.vector_latch;
1758                         }
1759
1760                         if (hwcfg.clock == 0)
1761                                 hwcfg.clock = SCC_DEFAULT_CLOCK;
1762
1763 #ifndef SCC_DONT_CHECK
1764
1765                         if(request_region(hwcfg.ctrl_a, 1, "scc-probe"))
1766                         {
1767                                 disable_irq(hwcfg.irq);
1768                                 Outb(hwcfg.ctrl_a, 0);
1769                                 OutReg(hwcfg.ctrl_a, R9, FHWRES);
1770                                 udelay(100);
1771                                 OutReg(hwcfg.ctrl_a,R13,0x55);          /* is this chip really there? */
1772                                 udelay(5);
1773
1774                                 if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1775                                         found = 0;
1776                                 enable_irq(hwcfg.irq);
1777                                 release_region(hwcfg.ctrl_a, 1);
1778                         }
1779                         else
1780                                 found = 0;
1781 #endif
1782
1783                         if (found)
1784                         {
1785                                 SCC_Info[2*Nchips  ].ctrl = hwcfg.ctrl_a;
1786                                 SCC_Info[2*Nchips  ].data = hwcfg.data_a;
1787                                 SCC_Info[2*Nchips  ].irq  = hwcfg.irq;
1788                                 SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1789                                 SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1790                                 SCC_Info[2*Nchips+1].irq  = hwcfg.irq;
1791
1792                                 SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1793                                 SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1794                                 SCC_ctrl[Nchips].irq    = hwcfg.irq;
1795                         }
1796
1797
1798                         for (chan = 0; chan < 2; chan++)
1799                         {
1800                                 sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1801
1802                                 SCC_Info[2*Nchips+chan].special = hwcfg.special;
1803                                 SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1804                                 SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1805                                 SCC_Info[2*Nchips+chan].option = hwcfg.option;
1806                                 SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1807
1808 #ifdef SCC_DONT_CHECK
1809                                 printk(KERN_INFO "%s: data port = 0x%3.3x  control port = 0x%3.3x\n",
1810                                         device_name,
1811                                         SCC_Info[2*Nchips+chan].data,
1812                                         SCC_Info[2*Nchips+chan].ctrl);
1813
1814 #else
1815                                 printk(KERN_INFO "%s: data port = 0x%3.3lx  control port = 0x%3.3lx -- %s\n",
1816                                         device_name,
1817                                         chan? hwcfg.data_b : hwcfg.data_a,
1818                                         chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1819                                         found? "found" : "missing");
1820 #endif
1821
1822                                 if (found)
1823                                 {
1824                                         request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1825                                         request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1826                                         if (Nchips+chan != 0 &&
1827                                             scc_net_alloc(device_name,
1828                                                           &SCC_Info[2*Nchips+chan]))
1829                                             return -EINVAL;
1830                                 }
1831                         }
1832
1833                         if (found) Nchips++;
1834
1835                         return 0;
1836                 }
1837
1838                 if (cmd == SIOCSCCINI)
1839                 {
1840                         if (!capable(CAP_SYS_RAWIO))
1841                                 return -EPERM;
1842
1843                         if (Nchips == 0)
1844                                 return -EINVAL;
1845
1846                         z8530_init();
1847                         return 0;
1848                 }
1849
1850                 return -EINVAL; /* confuse the user */
1851         }
1852
1853         if (!scc->init)
1854         {
1855                 if (cmd == SIOCSCCCHANINI)
1856                 {
1857                         if (!capable(CAP_NET_ADMIN)) return -EPERM;
1858                         if (!arg) return -EINVAL;
1859
1860                         scc->stat.bufsize   = SCC_BUFSIZE;
1861
1862                         if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1863                                 return -EINVAL;
1864
1865                         /* default KISS Params */
1866
1867                         if (scc->modem.speed < 4800)
1868                         {
1869                                 scc->kiss.txdelay = 36;         /* 360 ms */
1870                                 scc->kiss.persist = 42;         /* 25% persistence */                   /* was 25 */
1871                                 scc->kiss.slottime = 16;        /* 160 ms */
1872                                 scc->kiss.tailtime = 4;         /* minimal reasonable value */
1873                                 scc->kiss.fulldup = 0;          /* CSMA */
1874                                 scc->kiss.waittime = 50;        /* 500 ms */
1875                                 scc->kiss.maxkeyup = 10;        /* 10 s */
1876                                 scc->kiss.mintime = 3;          /* 3 s */
1877                                 scc->kiss.idletime = 30;        /* 30 s */
1878                                 scc->kiss.maxdefer = 120;       /* 2 min */
1879                                 scc->kiss.softdcd = 0;          /* hardware dcd */
1880                         } else {
1881                                 scc->kiss.txdelay = 10;         /* 100 ms */
1882                                 scc->kiss.persist = 64;         /* 25% persistence */                   /* was 25 */
1883                                 scc->kiss.slottime = 8;         /* 160 ms */
1884                                 scc->kiss.tailtime = 1;         /* minimal reasonable value */
1885                                 scc->kiss.fulldup = 0;          /* CSMA */
1886                                 scc->kiss.waittime = 50;        /* 500 ms */
1887                                 scc->kiss.maxkeyup = 7;         /* 7 s */
1888                                 scc->kiss.mintime = 3;          /* 3 s */
1889                                 scc->kiss.idletime = 30;        /* 30 s */
1890                                 scc->kiss.maxdefer = 120;       /* 2 min */
1891                                 scc->kiss.softdcd = 0;          /* hardware dcd */
1892                         }
1893
1894                         scc->tx_buff = NULL;
1895                         skb_queue_head_init(&scc->tx_queue);
1896                         scc->init = 1;
1897
1898                         return 0;
1899                 }
1900
1901                 return -EINVAL;
1902         }
1903
1904         switch(cmd)
1905         {
1906                 case SIOCSCCRESERVED:
1907                         return -ENOIOCTLCMD;
1908
1909                 case SIOCSCCSMEM:
1910                         if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1911                         if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1912                                 return -EINVAL;
1913                         scc->stat.bufsize   = memcfg.bufsize;
1914                         return 0;
1915
1916                 case SIOCSCCGSTAT:
1917                         if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1918                                 return -EINVAL;
1919                         return 0;
1920
1921                 case SIOCSCCGKISS:
1922                         if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1923                                 return -EINVAL;
1924                         kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
1925                         if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
1926                                 return -EINVAL;
1927                         return 0;
1928
1929                 case SIOCSCCSKISS:
1930                         if (!capable(CAP_NET_ADMIN)) return -EPERM;
1931                         if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1932                                 return -EINVAL;
1933                         return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
1934
1935                 case SIOCSCCCAL:
1936                         if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1937                         if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
1938                                 return -EINVAL;
1939
1940                         scc_start_calibrate(scc, cal.time, cal.pattern);
1941                         return 0;
1942
1943                 default:
1944                         return -ENOIOCTLCMD;
1945
1946         }
1947
1948         return -EINVAL;
1949 }
1950
1951 /* ----> set interface callsign <---- */
1952
1953 static int scc_net_set_mac_address(struct net_device *dev, void *addr)
1954 {
1955         struct sockaddr *sa = (struct sockaddr *) addr;
1956         memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1957         return 0;
1958 }
1959
1960 /* ----> get statistics <---- */
1961
1962 static struct net_device_stats *scc_net_get_stats(struct net_device *dev)
1963 {
1964         struct scc_channel *scc = (struct scc_channel *) dev->priv;
1965
1966         scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
1967         scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
1968         scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
1969         scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
1970
1971         return &scc->dev_stat;
1972 }
1973
1974 /* ******************************************************************** */
1975 /* *            dump statistics to /proc/net/z8530drv                 * */
1976 /* ******************************************************************** */
1977
1978 #ifdef CONFIG_PROC_FS
1979
1980 static inline struct scc_channel *scc_net_seq_idx(loff_t pos)
1981 {
1982         int k;
1983
1984         for (k = 0; k < Nchips*2; ++k) {
1985                 if (!SCC_Info[k].init)
1986                         continue;
1987                 if (pos-- == 0)
1988                         return &SCC_Info[k];
1989         }
1990         return NULL;
1991 }
1992
1993 static void *scc_net_seq_start(struct seq_file *seq, loff_t *pos)
1994 {
1995         return *pos ? scc_net_seq_idx(*pos - 1) : SEQ_START_TOKEN;
1996
1997 }
1998
1999 static void *scc_net_seq_next(struct seq_file *seq, void *v, loff_t *pos)
2000 {
2001         unsigned k;
2002         struct scc_channel *scc = v;
2003         ++*pos;
2004
2005         for (k = (v == SEQ_START_TOKEN) ? 0 : (scc - SCC_Info)+1;
2006              k < Nchips*2; ++k) {
2007                 if (SCC_Info[k].init)
2008                         return &SCC_Info[k];
2009         }
2010         return NULL;
2011 }
2012
2013 static void scc_net_seq_stop(struct seq_file *seq, void *v)
2014 {
2015 }
2016
2017 static int scc_net_seq_show(struct seq_file *seq, void *v)
2018 {
2019         if (v == SEQ_START_TOKEN) {
2020                 seq_puts(seq, "z8530drv-"VERSION"\n");
2021         } else if (!Driver_Initialized) {
2022                 seq_puts(seq, "not initialized\n");
2023         } else if (!Nchips) {
2024                 seq_puts(seq, "chips missing\n");
2025         } else {
2026                 const struct scc_channel *scc = v;
2027                 const struct scc_stat *stat = &scc->stat;
2028                 const struct scc_kiss *kiss = &scc->kiss;
2029
2030
2031                 /* dev  data ctrl irq clock brand enh vector special option
2032                  *      baud nrz clocksrc softdcd bufsize
2033                  *      rxints txints exints spints
2034                  *      rcvd rxerrs over / xmit txerrs under / nospace bufsize
2035                  *      txd pers slot tail ful wait min maxk idl defr txof grp
2036                  *      W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2037                  *      R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2038                  */
2039
2040                 seq_printf(seq, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2041                                 scc->dev->name,
2042                                 scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2043                                 scc->enhanced, Vector_Latch, scc->special,
2044                                 scc->option);
2045                 seq_printf(seq, "\t%lu %d %d %d %d\n",
2046                                 scc->modem.speed, scc->modem.nrz,
2047                                 scc->modem.clocksrc, kiss->softdcd,
2048                                 stat->bufsize);
2049                 seq_printf(seq, "\t%lu %lu %lu %lu\n",
2050                                 stat->rxints, stat->txints, stat->exints, stat->spints);
2051                 seq_printf(seq, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2052                                 stat->rxframes, stat->rxerrs, stat->rx_over,
2053                                 stat->txframes, stat->txerrs, stat->tx_under,
2054                                 stat->nospace,  stat->tx_state);
2055
2056 #define K(x) kiss->x
2057                 seq_printf(seq, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2058                                 K(txdelay), K(persist), K(slottime), K(tailtime),
2059                                 K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2060                                 K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2061 #undef K
2062 #ifdef SCC_DEBUG
2063                 {
2064                         int reg;
2065
2066                 seq_printf(seq, "\tW ");
2067                         for (reg = 0; reg < 16; reg++)
2068                                 seq_printf(seq, "%2.2x ", scc->wreg[reg]);
2069                         seq_printf(seq, "\n");
2070
2071                 seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2072                         for (reg = 3; reg < 8; reg++)
2073                                 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2074                         seq_printf(seq, "XX ");
2075                         for (reg = 9; reg < 16; reg++)
2076                                 seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2077                         seq_printf(seq, "\n");
2078                 }
2079 #endif
2080                 seq_putc(seq, '\n');
2081         }
2082
2083         return 0;
2084 }
2085
2086 static struct seq_operations scc_net_seq_ops = {
2087         .start  = scc_net_seq_start,
2088         .next   = scc_net_seq_next,
2089         .stop   = scc_net_seq_stop,
2090         .show   = scc_net_seq_show,
2091 };
2092
2093
2094 static int scc_net_seq_open(struct inode *inode, struct file *file)
2095 {
2096         return seq_open(file, &scc_net_seq_ops);
2097 }
2098
2099 static struct file_operations scc_net_seq_fops = {
2100         .owner   = THIS_MODULE,
2101         .open    = scc_net_seq_open,
2102         .read    = seq_read,
2103         .llseek  = seq_lseek,
2104         .release = seq_release_private,
2105 };
2106
2107 #endif /* CONFIG_PROC_FS */
2108
2109
2110 /* ******************************************************************** */
2111 /* *                    Init SCC driver                               * */
2112 /* ******************************************************************** */
2113
2114 static int __init scc_init_driver (void)
2115 {
2116         char devname[IFNAMSIZ];
2117
2118         printk(banner);
2119
2120         sprintf(devname,"%s0", SCC_DriverName);
2121
2122         if (scc_net_alloc(devname, SCC_Info)) {
2123                 printk(KERN_ERR "z8530drv: cannot initialize module\n");
2124                 return -EIO;
2125         }
2126
2127         proc_net_fops_create("z8530drv", 0, &scc_net_seq_fops);
2128
2129         return 0;
2130 }
2131
2132 static void __exit scc_cleanup_driver(void)
2133 {
2134         io_port ctrl;
2135         int k;
2136         struct scc_channel *scc;
2137         struct net_device *dev;
2138
2139         if (Nchips == 0 && (dev = SCC_Info[0].dev))
2140         {
2141                 unregister_netdev(dev);
2142                 free_netdev(dev);
2143         }
2144
2145         /* Guard against chip prattle */
2146         local_irq_disable();
2147
2148         for (k = 0; k < Nchips; k++)
2149                 if ( (ctrl = SCC_ctrl[k].chan_A) )
2150                 {
2151                         Outb(ctrl, 0);
2152                         OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2153                         udelay(50);
2154                 }
2155
2156         /* To unload the port must be closed so no real IRQ pending */
2157         for (k=0; k < NR_IRQS ; k++)
2158                 if (Ivec[k].used) free_irq(k, NULL);
2159
2160         local_irq_enable();
2161
2162         /* Now clean up */
2163         for (k = 0; k < Nchips*2; k++)
2164         {
2165                 scc = &SCC_Info[k];
2166                 if (scc->ctrl)
2167                 {
2168                         release_region(scc->ctrl, 1);
2169                         release_region(scc->data, 1);
2170                 }
2171                 if (scc->dev)
2172                 {
2173                         unregister_netdev(scc->dev);
2174                         free_netdev(scc->dev);
2175                 }
2176         }
2177
2178
2179         if (Vector_Latch)
2180                 release_region(Vector_Latch, 1);
2181
2182         proc_net_remove("z8530drv");
2183 }
2184
2185 MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
2186 MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
2187 MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards for Amateur Radio");
2188 MODULE_LICENSE("GPL");
2189 module_init(scc_init_driver);
2190 module_exit(scc_cleanup_driver);