arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350
 351 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 352 {
 353         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 354                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 355         else
 356                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 357 }
 358
 359 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 360 {
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362         vcpu->arch.nmi_pending = 1;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 365
 366 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 367 {
 368         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 371
 372 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 377
 378 /*
 379  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 380  * a #GP and return false.
 381  */
 382 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 383 {
 384         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 385                 return true;
 386         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 387         return false;
 388 }
 389 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 390
 391 /*
 392  * This function will be used to read from the physical memory of the currently
 393  * running guest. The difference to kvm_read_guest_page is that this function
 394  * can read from guest physical or from the guest's guest physical memory.
 395  */
 396 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 397                             gfn_t ngfn, void *data, int offset, int len,
 398                             u32 access)
 399 {
 400         gfn_t real_gfn;
 401         gpa_t ngpa;
 402
 403         ngpa     = gfn_to_gpa(ngfn);
 404         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 405         if (real_gfn == UNMAPPED_GVA)
 406                 return -EFAULT;
 407
 408         real_gfn = gpa_to_gfn(real_gfn);
 409
 410         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 413
 414 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 415                                void *data, int offset, int len, u32 access)
 416 {
 417         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 418                                        data, offset, len, access);
 419 }
 420
 421 /*
 422  * Load the pae pdptrs.  Return true is they are all valid.
 423  */
 424 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 425 {
 426         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 427         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 428         int i;
 429         int ret;
 430         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 431
 432         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 433                                       offset * sizeof(u64), sizeof(pdpte),
 434                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 435         if (ret < 0) {
 436                 ret = 0;
 437                 goto out;
 438         }
 439         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 440                 if (is_present_gpte(pdpte[i]) &&
 441                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 442                         ret = 0;
 443                         goto out;
 444                 }
 445         }
 446         ret = 1;
 447
 448         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 449         __set_bit(VCPU_EXREG_PDPTR,
 450                   (unsigned long *)&vcpu->arch.regs_avail);
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_dirty);
 453 out:
 454
 455         return ret;
 456 }
 457 EXPORT_SYMBOL_GPL(load_pdptrs);
 458
 459 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 460 {
 461         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 462         bool changed = true;
 463         int offset;
 464         gfn_t gfn;
 465         int r;
 466
 467         if (is_long_mode(vcpu) || !is_pae(vcpu))
 468                 return false;
 469
 470         if (!test_bit(VCPU_EXREG_PDPTR,
 471                       (unsigned long *)&vcpu->arch.regs_avail))
 472                 return true;
 473
 474         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 475         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 476         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 477                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 478         if (r < 0)
 479                 goto out;
 480         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 481 out:
 482
 483         return changed;
 484 }
 485
 486 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 487 {
 488         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 489         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 490                                     X86_CR0_CD | X86_CR0_NW;
 491
 492         cr0 |= X86_CR0_ET;
 493
 494 #ifdef CONFIG_X86_64
 495         if (cr0 & 0xffffffff00000000UL)
 496                 return 1;
 497 #endif
 498
 499         cr0 &= ~CR0_RESERVED_BITS;
 500
 501         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 502                 return 1;
 503
 504         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 505                 return 1;
 506
 507         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 508 #ifdef CONFIG_X86_64
 509                 if ((vcpu->arch.efer & EFER_LME)) {
 510                         int cs_db, cs_l;
 511
 512                         if (!is_pae(vcpu))
 513                                 return 1;
 514                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 515                         if (cs_l)
 516                                 return 1;
 517                 } else
 518 #endif
 519                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 520                                                  kvm_read_cr3(vcpu)))
 521                         return 1;
 522         }
 523
 524         kvm_x86_ops->set_cr0(vcpu, cr0);
 525
 526         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 527                 kvm_clear_async_pf_completion_queue(vcpu);
 528                 kvm_async_pf_hash_reset(vcpu);
 529         }
 530
 531         if ((cr0 ^ old_cr0) & update_bits)
 532                 kvm_mmu_reset_context(vcpu);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 536
 537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 538 {
 539         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_lmsw);
 542
 543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 544 {
 545         u64 xcr0;
 546
 547         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 548         if (index != XCR_XFEATURE_ENABLED_MASK)
 549                 return 1;
 550         xcr0 = xcr;
 551         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 552                 return 1;
 553         if (!(xcr0 & XSTATE_FP))
 554                 return 1;
 555         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 556                 return 1;
 557         if (xcr0 & ~host_xcr0)
 558                 return 1;
 559         vcpu->arch.xcr0 = xcr0;
 560         vcpu->guest_xcr0_loaded = 0;
 561         return 0;
 562 }
 563
 564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 565 {
 566         if (__kvm_set_xcr(vcpu, index, xcr)) {
 567                 kvm_inject_gp(vcpu, 0);
 568                 return 1;
 569         }
 570         return 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 573
 574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 580 }
 581
 582 static void update_cpuid(struct kvm_vcpu *vcpu)
 583 {
 584         struct kvm_cpuid_entry2 *best;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         if (!best)
 588                 return;
 589
 590         /* Update OSXSAVE bit */
 591         if (cpu_has_xsave && best->function == 0x1) {
 592                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 593                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 594                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 595         }
 596 }
 597
 598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 599 {
 600         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 601         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 602
 603         if (cr4 & CR4_RESERVED_BITS)
 604                 return 1;
 605
 606         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 607                 return 1;
 608
 609         if (is_long_mode(vcpu)) {
 610                 if (!(cr4 & X86_CR4_PAE))
 611                         return 1;
 612         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 613                    && ((cr4 ^ old_cr4) & pdptr_bits)
 614                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 615                                    kvm_read_cr3(vcpu)))
 616                 return 1;
 617
 618         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 619                 return 1;
 620
 621         if ((cr4 ^ old_cr4) & pdptr_bits)
 622                 kvm_mmu_reset_context(vcpu);
 623
 624         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 625                 update_cpuid(vcpu);
 626
 627         return 0;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 630
 631 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 632 {
 633         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 634                 kvm_mmu_sync_roots(vcpu);
 635                 kvm_mmu_flush_tlb(vcpu);
 636                 return 0;
 637         }
 638
 639         if (is_long_mode(vcpu)) {
 640                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 641                         return 1;
 642         } else {
 643                 if (is_pae(vcpu)) {
 644                         if (cr3 & CR3_PAE_RESERVED_BITS)
 645                                 return 1;
 646                         if (is_paging(vcpu) &&
 647                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 648                                 return 1;
 649                 }
 650                 /*
 651                  * We don't check reserved bits in nonpae mode, because
 652                  * this isn't enforced, and VMware depends on this.
 653                  */
 654         }
 655
 656         /*
 657          * Does the new cr3 value map to physical memory? (Note, we
 658          * catch an invalid cr3 even in real-mode, because it would
 659          * cause trouble later on when we turn on paging anyway.)
 660          *
 661          * A real CPU would silently accept an invalid cr3 and would
 662          * attempt to use it - with largely undefined (and often hard
 663          * to debug) behavior on the guest side.
 664          */
 665         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 666                 return 1;
 667         vcpu->arch.cr3 = cr3;
 668         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 669         vcpu->arch.mmu.new_cr3(vcpu);
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 673
 674 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 675 {
 676         if (cr8 & CR8_RESERVED_BITS)
 677                 return 1;
 678         if (irqchip_in_kernel(vcpu->kvm))
 679                 kvm_lapic_set_tpr(vcpu, cr8);
 680         else
 681                 vcpu->arch.cr8 = cr8;
 682         return 0;
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 685
 686 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 687 {
 688         if (irqchip_in_kernel(vcpu->kvm))
 689                 return kvm_lapic_get_cr8(vcpu);
 690         else
 691                 return vcpu->arch.cr8;
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 694
 695 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 696 {
 697         switch (dr) {
 698         case 0 ... 3:
 699                 vcpu->arch.db[dr] = val;
 700                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 701                         vcpu->arch.eff_db[dr] = val;
 702                 break;
 703         case 4:
 704                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 705                         return 1; /* #UD */
 706                 /* fall through */
 707         case 6:
 708                 if (val & 0xffffffff00000000ULL)
 709                         return -1; /* #GP */
 710                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 711                 break;
 712         case 5:
 713                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 714                         return 1; /* #UD */
 715                 /* fall through */
 716         default: /* 7 */
 717                 if (val & 0xffffffff00000000ULL)
 718                         return -1; /* #GP */
 719                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 720                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 721                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 722                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 723                 }
 724                 break;
 725         }
 726
 727         return 0;
 728 }
 729
 730 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 731 {
 732         int res;
 733
 734         res = __kvm_set_dr(vcpu, dr, val);
 735         if (res > 0)
 736                 kvm_queue_exception(vcpu, UD_VECTOR);
 737         else if (res < 0)
 738                 kvm_inject_gp(vcpu, 0);
 739
 740         return res;
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_set_dr);
 743
 744 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 745 {
 746         switch (dr) {
 747         case 0 ... 3:
 748                 *val = vcpu->arch.db[dr];
 749                 break;
 750         case 4:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1;
 753                 /* fall through */
 754         case 6:
 755                 *val = vcpu->arch.dr6;
 756                 break;
 757         case 5:
 758                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 759                         return 1;
 760                 /* fall through */
 761         default: /* 7 */
 762                 *val = vcpu->arch.dr7;
 763                 break;
 764         }
 765
 766         return 0;
 767 }
 768
 769 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 770 {
 771         if (_kvm_get_dr(vcpu, dr, val)) {
 772                 kvm_queue_exception(vcpu, UD_VECTOR);
 773                 return 1;
 774         }
 775         return 0;
 776 }
 777 EXPORT_SYMBOL_GPL(kvm_get_dr);
 778
 779 /*
 780  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 781  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 782  *
 783  * This list is modified at module load time to reflect the
 784  * capabilities of the host cpu. This capabilities test skips MSRs that are
 785  * kvm-specific. Those are put in the beginning of the list.
 786  */
 787
 788 #define KVM_SAVE_MSRS_BEGIN     8
 789 static u32 msrs_to_save[] = {
 790         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 791         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 792         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 793         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 794         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 795         MSR_STAR,
 796 #ifdef CONFIG_X86_64
 797         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 798 #endif
 799         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 800 };
 801
 802 static unsigned num_msrs_to_save;
 803
 804 static u32 emulated_msrs[] = {
 805         MSR_IA32_MISC_ENABLE,
 806         MSR_IA32_MCG_STATUS,
 807         MSR_IA32_MCG_CTL,
 808 };
 809
 810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 811 {
 812         u64 old_efer = vcpu->arch.efer;
 813
 814         if (efer & efer_reserved_bits)
 815                 return 1;
 816
 817         if (is_paging(vcpu)
 818             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 819                 return 1;
 820
 821         if (efer & EFER_FFXSR) {
 822                 struct kvm_cpuid_entry2 *feat;
 823
 824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 825                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 826                         return 1;
 827         }
 828
 829         if (efer & EFER_SVME) {
 830                 struct kvm_cpuid_entry2 *feat;
 831
 832                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 833                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 834                         return 1;
 835         }
 836
 837         efer &= ~EFER_LMA;
 838         efer |= vcpu->arch.efer & EFER_LMA;
 839
 840         kvm_x86_ops->set_efer(vcpu, efer);
 841
 842         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 843
 844         /* Update reserved bits */
 845         if ((efer ^ old_efer) & EFER_NX)
 846                 kvm_mmu_reset_context(vcpu);
 847
 848         return 0;
 849 }
 850
 851 void kvm_enable_efer_bits(u64 mask)
 852 {
 853        efer_reserved_bits &= ~mask;
 854 }
 855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 856
 857
 858 /*
 859  * Writes msr value into into the appropriate "register".
 860  * Returns 0 on success, non-0 otherwise.
 861  * Assumes vcpu_load() was already called.
 862  */
 863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 864 {
 865         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 866 }
 867
 868 /*
 869  * Adapt set_msr() to msr_io()'s calling convention
 870  */
 871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 872 {
 873         return kvm_set_msr(vcpu, index, *data);
 874 }
 875
 876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 877 {
 878         int version;
 879         int r;
 880         struct pvclock_wall_clock wc;
 881         struct timespec boot;
 882
 883         if (!wall_clock)
 884                 return;
 885
 886         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 887         if (r)
 888                 return;
 889
 890         if (version & 1)
 891                 ++version;  /* first time write, random junk */
 892
 893         ++version;
 894
 895         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 896
 897         /*
 898          * The guest calculates current wall clock time by adding
 899          * system time (updated by kvm_guest_time_update below) to the
 900          * wall clock specified here.  guest system time equals host
 901          * system time for us, thus we must fill in host boot time here.
 902          */
 903         getboottime(&boot);
 904
 905         wc.sec = boot.tv_sec;
 906         wc.nsec = boot.tv_nsec;
 907         wc.version = version;
 908
 909         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 910
 911         version++;
 912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 913 }
 914
 915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 916 {
 917         uint32_t quotient, remainder;
 918
 919         /* Don't try to replace with do_div(), this one calculates
 920          * "(dividend << 32) / divisor" */
 921         __asm__ ( "divl %4"
 922                   : "=a" (quotient), "=d" (remainder)
 923                   : "0" (0), "1" (dividend), "r" (divisor) );
 924         return quotient;
 925 }
 926
 927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 928                                s8 *pshift, u32 *pmultiplier)
 929 {
 930         uint64_t scaled64;
 931         int32_t  shift = 0;
 932         uint64_t tps64;
 933         uint32_t tps32;
 934
 935         tps64 = base_khz * 1000LL;
 936         scaled64 = scaled_khz * 1000LL;
 937         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 938                 tps64 >>= 1;
 939                 shift--;
 940         }
 941
 942         tps32 = (uint32_t)tps64;
 943         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 944                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 945                         scaled64 >>= 1;
 946                 else
 947                         tps32 <<= 1;
 948                 shift++;
 949         }
 950
 951         *pshift = shift;
 952         *pmultiplier = div_frac(scaled64, tps32);
 953
 954         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 955                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 956 }
 957
 958 static inline u64 get_kernel_ns(void)
 959 {
 960         struct timespec ts;
 961
 962         WARN_ON(preemptible());
 963         ktime_get_ts(&ts);
 964         monotonic_to_bootbased(&ts);
 965         return timespec_to_ns(&ts);
 966 }
 967
 968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 969 unsigned long max_tsc_khz;
 970
 971 static inline int kvm_tsc_changes_freq(void)
 972 {
 973         int cpu = get_cpu();
 974         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 975                   cpufreq_quick_get(cpu) != 0;
 976         put_cpu();
 977         return ret;
 978 }
 979
 980 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 981 {
 982         if (vcpu->arch.virtual_tsc_khz)
 983                 return vcpu->arch.virtual_tsc_khz;
 984         else
 985                 return __this_cpu_read(cpu_tsc_khz);
 986 }
 987
 988 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 989 {
 990         u64 ret;
 991
 992         WARN_ON(preemptible());
 993         if (kvm_tsc_changes_freq())
 994                 printk_once(KERN_WARNING
 995                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 996         ret = nsec * vcpu_tsc_khz(vcpu);
 997         do_div(ret, USEC_PER_SEC);
 998         return ret;
 999 }
1000
1001 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1002 {
1003         /* Compute a scale to convert nanoseconds in TSC cycles */
1004         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1005                            &vcpu->arch.tsc_catchup_shift,
1006                            &vcpu->arch.tsc_catchup_mult);
1007 }
1008
1009 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1010 {
1011         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1012                                       vcpu->arch.tsc_catchup_mult,
1013                                       vcpu->arch.tsc_catchup_shift);
1014         tsc += vcpu->arch.last_tsc_write;
1015         return tsc;
1016 }
1017
1018 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1019 {
1020         struct kvm *kvm = vcpu->kvm;
1021         u64 offset, ns, elapsed;
1022         unsigned long flags;
1023         s64 sdiff;
1024
1025         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1026         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1027         ns = get_kernel_ns();
1028         elapsed = ns - kvm->arch.last_tsc_nsec;
1029         sdiff = data - kvm->arch.last_tsc_write;
1030         if (sdiff < 0)
1031                 sdiff = -sdiff;
1032
1033         /*
1034          * Special case: close write to TSC within 5 seconds of
1035          * another CPU is interpreted as an attempt to synchronize
1036          * The 5 seconds is to accommodate host load / swapping as
1037          * well as any reset of TSC during the boot process.
1038          *
1039          * In that case, for a reliable TSC, we can match TSC offsets,
1040          * or make a best guest using elapsed value.
1041          */
1042         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1043             elapsed < 5ULL * NSEC_PER_SEC) {
1044                 if (!check_tsc_unstable()) {
1045                         offset = kvm->arch.last_tsc_offset;
1046                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1047                 } else {
1048                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1049                         offset += delta;
1050                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1051                 }
1052                 ns = kvm->arch.last_tsc_nsec;
1053         }
1054         kvm->arch.last_tsc_nsec = ns;
1055         kvm->arch.last_tsc_write = data;
1056         kvm->arch.last_tsc_offset = offset;
1057         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1058         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1059
1060         /* Reset of TSC must disable overshoot protection below */
1061         vcpu->arch.hv_clock.tsc_timestamp = 0;
1062         vcpu->arch.last_tsc_write = data;
1063         vcpu->arch.last_tsc_nsec = ns;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1066
1067 static int kvm_guest_time_update(struct kvm_vcpu *v)
1068 {
1069         unsigned long flags;
1070         struct kvm_vcpu_arch *vcpu = &v->arch;
1071         void *shared_kaddr;
1072         unsigned long this_tsc_khz;
1073         s64 kernel_ns, max_kernel_ns;
1074         u64 tsc_timestamp;
1075
1076         /* Keep irq disabled to prevent changes to the clock */
1077         local_irq_save(flags);
1078         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1079         kernel_ns = get_kernel_ns();
1080         this_tsc_khz = vcpu_tsc_khz(v);
1081         if (unlikely(this_tsc_khz == 0)) {
1082                 local_irq_restore(flags);
1083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1084                 return 1;
1085         }
1086
1087         /*
1088          * We may have to catch up the TSC to match elapsed wall clock
1089          * time for two reasons, even if kvmclock is used.
1090          *   1) CPU could have been running below the maximum TSC rate
1091          *   2) Broken TSC compensation resets the base at each VCPU
1092          *      entry to avoid unknown leaps of TSC even when running
1093          *      again on the same CPU.  This may cause apparent elapsed
1094          *      time to disappear, and the guest to stand still or run
1095          *      very slowly.
1096          */
1097         if (vcpu->tsc_catchup) {
1098                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1099                 if (tsc > tsc_timestamp) {
1100                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1101                         tsc_timestamp = tsc;
1102                 }
1103         }
1104
1105         local_irq_restore(flags);
1106
1107         if (!vcpu->time_page)
1108                 return 0;
1109
1110         /*
1111          * Time as measured by the TSC may go backwards when resetting the base
1112          * tsc_timestamp.  The reason for this is that the TSC resolution is
1113          * higher than the resolution of the other clock scales.  Thus, many
1114          * possible measurments of the TSC correspond to one measurement of any
1115          * other clock, and so a spread of values is possible.  This is not a
1116          * problem for the computation of the nanosecond clock; with TSC rates
1117          * around 1GHZ, there can only be a few cycles which correspond to one
1118          * nanosecond value, and any path through this code will inevitably
1119          * take longer than that.  However, with the kernel_ns value itself,
1120          * the precision may be much lower, down to HZ granularity.  If the
1121          * first sampling of TSC against kernel_ns ends in the low part of the
1122          * range, and the second in the high end of the range, we can get:
1123          *
1124          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1125          *
1126          * As the sampling errors potentially range in the thousands of cycles,
1127          * it is possible such a time value has already been observed by the
1128          * guest.  To protect against this, we must compute the system time as
1129          * observed by the guest and ensure the new system time is greater.
1130          */
1131         max_kernel_ns = 0;
1132         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1133                 max_kernel_ns = vcpu->last_guest_tsc -
1134                                 vcpu->hv_clock.tsc_timestamp;
1135                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1136                                     vcpu->hv_clock.tsc_to_system_mul,
1137                                     vcpu->hv_clock.tsc_shift);
1138                 max_kernel_ns += vcpu->last_kernel_ns;
1139         }
1140
1141         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1142                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1143                                    &vcpu->hv_clock.tsc_shift,
1144                                    &vcpu->hv_clock.tsc_to_system_mul);
1145                 vcpu->hw_tsc_khz = this_tsc_khz;
1146         }
1147
1148         if (max_kernel_ns > kernel_ns)
1149                 kernel_ns = max_kernel_ns;
1150
1151         /* With all the info we got, fill in the values */
1152         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1153         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1154         vcpu->last_kernel_ns = kernel_ns;
1155         vcpu->last_guest_tsc = tsc_timestamp;
1156         vcpu->hv_clock.flags = 0;
1157
1158         /*
1159          * The interface expects us to write an even number signaling that the
1160          * update is finished. Since the guest won't see the intermediate
1161          * state, we just increase by 2 at the end.
1162          */
1163         vcpu->hv_clock.version += 2;
1164
1165         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1166
1167         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1168                sizeof(vcpu->hv_clock));
1169
1170         kunmap_atomic(shared_kaddr, KM_USER0);
1171
1172         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1173         return 0;
1174 }
1175
1176 static bool msr_mtrr_valid(unsigned msr)
1177 {
1178         switch (msr) {
1179         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1180         case MSR_MTRRfix64K_00000:
1181         case MSR_MTRRfix16K_80000:
1182         case MSR_MTRRfix16K_A0000:
1183         case MSR_MTRRfix4K_C0000:
1184         case MSR_MTRRfix4K_C8000:
1185         case MSR_MTRRfix4K_D0000:
1186         case MSR_MTRRfix4K_D8000:
1187         case MSR_MTRRfix4K_E0000:
1188         case MSR_MTRRfix4K_E8000:
1189         case MSR_MTRRfix4K_F0000:
1190         case MSR_MTRRfix4K_F8000:
1191         case MSR_MTRRdefType:
1192         case MSR_IA32_CR_PAT:
1193                 return true;
1194         case 0x2f8:
1195                 return true;
1196         }
1197         return false;
1198 }
1199
1200 static bool valid_pat_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1203 }
1204
1205 static bool valid_mtrr_type(unsigned t)
1206 {
1207         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1208 }
1209
1210 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1211 {
1212         int i;
1213
1214         if (!msr_mtrr_valid(msr))
1215                 return false;
1216
1217         if (msr == MSR_IA32_CR_PAT) {
1218                 for (i = 0; i < 8; i++)
1219                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         } else if (msr == MSR_MTRRdefType) {
1223                 if (data & ~0xcff)
1224                         return false;
1225                 return valid_mtrr_type(data & 0xff);
1226         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1227                 for (i = 0; i < 8 ; i++)
1228                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1229                                 return false;
1230                 return true;
1231         }
1232
1233         /* variable MTRRs */
1234         return valid_mtrr_type(data & 0xff);
1235 }
1236
1237 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1238 {
1239         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1240
1241         if (!mtrr_valid(vcpu, msr, data))
1242                 return 1;
1243
1244         if (msr == MSR_MTRRdefType) {
1245                 vcpu->arch.mtrr_state.def_type = data;
1246                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1247         } else if (msr == MSR_MTRRfix64K_00000)
1248                 p[0] = data;
1249         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1251         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1253         else if (msr == MSR_IA32_CR_PAT)
1254                 vcpu->arch.pat = data;
1255         else {  /* Variable MTRRs */
1256                 int idx, is_mtrr_mask;
1257                 u64 *pt;
1258
1259                 idx = (msr - 0x200) / 2;
1260                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1261                 if (!is_mtrr_mask)
1262                         pt =
1263                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1264                 else
1265                         pt =
1266                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267                 *pt = data;
1268         }
1269
1270         kvm_mmu_reset_context(vcpu);
1271         return 0;
1272 }
1273
1274 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1275 {
1276         u64 mcg_cap = vcpu->arch.mcg_cap;
1277         unsigned bank_num = mcg_cap & 0xff;
1278
1279         switch (msr) {
1280         case MSR_IA32_MCG_STATUS:
1281                 vcpu->arch.mcg_status = data;
1282                 break;
1283         case MSR_IA32_MCG_CTL:
1284                 if (!(mcg_cap & MCG_CTL_P))
1285                         return 1;
1286                 if (data != 0 && data != ~(u64)0)
1287                         return -1;
1288                 vcpu->arch.mcg_ctl = data;
1289                 break;
1290         default:
1291                 if (msr >= MSR_IA32_MC0_CTL &&
1292                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1293                         u32 offset = msr - MSR_IA32_MC0_CTL;
1294                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1295                          * some Linux kernels though clear bit 10 in bank 4 to
1296                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1297                          * this to avoid an uncatched #GP in the guest
1298                          */
1299                         if ((offset & 0x3) == 0 &&
1300                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1301                                 return -1;
1302                         vcpu->arch.mce_banks[offset] = data;
1303                         break;
1304                 }
1305                 return 1;
1306         }
1307         return 0;
1308 }
1309
1310 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1311 {
1312         struct kvm *kvm = vcpu->kvm;
1313         int lm = is_long_mode(vcpu);
1314         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1315                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1316         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1317                 : kvm->arch.xen_hvm_config.blob_size_32;
1318         u32 page_num = data & ~PAGE_MASK;
1319         u64 page_addr = data & PAGE_MASK;
1320         u8 *page;
1321         int r;
1322
1323         r = -E2BIG;
1324         if (page_num >= blob_size)
1325                 goto out;
1326         r = -ENOMEM;
1327         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1328         if (!page)
1329                 goto out;
1330         r = -EFAULT;
1331         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1332                 goto out_free;
1333         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1334                 goto out_free;
1335         r = 0;
1336 out_free:
1337         kfree(page);
1338 out:
1339         return r;
1340 }
1341
1342 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1343 {
1344         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1345 }
1346
1347 static bool kvm_hv_msr_partition_wide(u32 msr)
1348 {
1349         bool r = false;
1350         switch (msr) {
1351         case HV_X64_MSR_GUEST_OS_ID:
1352         case HV_X64_MSR_HYPERCALL:
1353                 r = true;
1354                 break;
1355         }
1356
1357         return r;
1358 }
1359
1360 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1361 {
1362         struct kvm *kvm = vcpu->kvm;
1363
1364         switch (msr) {
1365         case HV_X64_MSR_GUEST_OS_ID:
1366                 kvm->arch.hv_guest_os_id = data;
1367                 /* setting guest os id to zero disables hypercall page */
1368                 if (!kvm->arch.hv_guest_os_id)
1369                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1370                 break;
1371         case HV_X64_MSR_HYPERCALL: {
1372                 u64 gfn;
1373                 unsigned long addr;
1374                 u8 instructions[4];
1375
1376                 /* if guest os id is not set hypercall should remain disabled */
1377                 if (!kvm->arch.hv_guest_os_id)
1378                         break;
1379                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1380                         kvm->arch.hv_hypercall = data;
1381                         break;
1382                 }
1383                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1384                 addr = gfn_to_hva(kvm, gfn);
1385                 if (kvm_is_error_hva(addr))
1386                         return 1;
1387                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1388                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1389                 if (__copy_to_user((void __user *)addr, instructions, 4))
1390                         return 1;
1391                 kvm->arch.hv_hypercall = data;
1392                 break;
1393         }
1394         default:
1395                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1396                           "data 0x%llx\n", msr, data);
1397                 return 1;
1398         }
1399         return 0;
1400 }
1401
1402 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1403 {
1404         switch (msr) {
1405         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1406                 unsigned long addr;
1407
1408                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1409                         vcpu->arch.hv_vapic = data;
1410                         break;
1411                 }
1412                 addr = gfn_to_hva(vcpu->kvm, data >>
1413                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1414                 if (kvm_is_error_hva(addr))
1415                         return 1;
1416                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1417                         return 1;
1418                 vcpu->arch.hv_vapic = data;
1419                 break;
1420         }
1421         case HV_X64_MSR_EOI:
1422                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1423         case HV_X64_MSR_ICR:
1424                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1425         case HV_X64_MSR_TPR:
1426                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1427         default:
1428                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1429                           "data 0x%llx\n", msr, data);
1430                 return 1;
1431         }
1432
1433         return 0;
1434 }
1435
1436 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1437 {
1438         gpa_t gpa = data & ~0x3f;
1439
1440         /* Bits 2:5 are resrved, Should be zero */
1441         if (data & 0x3c)
1442                 return 1;
1443
1444         vcpu->arch.apf.msr_val = data;
1445
1446         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1447                 kvm_clear_async_pf_completion_queue(vcpu);
1448                 kvm_async_pf_hash_reset(vcpu);
1449                 return 0;
1450         }
1451
1452         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1453                 return 1;
1454
1455         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1456         kvm_async_pf_wakeup_all(vcpu);
1457         return 0;
1458 }
1459
1460 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1461 {
1462         if (vcpu->arch.time_page) {
1463                 kvm_release_page_dirty(vcpu->arch.time_page);
1464                 vcpu->arch.time_page = NULL;
1465         }
1466 }
1467
1468 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1469 {
1470         switch (msr) {
1471         case MSR_EFER:
1472                 return set_efer(vcpu, data);
1473         case MSR_K7_HWCR:
1474                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1475                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1476                 if (data != 0) {
1477                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1478                                 data);
1479                         return 1;
1480                 }
1481                 break;
1482         case MSR_FAM10H_MMIO_CONF_BASE:
1483                 if (data != 0) {
1484                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1485                                 "0x%llx\n", data);
1486                         return 1;
1487                 }
1488                 break;
1489         case MSR_AMD64_NB_CFG:
1490                 break;
1491         case MSR_IA32_DEBUGCTLMSR:
1492                 if (!data) {
1493                         /* We support the non-activated case already */
1494                         break;
1495                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1496                         /* Values other than LBR and BTF are vendor-specific,
1497                            thus reserved and should throw a #GP */
1498                         return 1;
1499                 }
1500                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1501                         __func__, data);
1502                 break;
1503         case MSR_IA32_UCODE_REV:
1504         case MSR_IA32_UCODE_WRITE:
1505         case MSR_VM_HSAVE_PA:
1506         case MSR_AMD64_PATCH_LOADER:
1507                 break;
1508         case 0x200 ... 0x2ff:
1509                 return set_msr_mtrr(vcpu, msr, data);
1510         case MSR_IA32_APICBASE:
1511                 kvm_set_apic_base(vcpu, data);
1512                 break;
1513         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1514                 return kvm_x2apic_msr_write(vcpu, msr, data);
1515         case MSR_IA32_MISC_ENABLE:
1516                 vcpu->arch.ia32_misc_enable_msr = data;
1517                 break;
1518         case MSR_KVM_WALL_CLOCK_NEW:
1519         case MSR_KVM_WALL_CLOCK:
1520                 vcpu->kvm->arch.wall_clock = data;
1521                 kvm_write_wall_clock(vcpu->kvm, data);
1522                 break;
1523         case MSR_KVM_SYSTEM_TIME_NEW:
1524         case MSR_KVM_SYSTEM_TIME: {
1525                 kvmclock_reset(vcpu);
1526
1527                 vcpu->arch.time = data;
1528                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1529
1530                 /* we verify if the enable bit is set... */
1531                 if (!(data & 1))
1532                         break;
1533
1534                 /* ...but clean it before doing the actual write */
1535                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1536
1537                 vcpu->arch.time_page =
1538                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1539
1540                 if (is_error_page(vcpu->arch.time_page)) {
1541                         kvm_release_page_clean(vcpu->arch.time_page);
1542                         vcpu->arch.time_page = NULL;
1543                 }
1544                 break;
1545         }
1546         case MSR_KVM_ASYNC_PF_EN:
1547                 if (kvm_pv_enable_async_pf(vcpu, data))
1548                         return 1;
1549                 break;
1550         case MSR_IA32_MCG_CTL:
1551         case MSR_IA32_MCG_STATUS:
1552         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1553                 return set_msr_mce(vcpu, msr, data);
1554
1555         /* Performance counters are not protected by a CPUID bit,
1556          * so we should check all of them in the generic path for the sake of
1557          * cross vendor migration.
1558          * Writing a zero into the event select MSRs disables them,
1559          * which we perfectly emulate ;-). Any other value should be at least
1560          * reported, some guests depend on them.
1561          */
1562         case MSR_P6_EVNTSEL0:
1563         case MSR_P6_EVNTSEL1:
1564         case MSR_K7_EVNTSEL0:
1565         case MSR_K7_EVNTSEL1:
1566         case MSR_K7_EVNTSEL2:
1567         case MSR_K7_EVNTSEL3:
1568                 if (data != 0)
1569                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1570                                 "0x%x data 0x%llx\n", msr, data);
1571                 break;
1572         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1573          * so we ignore writes to make it happy.
1574          */
1575         case MSR_P6_PERFCTR0:
1576         case MSR_P6_PERFCTR1:
1577         case MSR_K7_PERFCTR0:
1578         case MSR_K7_PERFCTR1:
1579         case MSR_K7_PERFCTR2:
1580         case MSR_K7_PERFCTR3:
1581                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1582                         "0x%x data 0x%llx\n", msr, data);
1583                 break;
1584         case MSR_K7_CLK_CTL:
1585                 /*
1586                  * Ignore all writes to this no longer documented MSR.
1587                  * Writes are only relevant for old K7 processors,
1588                  * all pre-dating SVM, but a recommended workaround from
1589                  * AMD for these chips. It is possible to speicify the
1590                  * affected processor models on the command line, hence
1591                  * the need to ignore the workaround.
1592                  */
1593                 break;
1594         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1595                 if (kvm_hv_msr_partition_wide(msr)) {
1596                         int r;
1597                         mutex_lock(&vcpu->kvm->lock);
1598                         r = set_msr_hyperv_pw(vcpu, msr, data);
1599                         mutex_unlock(&vcpu->kvm->lock);
1600                         return r;
1601                 } else
1602                         return set_msr_hyperv(vcpu, msr, data);
1603                 break;
1604         case MSR_IA32_BBL_CR_CTL3:
1605                 /* Drop writes to this legacy MSR -- see rdmsr
1606                  * counterpart for further detail.
1607                  */
1608                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1609                 break;
1610         default:
1611                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1612                         return xen_hvm_config(vcpu, data);
1613                 if (!ignore_msrs) {
1614                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1615                                 msr, data);
1616                         return 1;
1617                 } else {
1618                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1619                                 msr, data);
1620                         break;
1621                 }
1622         }
1623         return 0;
1624 }
1625 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1626
1627
1628 /*
1629  * Reads an msr value (of 'msr_index') into 'pdata'.
1630  * Returns 0 on success, non-0 otherwise.
1631  * Assumes vcpu_load() was already called.
1632  */
1633 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1634 {
1635         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1636 }
1637
1638 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1639 {
1640         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1641
1642         if (!msr_mtrr_valid(msr))
1643                 return 1;
1644
1645         if (msr == MSR_MTRRdefType)
1646                 *pdata = vcpu->arch.mtrr_state.def_type +
1647                          (vcpu->arch.mtrr_state.enabled << 10);
1648         else if (msr == MSR_MTRRfix64K_00000)
1649                 *pdata = p[0];
1650         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1651                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1652         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1653                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1654         else if (msr == MSR_IA32_CR_PAT)
1655                 *pdata = vcpu->arch.pat;
1656         else {  /* Variable MTRRs */
1657                 int idx, is_mtrr_mask;
1658                 u64 *pt;
1659
1660                 idx = (msr - 0x200) / 2;
1661                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1662                 if (!is_mtrr_mask)
1663                         pt =
1664                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1665                 else
1666                         pt =
1667                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1668                 *pdata = *pt;
1669         }
1670
1671         return 0;
1672 }
1673
1674 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1675 {
1676         u64 data;
1677         u64 mcg_cap = vcpu->arch.mcg_cap;
1678         unsigned bank_num = mcg_cap & 0xff;
1679
1680         switch (msr) {
1681         case MSR_IA32_P5_MC_ADDR:
1682         case MSR_IA32_P5_MC_TYPE:
1683                 data = 0;
1684                 break;
1685         case MSR_IA32_MCG_CAP:
1686                 data = vcpu->arch.mcg_cap;
1687                 break;
1688         case MSR_IA32_MCG_CTL:
1689                 if (!(mcg_cap & MCG_CTL_P))
1690                         return 1;
1691                 data = vcpu->arch.mcg_ctl;
1692                 break;
1693         case MSR_IA32_MCG_STATUS:
1694                 data = vcpu->arch.mcg_status;
1695                 break;
1696         default:
1697                 if (msr >= MSR_IA32_MC0_CTL &&
1698                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1699                         u32 offset = msr - MSR_IA32_MC0_CTL;
1700                         data = vcpu->arch.mce_banks[offset];
1701                         break;
1702                 }
1703                 return 1;
1704         }
1705         *pdata = data;
1706         return 0;
1707 }
1708
1709 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1710 {
1711         u64 data = 0;
1712         struct kvm *kvm = vcpu->kvm;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_GUEST_OS_ID:
1716                 data = kvm->arch.hv_guest_os_id;
1717                 break;
1718         case HV_X64_MSR_HYPERCALL:
1719                 data = kvm->arch.hv_hypercall;
1720                 break;
1721         default:
1722                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1723                 return 1;
1724         }
1725
1726         *pdata = data;
1727         return 0;
1728 }
1729
1730 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1731 {
1732         u64 data = 0;
1733
1734         switch (msr) {
1735         case HV_X64_MSR_VP_INDEX: {
1736                 int r;
1737                 struct kvm_vcpu *v;
1738                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1739                         if (v == vcpu)
1740                                 data = r;
1741                 break;
1742         }
1743         case HV_X64_MSR_EOI:
1744                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1745         case HV_X64_MSR_ICR:
1746                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1747         case HV_X64_MSR_TPR:
1748                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1749         default:
1750                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1751                 return 1;
1752         }
1753         *pdata = data;
1754         return 0;
1755 }
1756
1757 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1758 {
1759         u64 data;
1760
1761         switch (msr) {
1762         case MSR_IA32_PLATFORM_ID:
1763         case MSR_IA32_UCODE_REV:
1764         case MSR_IA32_EBL_CR_POWERON:
1765         case MSR_IA32_DEBUGCTLMSR:
1766         case MSR_IA32_LASTBRANCHFROMIP:
1767         case MSR_IA32_LASTBRANCHTOIP:
1768         case MSR_IA32_LASTINTFROMIP:
1769         case MSR_IA32_LASTINTTOIP:
1770         case MSR_K8_SYSCFG:
1771         case MSR_K7_HWCR:
1772         case MSR_VM_HSAVE_PA:
1773         case MSR_P6_PERFCTR0:
1774         case MSR_P6_PERFCTR1:
1775         case MSR_P6_EVNTSEL0:
1776         case MSR_P6_EVNTSEL1:
1777         case MSR_K7_EVNTSEL0:
1778         case MSR_K7_PERFCTR0:
1779         case MSR_K8_INT_PENDING_MSG:
1780         case MSR_AMD64_NB_CFG:
1781         case MSR_FAM10H_MMIO_CONF_BASE:
1782                 data = 0;
1783                 break;
1784         case MSR_MTRRcap:
1785                 data = 0x500 | KVM_NR_VAR_MTRR;
1786                 break;
1787         case 0x200 ... 0x2ff:
1788                 return get_msr_mtrr(vcpu, msr, pdata);
1789         case 0xcd: /* fsb frequency */
1790                 data = 3;
1791                 break;
1792                 /*
1793                  * MSR_EBC_FREQUENCY_ID
1794                  * Conservative value valid for even the basic CPU models.
1795                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1796                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1797                  * and 266MHz for model 3, or 4. Set Core Clock
1798                  * Frequency to System Bus Frequency Ratio to 1 (bits
1799                  * 31:24) even though these are only valid for CPU
1800                  * models > 2, however guests may end up dividing or
1801                  * multiplying by zero otherwise.
1802                  */
1803         case MSR_EBC_FREQUENCY_ID:
1804                 data = 1 << 24;
1805                 break;
1806         case MSR_IA32_APICBASE:
1807                 data = kvm_get_apic_base(vcpu);
1808                 break;
1809         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1810                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1811                 break;
1812         case MSR_IA32_MISC_ENABLE:
1813                 data = vcpu->arch.ia32_misc_enable_msr;
1814                 break;
1815         case MSR_IA32_PERF_STATUS:
1816                 /* TSC increment by tick */
1817                 data = 1000ULL;
1818                 /* CPU multiplier */
1819                 data |= (((uint64_t)4ULL) << 40);
1820                 break;
1821         case MSR_EFER:
1822                 data = vcpu->arch.efer;
1823                 break;
1824         case MSR_KVM_WALL_CLOCK:
1825         case MSR_KVM_WALL_CLOCK_NEW:
1826                 data = vcpu->kvm->arch.wall_clock;
1827                 break;
1828         case MSR_KVM_SYSTEM_TIME:
1829         case MSR_KVM_SYSTEM_TIME_NEW:
1830                 data = vcpu->arch.time;
1831                 break;
1832         case MSR_KVM_ASYNC_PF_EN:
1833                 data = vcpu->arch.apf.msr_val;
1834                 break;
1835         case MSR_IA32_P5_MC_ADDR:
1836         case MSR_IA32_P5_MC_TYPE:
1837         case MSR_IA32_MCG_CAP:
1838         case MSR_IA32_MCG_CTL:
1839         case MSR_IA32_MCG_STATUS:
1840         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1841                 return get_msr_mce(vcpu, msr, pdata);
1842         case MSR_K7_CLK_CTL:
1843                 /*
1844                  * Provide expected ramp-up count for K7. All other
1845                  * are set to zero, indicating minimum divisors for
1846                  * every field.
1847                  *
1848                  * This prevents guest kernels on AMD host with CPU
1849                  * type 6, model 8 and higher from exploding due to
1850                  * the rdmsr failing.
1851                  */
1852                 data = 0x20000000;
1853                 break;
1854         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1855                 if (kvm_hv_msr_partition_wide(msr)) {
1856                         int r;
1857                         mutex_lock(&vcpu->kvm->lock);
1858                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1859                         mutex_unlock(&vcpu->kvm->lock);
1860                         return r;
1861                 } else
1862                         return get_msr_hyperv(vcpu, msr, pdata);
1863                 break;
1864         case MSR_IA32_BBL_CR_CTL3:
1865                 /* This legacy MSR exists but isn't fully documented in current
1866                  * silicon.  It is however accessed by winxp in very narrow
1867                  * scenarios where it sets bit #19, itself documented as
1868                  * a "reserved" bit.  Best effort attempt to source coherent
1869                  * read data here should the balance of the register be
1870                  * interpreted by the guest:
1871                  *
1872                  * L2 cache control register 3: 64GB range, 256KB size,
1873                  * enabled, latency 0x1, configured
1874                  */
1875                 data = 0xbe702111;
1876                 break;
1877         default:
1878                 if (!ignore_msrs) {
1879                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1880                         return 1;
1881                 } else {
1882                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1883                         data = 0;
1884                 }
1885                 break;
1886         }
1887         *pdata = data;
1888         return 0;
1889 }
1890 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1891
1892 /*
1893  * Read or write a bunch of msrs. All parameters are kernel addresses.
1894  *
1895  * @return number of msrs set successfully.
1896  */
1897 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1898                     struct kvm_msr_entry *entries,
1899                     int (*do_msr)(struct kvm_vcpu *vcpu,
1900                                   unsigned index, u64 *data))
1901 {
1902         int i, idx;
1903
1904         idx = srcu_read_lock(&vcpu->kvm->srcu);
1905         for (i = 0; i < msrs->nmsrs; ++i)
1906                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1907                         break;
1908         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1909
1910         return i;
1911 }
1912
1913 /*
1914  * Read or write a bunch of msrs. Parameters are user addresses.
1915  *
1916  * @return number of msrs set successfully.
1917  */
1918 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1919                   int (*do_msr)(struct kvm_vcpu *vcpu,
1920                                 unsigned index, u64 *data),
1921                   int writeback)
1922 {
1923         struct kvm_msrs msrs;
1924         struct kvm_msr_entry *entries;
1925         int r, n;
1926         unsigned size;
1927
1928         r = -EFAULT;
1929         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1930                 goto out;
1931
1932         r = -E2BIG;
1933         if (msrs.nmsrs >= MAX_IO_MSRS)
1934                 goto out;
1935
1936         r = -ENOMEM;
1937         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1938         entries = kmalloc(size, GFP_KERNEL);
1939         if (!entries)
1940                 goto out;
1941
1942         r = -EFAULT;
1943         if (copy_from_user(entries, user_msrs->entries, size))
1944                 goto out_free;
1945
1946         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1947         if (r < 0)
1948                 goto out_free;
1949
1950         r = -EFAULT;
1951         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1952                 goto out_free;
1953
1954         r = n;
1955
1956 out_free:
1957         kfree(entries);
1958 out:
1959         return r;
1960 }
1961
1962 int kvm_dev_ioctl_check_extension(long ext)
1963 {
1964         int r;
1965
1966         switch (ext) {
1967         case KVM_CAP_IRQCHIP:
1968         case KVM_CAP_HLT:
1969         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1970         case KVM_CAP_SET_TSS_ADDR:
1971         case KVM_CAP_EXT_CPUID:
1972         case KVM_CAP_CLOCKSOURCE:
1973         case KVM_CAP_PIT:
1974         case KVM_CAP_NOP_IO_DELAY:
1975         case KVM_CAP_MP_STATE:
1976         case KVM_CAP_SYNC_MMU:
1977         case KVM_CAP_USER_NMI:
1978         case KVM_CAP_REINJECT_CONTROL:
1979         case KVM_CAP_IRQ_INJECT_STATUS:
1980         case KVM_CAP_ASSIGN_DEV_IRQ:
1981         case KVM_CAP_IRQFD:
1982         case KVM_CAP_IOEVENTFD:
1983         case KVM_CAP_PIT2:
1984         case KVM_CAP_PIT_STATE2:
1985         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1986         case KVM_CAP_XEN_HVM:
1987         case KVM_CAP_ADJUST_CLOCK:
1988         case KVM_CAP_VCPU_EVENTS:
1989         case KVM_CAP_HYPERV:
1990         case KVM_CAP_HYPERV_VAPIC:
1991         case KVM_CAP_HYPERV_SPIN:
1992         case KVM_CAP_PCI_SEGMENT:
1993         case KVM_CAP_DEBUGREGS:
1994         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1995         case KVM_CAP_XSAVE:
1996         case KVM_CAP_ASYNC_PF:
1997         case KVM_CAP_GET_TSC_KHZ:
1998                 r = 1;
1999                 break;
2000         case KVM_CAP_COALESCED_MMIO:
2001                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2002                 break;
2003         case KVM_CAP_VAPIC:
2004                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2005                 break;
2006         case KVM_CAP_NR_VCPUS:
2007                 r = KVM_MAX_VCPUS;
2008                 break;
2009         case KVM_CAP_NR_MEMSLOTS:
2010                 r = KVM_MEMORY_SLOTS;
2011                 break;
2012         case KVM_CAP_PV_MMU:    /* obsolete */
2013                 r = 0;
2014                 break;
2015         case KVM_CAP_IOMMU:
2016                 r = iommu_found();
2017                 break;
2018         case KVM_CAP_MCE:
2019                 r = KVM_MAX_MCE_BANKS;
2020                 break;
2021         case KVM_CAP_XCRS:
2022                 r = cpu_has_xsave;
2023                 break;
2024         case KVM_CAP_TSC_CONTROL:
2025                 r = kvm_has_tsc_control;
2026                 break;
2027         default:
2028                 r = 0;
2029                 break;
2030         }
2031         return r;
2032
2033 }
2034
2035 long kvm_arch_dev_ioctl(struct file *filp,
2036                         unsigned int ioctl, unsigned long arg)
2037 {
2038         void __user *argp = (void __user *)arg;
2039         long r;
2040
2041         switch (ioctl) {
2042         case KVM_GET_MSR_INDEX_LIST: {
2043                 struct kvm_msr_list __user *user_msr_list = argp;
2044                 struct kvm_msr_list msr_list;
2045                 unsigned n;
2046
2047                 r = -EFAULT;
2048                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2049                         goto out;
2050                 n = msr_list.nmsrs;
2051                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2052                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2053                         goto out;
2054                 r = -E2BIG;
2055                 if (n < msr_list.nmsrs)
2056                         goto out;
2057                 r = -EFAULT;
2058                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2059                                  num_msrs_to_save * sizeof(u32)))
2060                         goto out;
2061                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2062                                  &emulated_msrs,
2063                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2064                         goto out;
2065                 r = 0;
2066                 break;
2067         }
2068         case KVM_GET_SUPPORTED_CPUID: {
2069                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2070                 struct kvm_cpuid2 cpuid;
2071
2072                 r = -EFAULT;
2073                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2074                         goto out;
2075                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2076                                                       cpuid_arg->entries);
2077                 if (r)
2078                         goto out;
2079
2080                 r = -EFAULT;
2081                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2082                         goto out;
2083                 r = 0;
2084                 break;
2085         }
2086         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2087                 u64 mce_cap;
2088
2089                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2090                 r = -EFAULT;
2091                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2092                         goto out;
2093                 r = 0;
2094                 break;
2095         }
2096         default:
2097                 r = -EINVAL;
2098         }
2099 out:
2100         return r;
2101 }
2102
2103 static void wbinvd_ipi(void *garbage)
2104 {
2105         wbinvd();
2106 }
2107
2108 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2109 {
2110         return vcpu->kvm->arch.iommu_domain &&
2111                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2112 }
2113
2114 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2115 {
2116         /* Address WBINVD may be executed by guest */
2117         if (need_emulate_wbinvd(vcpu)) {
2118                 if (kvm_x86_ops->has_wbinvd_exit())
2119                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2120                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2121                         smp_call_function_single(vcpu->cpu,
2122                                         wbinvd_ipi, NULL, 1);
2123         }
2124
2125         kvm_x86_ops->vcpu_load(vcpu, cpu);
2126         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2127                 /* Make sure TSC doesn't go backwards */
2128                 s64 tsc_delta;
2129                 u64 tsc;
2130
2131                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2132                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2133                              tsc - vcpu->arch.last_guest_tsc;
2134
2135                 if (tsc_delta < 0)
2136                         mark_tsc_unstable("KVM discovered backwards TSC");
2137                 if (check_tsc_unstable()) {
2138                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2139                         vcpu->arch.tsc_catchup = 1;
2140                 }
2141                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2142                 if (vcpu->cpu != cpu)
2143                         kvm_migrate_timers(vcpu);
2144                 vcpu->cpu = cpu;
2145         }
2146 }
2147
2148 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2149 {
2150         kvm_x86_ops->vcpu_put(vcpu);
2151         kvm_put_guest_fpu(vcpu);
2152         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2153 }
2154
2155 static int is_efer_nx(void)
2156 {
2157         unsigned long long efer = 0;
2158
2159         rdmsrl_safe(MSR_EFER, &efer);
2160         return efer & EFER_NX;
2161 }
2162
2163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2164 {
2165         int i;
2166         struct kvm_cpuid_entry2 *e, *entry;
2167
2168         entry = NULL;
2169         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2170                 e = &vcpu->arch.cpuid_entries[i];
2171                 if (e->function == 0x80000001) {
2172                         entry = e;
2173                         break;
2174                 }
2175         }
2176         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2177                 entry->edx &= ~(1 << 20);
2178                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2179         }
2180 }
2181
2182 /* when an old userspace process fills a new kernel module */
2183 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2184                                     struct kvm_cpuid *cpuid,
2185                                     struct kvm_cpuid_entry __user *entries)
2186 {
2187         int r, i;
2188         struct kvm_cpuid_entry *cpuid_entries;
2189
2190         r = -E2BIG;
2191         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2192                 goto out;
2193         r = -ENOMEM;
2194         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2195         if (!cpuid_entries)
2196                 goto out;
2197         r = -EFAULT;
2198         if (copy_from_user(cpuid_entries, entries,
2199                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2200                 goto out_free;
2201         for (i = 0; i < cpuid->nent; i++) {
2202                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2203                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2204                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2205                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2206                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2207                 vcpu->arch.cpuid_entries[i].index = 0;
2208                 vcpu->arch.cpuid_entries[i].flags = 0;
2209                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2210                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2211                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2212         }
2213         vcpu->arch.cpuid_nent = cpuid->nent;
2214         cpuid_fix_nx_cap(vcpu);
2215         r = 0;
2216         kvm_apic_set_version(vcpu);
2217         kvm_x86_ops->cpuid_update(vcpu);
2218         update_cpuid(vcpu);
2219
2220 out_free:
2221         vfree(cpuid_entries);
2222 out:
2223         return r;
2224 }
2225
2226 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2227                                      struct kvm_cpuid2 *cpuid,
2228                                      struct kvm_cpuid_entry2 __user *entries)
2229 {
2230         int r;
2231
2232         r = -E2BIG;
2233         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2234                 goto out;
2235         r = -EFAULT;
2236         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2237                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2238                 goto out;
2239         vcpu->arch.cpuid_nent = cpuid->nent;
2240         kvm_apic_set_version(vcpu);
2241         kvm_x86_ops->cpuid_update(vcpu);
2242         update_cpuid(vcpu);
2243         return 0;
2244
2245 out:
2246         return r;
2247 }
2248
2249 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2250                                      struct kvm_cpuid2 *cpuid,
2251                                      struct kvm_cpuid_entry2 __user *entries)
2252 {
2253         int r;
2254
2255         r = -E2BIG;
2256         if (cpuid->nent < vcpu->arch.cpuid_nent)
2257                 goto out;
2258         r = -EFAULT;
2259         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2260                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2261                 goto out;
2262         return 0;
2263
2264 out:
2265         cpuid->nent = vcpu->arch.cpuid_nent;
2266         return r;
2267 }
2268
2269 static void cpuid_mask(u32 *word, int wordnum)
2270 {
2271         *word &= boot_cpu_data.x86_capability[wordnum];
2272 }
2273
2274 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2275                            u32 index)
2276 {
2277         entry->function = function;
2278         entry->index = index;
2279         cpuid_count(entry->function, entry->index,
2280                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2281         entry->flags = 0;
2282 }
2283
2284 static bool supported_xcr0_bit(unsigned bit)
2285 {
2286         u64 mask = ((u64)1 << bit);
2287
2288         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2289 }
2290
2291 #define F(x) bit(X86_FEATURE_##x)
2292
2293 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2294                          u32 index, int *nent, int maxnent)
2295 {
2296         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2297 #ifdef CONFIG_X86_64
2298         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2299                                 ? F(GBPAGES) : 0;
2300         unsigned f_lm = F(LM);
2301 #else
2302         unsigned f_gbpages = 0;
2303         unsigned f_lm = 0;
2304 #endif
2305         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2306
2307         /* cpuid 1.edx */
2308         const u32 kvm_supported_word0_x86_features =
2309                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2310                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2311                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2312                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2313                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2314                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2315                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2316                 0 /* HTT, TM, Reserved, PBE */;
2317         /* cpuid 0x80000001.edx */
2318         const u32 kvm_supported_word1_x86_features =
2319                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2320                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2321                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2322                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2323                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2324                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2325                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2326                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2327         /* cpuid 1.ecx */
2328         const u32 kvm_supported_word4_x86_features =
2329                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2330                 0 /* DS-CPL, VMX, SMX, EST */ |
2331                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2332                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2333                 0 /* Reserved, DCA */ | F(XMM4_1) |
2334                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2335                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2336                 F(F16C);
2337         /* cpuid 0x80000001.ecx */
2338         const u32 kvm_supported_word6_x86_features =
2339                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2340                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2341                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2342                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2343
2344         /* cpuid 0xC0000001.edx */
2345         const u32 kvm_supported_word5_x86_features =
2346                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2347                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2348                 F(PMM) | F(PMM_EN);
2349
2350         /* all calls to cpuid_count() should be made on the same cpu */
2351         get_cpu();
2352         do_cpuid_1_ent(entry, function, index);
2353         ++*nent;
2354
2355         switch (function) {
2356         case 0:
2357                 entry->eax = min(entry->eax, (u32)0xd);
2358                 break;
2359         case 1:
2360                 entry->edx &= kvm_supported_word0_x86_features;
2361                 cpuid_mask(&entry->edx, 0);
2362                 entry->ecx &= kvm_supported_word4_x86_features;
2363                 cpuid_mask(&entry->ecx, 4);
2364                 /* we support x2apic emulation even if host does not support
2365                  * it since we emulate x2apic in software */
2366                 entry->ecx |= F(X2APIC);
2367                 break;
2368         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2369          * may return different values. This forces us to get_cpu() before
2370          * issuing the first command, and also to emulate this annoying behavior
2371          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2372         case 2: {
2373                 int t, times = entry->eax & 0xff;
2374
2375                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2376                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2377                 for (t = 1; t < times && *nent < maxnent; ++t) {
2378                         do_cpuid_1_ent(&entry[t], function, 0);
2379                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2380                         ++*nent;
2381                 }
2382                 break;
2383         }
2384         /* function 4 and 0xb have additional index. */
2385         case 4: {
2386                 int i, cache_type;
2387
2388                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2389                 /* read more entries until cache_type is zero */
2390                 for (i = 1; *nent < maxnent; ++i) {
2391                         cache_type = entry[i - 1].eax & 0x1f;
2392                         if (!cache_type)
2393                                 break;
2394                         do_cpuid_1_ent(&entry[i], function, i);
2395                         entry[i].flags |=
2396                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2397                         ++*nent;
2398                 }
2399                 break;
2400         }
2401         case 9:
2402                 break;
2403         case 0xb: {
2404                 int i, level_type;
2405
2406                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2407                 /* read more entries until level_type is zero */
2408                 for (i = 1; *nent < maxnent; ++i) {
2409                         level_type = entry[i - 1].ecx & 0xff00;
2410                         if (!level_type)
2411                                 break;
2412                         do_cpuid_1_ent(&entry[i], function, i);
2413                         entry[i].flags |=
2414                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2415                         ++*nent;
2416                 }
2417                 break;
2418         }
2419         case 0xd: {
2420                 int i;
2421
2422                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2423                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2424                         if (entry[i].eax == 0 || !supported_xcr0_bit(i))
2425                                 continue;
2426                         do_cpuid_1_ent(&entry[i], function, i);
2427                         entry[i].flags |=
2428                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2429                         ++*nent;
2430                 }
2431                 break;
2432         }
2433         case KVM_CPUID_SIGNATURE: {
2434                 char signature[12] = "KVMKVMKVM\0\0";
2435                 u32 *sigptr = (u32 *)signature;
2436                 entry->eax = 0;
2437                 entry->ebx = sigptr[0];
2438                 entry->ecx = sigptr[1];
2439                 entry->edx = sigptr[2];
2440                 break;
2441         }
2442         case KVM_CPUID_FEATURES:
2443                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2444                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2445                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2446                              (1 << KVM_FEATURE_ASYNC_PF) |
2447                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2448                 entry->ebx = 0;
2449                 entry->ecx = 0;
2450                 entry->edx = 0;
2451                 break;
2452         case 0x80000000:
2453                 entry->eax = min(entry->eax, 0x8000001a);
2454                 break;
2455         case 0x80000001:
2456                 entry->edx &= kvm_supported_word1_x86_features;
2457                 cpuid_mask(&entry->edx, 1);
2458                 entry->ecx &= kvm_supported_word6_x86_features;
2459                 cpuid_mask(&entry->ecx, 6);
2460                 break;
2461         case 0x80000008: {
2462                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2463                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2464                 unsigned phys_as = entry->eax & 0xff;
2465
2466                 if (!g_phys_as)
2467                         g_phys_as = phys_as;
2468                 entry->eax = g_phys_as | (virt_as << 8);
2469                 entry->ebx = entry->edx = 0;
2470                 break;
2471         }
2472         case 0x80000019:
2473                 entry->ecx = entry->edx = 0;
2474                 break;
2475         case 0x8000001a:
2476                 break;
2477         case 0x8000001d:
2478                 break;
2479         /*Add support for Centaur's CPUID instruction*/
2480         case 0xC0000000:
2481                 /*Just support up to 0xC0000004 now*/
2482                 entry->eax = min(entry->eax, 0xC0000004);
2483                 break;
2484         case 0xC0000001:
2485                 entry->edx &= kvm_supported_word5_x86_features;
2486                 cpuid_mask(&entry->edx, 5);
2487                 break;
2488         case 3: /* Processor serial number */
2489         case 5: /* MONITOR/MWAIT */
2490         case 6: /* Thermal management */
2491         case 0xA: /* Architectural Performance Monitoring */
2492         case 0x80000007: /* Advanced power management */
2493         case 0xC0000002:
2494         case 0xC0000003:
2495         case 0xC0000004:
2496         default:
2497                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2498                 break;
2499         }
2500
2501         kvm_x86_ops->set_supported_cpuid(function, entry);
2502
2503         put_cpu();
2504 }
2505
2506 #undef F
2507
2508 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2509                                      struct kvm_cpuid_entry2 __user *entries)
2510 {
2511         struct kvm_cpuid_entry2 *cpuid_entries;
2512         int limit, nent = 0, r = -E2BIG;
2513         u32 func;
2514
2515         if (cpuid->nent < 1)
2516                 goto out;
2517         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2518                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2519         r = -ENOMEM;
2520         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2521         if (!cpuid_entries)
2522                 goto out;
2523
2524         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2525         limit = cpuid_entries[0].eax;
2526         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2527                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2528                              &nent, cpuid->nent);
2529         r = -E2BIG;
2530         if (nent >= cpuid->nent)
2531                 goto out_free;
2532
2533         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2534         limit = cpuid_entries[nent - 1].eax;
2535         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2536                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2537                              &nent, cpuid->nent);
2538
2539
2540
2541         r = -E2BIG;
2542         if (nent >= cpuid->nent)
2543                 goto out_free;
2544
2545         /* Add support for Centaur's CPUID instruction. */
2546         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2547                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2548                                 &nent, cpuid->nent);
2549
2550                 r = -E2BIG;
2551                 if (nent >= cpuid->nent)
2552                         goto out_free;
2553
2554                 limit = cpuid_entries[nent - 1].eax;
2555                 for (func = 0xC0000001;
2556                         func <= limit && nent < cpuid->nent; ++func)
2557                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2558                                         &nent, cpuid->nent);
2559
2560                 r = -E2BIG;
2561                 if (nent >= cpuid->nent)
2562                         goto out_free;
2563         }
2564
2565         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2566                      cpuid->nent);
2567
2568         r = -E2BIG;
2569         if (nent >= cpuid->nent)
2570                 goto out_free;
2571
2572         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2573                      cpuid->nent);
2574
2575         r = -E2BIG;
2576         if (nent >= cpuid->nent)
2577                 goto out_free;
2578
2579         r = -EFAULT;
2580         if (copy_to_user(entries, cpuid_entries,
2581                          nent * sizeof(struct kvm_cpuid_entry2)))
2582                 goto out_free;
2583         cpuid->nent = nent;
2584         r = 0;
2585
2586 out_free:
2587         vfree(cpuid_entries);
2588 out:
2589         return r;
2590 }
2591
2592 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2593                                     struct kvm_lapic_state *s)
2594 {
2595         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2596
2597         return 0;
2598 }
2599
2600 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2601                                     struct kvm_lapic_state *s)
2602 {
2603         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2604         kvm_apic_post_state_restore(vcpu);
2605         update_cr8_intercept(vcpu);
2606
2607         return 0;
2608 }
2609
2610 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2611                                     struct kvm_interrupt *irq)
2612 {
2613         if (irq->irq < 0 || irq->irq >= 256)
2614                 return -EINVAL;
2615         if (irqchip_in_kernel(vcpu->kvm))
2616                 return -ENXIO;
2617
2618         kvm_queue_interrupt(vcpu, irq->irq, false);
2619         kvm_make_request(KVM_REQ_EVENT, vcpu);
2620
2621         return 0;
2622 }
2623
2624 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2625 {
2626         kvm_inject_nmi(vcpu);
2627
2628         return 0;
2629 }
2630
2631 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2632                                            struct kvm_tpr_access_ctl *tac)
2633 {
2634         if (tac->flags)
2635                 return -EINVAL;
2636         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2637         return 0;
2638 }
2639
2640 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2641                                         u64 mcg_cap)
2642 {
2643         int r;
2644         unsigned bank_num = mcg_cap & 0xff, bank;
2645
2646         r = -EINVAL;
2647         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2648                 goto out;
2649         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2650                 goto out;
2651         r = 0;
2652         vcpu->arch.mcg_cap = mcg_cap;
2653         /* Init IA32_MCG_CTL to all 1s */
2654         if (mcg_cap & MCG_CTL_P)
2655                 vcpu->arch.mcg_ctl = ~(u64)0;
2656         /* Init IA32_MCi_CTL to all 1s */
2657         for (bank = 0; bank < bank_num; bank++)
2658                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2659 out:
2660         return r;
2661 }
2662
2663 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2664                                       struct kvm_x86_mce *mce)
2665 {
2666         u64 mcg_cap = vcpu->arch.mcg_cap;
2667         unsigned bank_num = mcg_cap & 0xff;
2668         u64 *banks = vcpu->arch.mce_banks;
2669
2670         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2671                 return -EINVAL;
2672         /*
2673          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2674          * reporting is disabled
2675          */
2676         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2677             vcpu->arch.mcg_ctl != ~(u64)0)
2678                 return 0;
2679         banks += 4 * mce->bank;
2680         /*
2681          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2682          * reporting is disabled for the bank
2683          */
2684         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2685                 return 0;
2686         if (mce->status & MCI_STATUS_UC) {
2687                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2688                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2689                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2690                         return 0;
2691                 }
2692                 if (banks[1] & MCI_STATUS_VAL)
2693                         mce->status |= MCI_STATUS_OVER;
2694                 banks[2] = mce->addr;
2695                 banks[3] = mce->misc;
2696                 vcpu->arch.mcg_status = mce->mcg_status;
2697                 banks[1] = mce->status;
2698                 kvm_queue_exception(vcpu, MC_VECTOR);
2699         } else if (!(banks[1] & MCI_STATUS_VAL)
2700                    || !(banks[1] & MCI_STATUS_UC)) {
2701                 if (banks[1] & MCI_STATUS_VAL)
2702                         mce->status |= MCI_STATUS_OVER;
2703                 banks[2] = mce->addr;
2704                 banks[3] = mce->misc;
2705                 banks[1] = mce->status;
2706         } else
2707                 banks[1] |= MCI_STATUS_OVER;
2708         return 0;
2709 }
2710
2711 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2712                                                struct kvm_vcpu_events *events)
2713 {
2714         events->exception.injected =
2715                 vcpu->arch.exception.pending &&
2716                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2717         events->exception.nr = vcpu->arch.exception.nr;
2718         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2719         events->exception.pad = 0;
2720         events->exception.error_code = vcpu->arch.exception.error_code;
2721
2722         events->interrupt.injected =
2723                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2724         events->interrupt.nr = vcpu->arch.interrupt.nr;
2725         events->interrupt.soft = 0;
2726         events->interrupt.shadow =
2727                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2728                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2729
2730         events->nmi.injected = vcpu->arch.nmi_injected;
2731         events->nmi.pending = vcpu->arch.nmi_pending;
2732         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2733         events->nmi.pad = 0;
2734
2735         events->sipi_vector = vcpu->arch.sipi_vector;
2736
2737         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2738                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2739                          | KVM_VCPUEVENT_VALID_SHADOW);
2740         memset(&events->reserved, 0, sizeof(events->reserved));
2741 }
2742
2743 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2744                                               struct kvm_vcpu_events *events)
2745 {
2746         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2747                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2748                               | KVM_VCPUEVENT_VALID_SHADOW))
2749                 return -EINVAL;
2750
2751         vcpu->arch.exception.pending = events->exception.injected;
2752         vcpu->arch.exception.nr = events->exception.nr;
2753         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2754         vcpu->arch.exception.error_code = events->exception.error_code;
2755
2756         vcpu->arch.interrupt.pending = events->interrupt.injected;
2757         vcpu->arch.interrupt.nr = events->interrupt.nr;
2758         vcpu->arch.interrupt.soft = events->interrupt.soft;
2759         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2760                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2761                                                   events->interrupt.shadow);
2762
2763         vcpu->arch.nmi_injected = events->nmi.injected;
2764         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2765                 vcpu->arch.nmi_pending = events->nmi.pending;
2766         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2767
2768         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2769                 vcpu->arch.sipi_vector = events->sipi_vector;
2770
2771         kvm_make_request(KVM_REQ_EVENT, vcpu);
2772
2773         return 0;
2774 }
2775
2776 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2777                                              struct kvm_debugregs *dbgregs)
2778 {
2779         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2780         dbgregs->dr6 = vcpu->arch.dr6;
2781         dbgregs->dr7 = vcpu->arch.dr7;
2782         dbgregs->flags = 0;
2783         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2784 }
2785
2786 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2787                                             struct kvm_debugregs *dbgregs)
2788 {
2789         if (dbgregs->flags)
2790                 return -EINVAL;
2791
2792         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2793         vcpu->arch.dr6 = dbgregs->dr6;
2794         vcpu->arch.dr7 = dbgregs->dr7;
2795
2796         return 0;
2797 }
2798
2799 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2800                                          struct kvm_xsave *guest_xsave)
2801 {
2802         if (cpu_has_xsave)
2803                 memcpy(guest_xsave->region,
2804                         &vcpu->arch.guest_fpu.state->xsave,
2805                         xstate_size);
2806         else {
2807                 memcpy(guest_xsave->region,
2808                         &vcpu->arch.guest_fpu.state->fxsave,
2809                         sizeof(struct i387_fxsave_struct));
2810                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2811                         XSTATE_FPSSE;
2812         }
2813 }
2814
2815 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2816                                         struct kvm_xsave *guest_xsave)
2817 {
2818         u64 xstate_bv =
2819                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2820
2821         if (cpu_has_xsave)
2822                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2823                         guest_xsave->region, xstate_size);
2824         else {
2825                 if (xstate_bv & ~XSTATE_FPSSE)
2826                         return -EINVAL;
2827                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2828                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2829         }
2830         return 0;
2831 }
2832
2833 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2834                                         struct kvm_xcrs *guest_xcrs)
2835 {
2836         if (!cpu_has_xsave) {
2837                 guest_xcrs->nr_xcrs = 0;
2838                 return;
2839         }
2840
2841         guest_xcrs->nr_xcrs = 1;
2842         guest_xcrs->flags = 0;
2843         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2844         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2845 }
2846
2847 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2848                                        struct kvm_xcrs *guest_xcrs)
2849 {
2850         int i, r = 0;
2851
2852         if (!cpu_has_xsave)
2853                 return -EINVAL;
2854
2855         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2856                 return -EINVAL;
2857
2858         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2859                 /* Only support XCR0 currently */
2860                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2861                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2862                                 guest_xcrs->xcrs[0].value);
2863                         break;
2864                 }
2865         if (r)
2866                 r = -EINVAL;
2867         return r;
2868 }
2869
2870 long kvm_arch_vcpu_ioctl(struct file *filp,
2871                          unsigned int ioctl, unsigned long arg)
2872 {
2873         struct kvm_vcpu *vcpu = filp->private_data;
2874         void __user *argp = (void __user *)arg;
2875         int r;
2876         union {
2877                 struct kvm_lapic_state *lapic;
2878                 struct kvm_xsave *xsave;
2879                 struct kvm_xcrs *xcrs;
2880                 void *buffer;
2881         } u;
2882
2883         u.buffer = NULL;
2884         switch (ioctl) {
2885         case KVM_GET_LAPIC: {
2886                 r = -EINVAL;
2887                 if (!vcpu->arch.apic)
2888                         goto out;
2889                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2890
2891                 r = -ENOMEM;
2892                 if (!u.lapic)
2893                         goto out;
2894                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2895                 if (r)
2896                         goto out;
2897                 r = -EFAULT;
2898                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2899                         goto out;
2900                 r = 0;
2901                 break;
2902         }
2903         case KVM_SET_LAPIC: {
2904                 r = -EINVAL;
2905                 if (!vcpu->arch.apic)
2906                         goto out;
2907                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2908                 r = -ENOMEM;
2909                 if (!u.lapic)
2910                         goto out;
2911                 r = -EFAULT;
2912                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2913                         goto out;
2914                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2915                 if (r)
2916                         goto out;
2917                 r = 0;
2918                 break;
2919         }
2920         case KVM_INTERRUPT: {
2921                 struct kvm_interrupt irq;
2922
2923                 r = -EFAULT;
2924                 if (copy_from_user(&irq, argp, sizeof irq))
2925                         goto out;
2926                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2927                 if (r)
2928                         goto out;
2929                 r = 0;
2930                 break;
2931         }
2932         case KVM_NMI: {
2933                 r = kvm_vcpu_ioctl_nmi(vcpu);
2934                 if (r)
2935                         goto out;
2936                 r = 0;
2937                 break;
2938         }
2939         case KVM_SET_CPUID: {
2940                 struct kvm_cpuid __user *cpuid_arg = argp;
2941                 struct kvm_cpuid cpuid;
2942
2943                 r = -EFAULT;
2944                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2945                         goto out;
2946                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2947                 if (r)
2948                         goto out;
2949                 break;
2950         }
2951         case KVM_SET_CPUID2: {
2952                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2953                 struct kvm_cpuid2 cpuid;
2954
2955                 r = -EFAULT;
2956                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2957                         goto out;
2958                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2959                                               cpuid_arg->entries);
2960                 if (r)
2961                         goto out;
2962                 break;
2963         }
2964         case KVM_GET_CPUID2: {
2965                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2966                 struct kvm_cpuid2 cpuid;
2967
2968                 r = -EFAULT;
2969                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2970                         goto out;
2971                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2972                                               cpuid_arg->entries);
2973                 if (r)
2974                         goto out;
2975                 r = -EFAULT;
2976                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2977                         goto out;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_GET_MSRS:
2982                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2983                 break;
2984         case KVM_SET_MSRS:
2985                 r = msr_io(vcpu, argp, do_set_msr, 0);
2986                 break;
2987         case KVM_TPR_ACCESS_REPORTING: {
2988                 struct kvm_tpr_access_ctl tac;
2989
2990                 r = -EFAULT;
2991                 if (copy_from_user(&tac, argp, sizeof tac))
2992                         goto out;
2993                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2994                 if (r)
2995                         goto out;
2996                 r = -EFAULT;
2997                 if (copy_to_user(argp, &tac, sizeof tac))
2998                         goto out;
2999                 r = 0;
3000                 break;
3001         };
3002         case KVM_SET_VAPIC_ADDR: {
3003                 struct kvm_vapic_addr va;
3004
3005                 r = -EINVAL;
3006                 if (!irqchip_in_kernel(vcpu->kvm))
3007                         goto out;
3008                 r = -EFAULT;
3009                 if (copy_from_user(&va, argp, sizeof va))
3010                         goto out;
3011                 r = 0;
3012                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3013                 break;
3014         }
3015         case KVM_X86_SETUP_MCE: {
3016                 u64 mcg_cap;
3017
3018                 r = -EFAULT;
3019                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3020                         goto out;
3021                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3022                 break;
3023         }
3024         case KVM_X86_SET_MCE: {
3025                 struct kvm_x86_mce mce;
3026
3027                 r = -EFAULT;
3028                 if (copy_from_user(&mce, argp, sizeof mce))
3029                         goto out;
3030                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3031                 break;
3032         }
3033         case KVM_GET_VCPU_EVENTS: {
3034                 struct kvm_vcpu_events events;
3035
3036                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3037
3038                 r = -EFAULT;
3039                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3040                         break;
3041                 r = 0;
3042                 break;
3043         }
3044         case KVM_SET_VCPU_EVENTS: {
3045                 struct kvm_vcpu_events events;
3046
3047                 r = -EFAULT;
3048                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3049                         break;
3050
3051                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3052                 break;
3053         }
3054         case KVM_GET_DEBUGREGS: {
3055                 struct kvm_debugregs dbgregs;
3056
3057                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3058
3059                 r = -EFAULT;
3060                 if (copy_to_user(argp, &dbgregs,
3061                                  sizeof(struct kvm_debugregs)))
3062                         break;
3063                 r = 0;
3064                 break;
3065         }
3066         case KVM_SET_DEBUGREGS: {
3067                 struct kvm_debugregs dbgregs;
3068
3069                 r = -EFAULT;
3070                 if (copy_from_user(&dbgregs, argp,
3071                                    sizeof(struct kvm_debugregs)))
3072                         break;
3073
3074                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3075                 break;
3076         }
3077         case KVM_GET_XSAVE: {
3078                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3079                 r = -ENOMEM;
3080                 if (!u.xsave)
3081                         break;
3082
3083                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3084
3085                 r = -EFAULT;
3086                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3087                         break;
3088                 r = 0;
3089                 break;
3090         }
3091         case KVM_SET_XSAVE: {
3092                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3093                 r = -ENOMEM;
3094                 if (!u.xsave)
3095                         break;
3096
3097                 r = -EFAULT;
3098                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3099                         break;
3100
3101                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3102                 break;
3103         }
3104         case KVM_GET_XCRS: {
3105                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3106                 r = -ENOMEM;
3107                 if (!u.xcrs)
3108                         break;
3109
3110                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3111
3112                 r = -EFAULT;
3113                 if (copy_to_user(argp, u.xcrs,
3114                                  sizeof(struct kvm_xcrs)))
3115                         break;
3116                 r = 0;
3117                 break;
3118         }
3119         case KVM_SET_XCRS: {
3120                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3121                 r = -ENOMEM;
3122                 if (!u.xcrs)
3123                         break;
3124
3125                 r = -EFAULT;
3126                 if (copy_from_user(u.xcrs, argp,
3127                                    sizeof(struct kvm_xcrs)))
3128                         break;
3129
3130                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3131                 break;
3132         }
3133         case KVM_SET_TSC_KHZ: {
3134                 u32 user_tsc_khz;
3135
3136                 r = -EINVAL;
3137                 if (!kvm_has_tsc_control)
3138                         break;
3139
3140                 user_tsc_khz = (u32)arg;
3141
3142                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3143                         goto out;
3144
3145                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3146
3147                 r = 0;
3148                 goto out;
3149         }
3150         case KVM_GET_TSC_KHZ: {
3151                 r = -EIO;
3152                 if (check_tsc_unstable())
3153                         goto out;
3154
3155                 r = vcpu_tsc_khz(vcpu);
3156
3157                 goto out;
3158         }
3159         default:
3160                 r = -EINVAL;
3161         }
3162 out:
3163         kfree(u.buffer);
3164         return r;
3165 }
3166
3167 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3168 {
3169         int ret;
3170
3171         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3172                 return -1;
3173         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3174         return ret;
3175 }
3176
3177 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3178                                               u64 ident_addr)
3179 {
3180         kvm->arch.ept_identity_map_addr = ident_addr;
3181         return 0;
3182 }
3183
3184 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3185                                           u32 kvm_nr_mmu_pages)
3186 {
3187         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3188                 return -EINVAL;
3189
3190         mutex_lock(&kvm->slots_lock);
3191         spin_lock(&kvm->mmu_lock);
3192
3193         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3194         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3195
3196         spin_unlock(&kvm->mmu_lock);
3197         mutex_unlock(&kvm->slots_lock);
3198         return 0;
3199 }
3200
3201 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3202 {
3203         return kvm->arch.n_max_mmu_pages;
3204 }
3205
3206 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3207 {
3208         int r;
3209
3210         r = 0;
3211         switch (chip->chip_id) {
3212         case KVM_IRQCHIP_PIC_MASTER:
3213                 memcpy(&chip->chip.pic,
3214                         &pic_irqchip(kvm)->pics[0],
3215                         sizeof(struct kvm_pic_state));
3216                 break;
3217         case KVM_IRQCHIP_PIC_SLAVE:
3218                 memcpy(&chip->chip.pic,
3219                         &pic_irqchip(kvm)->pics[1],
3220                         sizeof(struct kvm_pic_state));
3221                 break;
3222         case KVM_IRQCHIP_IOAPIC:
3223                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3224                 break;
3225         default:
3226                 r = -EINVAL;
3227                 break;
3228         }
3229         return r;
3230 }
3231
3232 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3233 {
3234         int r;
3235
3236         r = 0;
3237         switch (chip->chip_id) {
3238         case KVM_IRQCHIP_PIC_MASTER:
3239                 spin_lock(&pic_irqchip(kvm)->lock);
3240                 memcpy(&pic_irqchip(kvm)->pics[0],
3241                         &chip->chip.pic,
3242                         sizeof(struct kvm_pic_state));
3243                 spin_unlock(&pic_irqchip(kvm)->lock);
3244                 break;
3245         case KVM_IRQCHIP_PIC_SLAVE:
3246                 spin_lock(&pic_irqchip(kvm)->lock);
3247                 memcpy(&pic_irqchip(kvm)->pics[1],
3248                         &chip->chip.pic,
3249                         sizeof(struct kvm_pic_state));
3250                 spin_unlock(&pic_irqchip(kvm)->lock);
3251                 break;
3252         case KVM_IRQCHIP_IOAPIC:
3253                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3254                 break;
3255         default:
3256                 r = -EINVAL;
3257                 break;
3258         }
3259         kvm_pic_update_irq(pic_irqchip(kvm));
3260         return r;
3261 }
3262
3263 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3264 {
3265         int r = 0;
3266
3267         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3268         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3269         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3270         return r;
3271 }
3272
3273 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3274 {
3275         int r = 0;
3276
3277         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3278         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3279         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3280         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3281         return r;
3282 }
3283
3284 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3285 {
3286         int r = 0;
3287
3288         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3289         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3290                 sizeof(ps->channels));
3291         ps->flags = kvm->arch.vpit->pit_state.flags;
3292         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3293         memset(&ps->reserved, 0, sizeof(ps->reserved));
3294         return r;
3295 }
3296
3297 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3298 {
3299         int r = 0, start = 0;
3300         u32 prev_legacy, cur_legacy;
3301         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3302         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3303         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3304         if (!prev_legacy && cur_legacy)
3305                 start = 1;
3306         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3307                sizeof(kvm->arch.vpit->pit_state.channels));
3308         kvm->arch.vpit->pit_state.flags = ps->flags;
3309         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3310         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3311         return r;
3312 }
3313
3314 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3315                                  struct kvm_reinject_control *control)
3316 {
3317         if (!kvm->arch.vpit)
3318                 return -ENXIO;
3319         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3320         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3321         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3322         return 0;
3323 }
3324
3325 /*
3326  * Get (and clear) the dirty memory log for a memory slot.
3327  */
3328 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3329                                       struct kvm_dirty_log *log)
3330 {
3331         int r, i;
3332         struct kvm_memory_slot *memslot;
3333         unsigned long n;
3334         unsigned long is_dirty = 0;
3335
3336         mutex_lock(&kvm->slots_lock);
3337
3338         r = -EINVAL;
3339         if (log->slot >= KVM_MEMORY_SLOTS)
3340                 goto out;
3341
3342         memslot = &kvm->memslots->memslots[log->slot];
3343         r = -ENOENT;
3344         if (!memslot->dirty_bitmap)
3345                 goto out;
3346
3347         n = kvm_dirty_bitmap_bytes(memslot);
3348
3349         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3350                 is_dirty = memslot->dirty_bitmap[i];
3351
3352         /* If nothing is dirty, don't bother messing with page tables. */
3353         if (is_dirty) {
3354                 struct kvm_memslots *slots, *old_slots;
3355                 unsigned long *dirty_bitmap;
3356
3357                 dirty_bitmap = memslot->dirty_bitmap_head;
3358                 if (memslot->dirty_bitmap == dirty_bitmap)
3359                         dirty_bitmap += n / sizeof(long);
3360                 memset(dirty_bitmap, 0, n);
3361
3362                 r = -ENOMEM;
3363                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3364                 if (!slots)
3365                         goto out;
3366                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3367                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3368                 slots->generation++;
3369
3370                 old_slots = kvm->memslots;
3371                 rcu_assign_pointer(kvm->memslots, slots);
3372                 synchronize_srcu_expedited(&kvm->srcu);
3373                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3374                 kfree(old_slots);
3375
3376                 spin_lock(&kvm->mmu_lock);
3377                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3378                 spin_unlock(&kvm->mmu_lock);
3379
3380                 r = -EFAULT;
3381                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3382                         goto out;
3383         } else {
3384                 r = -EFAULT;
3385                 if (clear_user(log->dirty_bitmap, n))
3386                         goto out;
3387         }
3388
3389         r = 0;
3390 out:
3391         mutex_unlock(&kvm->slots_lock);
3392         return r;
3393 }
3394
3395 long kvm_arch_vm_ioctl(struct file *filp,
3396                        unsigned int ioctl, unsigned long arg)
3397 {
3398         struct kvm *kvm = filp->private_data;
3399         void __user *argp = (void __user *)arg;
3400         int r = -ENOTTY;
3401         /*
3402          * This union makes it completely explicit to gcc-3.x
3403          * that these two variables' stack usage should be
3404          * combined, not added together.
3405          */
3406         union {
3407                 struct kvm_pit_state ps;
3408                 struct kvm_pit_state2 ps2;
3409                 struct kvm_pit_config pit_config;
3410         } u;
3411
3412         switch (ioctl) {
3413         case KVM_SET_TSS_ADDR:
3414                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3415                 if (r < 0)
3416                         goto out;
3417                 break;
3418         case KVM_SET_IDENTITY_MAP_ADDR: {
3419                 u64 ident_addr;
3420
3421                 r = -EFAULT;
3422                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3423                         goto out;
3424                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3425                 if (r < 0)
3426                         goto out;
3427                 break;
3428         }
3429         case KVM_SET_NR_MMU_PAGES:
3430                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3431                 if (r)
3432                         goto out;
3433                 break;
3434         case KVM_GET_NR_MMU_PAGES:
3435                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3436                 break;
3437         case KVM_CREATE_IRQCHIP: {
3438                 struct kvm_pic *vpic;
3439
3440                 mutex_lock(&kvm->lock);
3441                 r = -EEXIST;
3442                 if (kvm->arch.vpic)
3443                         goto create_irqchip_unlock;
3444                 r = -ENOMEM;
3445                 vpic = kvm_create_pic(kvm);
3446                 if (vpic) {
3447                         r = kvm_ioapic_init(kvm);
3448                         if (r) {
3449                                 mutex_lock(&kvm->slots_lock);
3450                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3451                                                           &vpic->dev);
3452                                 mutex_unlock(&kvm->slots_lock);
3453                                 kfree(vpic);
3454                                 goto create_irqchip_unlock;
3455                         }
3456                 } else
3457                         goto create_irqchip_unlock;
3458                 smp_wmb();
3459                 kvm->arch.vpic = vpic;
3460                 smp_wmb();
3461                 r = kvm_setup_default_irq_routing(kvm);
3462                 if (r) {
3463                         mutex_lock(&kvm->slots_lock);
3464                         mutex_lock(&kvm->irq_lock);
3465                         kvm_ioapic_destroy(kvm);
3466                         kvm_destroy_pic(kvm);
3467                         mutex_unlock(&kvm->irq_lock);
3468                         mutex_unlock(&kvm->slots_lock);
3469                 }
3470         create_irqchip_unlock:
3471                 mutex_unlock(&kvm->lock);
3472                 break;
3473         }
3474         case KVM_CREATE_PIT:
3475                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3476                 goto create_pit;
3477         case KVM_CREATE_PIT2:
3478                 r = -EFAULT;
3479                 if (copy_from_user(&u.pit_config, argp,
3480                                    sizeof(struct kvm_pit_config)))
3481                         goto out;
3482         create_pit:
3483                 mutex_lock(&kvm->slots_lock);
3484                 r = -EEXIST;
3485                 if (kvm->arch.vpit)
3486                         goto create_pit_unlock;
3487                 r = -ENOMEM;
3488                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3489                 if (kvm->arch.vpit)
3490                         r = 0;
3491         create_pit_unlock:
3492                 mutex_unlock(&kvm->slots_lock);
3493                 break;
3494         case KVM_IRQ_LINE_STATUS:
3495         case KVM_IRQ_LINE: {
3496                 struct kvm_irq_level irq_event;
3497
3498                 r = -EFAULT;
3499                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3500                         goto out;
3501                 r = -ENXIO;
3502                 if (irqchip_in_kernel(kvm)) {
3503                         __s32 status;
3504                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3505                                         irq_event.irq, irq_event.level);
3506                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3507                                 r = -EFAULT;
3508                                 irq_event.status = status;
3509                                 if (copy_to_user(argp, &irq_event,
3510                                                         sizeof irq_event))
3511                                         goto out;
3512                         }
3513                         r = 0;
3514                 }
3515                 break;
3516         }
3517         case KVM_GET_IRQCHIP: {
3518                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3519                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3520
3521                 r = -ENOMEM;
3522                 if (!chip)
3523                         goto out;
3524                 r = -EFAULT;
3525                 if (copy_from_user(chip, argp, sizeof *chip))
3526                         goto get_irqchip_out;
3527                 r = -ENXIO;
3528                 if (!irqchip_in_kernel(kvm))
3529                         goto get_irqchip_out;
3530                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3531                 if (r)
3532                         goto get_irqchip_out;
3533                 r = -EFAULT;
3534                 if (copy_to_user(argp, chip, sizeof *chip))
3535                         goto get_irqchip_out;
3536                 r = 0;
3537         get_irqchip_out:
3538                 kfree(chip);
3539                 if (r)
3540                         goto out;
3541                 break;
3542         }
3543         case KVM_SET_IRQCHIP: {
3544                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3545                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3546
3547                 r = -ENOMEM;
3548                 if (!chip)
3549                         goto out;
3550                 r = -EFAULT;
3551                 if (copy_from_user(chip, argp, sizeof *chip))
3552                         goto set_irqchip_out;
3553                 r = -ENXIO;
3554                 if (!irqchip_in_kernel(kvm))
3555                         goto set_irqchip_out;
3556                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3557                 if (r)
3558                         goto set_irqchip_out;
3559                 r = 0;
3560         set_irqchip_out:
3561                 kfree(chip);
3562                 if (r)
3563                         goto out;
3564                 break;
3565         }
3566         case KVM_GET_PIT: {
3567                 r = -EFAULT;
3568                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3569                         goto out;
3570                 r = -ENXIO;
3571                 if (!kvm->arch.vpit)
3572                         goto out;
3573                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3574                 if (r)
3575                         goto out;
3576                 r = -EFAULT;
3577                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3578                         goto out;
3579                 r = 0;
3580                 break;
3581         }
3582         case KVM_SET_PIT: {
3583                 r = -EFAULT;
3584                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3585                         goto out;
3586                 r = -ENXIO;
3587                 if (!kvm->arch.vpit)
3588                         goto out;
3589                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3590                 if (r)
3591                         goto out;
3592                 r = 0;
3593                 break;
3594         }
3595         case KVM_GET_PIT2: {
3596                 r = -ENXIO;
3597                 if (!kvm->arch.vpit)
3598                         goto out;
3599                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3600                 if (r)
3601                         goto out;
3602                 r = -EFAULT;
3603                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3604                         goto out;
3605                 r = 0;
3606                 break;
3607         }
3608         case KVM_SET_PIT2: {
3609                 r = -EFAULT;
3610                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3611                         goto out;
3612                 r = -ENXIO;
3613                 if (!kvm->arch.vpit)
3614                         goto out;
3615                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3616                 if (r)
3617                         goto out;
3618                 r = 0;
3619                 break;
3620         }
3621         case KVM_REINJECT_CONTROL: {
3622                 struct kvm_reinject_control control;
3623                 r =  -EFAULT;
3624                 if (copy_from_user(&control, argp, sizeof(control)))
3625                         goto out;
3626                 r = kvm_vm_ioctl_reinject(kvm, &control);
3627                 if (r)
3628                         goto out;
3629                 r = 0;
3630                 break;
3631         }
3632         case KVM_XEN_HVM_CONFIG: {
3633                 r = -EFAULT;
3634                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3635                                    sizeof(struct kvm_xen_hvm_config)))
3636                         goto out;
3637                 r = -EINVAL;
3638                 if (kvm->arch.xen_hvm_config.flags)
3639                         goto out;
3640                 r = 0;
3641                 break;
3642         }
3643         case KVM_SET_CLOCK: {
3644                 struct kvm_clock_data user_ns;
3645                 u64 now_ns;
3646                 s64 delta;
3647
3648                 r = -EFAULT;
3649                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3650                         goto out;
3651
3652                 r = -EINVAL;
3653                 if (user_ns.flags)
3654                         goto out;
3655
3656                 r = 0;
3657                 local_irq_disable();
3658                 now_ns = get_kernel_ns();
3659                 delta = user_ns.clock - now_ns;
3660                 local_irq_enable();
3661                 kvm->arch.kvmclock_offset = delta;
3662                 break;
3663         }
3664         case KVM_GET_CLOCK: {
3665                 struct kvm_clock_data user_ns;
3666                 u64 now_ns;
3667
3668                 local_irq_disable();
3669                 now_ns = get_kernel_ns();
3670                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3671                 local_irq_enable();
3672                 user_ns.flags = 0;
3673                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3674
3675                 r = -EFAULT;
3676                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3677                         goto out;
3678                 r = 0;
3679                 break;
3680         }
3681
3682         default:
3683                 ;
3684         }
3685 out:
3686         return r;
3687 }
3688
3689 static void kvm_init_msr_list(void)
3690 {
3691         u32 dummy[2];
3692         unsigned i, j;
3693
3694         /* skip the first msrs in the list. KVM-specific */
3695         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3696                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3697                         continue;
3698                 if (j < i)
3699                         msrs_to_save[j] = msrs_to_save[i];
3700                 j++;
3701         }
3702         num_msrs_to_save = j;
3703 }
3704
3705 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3706                            const void *v)
3707 {
3708         int handled = 0;
3709         int n;
3710
3711         do {
3712                 n = min(len, 8);
3713                 if (!(vcpu->arch.apic &&
3714                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3715                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3716                         break;
3717                 handled += n;
3718                 addr += n;
3719                 len -= n;
3720                 v += n;
3721         } while (len);
3722
3723         return handled;
3724 }
3725
3726 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3727 {
3728         int handled = 0;
3729         int n;
3730
3731         do {
3732                 n = min(len, 8);
3733                 if (!(vcpu->arch.apic &&
3734                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3735                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3736                         break;
3737                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3738                 handled += n;
3739                 addr += n;
3740                 len -= n;
3741                 v += n;
3742         } while (len);
3743
3744         return handled;
3745 }
3746
3747 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3748                         struct kvm_segment *var, int seg)
3749 {
3750         kvm_x86_ops->set_segment(vcpu, var, seg);
3751 }
3752
3753 void kvm_get_segment(struct kvm_vcpu *vcpu,
3754                      struct kvm_segment *var, int seg)
3755 {
3756         kvm_x86_ops->get_segment(vcpu, var, seg);
3757 }
3758
3759 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3760 {
3761         return gpa;
3762 }
3763
3764 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3765 {
3766         gpa_t t_gpa;
3767         struct x86_exception exception;
3768
3769         BUG_ON(!mmu_is_nested(vcpu));
3770
3771         /* NPT walks are always user-walks */
3772         access |= PFERR_USER_MASK;
3773         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3774
3775         return t_gpa;
3776 }
3777
3778 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3779                               struct x86_exception *exception)
3780 {
3781         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3782         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3783 }
3784
3785  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3786                                 struct x86_exception *exception)
3787 {
3788         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3789         access |= PFERR_FETCH_MASK;
3790         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3791 }
3792
3793 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3794                                struct x86_exception *exception)
3795 {
3796         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3797         access |= PFERR_WRITE_MASK;
3798         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3799 }
3800
3801 /* uses this to access any guest's mapped memory without checking CPL */
3802 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3803                                 struct x86_exception *exception)
3804 {
3805         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3806 }
3807
3808 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3809                                       struct kvm_vcpu *vcpu, u32 access,
3810                                       struct x86_exception *exception)
3811 {
3812         void *data = val;
3813         int r = X86EMUL_CONTINUE;
3814
3815         while (bytes) {
3816                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3817                                                             exception);
3818                 unsigned offset = addr & (PAGE_SIZE-1);
3819                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3820                 int ret;
3821
3822                 if (gpa == UNMAPPED_GVA)
3823                         return X86EMUL_PROPAGATE_FAULT;
3824                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3825                 if (ret < 0) {
3826                         r = X86EMUL_IO_NEEDED;
3827                         goto out;
3828                 }
3829
3830                 bytes -= toread;
3831                 data += toread;
3832                 addr += toread;
3833         }
3834 out:
3835         return r;
3836 }
3837
3838 /* used for instruction fetching */
3839 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3840                                 gva_t addr, void *val, unsigned int bytes,
3841                                 struct x86_exception *exception)
3842 {
3843         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3844         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3845
3846         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3847                                           access | PFERR_FETCH_MASK,
3848                                           exception);
3849 }
3850
3851 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3852                                gva_t addr, void *val, unsigned int bytes,
3853                                struct x86_exception *exception)
3854 {
3855         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3856         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3857
3858         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3859                                           exception);
3860 }
3861 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3862
3863 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3864                                       gva_t addr, void *val, unsigned int bytes,
3865                                       struct x86_exception *exception)
3866 {
3867         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3868         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3869 }
3870
3871 static int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3872                                        gva_t addr, void *val,
3873                                        unsigned int bytes,
3874                                        struct x86_exception *exception)
3875 {
3876         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3877         void *data = val;
3878         int r = X86EMUL_CONTINUE;
3879
3880         while (bytes) {
3881                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3882                                                              PFERR_WRITE_MASK,
3883                                                              exception);
3884                 unsigned offset = addr & (PAGE_SIZE-1);
3885                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3886                 int ret;
3887
3888                 if (gpa == UNMAPPED_GVA)
3889                         return X86EMUL_PROPAGATE_FAULT;
3890                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3891                 if (ret < 0) {
3892                         r = X86EMUL_IO_NEEDED;
3893                         goto out;
3894                 }
3895
3896                 bytes -= towrite;
3897                 data += towrite;
3898                 addr += towrite;
3899         }
3900 out:
3901         return r;
3902 }
3903
3904 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3905                                   unsigned long addr,
3906                                   void *val,
3907                                   unsigned int bytes,
3908                                   struct x86_exception *exception)
3909 {
3910         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3911         gpa_t                 gpa;
3912         int handled;
3913
3914         if (vcpu->mmio_read_completed) {
3915                 memcpy(val, vcpu->mmio_data, bytes);
3916                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3917                                vcpu->mmio_phys_addr, *(u64 *)val);
3918                 vcpu->mmio_read_completed = 0;
3919                 return X86EMUL_CONTINUE;
3920         }
3921
3922         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3923
3924         if (gpa == UNMAPPED_GVA)
3925                 return X86EMUL_PROPAGATE_FAULT;
3926
3927         /* For APIC access vmexit */
3928         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3929                 goto mmio;
3930
3931         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3932             == X86EMUL_CONTINUE)
3933                 return X86EMUL_CONTINUE;
3934
3935 mmio:
3936         /*
3937          * Is this MMIO handled locally?
3938          */
3939         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3940
3941         if (handled == bytes)
3942                 return X86EMUL_CONTINUE;
3943
3944         gpa += handled;
3945         bytes -= handled;
3946         val += handled;
3947
3948         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3949
3950         vcpu->mmio_needed = 1;
3951         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3952         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3953         vcpu->mmio_size = bytes;
3954         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3955         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3956         vcpu->mmio_index = 0;
3957
3958         return X86EMUL_IO_NEEDED;
3959 }
3960
3961 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3962                         const void *val, int bytes)
3963 {
3964         int ret;
3965
3966         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3967         if (ret < 0)
3968                 return 0;
3969         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3970         return 1;
3971 }
3972
3973 static int emulator_write_emulated_onepage(unsigned long addr,
3974                                            const void *val,
3975                                            unsigned int bytes,
3976                                            struct x86_exception *exception,
3977                                            struct kvm_vcpu *vcpu)
3978 {
3979         gpa_t                 gpa;
3980         int handled;
3981
3982         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3983
3984         if (gpa == UNMAPPED_GVA)
3985                 return X86EMUL_PROPAGATE_FAULT;
3986
3987         /* For APIC access vmexit */
3988         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3989                 goto mmio;
3990
3991         if (emulator_write_phys(vcpu, gpa, val, bytes))
3992                 return X86EMUL_CONTINUE;
3993
3994 mmio:
3995         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3996         /*
3997          * Is this MMIO handled locally?
3998          */
3999         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4000         if (handled == bytes)
4001                 return X86EMUL_CONTINUE;
4002
4003         gpa += handled;
4004         bytes -= handled;
4005         val += handled;
4006
4007         vcpu->mmio_needed = 1;
4008         memcpy(vcpu->mmio_data, val, bytes);
4009         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4010         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4011         vcpu->mmio_size = bytes;
4012         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4013         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4014         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4015         vcpu->mmio_index = 0;
4016
4017         return X86EMUL_CONTINUE;
4018 }
4019
4020 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4021                             unsigned long addr,
4022                             const void *val,
4023                             unsigned int bytes,
4024                             struct x86_exception *exception)
4025 {
4026         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4027
4028         /* Crossing a page boundary? */
4029         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4030                 int rc, now;
4031
4032                 now = -addr & ~PAGE_MASK;
4033                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4034                                                      vcpu);
4035                 if (rc != X86EMUL_CONTINUE)
4036                         return rc;
4037                 addr += now;
4038                 val += now;
4039                 bytes -= now;
4040         }
4041         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4042                                                vcpu);
4043 }
4044
4045 #define CMPXCHG_TYPE(t, ptr, old, new) \
4046         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4047
4048 #ifdef CONFIG_X86_64
4049 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4050 #else
4051 #  define CMPXCHG64(ptr, old, new) \
4052         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4053 #endif
4054
4055 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4056                                      unsigned long addr,
4057                                      const void *old,
4058                                      const void *new,
4059                                      unsigned int bytes,
4060                                      struct x86_exception *exception)
4061 {
4062         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4063         gpa_t gpa;
4064         struct page *page;
4065         char *kaddr;
4066         bool exchanged;
4067
4068         /* guests cmpxchg8b have to be emulated atomically */
4069         if (bytes > 8 || (bytes & (bytes - 1)))
4070                 goto emul_write;
4071
4072         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4073
4074         if (gpa == UNMAPPED_GVA ||
4075             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4076                 goto emul_write;
4077
4078         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4079                 goto emul_write;
4080
4081         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4082         if (is_error_page(page)) {
4083                 kvm_release_page_clean(page);
4084                 goto emul_write;
4085         }
4086
4087         kaddr = kmap_atomic(page, KM_USER0);
4088         kaddr += offset_in_page(gpa);
4089         switch (bytes) {
4090         case 1:
4091                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4092                 break;
4093         case 2:
4094                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4095                 break;
4096         case 4:
4097                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4098                 break;
4099         case 8:
4100                 exchanged = CMPXCHG64(kaddr, old, new);
4101                 break;
4102         default:
4103                 BUG();
4104         }
4105         kunmap_atomic(kaddr, KM_USER0);
4106         kvm_release_page_dirty(page);
4107
4108         if (!exchanged)
4109                 return X86EMUL_CMPXCHG_FAILED;
4110
4111         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4112
4113         return X86EMUL_CONTINUE;
4114
4115 emul_write:
4116         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4117
4118         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4119 }
4120
4121 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4122 {
4123         /* TODO: String I/O for in kernel device */
4124         int r;
4125
4126         if (vcpu->arch.pio.in)
4127                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4128                                     vcpu->arch.pio.size, pd);
4129         else
4130                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4131                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4132                                      pd);
4133         return r;
4134 }
4135
4136
4137 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4138                                     int size, unsigned short port, void *val,
4139                                     unsigned int count)
4140 {
4141         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4142
4143         if (vcpu->arch.pio.count)
4144                 goto data_avail;
4145
4146         trace_kvm_pio(0, port, size, count);
4147
4148         vcpu->arch.pio.port = port;
4149         vcpu->arch.pio.in = 1;
4150         vcpu->arch.pio.count  = count;
4151         vcpu->arch.pio.size = size;
4152
4153         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4154         data_avail:
4155                 memcpy(val, vcpu->arch.pio_data, size * count);
4156                 vcpu->arch.pio.count = 0;
4157                 return 1;
4158         }
4159
4160         vcpu->run->exit_reason = KVM_EXIT_IO;
4161         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4162         vcpu->run->io.size = size;
4163         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4164         vcpu->run->io.count = count;
4165         vcpu->run->io.port = port;
4166
4167         return 0;
4168 }
4169
4170 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4171                                      int size, unsigned short port,
4172                                      const void *val, unsigned int count)
4173 {
4174         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4175
4176         trace_kvm_pio(1, port, size, count);
4177
4178         vcpu->arch.pio.port = port;
4179         vcpu->arch.pio.in = 0;
4180         vcpu->arch.pio.count = count;
4181         vcpu->arch.pio.size = size;
4182
4183         memcpy(vcpu->arch.pio_data, val, size * count);
4184
4185         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4186                 vcpu->arch.pio.count = 0;
4187                 return 1;
4188         }
4189
4190         vcpu->run->exit_reason = KVM_EXIT_IO;
4191         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4192         vcpu->run->io.size = size;
4193         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4194         vcpu->run->io.count = count;
4195         vcpu->run->io.port = port;
4196
4197         return 0;
4198 }
4199
4200 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4201 {
4202         return kvm_x86_ops->get_segment_base(vcpu, seg);
4203 }
4204
4205 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4206 {
4207         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4208 }
4209
4210 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4211 {
4212         if (!need_emulate_wbinvd(vcpu))
4213                 return X86EMUL_CONTINUE;
4214
4215         if (kvm_x86_ops->has_wbinvd_exit()) {
4216                 int cpu = get_cpu();
4217
4218                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4219                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4220                                 wbinvd_ipi, NULL, 1);
4221                 put_cpu();
4222                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4223         } else
4224                 wbinvd();
4225         return X86EMUL_CONTINUE;
4226 }
4227 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4228
4229 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4230 {
4231         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4232 }
4233
4234 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4235 {
4236         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4237 }
4238
4239 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4240 {
4241
4242         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4243 }
4244
4245 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4246 {
4247         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4248 }
4249
4250 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4251 {
4252         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4253         unsigned long value;
4254
4255         switch (cr) {
4256         case 0:
4257                 value = kvm_read_cr0(vcpu);
4258                 break;
4259         case 2:
4260                 value = vcpu->arch.cr2;
4261                 break;
4262         case 3:
4263                 value = kvm_read_cr3(vcpu);
4264                 break;
4265         case 4:
4266                 value = kvm_read_cr4(vcpu);
4267                 break;
4268         case 8:
4269                 value = kvm_get_cr8(vcpu);
4270                 break;
4271         default:
4272                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4273                 return 0;
4274         }
4275
4276         return value;
4277 }
4278
4279 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4280 {
4281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4282         int res = 0;
4283
4284         switch (cr) {
4285         case 0:
4286                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4287                 break;
4288         case 2:
4289                 vcpu->arch.cr2 = val;
4290                 break;
4291         case 3:
4292                 res = kvm_set_cr3(vcpu, val);
4293                 break;
4294         case 4:
4295                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4296                 break;
4297         case 8:
4298                 res = kvm_set_cr8(vcpu, val);
4299                 break;
4300         default:
4301                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4302                 res = -1;
4303         }
4304
4305         return res;
4306 }
4307
4308 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4309 {
4310         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4311 }
4312
4313 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4314 {
4315         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4316 }
4317
4318 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4319 {
4320         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4321 }
4322
4323 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4324 {
4325         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4326 }
4327
4328 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4329 {
4330         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4331 }
4332
4333 static unsigned long emulator_get_cached_segment_base(
4334         struct x86_emulate_ctxt *ctxt, int seg)
4335 {
4336         return get_segment_base(emul_to_vcpu(ctxt), seg);
4337 }
4338
4339 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4340                                  struct desc_struct *desc, u32 *base3,
4341                                  int seg)
4342 {
4343         struct kvm_segment var;
4344
4345         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4346         *selector = var.selector;
4347
4348         if (var.unusable)
4349                 return false;
4350
4351         if (var.g)
4352                 var.limit >>= 12;
4353         set_desc_limit(desc, var.limit);
4354         set_desc_base(desc, (unsigned long)var.base);
4355 #ifdef CONFIG_X86_64
4356         if (base3)
4357                 *base3 = var.base >> 32;
4358 #endif
4359         desc->type = var.type;
4360         desc->s = var.s;
4361         desc->dpl = var.dpl;
4362         desc->p = var.present;
4363         desc->avl = var.avl;
4364         desc->l = var.l;
4365         desc->d = var.db;
4366         desc->g = var.g;
4367
4368         return true;
4369 }
4370
4371 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4372                                  struct desc_struct *desc, u32 base3,
4373                                  int seg)
4374 {
4375         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4376         struct kvm_segment var;
4377
4378         var.selector = selector;
4379         var.base = get_desc_base(desc);
4380 #ifdef CONFIG_X86_64
4381         var.base |= ((u64)base3) << 32;
4382 #endif
4383         var.limit = get_desc_limit(desc);
4384         if (desc->g)
4385                 var.limit = (var.limit << 12) | 0xfff;
4386         var.type = desc->type;
4387         var.present = desc->p;
4388         var.dpl = desc->dpl;
4389         var.db = desc->d;
4390         var.s = desc->s;
4391         var.l = desc->l;
4392         var.g = desc->g;
4393         var.avl = desc->avl;
4394         var.present = desc->p;
4395         var.unusable = !var.present;
4396         var.padding = 0;
4397
4398         kvm_set_segment(vcpu, &var, seg);
4399         return;
4400 }
4401
4402 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4403                             u32 msr_index, u64 *pdata)
4404 {
4405         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4406 }
4407
4408 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4409                             u32 msr_index, u64 data)
4410 {
4411         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4412 }
4413
4414 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4415 {
4416         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4417 }
4418
4419 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4420 {
4421         preempt_disable();
4422         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4423         /*
4424          * CR0.TS may reference the host fpu state, not the guest fpu state,
4425          * so it may be clear at this point.
4426          */
4427         clts();
4428 }
4429
4430 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4431 {
4432         preempt_enable();
4433 }
4434
4435 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4436                               struct x86_instruction_info *info,
4437                               enum x86_intercept_stage stage)
4438 {
4439         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4440 }
4441
4442 static struct x86_emulate_ops emulate_ops = {
4443         .read_std            = kvm_read_guest_virt_system,
4444         .write_std           = kvm_write_guest_virt_system,
4445         .fetch               = kvm_fetch_guest_virt,
4446         .read_emulated       = emulator_read_emulated,
4447         .write_emulated      = emulator_write_emulated,
4448         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4449         .invlpg              = emulator_invlpg,
4450         .pio_in_emulated     = emulator_pio_in_emulated,
4451         .pio_out_emulated    = emulator_pio_out_emulated,
4452         .get_segment         = emulator_get_segment,
4453         .set_segment         = emulator_set_segment,
4454         .get_cached_segment_base = emulator_get_cached_segment_base,
4455         .get_gdt             = emulator_get_gdt,
4456         .get_idt             = emulator_get_idt,
4457         .set_gdt             = emulator_set_gdt,
4458         .set_idt             = emulator_set_idt,
4459         .get_cr              = emulator_get_cr,
4460         .set_cr              = emulator_set_cr,
4461         .cpl                 = emulator_get_cpl,
4462         .get_dr              = emulator_get_dr,
4463         .set_dr              = emulator_set_dr,
4464         .set_msr             = emulator_set_msr,
4465         .get_msr             = emulator_get_msr,
4466         .halt                = emulator_halt,
4467         .wbinvd              = emulator_wbinvd,
4468         .fix_hypercall       = emulator_fix_hypercall,
4469         .get_fpu             = emulator_get_fpu,
4470         .put_fpu             = emulator_put_fpu,
4471         .intercept           = emulator_intercept,
4472 };
4473
4474 static void cache_all_regs(struct kvm_vcpu *vcpu)
4475 {
4476         kvm_register_read(vcpu, VCPU_REGS_RAX);
4477         kvm_register_read(vcpu, VCPU_REGS_RSP);
4478         kvm_register_read(vcpu, VCPU_REGS_RIP);
4479         vcpu->arch.regs_dirty = ~0;
4480 }
4481
4482 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4483 {
4484         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4485         /*
4486          * an sti; sti; sequence only disable interrupts for the first
4487          * instruction. So, if the last instruction, be it emulated or
4488          * not, left the system with the INT_STI flag enabled, it
4489          * means that the last instruction is an sti. We should not
4490          * leave the flag on in this case. The same goes for mov ss
4491          */
4492         if (!(int_shadow & mask))
4493                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4494 }
4495
4496 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4497 {
4498         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4499         if (ctxt->exception.vector == PF_VECTOR)
4500                 kvm_propagate_fault(vcpu, &ctxt->exception);
4501         else if (ctxt->exception.error_code_valid)
4502                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4503                                       ctxt->exception.error_code);
4504         else
4505                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4506 }
4507
4508 static void init_decode_cache(struct decode_cache *c,
4509                               const unsigned long *regs)
4510 {
4511         memset(c, 0, offsetof(struct decode_cache, regs));
4512         memcpy(c->regs, regs, sizeof(c->regs));
4513
4514         c->fetch.start = 0;
4515         c->fetch.end = 0;
4516         c->io_read.pos = 0;
4517         c->io_read.end = 0;
4518         c->mem_read.pos = 0;
4519         c->mem_read.end = 0;
4520 }
4521
4522 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4523 {
4524         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4525         struct decode_cache *c = &ctxt->decode;
4526         int cs_db, cs_l;
4527
4528         /*
4529          * TODO: fix emulate.c to use guest_read/write_register
4530          * instead of direct ->regs accesses, can save hundred cycles
4531          * on Intel for instructions that don't read/change RSP, for
4532          * for example.
4533          */
4534         cache_all_regs(vcpu);
4535
4536         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4537
4538         ctxt->eflags = kvm_get_rflags(vcpu);
4539         ctxt->eip = kvm_rip_read(vcpu);
4540         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4541                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4542                      cs_l                               ? X86EMUL_MODE_PROT64 :
4543                      cs_db                              ? X86EMUL_MODE_PROT32 :
4544                                                           X86EMUL_MODE_PROT16;
4545         ctxt->guest_mode = is_guest_mode(vcpu);
4546
4547         init_decode_cache(c, vcpu->arch.regs);
4548         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4549 }
4550
4551 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4552 {
4553         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4554         int ret;
4555
4556         init_emulate_ctxt(vcpu);
4557
4558         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4559         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4560         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4561                                                                  inc_eip;
4562         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, irq);
4563
4564         if (ret != X86EMUL_CONTINUE)
4565                 return EMULATE_FAIL;
4566
4567         vcpu->arch.emulate_ctxt.eip = c->eip;
4568         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4569         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4570         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4571
4572         if (irq == NMI_VECTOR)
4573                 vcpu->arch.nmi_pending = false;
4574         else
4575                 vcpu->arch.interrupt.pending = false;
4576
4577         return EMULATE_DONE;
4578 }
4579 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4580
4581 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4582 {
4583         int r = EMULATE_DONE;
4584
4585         ++vcpu->stat.insn_emulation_fail;
4586         trace_kvm_emulate_insn_failed(vcpu);
4587         if (!is_guest_mode(vcpu)) {
4588                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4589                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4590                 vcpu->run->internal.ndata = 0;
4591                 r = EMULATE_FAIL;
4592         }
4593         kvm_queue_exception(vcpu, UD_VECTOR);
4594
4595         return r;
4596 }
4597
4598 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4599 {
4600         gpa_t gpa;
4601
4602         if (tdp_enabled)
4603                 return false;
4604
4605         /*
4606          * if emulation was due to access to shadowed page table
4607          * and it failed try to unshadow page and re-entetr the
4608          * guest to let CPU execute the instruction.
4609          */
4610         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4611                 return true;
4612
4613         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4614
4615         if (gpa == UNMAPPED_GVA)
4616                 return true; /* let cpu generate fault */
4617
4618         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4619                 return true;
4620
4621         return false;
4622 }
4623
4624 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4625                             unsigned long cr2,
4626                             int emulation_type,
4627                             void *insn,
4628                             int insn_len)
4629 {
4630         int r;
4631         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4632         bool writeback = true;
4633
4634         kvm_clear_exception_queue(vcpu);
4635
4636         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4637                 init_emulate_ctxt(vcpu);
4638                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4639                 vcpu->arch.emulate_ctxt.have_exception = false;
4640                 vcpu->arch.emulate_ctxt.perm_ok = false;
4641
4642                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4643                         = emulation_type & EMULTYPE_TRAP_UD;
4644
4645                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4646
4647                 trace_kvm_emulate_insn_start(vcpu);
4648                 ++vcpu->stat.insn_emulation;
4649                 if (r)  {
4650                         if (emulation_type & EMULTYPE_TRAP_UD)
4651                                 return EMULATE_FAIL;
4652                         if (reexecute_instruction(vcpu, cr2))
4653                                 return EMULATE_DONE;
4654                         if (emulation_type & EMULTYPE_SKIP)
4655                                 return EMULATE_FAIL;
4656                         return handle_emulation_failure(vcpu);
4657                 }
4658         }
4659
4660         if (emulation_type & EMULTYPE_SKIP) {
4661                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4662                 return EMULATE_DONE;
4663         }
4664
4665         /* this is needed for vmware backdoor interface to work since it
4666            changes registers values  during IO operation */
4667         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4668                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4669                 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4670         }
4671
4672 restart:
4673         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4674
4675         if (r == EMULATION_INTERCEPTED)
4676                 return EMULATE_DONE;
4677
4678         if (r == EMULATION_FAILED) {
4679                 if (reexecute_instruction(vcpu, cr2))
4680                         return EMULATE_DONE;
4681
4682                 return handle_emulation_failure(vcpu);
4683         }
4684
4685         if (vcpu->arch.emulate_ctxt.have_exception) {
4686                 inject_emulated_exception(vcpu);
4687                 r = EMULATE_DONE;
4688         } else if (vcpu->arch.pio.count) {
4689                 if (!vcpu->arch.pio.in)
4690                         vcpu->arch.pio.count = 0;
4691                 else
4692                         writeback = false;
4693                 r = EMULATE_DO_MMIO;
4694         } else if (vcpu->mmio_needed) {
4695                 if (!vcpu->mmio_is_write)
4696                         writeback = false;
4697                 r = EMULATE_DO_MMIO;
4698         } else if (r == EMULATION_RESTART)
4699                 goto restart;
4700         else
4701                 r = EMULATE_DONE;
4702
4703         if (writeback) {
4704                 toggle_interruptibility(vcpu,
4705                                 vcpu->arch.emulate_ctxt.interruptibility);
4706                 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4707                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4708                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4709                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4710                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4711         } else
4712                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4713
4714         return r;
4715 }
4716 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4717
4718 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4719 {
4720         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4721         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4722                                             size, port, &val, 1);
4723         /* do not return to emulator after return from userspace */
4724         vcpu->arch.pio.count = 0;
4725         return ret;
4726 }
4727 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4728
4729 static void tsc_bad(void *info)
4730 {
4731         __this_cpu_write(cpu_tsc_khz, 0);
4732 }
4733
4734 static void tsc_khz_changed(void *data)
4735 {
4736         struct cpufreq_freqs *freq = data;
4737         unsigned long khz = 0;
4738
4739         if (data)
4740                 khz = freq->new;
4741         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4742                 khz = cpufreq_quick_get(raw_smp_processor_id());
4743         if (!khz)
4744                 khz = tsc_khz;
4745         __this_cpu_write(cpu_tsc_khz, khz);
4746 }
4747
4748 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4749                                      void *data)
4750 {
4751         struct cpufreq_freqs *freq = data;
4752         struct kvm *kvm;
4753         struct kvm_vcpu *vcpu;
4754         int i, send_ipi = 0;
4755
4756         /*
4757          * We allow guests to temporarily run on slowing clocks,
4758          * provided we notify them after, or to run on accelerating
4759          * clocks, provided we notify them before.  Thus time never
4760          * goes backwards.
4761          *
4762          * However, we have a problem.  We can't atomically update
4763          * the frequency of a given CPU from this function; it is
4764          * merely a notifier, which can be called from any CPU.
4765          * Changing the TSC frequency at arbitrary points in time
4766          * requires a recomputation of local variables related to
4767          * the TSC for each VCPU.  We must flag these local variables
4768          * to be updated and be sure the update takes place with the
4769          * new frequency before any guests proceed.
4770          *
4771          * Unfortunately, the combination of hotplug CPU and frequency
4772          * change creates an intractable locking scenario; the order
4773          * of when these callouts happen is undefined with respect to
4774          * CPU hotplug, and they can race with each other.  As such,
4775          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4776          * undefined; you can actually have a CPU frequency change take
4777          * place in between the computation of X and the setting of the
4778          * variable.  To protect against this problem, all updates of
4779          * the per_cpu tsc_khz variable are done in an interrupt
4780          * protected IPI, and all callers wishing to update the value
4781          * must wait for a synchronous IPI to complete (which is trivial
4782          * if the caller is on the CPU already).  This establishes the
4783          * necessary total order on variable updates.
4784          *
4785          * Note that because a guest time update may take place
4786          * anytime after the setting of the VCPU's request bit, the
4787          * correct TSC value must be set before the request.  However,
4788          * to ensure the update actually makes it to any guest which
4789          * starts running in hardware virtualization between the set
4790          * and the acquisition of the spinlock, we must also ping the
4791          * CPU after setting the request bit.
4792          *
4793          */
4794
4795         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4796                 return 0;
4797         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4798                 return 0;
4799
4800         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4801
4802         raw_spin_lock(&kvm_lock);
4803         list_for_each_entry(kvm, &vm_list, vm_list) {
4804                 kvm_for_each_vcpu(i, vcpu, kvm) {
4805                         if (vcpu->cpu != freq->cpu)
4806                                 continue;
4807                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4808                         if (vcpu->cpu != smp_processor_id())
4809                                 send_ipi = 1;
4810                 }
4811         }
4812         raw_spin_unlock(&kvm_lock);
4813
4814         if (freq->old < freq->new && send_ipi) {
4815                 /*
4816                  * We upscale the frequency.  Must make the guest
4817                  * doesn't see old kvmclock values while running with
4818                  * the new frequency, otherwise we risk the guest sees
4819                  * time go backwards.
4820                  *
4821                  * In case we update the frequency for another cpu
4822                  * (which might be in guest context) send an interrupt
4823                  * to kick the cpu out of guest context.  Next time
4824                  * guest context is entered kvmclock will be updated,
4825                  * so the guest will not see stale values.
4826                  */
4827                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4828         }
4829         return 0;
4830 }
4831
4832 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4833         .notifier_call  = kvmclock_cpufreq_notifier
4834 };
4835
4836 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4837                                         unsigned long action, void *hcpu)
4838 {
4839         unsigned int cpu = (unsigned long)hcpu;
4840
4841         switch (action) {
4842                 case CPU_ONLINE:
4843                 case CPU_DOWN_FAILED:
4844                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4845                         break;
4846                 case CPU_DOWN_PREPARE:
4847                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4848                         break;
4849         }
4850         return NOTIFY_OK;
4851 }
4852
4853 static struct notifier_block kvmclock_cpu_notifier_block = {
4854         .notifier_call  = kvmclock_cpu_notifier,
4855         .priority = -INT_MAX
4856 };
4857
4858 static void kvm_timer_init(void)
4859 {
4860         int cpu;
4861
4862         max_tsc_khz = tsc_khz;
4863         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4864         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4865 #ifdef CONFIG_CPU_FREQ
4866                 struct cpufreq_policy policy;
4867                 memset(&policy, 0, sizeof(policy));
4868                 cpu = get_cpu();
4869                 cpufreq_get_policy(&policy, cpu);
4870                 if (policy.cpuinfo.max_freq)
4871                         max_tsc_khz = policy.cpuinfo.max_freq;
4872                 put_cpu();
4873 #endif
4874                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4875                                           CPUFREQ_TRANSITION_NOTIFIER);
4876         }
4877         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4878         for_each_online_cpu(cpu)
4879                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4880 }
4881
4882 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4883
4884 static int kvm_is_in_guest(void)
4885 {
4886         return percpu_read(current_vcpu) != NULL;
4887 }
4888
4889 static int kvm_is_user_mode(void)
4890 {
4891         int user_mode = 3;
4892
4893         if (percpu_read(current_vcpu))
4894                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4895
4896         return user_mode != 0;
4897 }
4898
4899 static unsigned long kvm_get_guest_ip(void)
4900 {
4901         unsigned long ip = 0;
4902
4903         if (percpu_read(current_vcpu))
4904                 ip = kvm_rip_read(percpu_read(current_vcpu));
4905
4906         return ip;
4907 }
4908
4909 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4910         .is_in_guest            = kvm_is_in_guest,
4911         .is_user_mode           = kvm_is_user_mode,
4912         .get_guest_ip           = kvm_get_guest_ip,
4913 };
4914
4915 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4916 {
4917         percpu_write(current_vcpu, vcpu);
4918 }
4919 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4920
4921 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4922 {
4923         percpu_write(current_vcpu, NULL);
4924 }
4925 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4926
4927 int kvm_arch_init(void *opaque)
4928 {
4929         int r;
4930         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4931
4932         if (kvm_x86_ops) {
4933                 printk(KERN_ERR "kvm: already loaded the other module\n");
4934                 r = -EEXIST;
4935                 goto out;
4936         }
4937
4938         if (!ops->cpu_has_kvm_support()) {
4939                 printk(KERN_ERR "kvm: no hardware support\n");
4940                 r = -EOPNOTSUPP;
4941                 goto out;
4942         }
4943         if (ops->disabled_by_bios()) {
4944                 printk(KERN_ERR "kvm: disabled by bios\n");
4945                 r = -EOPNOTSUPP;
4946                 goto out;
4947         }
4948
4949         r = kvm_mmu_module_init();
4950         if (r)
4951                 goto out;
4952
4953         kvm_init_msr_list();
4954
4955         kvm_x86_ops = ops;
4956         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4957         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4958                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4959
4960         kvm_timer_init();
4961
4962         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4963
4964         if (cpu_has_xsave)
4965                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4966
4967         return 0;
4968
4969 out:
4970         return r;
4971 }
4972
4973 void kvm_arch_exit(void)
4974 {
4975         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4976
4977         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4978                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4979                                             CPUFREQ_TRANSITION_NOTIFIER);
4980         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4981         kvm_x86_ops = NULL;
4982         kvm_mmu_module_exit();
4983 }
4984
4985 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4986 {
4987         ++vcpu->stat.halt_exits;
4988         if (irqchip_in_kernel(vcpu->kvm)) {
4989                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4990                 return 1;
4991         } else {
4992                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4993                 return 0;
4994         }
4995 }
4996 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4997
4998 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4999                            unsigned long a1)
5000 {
5001         if (is_long_mode(vcpu))
5002                 return a0;
5003         else
5004                 return a0 | ((gpa_t)a1 << 32);
5005 }
5006
5007 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5008 {
5009         u64 param, ingpa, outgpa, ret;
5010         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5011         bool fast, longmode;
5012         int cs_db, cs_l;
5013
5014         /*
5015          * hypercall generates UD from non zero cpl and real mode
5016          * per HYPER-V spec
5017          */
5018         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5019                 kvm_queue_exception(vcpu, UD_VECTOR);
5020                 return 0;
5021         }
5022
5023         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5024         longmode = is_long_mode(vcpu) && cs_l == 1;
5025
5026         if (!longmode) {
5027                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5028                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5029                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5030                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5031                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5032                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5033         }
5034 #ifdef CONFIG_X86_64
5035         else {
5036                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5037                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5038                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5039         }
5040 #endif
5041
5042         code = param & 0xffff;
5043         fast = (param >> 16) & 0x1;
5044         rep_cnt = (param >> 32) & 0xfff;
5045         rep_idx = (param >> 48) & 0xfff;
5046
5047         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5048
5049         switch (code) {
5050         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5051                 kvm_vcpu_on_spin(vcpu);
5052                 break;
5053         default:
5054                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5055                 break;
5056         }
5057
5058         ret = res | (((u64)rep_done & 0xfff) << 32);
5059         if (longmode) {
5060                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5061         } else {
5062                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5063                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5064         }
5065
5066         return 1;
5067 }
5068
5069 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5070 {
5071         unsigned long nr, a0, a1, a2, a3, ret;
5072         int r = 1;
5073
5074         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5075                 return kvm_hv_hypercall(vcpu);
5076
5077         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5078         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5079         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5080         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5081         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5082
5083         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5084
5085         if (!is_long_mode(vcpu)) {
5086                 nr &= 0xFFFFFFFF;
5087                 a0 &= 0xFFFFFFFF;
5088                 a1 &= 0xFFFFFFFF;
5089                 a2 &= 0xFFFFFFFF;
5090                 a3 &= 0xFFFFFFFF;
5091         }
5092
5093         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5094                 ret = -KVM_EPERM;
5095                 goto out;
5096         }
5097
5098         switch (nr) {
5099         case KVM_HC_VAPIC_POLL_IRQ:
5100                 ret = 0;
5101                 break;
5102         case KVM_HC_MMU_OP:
5103                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5104                 break;
5105         default:
5106                 ret = -KVM_ENOSYS;
5107                 break;
5108         }
5109 out:
5110         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5111         ++vcpu->stat.hypercalls;
5112         return r;
5113 }
5114 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5115
5116 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5117 {
5118         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5119         char instruction[3];
5120         unsigned long rip = kvm_rip_read(vcpu);
5121
5122         /*
5123          * Blow out the MMU to ensure that no other VCPU has an active mapping
5124          * to ensure that the updated hypercall appears atomically across all
5125          * VCPUs.
5126          */
5127         kvm_mmu_zap_all(vcpu->kvm);
5128
5129         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5130
5131         return emulator_write_emulated(&vcpu->arch.emulate_ctxt,
5132                                        rip, instruction, 3, NULL);
5133 }
5134
5135 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5136 {
5137         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5138         int j, nent = vcpu->arch.cpuid_nent;
5139
5140         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5141         /* when no next entry is found, the current entry[i] is reselected */
5142         for (j = i + 1; ; j = (j + 1) % nent) {
5143                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5144                 if (ej->function == e->function) {
5145                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5146                         return j;
5147                 }
5148         }
5149         return 0; /* silence gcc, even though control never reaches here */
5150 }
5151
5152 /* find an entry with matching function, matching index (if needed), and that
5153  * should be read next (if it's stateful) */
5154 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5155         u32 function, u32 index)
5156 {
5157         if (e->function != function)
5158                 return 0;
5159         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5160                 return 0;
5161         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5162             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5163                 return 0;
5164         return 1;
5165 }
5166
5167 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5168                                               u32 function, u32 index)
5169 {
5170         int i;
5171         struct kvm_cpuid_entry2 *best = NULL;
5172
5173         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5174                 struct kvm_cpuid_entry2 *e;
5175
5176                 e = &vcpu->arch.cpuid_entries[i];
5177                 if (is_matching_cpuid_entry(e, function, index)) {
5178                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5179                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5180                         best = e;
5181                         break;
5182                 }
5183         }
5184         return best;
5185 }
5186 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5187
5188 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5189 {
5190         struct kvm_cpuid_entry2 *best;
5191
5192         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5193         if (!best || best->eax < 0x80000008)
5194                 goto not_found;
5195         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5196         if (best)
5197                 return best->eax & 0xff;
5198 not_found:
5199         return 36;
5200 }
5201
5202 /*
5203  * If no match is found, check whether we exceed the vCPU's limit
5204  * and return the content of the highest valid _standard_ leaf instead.
5205  * This is to satisfy the CPUID specification.
5206  */
5207 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5208                                                   u32 function, u32 index)
5209 {
5210         struct kvm_cpuid_entry2 *maxlevel;
5211
5212         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5213         if (!maxlevel || maxlevel->eax >= function)
5214                 return NULL;
5215         if (function & 0x80000000) {
5216                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5217                 if (!maxlevel)
5218                         return NULL;
5219         }
5220         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5221 }
5222
5223 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5224 {
5225         u32 function, index;
5226         struct kvm_cpuid_entry2 *best;
5227
5228         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5229         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5230         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5231         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5232         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5233         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5234         best = kvm_find_cpuid_entry(vcpu, function, index);
5235
5236         if (!best)
5237                 best = check_cpuid_limit(vcpu, function, index);
5238
5239         if (best) {
5240                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5241                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5242                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5243                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5244         }
5245         kvm_x86_ops->skip_emulated_instruction(vcpu);
5246         trace_kvm_cpuid(function,
5247                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5248                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5249                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5250                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5251 }
5252 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5253
5254 /*
5255  * Check if userspace requested an interrupt window, and that the
5256  * interrupt window is open.
5257  *
5258  * No need to exit to userspace if we already have an interrupt queued.
5259  */
5260 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5261 {
5262         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5263                 vcpu->run->request_interrupt_window &&
5264                 kvm_arch_interrupt_allowed(vcpu));
5265 }
5266
5267 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5268 {
5269         struct kvm_run *kvm_run = vcpu->run;
5270
5271         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5272         kvm_run->cr8 = kvm_get_cr8(vcpu);
5273         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5274         if (irqchip_in_kernel(vcpu->kvm))
5275                 kvm_run->ready_for_interrupt_injection = 1;
5276         else
5277                 kvm_run->ready_for_interrupt_injection =
5278                         kvm_arch_interrupt_allowed(vcpu) &&
5279                         !kvm_cpu_has_interrupt(vcpu) &&
5280                         !kvm_event_needs_reinjection(vcpu);
5281 }
5282
5283 static void vapic_enter(struct kvm_vcpu *vcpu)
5284 {
5285         struct kvm_lapic *apic = vcpu->arch.apic;
5286         struct page *page;
5287
5288         if (!apic || !apic->vapic_addr)
5289                 return;
5290
5291         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5292
5293         vcpu->arch.apic->vapic_page = page;
5294 }
5295
5296 static void vapic_exit(struct kvm_vcpu *vcpu)
5297 {
5298         struct kvm_lapic *apic = vcpu->arch.apic;
5299         int idx;
5300
5301         if (!apic || !apic->vapic_addr)
5302                 return;
5303
5304         idx = srcu_read_lock(&vcpu->kvm->srcu);
5305         kvm_release_page_dirty(apic->vapic_page);
5306         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5307         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5308 }
5309
5310 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5311 {
5312         int max_irr, tpr;
5313
5314         if (!kvm_x86_ops->update_cr8_intercept)
5315                 return;
5316
5317         if (!vcpu->arch.apic)
5318                 return;
5319
5320         if (!vcpu->arch.apic->vapic_addr)
5321                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5322         else
5323                 max_irr = -1;
5324
5325         if (max_irr != -1)
5326                 max_irr >>= 4;
5327
5328         tpr = kvm_lapic_get_cr8(vcpu);
5329
5330         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5331 }
5332
5333 static void inject_pending_event(struct kvm_vcpu *vcpu)
5334 {
5335         /* try to reinject previous events if any */
5336         if (vcpu->arch.exception.pending) {
5337                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5338                                         vcpu->arch.exception.has_error_code,
5339                                         vcpu->arch.exception.error_code);
5340                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5341                                           vcpu->arch.exception.has_error_code,
5342                                           vcpu->arch.exception.error_code,
5343                                           vcpu->arch.exception.reinject);
5344                 return;
5345         }
5346
5347         if (vcpu->arch.nmi_injected) {
5348                 kvm_x86_ops->set_nmi(vcpu);
5349                 return;
5350         }
5351
5352         if (vcpu->arch.interrupt.pending) {
5353                 kvm_x86_ops->set_irq(vcpu);
5354                 return;
5355         }
5356
5357         /* try to inject new event if pending */
5358         if (vcpu->arch.nmi_pending) {
5359                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5360                         vcpu->arch.nmi_pending = false;
5361                         vcpu->arch.nmi_injected = true;
5362                         kvm_x86_ops->set_nmi(vcpu);
5363                 }
5364         } else if (kvm_cpu_has_interrupt(vcpu)) {
5365                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5366                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5367                                             false);
5368                         kvm_x86_ops->set_irq(vcpu);
5369                 }
5370         }
5371 }
5372
5373 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5374 {
5375         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5376                         !vcpu->guest_xcr0_loaded) {
5377                 /* kvm_set_xcr() also depends on this */
5378                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5379                 vcpu->guest_xcr0_loaded = 1;
5380         }
5381 }
5382
5383 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5384 {
5385         if (vcpu->guest_xcr0_loaded) {
5386                 if (vcpu->arch.xcr0 != host_xcr0)
5387                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5388                 vcpu->guest_xcr0_loaded = 0;
5389         }
5390 }
5391
5392 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5393 {
5394         int r;
5395         bool nmi_pending;
5396         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5397                 vcpu->run->request_interrupt_window;
5398
5399         if (vcpu->requests) {
5400                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5401                         kvm_mmu_unload(vcpu);
5402                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5403                         __kvm_migrate_timers(vcpu);
5404                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5405                         r = kvm_guest_time_update(vcpu);
5406                         if (unlikely(r))
5407                                 goto out;
5408                 }
5409                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5410                         kvm_mmu_sync_roots(vcpu);
5411                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5412                         kvm_x86_ops->tlb_flush(vcpu);
5413                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5414                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5415                         r = 0;
5416                         goto out;
5417                 }
5418                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5419                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5420                         r = 0;
5421                         goto out;
5422                 }
5423                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5424                         vcpu->fpu_active = 0;
5425                         kvm_x86_ops->fpu_deactivate(vcpu);
5426                 }
5427                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5428                         /* Page is swapped out. Do synthetic halt */
5429                         vcpu->arch.apf.halted = true;
5430                         r = 1;
5431                         goto out;
5432                 }
5433         }
5434
5435         r = kvm_mmu_reload(vcpu);
5436         if (unlikely(r))
5437                 goto out;
5438
5439         /*
5440          * An NMI can be injected between local nmi_pending read and
5441          * vcpu->arch.nmi_pending read inside inject_pending_event().
5442          * But in that case, KVM_REQ_EVENT will be set, which makes
5443          * the race described above benign.
5444          */
5445         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5446
5447         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5448                 inject_pending_event(vcpu);
5449
5450                 /* enable NMI/IRQ window open exits if needed */
5451                 if (nmi_pending)
5452                         kvm_x86_ops->enable_nmi_window(vcpu);
5453                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5454                         kvm_x86_ops->enable_irq_window(vcpu);
5455
5456                 if (kvm_lapic_enabled(vcpu)) {
5457                         update_cr8_intercept(vcpu);
5458                         kvm_lapic_sync_to_vapic(vcpu);
5459                 }
5460         }
5461
5462         preempt_disable();
5463
5464         kvm_x86_ops->prepare_guest_switch(vcpu);
5465         if (vcpu->fpu_active)
5466                 kvm_load_guest_fpu(vcpu);
5467         kvm_load_guest_xcr0(vcpu);
5468
5469         vcpu->mode = IN_GUEST_MODE;
5470
5471         /* We should set ->mode before check ->requests,
5472          * see the comment in make_all_cpus_request.
5473          */
5474         smp_mb();
5475
5476         local_irq_disable();
5477
5478         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5479             || need_resched() || signal_pending(current)) {
5480                 vcpu->mode = OUTSIDE_GUEST_MODE;
5481                 smp_wmb();
5482                 local_irq_enable();
5483                 preempt_enable();
5484                 kvm_x86_ops->cancel_injection(vcpu);
5485                 r = 1;
5486                 goto out;
5487         }
5488
5489         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5490
5491         kvm_guest_enter();
5492
5493         if (unlikely(vcpu->arch.switch_db_regs)) {
5494                 set_debugreg(0, 7);
5495                 set_debugreg(vcpu->arch.eff_db[0], 0);
5496                 set_debugreg(vcpu->arch.eff_db[1], 1);
5497                 set_debugreg(vcpu->arch.eff_db[2], 2);
5498                 set_debugreg(vcpu->arch.eff_db[3], 3);
5499         }
5500
5501         trace_kvm_entry(vcpu->vcpu_id);
5502         kvm_x86_ops->run(vcpu);
5503
5504         /*
5505          * If the guest has used debug registers, at least dr7
5506          * will be disabled while returning to the host.
5507          * If we don't have active breakpoints in the host, we don't
5508          * care about the messed up debug address registers. But if
5509          * we have some of them active, restore the old state.
5510          */
5511         if (hw_breakpoint_active())
5512                 hw_breakpoint_restore();
5513
5514         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5515
5516         vcpu->mode = OUTSIDE_GUEST_MODE;
5517         smp_wmb();
5518         local_irq_enable();
5519
5520         ++vcpu->stat.exits;
5521
5522         /*
5523          * We must have an instruction between local_irq_enable() and
5524          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5525          * the interrupt shadow.  The stat.exits increment will do nicely.
5526          * But we need to prevent reordering, hence this barrier():
5527          */
5528         barrier();
5529
5530         kvm_guest_exit();
5531
5532         preempt_enable();
5533
5534         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5535
5536         /*
5537          * Profile KVM exit RIPs:
5538          */
5539         if (unlikely(prof_on == KVM_PROFILING)) {
5540                 unsigned long rip = kvm_rip_read(vcpu);
5541                 profile_hit(KVM_PROFILING, (void *)rip);
5542         }
5543
5544
5545         kvm_lapic_sync_from_vapic(vcpu);
5546
5547         r = kvm_x86_ops->handle_exit(vcpu);
5548 out:
5549         return r;
5550 }
5551
5552
5553 static int __vcpu_run(struct kvm_vcpu *vcpu)
5554 {
5555         int r;
5556         struct kvm *kvm = vcpu->kvm;
5557
5558         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5559                 pr_debug("vcpu %d received sipi with vector # %x\n",
5560                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5561                 kvm_lapic_reset(vcpu);
5562                 r = kvm_arch_vcpu_reset(vcpu);
5563                 if (r)
5564                         return r;
5565                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5566         }
5567
5568         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5569         vapic_enter(vcpu);
5570
5571         r = 1;
5572         while (r > 0) {
5573                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5574                     !vcpu->arch.apf.halted)
5575                         r = vcpu_enter_guest(vcpu);
5576                 else {
5577                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5578                         kvm_vcpu_block(vcpu);
5579                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5580                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5581                         {
5582                                 switch(vcpu->arch.mp_state) {
5583                                 case KVM_MP_STATE_HALTED:
5584                                         vcpu->arch.mp_state =
5585                                                 KVM_MP_STATE_RUNNABLE;
5586                                 case KVM_MP_STATE_RUNNABLE:
5587                                         vcpu->arch.apf.halted = false;
5588                                         break;
5589                                 case KVM_MP_STATE_SIPI_RECEIVED:
5590                                 default:
5591                                         r = -EINTR;
5592                                         break;
5593                                 }
5594                         }
5595                 }
5596
5597                 if (r <= 0)
5598                         break;
5599
5600                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5601                 if (kvm_cpu_has_pending_timer(vcpu))
5602                         kvm_inject_pending_timer_irqs(vcpu);
5603
5604                 if (dm_request_for_irq_injection(vcpu)) {
5605                         r = -EINTR;
5606                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5607                         ++vcpu->stat.request_irq_exits;
5608                 }
5609
5610                 kvm_check_async_pf_completion(vcpu);
5611
5612                 if (signal_pending(current)) {
5613                         r = -EINTR;
5614                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5615                         ++vcpu->stat.signal_exits;
5616                 }
5617                 if (need_resched()) {
5618                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5619                         kvm_resched(vcpu);
5620                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5621                 }
5622         }
5623
5624         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5625
5626         vapic_exit(vcpu);
5627
5628         return r;
5629 }
5630
5631 static int complete_mmio(struct kvm_vcpu *vcpu)
5632 {
5633         struct kvm_run *run = vcpu->run;
5634         int r;
5635
5636         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5637                 return 1;
5638
5639         if (vcpu->mmio_needed) {
5640                 vcpu->mmio_needed = 0;
5641                 if (!vcpu->mmio_is_write)
5642                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5643                                run->mmio.data, 8);
5644                 vcpu->mmio_index += 8;
5645                 if (vcpu->mmio_index < vcpu->mmio_size) {
5646                         run->exit_reason = KVM_EXIT_MMIO;
5647                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5648                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5649                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5650                         run->mmio.is_write = vcpu->mmio_is_write;
5651                         vcpu->mmio_needed = 1;
5652                         return 0;
5653                 }
5654                 if (vcpu->mmio_is_write)
5655                         return 1;
5656                 vcpu->mmio_read_completed = 1;
5657         }
5658         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5659         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5660         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5661         if (r != EMULATE_DONE)
5662                 return 0;
5663         return 1;
5664 }
5665
5666 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5667 {
5668         int r;
5669         sigset_t sigsaved;
5670
5671         if (!tsk_used_math(current) && init_fpu(current))
5672                 return -ENOMEM;
5673
5674         if (vcpu->sigset_active)
5675                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5676
5677         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5678                 kvm_vcpu_block(vcpu);
5679                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5680                 r = -EAGAIN;
5681                 goto out;
5682         }
5683
5684         /* re-sync apic's tpr */
5685         if (!irqchip_in_kernel(vcpu->kvm)) {
5686                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5687                         r = -EINVAL;
5688                         goto out;
5689                 }
5690         }
5691
5692         r = complete_mmio(vcpu);
5693         if (r <= 0)
5694                 goto out;
5695
5696         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5697                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5698                                      kvm_run->hypercall.ret);
5699
5700         r = __vcpu_run(vcpu);
5701
5702 out:
5703         post_kvm_run_save(vcpu);
5704         if (vcpu->sigset_active)
5705                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5706
5707         return r;
5708 }
5709
5710 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5711 {
5712         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5713                 /*
5714                  * We are here if userspace calls get_regs() in the middle of
5715                  * instruction emulation. Registers state needs to be copied
5716                  * back from emulation context to vcpu. Usrapace shouldn't do
5717                  * that usually, but some bad designed PV devices (vmware
5718                  * backdoor interface) need this to work
5719                  */
5720                 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5721                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5722                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5723         }
5724         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5725         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5726         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5727         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5728         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5729         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5730         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5731         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5732 #ifdef CONFIG_X86_64
5733         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5734         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5735         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5736         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5737         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5738         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5739         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5740         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5741 #endif
5742
5743         regs->rip = kvm_rip_read(vcpu);
5744         regs->rflags = kvm_get_rflags(vcpu);
5745
5746         return 0;
5747 }
5748
5749 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5750 {
5751         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5752         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5753
5754         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5755         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5756         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5757         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5758         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5759         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5760         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5761         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5762 #ifdef CONFIG_X86_64
5763         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5764         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5765         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5766         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5767         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5768         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5769         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5770         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5771 #endif
5772
5773         kvm_rip_write(vcpu, regs->rip);
5774         kvm_set_rflags(vcpu, regs->rflags);
5775
5776         vcpu->arch.exception.pending = false;
5777
5778         kvm_make_request(KVM_REQ_EVENT, vcpu);
5779
5780         return 0;
5781 }
5782
5783 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5784 {
5785         struct kvm_segment cs;
5786
5787         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5788         *db = cs.db;
5789         *l = cs.l;
5790 }
5791 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5792
5793 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5794                                   struct kvm_sregs *sregs)
5795 {
5796         struct desc_ptr dt;
5797
5798         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5799         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5800         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5801         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5802         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5803         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5804
5805         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5806         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5807
5808         kvm_x86_ops->get_idt(vcpu, &dt);
5809         sregs->idt.limit = dt.size;
5810         sregs->idt.base = dt.address;
5811         kvm_x86_ops->get_gdt(vcpu, &dt);
5812         sregs->gdt.limit = dt.size;
5813         sregs->gdt.base = dt.address;
5814
5815         sregs->cr0 = kvm_read_cr0(vcpu);
5816         sregs->cr2 = vcpu->arch.cr2;
5817         sregs->cr3 = kvm_read_cr3(vcpu);
5818         sregs->cr4 = kvm_read_cr4(vcpu);
5819         sregs->cr8 = kvm_get_cr8(vcpu);
5820         sregs->efer = vcpu->arch.efer;
5821         sregs->apic_base = kvm_get_apic_base(vcpu);
5822
5823         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5824
5825         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5826                 set_bit(vcpu->arch.interrupt.nr,
5827                         (unsigned long *)sregs->interrupt_bitmap);
5828
5829         return 0;
5830 }
5831
5832 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5833                                     struct kvm_mp_state *mp_state)
5834 {
5835         mp_state->mp_state = vcpu->arch.mp_state;
5836         return 0;
5837 }
5838
5839 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5840                                     struct kvm_mp_state *mp_state)
5841 {
5842         vcpu->arch.mp_state = mp_state->mp_state;
5843         kvm_make_request(KVM_REQ_EVENT, vcpu);
5844         return 0;
5845 }
5846
5847 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5848                     bool has_error_code, u32 error_code)
5849 {
5850         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5851         int ret;
5852
5853         init_emulate_ctxt(vcpu);
5854
5855         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5856                                    tss_selector, reason, has_error_code,
5857                                    error_code);
5858
5859         if (ret)
5860                 return EMULATE_FAIL;
5861
5862         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5863         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5864         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5865         kvm_make_request(KVM_REQ_EVENT, vcpu);
5866         return EMULATE_DONE;
5867 }
5868 EXPORT_SYMBOL_GPL(kvm_task_switch);
5869
5870 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5871                                   struct kvm_sregs *sregs)
5872 {
5873         int mmu_reset_needed = 0;
5874         int pending_vec, max_bits, idx;
5875         struct desc_ptr dt;
5876
5877         dt.size = sregs->idt.limit;
5878         dt.address = sregs->idt.base;
5879         kvm_x86_ops->set_idt(vcpu, &dt);
5880         dt.size = sregs->gdt.limit;
5881         dt.address = sregs->gdt.base;
5882         kvm_x86_ops->set_gdt(vcpu, &dt);
5883
5884         vcpu->arch.cr2 = sregs->cr2;
5885         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5886         vcpu->arch.cr3 = sregs->cr3;
5887         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5888
5889         kvm_set_cr8(vcpu, sregs->cr8);
5890
5891         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5892         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5893         kvm_set_apic_base(vcpu, sregs->apic_base);
5894
5895         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5896         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5897         vcpu->arch.cr0 = sregs->cr0;
5898
5899         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5900         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5901         if (sregs->cr4 & X86_CR4_OSXSAVE)
5902                 update_cpuid(vcpu);
5903
5904         idx = srcu_read_lock(&vcpu->kvm->srcu);
5905         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5906                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5907                 mmu_reset_needed = 1;
5908         }
5909         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5910
5911         if (mmu_reset_needed)
5912                 kvm_mmu_reset_context(vcpu);
5913
5914         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5915         pending_vec = find_first_bit(
5916                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5917         if (pending_vec < max_bits) {
5918                 kvm_queue_interrupt(vcpu, pending_vec, false);
5919                 pr_debug("Set back pending irq %d\n", pending_vec);
5920         }
5921
5922         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5923         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5924         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5925         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5926         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5927         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5928
5929         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5930         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5931
5932         update_cr8_intercept(vcpu);
5933
5934         /* Older userspace won't unhalt the vcpu on reset. */
5935         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5936             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5937             !is_protmode(vcpu))
5938                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5939
5940         kvm_make_request(KVM_REQ_EVENT, vcpu);
5941
5942         return 0;
5943 }
5944
5945 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5946                                         struct kvm_guest_debug *dbg)
5947 {
5948         unsigned long rflags;
5949         int i, r;
5950
5951         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5952                 r = -EBUSY;
5953                 if (vcpu->arch.exception.pending)
5954                         goto out;
5955                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5956                         kvm_queue_exception(vcpu, DB_VECTOR);
5957                 else
5958                         kvm_queue_exception(vcpu, BP_VECTOR);
5959         }
5960
5961         /*
5962          * Read rflags as long as potentially injected trace flags are still
5963          * filtered out.
5964          */
5965         rflags = kvm_get_rflags(vcpu);
5966
5967         vcpu->guest_debug = dbg->control;
5968         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5969                 vcpu->guest_debug = 0;
5970
5971         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5972                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5973                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5974                 vcpu->arch.switch_db_regs =
5975                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5976         } else {
5977                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5978                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5979                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5980         }
5981
5982         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5983                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5984                         get_segment_base(vcpu, VCPU_SREG_CS);
5985
5986         /*
5987          * Trigger an rflags update that will inject or remove the trace
5988          * flags.
5989          */
5990         kvm_set_rflags(vcpu, rflags);
5991
5992         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5993
5994         r = 0;
5995
5996 out:
5997
5998         return r;
5999 }
6000
6001 /*
6002  * Translate a guest virtual address to a guest physical address.
6003  */
6004 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6005                                     struct kvm_translation *tr)
6006 {
6007         unsigned long vaddr = tr->linear_address;
6008         gpa_t gpa;
6009         int idx;
6010
6011         idx = srcu_read_lock(&vcpu->kvm->srcu);
6012         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6013         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6014         tr->physical_address = gpa;
6015         tr->valid = gpa != UNMAPPED_GVA;
6016         tr->writeable = 1;
6017         tr->usermode = 0;
6018
6019         return 0;
6020 }
6021
6022 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6023 {
6024         struct i387_fxsave_struct *fxsave =
6025                         &vcpu->arch.guest_fpu.state->fxsave;
6026
6027         memcpy(fpu->fpr, fxsave->st_space, 128);
6028         fpu->fcw = fxsave->cwd;
6029         fpu->fsw = fxsave->swd;
6030         fpu->ftwx = fxsave->twd;
6031         fpu->last_opcode = fxsave->fop;
6032         fpu->last_ip = fxsave->rip;
6033         fpu->last_dp = fxsave->rdp;
6034         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6035
6036         return 0;
6037 }
6038
6039 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6040 {
6041         struct i387_fxsave_struct *fxsave =
6042                         &vcpu->arch.guest_fpu.state->fxsave;
6043
6044         memcpy(fxsave->st_space, fpu->fpr, 128);
6045         fxsave->cwd = fpu->fcw;
6046         fxsave->swd = fpu->fsw;
6047         fxsave->twd = fpu->ftwx;
6048         fxsave->fop = fpu->last_opcode;
6049         fxsave->rip = fpu->last_ip;
6050         fxsave->rdp = fpu->last_dp;
6051         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6052
6053         return 0;
6054 }
6055
6056 int fx_init(struct kvm_vcpu *vcpu)
6057 {
6058         int err;
6059
6060         err = fpu_alloc(&vcpu->arch.guest_fpu);
6061         if (err)
6062                 return err;
6063
6064         fpu_finit(&vcpu->arch.guest_fpu);
6065
6066         /*
6067          * Ensure guest xcr0 is valid for loading
6068          */
6069         vcpu->arch.xcr0 = XSTATE_FP;
6070
6071         vcpu->arch.cr0 |= X86_CR0_ET;
6072
6073         return 0;
6074 }
6075 EXPORT_SYMBOL_GPL(fx_init);
6076
6077 static void fx_free(struct kvm_vcpu *vcpu)
6078 {
6079         fpu_free(&vcpu->arch.guest_fpu);
6080 }
6081
6082 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6083 {
6084         if (vcpu->guest_fpu_loaded)
6085                 return;
6086
6087         /*
6088          * Restore all possible states in the guest,
6089          * and assume host would use all available bits.
6090          * Guest xcr0 would be loaded later.
6091          */
6092         kvm_put_guest_xcr0(vcpu);
6093         vcpu->guest_fpu_loaded = 1;
6094         unlazy_fpu(current);
6095         fpu_restore_checking(&vcpu->arch.guest_fpu);
6096         trace_kvm_fpu(1);
6097 }
6098
6099 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6100 {
6101         kvm_put_guest_xcr0(vcpu);
6102
6103         if (!vcpu->guest_fpu_loaded)
6104                 return;
6105
6106         vcpu->guest_fpu_loaded = 0;
6107         fpu_save_init(&vcpu->arch.guest_fpu);
6108         ++vcpu->stat.fpu_reload;
6109         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6110         trace_kvm_fpu(0);
6111 }
6112
6113 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6114 {
6115         kvmclock_reset(vcpu);
6116
6117         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6118         fx_free(vcpu);
6119         kvm_x86_ops->vcpu_free(vcpu);
6120 }
6121
6122 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6123                                                 unsigned int id)
6124 {
6125         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6126                 printk_once(KERN_WARNING
6127                 "kvm: SMP vm created on host with unstable TSC; "
6128                 "guest TSC will not be reliable\n");
6129         return kvm_x86_ops->vcpu_create(kvm, id);
6130 }
6131
6132 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6133 {
6134         int r;
6135
6136         vcpu->arch.mtrr_state.have_fixed = 1;
6137         vcpu_load(vcpu);
6138         r = kvm_arch_vcpu_reset(vcpu);
6139         if (r == 0)
6140                 r = kvm_mmu_setup(vcpu);
6141         vcpu_put(vcpu);
6142
6143         return r;
6144 }
6145
6146 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6147 {
6148         vcpu->arch.apf.msr_val = 0;
6149
6150         vcpu_load(vcpu);
6151         kvm_mmu_unload(vcpu);
6152         vcpu_put(vcpu);
6153
6154         fx_free(vcpu);
6155         kvm_x86_ops->vcpu_free(vcpu);
6156 }
6157
6158 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6159 {
6160         vcpu->arch.nmi_pending = false;
6161         vcpu->arch.nmi_injected = false;
6162
6163         vcpu->arch.switch_db_regs = 0;
6164         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6165         vcpu->arch.dr6 = DR6_FIXED_1;
6166         vcpu->arch.dr7 = DR7_FIXED_1;
6167
6168         kvm_make_request(KVM_REQ_EVENT, vcpu);
6169         vcpu->arch.apf.msr_val = 0;
6170
6171         kvmclock_reset(vcpu);
6172
6173         kvm_clear_async_pf_completion_queue(vcpu);
6174         kvm_async_pf_hash_reset(vcpu);
6175         vcpu->arch.apf.halted = false;
6176
6177         return kvm_x86_ops->vcpu_reset(vcpu);
6178 }
6179
6180 int kvm_arch_hardware_enable(void *garbage)
6181 {
6182         struct kvm *kvm;
6183         struct kvm_vcpu *vcpu;
6184         int i;
6185
6186         kvm_shared_msr_cpu_online();
6187         list_for_each_entry(kvm, &vm_list, vm_list)
6188                 kvm_for_each_vcpu(i, vcpu, kvm)
6189                         if (vcpu->cpu == smp_processor_id())
6190                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6191         return kvm_x86_ops->hardware_enable(garbage);
6192 }
6193
6194 void kvm_arch_hardware_disable(void *garbage)
6195 {
6196         kvm_x86_ops->hardware_disable(garbage);
6197         drop_user_return_notifiers(garbage);
6198 }
6199
6200 int kvm_arch_hardware_setup(void)
6201 {
6202         return kvm_x86_ops->hardware_setup();
6203 }
6204
6205 void kvm_arch_hardware_unsetup(void)
6206 {
6207         kvm_x86_ops->hardware_unsetup();
6208 }
6209
6210 void kvm_arch_check_processor_compat(void *rtn)
6211 {
6212         kvm_x86_ops->check_processor_compatibility(rtn);
6213 }
6214
6215 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6216 {
6217         struct page *page;
6218         struct kvm *kvm;
6219         int r;
6220
6221         BUG_ON(vcpu->kvm == NULL);
6222         kvm = vcpu->kvm;
6223
6224         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6225         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6226         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6227         vcpu->arch.mmu.translate_gpa = translate_gpa;
6228         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6229         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6230                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6231         else
6232                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6233
6234         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6235         if (!page) {
6236                 r = -ENOMEM;
6237                 goto fail;
6238         }
6239         vcpu->arch.pio_data = page_address(page);
6240
6241         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6242
6243         r = kvm_mmu_create(vcpu);
6244         if (r < 0)
6245                 goto fail_free_pio_data;
6246
6247         if (irqchip_in_kernel(kvm)) {
6248                 r = kvm_create_lapic(vcpu);
6249                 if (r < 0)
6250                         goto fail_mmu_destroy;
6251         }
6252
6253         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6254                                        GFP_KERNEL);
6255         if (!vcpu->arch.mce_banks) {
6256                 r = -ENOMEM;
6257                 goto fail_free_lapic;
6258         }
6259         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6260
6261         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6262                 goto fail_free_mce_banks;
6263
6264         kvm_async_pf_hash_reset(vcpu);
6265
6266         return 0;
6267 fail_free_mce_banks:
6268         kfree(vcpu->arch.mce_banks);
6269 fail_free_lapic:
6270         kvm_free_lapic(vcpu);
6271 fail_mmu_destroy:
6272         kvm_mmu_destroy(vcpu);
6273 fail_free_pio_data:
6274         free_page((unsigned long)vcpu->arch.pio_data);
6275 fail:
6276         return r;
6277 }
6278
6279 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6280 {
6281         int idx;
6282
6283         kfree(vcpu->arch.mce_banks);
6284         kvm_free_lapic(vcpu);
6285         idx = srcu_read_lock(&vcpu->kvm->srcu);
6286         kvm_mmu_destroy(vcpu);
6287         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6288         free_page((unsigned long)vcpu->arch.pio_data);
6289 }
6290
6291 int kvm_arch_init_vm(struct kvm *kvm)
6292 {
6293         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6294         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6295
6296         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6297         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6298
6299         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6300
6301         return 0;
6302 }
6303
6304 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6305 {
6306         vcpu_load(vcpu);
6307         kvm_mmu_unload(vcpu);
6308         vcpu_put(vcpu);
6309 }
6310
6311 static void kvm_free_vcpus(struct kvm *kvm)
6312 {
6313         unsigned int i;
6314         struct kvm_vcpu *vcpu;
6315
6316         /*
6317          * Unpin any mmu pages first.
6318          */
6319         kvm_for_each_vcpu(i, vcpu, kvm) {
6320                 kvm_clear_async_pf_completion_queue(vcpu);
6321                 kvm_unload_vcpu_mmu(vcpu);
6322         }
6323         kvm_for_each_vcpu(i, vcpu, kvm)
6324                 kvm_arch_vcpu_free(vcpu);
6325
6326         mutex_lock(&kvm->lock);
6327         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6328                 kvm->vcpus[i] = NULL;
6329
6330         atomic_set(&kvm->online_vcpus, 0);
6331         mutex_unlock(&kvm->lock);
6332 }
6333
6334 void kvm_arch_sync_events(struct kvm *kvm)
6335 {
6336         kvm_free_all_assigned_devices(kvm);
6337         kvm_free_pit(kvm);
6338 }
6339
6340 void kvm_arch_destroy_vm(struct kvm *kvm)
6341 {
6342         kvm_iommu_unmap_guest(kvm);
6343         kfree(kvm->arch.vpic);
6344         kfree(kvm->arch.vioapic);
6345         kvm_free_vcpus(kvm);
6346         if (kvm->arch.apic_access_page)
6347                 put_page(kvm->arch.apic_access_page);
6348         if (kvm->arch.ept_identity_pagetable)
6349                 put_page(kvm->arch.ept_identity_pagetable);
6350 }
6351
6352 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6353                                 struct kvm_memory_slot *memslot,
6354                                 struct kvm_memory_slot old,
6355                                 struct kvm_userspace_memory_region *mem,
6356                                 int user_alloc)
6357 {
6358         int npages = memslot->npages;
6359         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6360
6361         /* Prevent internal slot pages from being moved by fork()/COW. */
6362         if (memslot->id >= KVM_MEMORY_SLOTS)
6363                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6364
6365         /*To keep backward compatibility with older userspace,
6366          *x86 needs to hanlde !user_alloc case.
6367          */
6368         if (!user_alloc) {
6369                 if (npages && !old.rmap) {
6370                         unsigned long userspace_addr;
6371
6372                         down_write(&current->mm->mmap_sem);
6373                         userspace_addr = do_mmap(NULL, 0,
6374                                                  npages * PAGE_SIZE,
6375                                                  PROT_READ | PROT_WRITE,
6376                                                  map_flags,
6377                                                  0);
6378                         up_write(&current->mm->mmap_sem);
6379
6380                         if (IS_ERR((void *)userspace_addr))
6381                                 return PTR_ERR((void *)userspace_addr);
6382
6383                         memslot->userspace_addr = userspace_addr;
6384                 }
6385         }
6386
6387
6388         return 0;
6389 }
6390
6391 void kvm_arch_commit_memory_region(struct kvm *kvm,
6392                                 struct kvm_userspace_memory_region *mem,
6393                                 struct kvm_memory_slot old,
6394                                 int user_alloc)
6395 {
6396
6397         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6398
6399         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6400                 int ret;
6401
6402                 down_write(&current->mm->mmap_sem);
6403                 ret = do_munmap(current->mm, old.userspace_addr,
6404                                 old.npages * PAGE_SIZE);
6405                 up_write(&current->mm->mmap_sem);
6406                 if (ret < 0)
6407                         printk(KERN_WARNING
6408                                "kvm_vm_ioctl_set_memory_region: "
6409                                "failed to munmap memory\n");
6410         }
6411
6412         if (!kvm->arch.n_requested_mmu_pages)
6413                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6414
6415         spin_lock(&kvm->mmu_lock);
6416         if (nr_mmu_pages)
6417                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6418         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6419         spin_unlock(&kvm->mmu_lock);
6420 }
6421
6422 void kvm_arch_flush_shadow(struct kvm *kvm)
6423 {
6424         kvm_mmu_zap_all(kvm);
6425         kvm_reload_remote_mmus(kvm);
6426 }
6427
6428 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6429 {
6430         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6431                 !vcpu->arch.apf.halted)
6432                 || !list_empty_careful(&vcpu->async_pf.done)
6433                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6434                 || vcpu->arch.nmi_pending ||
6435                 (kvm_arch_interrupt_allowed(vcpu) &&
6436                  kvm_cpu_has_interrupt(vcpu));
6437 }
6438
6439 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6440 {
6441         int me;
6442         int cpu = vcpu->cpu;
6443
6444         if (waitqueue_active(&vcpu->wq)) {
6445                 wake_up_interruptible(&vcpu->wq);
6446                 ++vcpu->stat.halt_wakeup;
6447         }
6448
6449         me = get_cpu();
6450         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6451                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6452                         smp_send_reschedule(cpu);
6453         put_cpu();
6454 }
6455
6456 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6457 {
6458         return kvm_x86_ops->interrupt_allowed(vcpu);
6459 }
6460
6461 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6462 {
6463         unsigned long current_rip = kvm_rip_read(vcpu) +
6464                 get_segment_base(vcpu, VCPU_SREG_CS);
6465
6466         return current_rip == linear_rip;
6467 }
6468 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6469
6470 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6471 {
6472         unsigned long rflags;
6473
6474         rflags = kvm_x86_ops->get_rflags(vcpu);
6475         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6476                 rflags &= ~X86_EFLAGS_TF;
6477         return rflags;
6478 }
6479 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6480
6481 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6482 {
6483         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6484             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6485                 rflags |= X86_EFLAGS_TF;
6486         kvm_x86_ops->set_rflags(vcpu, rflags);
6487         kvm_make_request(KVM_REQ_EVENT, vcpu);
6488 }
6489 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6490
6491 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6492 {
6493         int r;
6494
6495         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6496               is_error_page(work->page))
6497                 return;
6498
6499         r = kvm_mmu_reload(vcpu);
6500         if (unlikely(r))
6501                 return;
6502
6503         if (!vcpu->arch.mmu.direct_map &&
6504               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6505                 return;
6506
6507         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6508 }
6509
6510 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6511 {
6512         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6513 }
6514
6515 static inline u32 kvm_async_pf_next_probe(u32 key)
6516 {
6517         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6518 }
6519
6520 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6521 {
6522         u32 key = kvm_async_pf_hash_fn(gfn);
6523
6524         while (vcpu->arch.apf.gfns[key] != ~0)
6525                 key = kvm_async_pf_next_probe(key);
6526
6527         vcpu->arch.apf.gfns[key] = gfn;
6528 }
6529
6530 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6531 {
6532         int i;
6533         u32 key = kvm_async_pf_hash_fn(gfn);
6534
6535         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6536                      (vcpu->arch.apf.gfns[key] != gfn &&
6537                       vcpu->arch.apf.gfns[key] != ~0); i++)
6538                 key = kvm_async_pf_next_probe(key);
6539
6540         return key;
6541 }
6542
6543 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6544 {
6545         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6546 }
6547
6548 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6549 {
6550         u32 i, j, k;
6551
6552         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6553         while (true) {
6554                 vcpu->arch.apf.gfns[i] = ~0;
6555                 do {
6556                         j = kvm_async_pf_next_probe(j);
6557                         if (vcpu->arch.apf.gfns[j] == ~0)
6558                                 return;
6559                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6560                         /*
6561                          * k lies cyclically in ]i,j]
6562                          * |    i.k.j |
6563                          * |....j i.k.| or  |.k..j i...|
6564                          */
6565                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6566                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6567                 i = j;
6568         }
6569 }
6570
6571 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6572 {
6573
6574         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6575                                       sizeof(val));
6576 }
6577
6578 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6579                                      struct kvm_async_pf *work)
6580 {
6581         struct x86_exception fault;
6582
6583         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6584         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6585
6586         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6587             (vcpu->arch.apf.send_user_only &&
6588              kvm_x86_ops->get_cpl(vcpu) == 0))
6589                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6590         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6591                 fault.vector = PF_VECTOR;
6592                 fault.error_code_valid = true;
6593                 fault.error_code = 0;
6594                 fault.nested_page_fault = false;
6595                 fault.address = work->arch.token;
6596                 kvm_inject_page_fault(vcpu, &fault);
6597         }
6598 }
6599
6600 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6601                                  struct kvm_async_pf *work)
6602 {
6603         struct x86_exception fault;
6604
6605         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6606         if (is_error_page(work->page))
6607                 work->arch.token = ~0; /* broadcast wakeup */
6608         else
6609                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6610
6611         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6612             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6613                 fault.vector = PF_VECTOR;
6614                 fault.error_code_valid = true;
6615                 fault.error_code = 0;
6616                 fault.nested_page_fault = false;
6617                 fault.address = work->arch.token;
6618                 kvm_inject_page_fault(vcpu, &fault);
6619         }
6620         vcpu->arch.apf.halted = false;
6621 }
6622
6623 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6624 {
6625         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6626                 return true;
6627         else
6628                 return !kvm_event_needs_reinjection(vcpu) &&
6629                         kvm_x86_ops->interrupt_allowed(vcpu);
6630 }
6631
6632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);