arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.this_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 usdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034
1035         /* n.b - signed multiplication and division required */
1036         usdiff = data - kvm->arch.last_tsc_write;
1037 #ifdef CONFIG_X86_64
1038         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1039 #else
1040         /* do_div() only does unsigned */
1041         asm("idivl %2; xor %%edx, %%edx"
1042             : "=A"(usdiff)
1043             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1044 #endif
1045         do_div(elapsed, 1000);
1046         usdiff -= elapsed;
1047         if (usdiff < 0)
1048                 usdiff = -usdiff;
1049
1050         /*
1051          * Special case: TSC write with a small delta (1 second) of virtual
1052          * cycle time against real time is interpreted as an attempt to
1053          * synchronize the CPU.
1054          *
1055          * For a reliable TSC, we can match TSC offsets, and for an unstable
1056          * TSC, we add elapsed time in this computation.  We could let the
1057          * compensation code attempt to catch up if we fall behind, but
1058          * it's better to try to match offsets from the beginning.
1059          */
1060         if (usdiff < USEC_PER_SEC &&
1061             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1062                 if (!check_tsc_unstable()) {
1063                         offset = kvm->arch.cur_tsc_offset;
1064                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1065                 } else {
1066                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1067                         data += delta;
1068                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1069                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1070                 }
1071         } else {
1072                 /*
1073                  * We split periods of matched TSC writes into generations.
1074                  * For each generation, we track the original measured
1075                  * nanosecond time, offset, and write, so if TSCs are in
1076                  * sync, we can match exact offset, and if not, we can match
1077                  * exact software computaion in compute_guest_tsc()
1078                  *
1079                  * These values are tracked in kvm->arch.cur_xxx variables.
1080                  */
1081                 kvm->arch.cur_tsc_generation++;
1082                 kvm->arch.cur_tsc_nsec = ns;
1083                 kvm->arch.cur_tsc_write = data;
1084                 kvm->arch.cur_tsc_offset = offset;
1085                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1086                          kvm->arch.cur_tsc_generation, data);
1087         }
1088
1089         /*
1090          * We also track th most recent recorded KHZ, write and time to
1091          * allow the matching interval to be extended at each write.
1092          */
1093         kvm->arch.last_tsc_nsec = ns;
1094         kvm->arch.last_tsc_write = data;
1095         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1096
1097         /* Reset of TSC must disable overshoot protection below */
1098         vcpu->arch.hv_clock.tsc_timestamp = 0;
1099         vcpu->arch.last_guest_tsc = data;
1100
1101         /* Keep track of which generation this VCPU has synchronized to */
1102         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1103         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1104         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1105
1106         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1107         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1108 }
1109
1110 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1111
1112 static int kvm_guest_time_update(struct kvm_vcpu *v)
1113 {
1114         unsigned long flags;
1115         struct kvm_vcpu_arch *vcpu = &v->arch;
1116         void *shared_kaddr;
1117         unsigned long this_tsc_khz;
1118         s64 kernel_ns, max_kernel_ns;
1119         u64 tsc_timestamp;
1120
1121         /* Keep irq disabled to prevent changes to the clock */
1122         local_irq_save(flags);
1123         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1124         kernel_ns = get_kernel_ns();
1125         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1126         if (unlikely(this_tsc_khz == 0)) {
1127                 local_irq_restore(flags);
1128                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1129                 return 1;
1130         }
1131
1132         /*
1133          * We may have to catch up the TSC to match elapsed wall clock
1134          * time for two reasons, even if kvmclock is used.
1135          *   1) CPU could have been running below the maximum TSC rate
1136          *   2) Broken TSC compensation resets the base at each VCPU
1137          *      entry to avoid unknown leaps of TSC even when running
1138          *      again on the same CPU.  This may cause apparent elapsed
1139          *      time to disappear, and the guest to stand still or run
1140          *      very slowly.
1141          */
1142         if (vcpu->tsc_catchup) {
1143                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1144                 if (tsc > tsc_timestamp) {
1145                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1146                         tsc_timestamp = tsc;
1147                 }
1148         }
1149
1150         local_irq_restore(flags);
1151
1152         if (!vcpu->time_page)
1153                 return 0;
1154
1155         /*
1156          * Time as measured by the TSC may go backwards when resetting the base
1157          * tsc_timestamp.  The reason for this is that the TSC resolution is
1158          * higher than the resolution of the other clock scales.  Thus, many
1159          * possible measurments of the TSC correspond to one measurement of any
1160          * other clock, and so a spread of values is possible.  This is not a
1161          * problem for the computation of the nanosecond clock; with TSC rates
1162          * around 1GHZ, there can only be a few cycles which correspond to one
1163          * nanosecond value, and any path through this code will inevitably
1164          * take longer than that.  However, with the kernel_ns value itself,
1165          * the precision may be much lower, down to HZ granularity.  If the
1166          * first sampling of TSC against kernel_ns ends in the low part of the
1167          * range, and the second in the high end of the range, we can get:
1168          *
1169          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1170          *
1171          * As the sampling errors potentially range in the thousands of cycles,
1172          * it is possible such a time value has already been observed by the
1173          * guest.  To protect against this, we must compute the system time as
1174          * observed by the guest and ensure the new system time is greater.
1175          */
1176         max_kernel_ns = 0;
1177         if (vcpu->hv_clock.tsc_timestamp) {
1178                 max_kernel_ns = vcpu->last_guest_tsc -
1179                                 vcpu->hv_clock.tsc_timestamp;
1180                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1181                                     vcpu->hv_clock.tsc_to_system_mul,
1182                                     vcpu->hv_clock.tsc_shift);
1183                 max_kernel_ns += vcpu->last_kernel_ns;
1184         }
1185
1186         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1187                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1188                                    &vcpu->hv_clock.tsc_shift,
1189                                    &vcpu->hv_clock.tsc_to_system_mul);
1190                 vcpu->hw_tsc_khz = this_tsc_khz;
1191         }
1192
1193         if (max_kernel_ns > kernel_ns)
1194                 kernel_ns = max_kernel_ns;
1195
1196         /* With all the info we got, fill in the values */
1197         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1198         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1199         vcpu->last_kernel_ns = kernel_ns;
1200         vcpu->last_guest_tsc = tsc_timestamp;
1201         vcpu->hv_clock.flags = 0;
1202
1203         /*
1204          * The interface expects us to write an even number signaling that the
1205          * update is finished. Since the guest won't see the intermediate
1206          * state, we just increase by 2 at the end.
1207          */
1208         vcpu->hv_clock.version += 2;
1209
1210         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1211
1212         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1213                sizeof(vcpu->hv_clock));
1214
1215         kunmap_atomic(shared_kaddr, KM_USER0);
1216
1217         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1218         return 0;
1219 }
1220
1221 static bool msr_mtrr_valid(unsigned msr)
1222 {
1223         switch (msr) {
1224         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1225         case MSR_MTRRfix64K_00000:
1226         case MSR_MTRRfix16K_80000:
1227         case MSR_MTRRfix16K_A0000:
1228         case MSR_MTRRfix4K_C0000:
1229         case MSR_MTRRfix4K_C8000:
1230         case MSR_MTRRfix4K_D0000:
1231         case MSR_MTRRfix4K_D8000:
1232         case MSR_MTRRfix4K_E0000:
1233         case MSR_MTRRfix4K_E8000:
1234         case MSR_MTRRfix4K_F0000:
1235         case MSR_MTRRfix4K_F8000:
1236         case MSR_MTRRdefType:
1237         case MSR_IA32_CR_PAT:
1238                 return true;
1239         case 0x2f8:
1240                 return true;
1241         }
1242         return false;
1243 }
1244
1245 static bool valid_pat_type(unsigned t)
1246 {
1247         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1248 }
1249
1250 static bool valid_mtrr_type(unsigned t)
1251 {
1252         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1253 }
1254
1255 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1256 {
1257         int i;
1258
1259         if (!msr_mtrr_valid(msr))
1260                 return false;
1261
1262         if (msr == MSR_IA32_CR_PAT) {
1263                 for (i = 0; i < 8; i++)
1264                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1265                                 return false;
1266                 return true;
1267         } else if (msr == MSR_MTRRdefType) {
1268                 if (data & ~0xcff)
1269                         return false;
1270                 return valid_mtrr_type(data & 0xff);
1271         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1272                 for (i = 0; i < 8 ; i++)
1273                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1274                                 return false;
1275                 return true;
1276         }
1277
1278         /* variable MTRRs */
1279         return valid_mtrr_type(data & 0xff);
1280 }
1281
1282 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1283 {
1284         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1285
1286         if (!mtrr_valid(vcpu, msr, data))
1287                 return 1;
1288
1289         if (msr == MSR_MTRRdefType) {
1290                 vcpu->arch.mtrr_state.def_type = data;
1291                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1292         } else if (msr == MSR_MTRRfix64K_00000)
1293                 p[0] = data;
1294         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1295                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1296         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1297                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1298         else if (msr == MSR_IA32_CR_PAT)
1299                 vcpu->arch.pat = data;
1300         else {  /* Variable MTRRs */
1301                 int idx, is_mtrr_mask;
1302                 u64 *pt;
1303
1304                 idx = (msr - 0x200) / 2;
1305                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1306                 if (!is_mtrr_mask)
1307                         pt =
1308                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1309                 else
1310                         pt =
1311                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1312                 *pt = data;
1313         }
1314
1315         kvm_mmu_reset_context(vcpu);
1316         return 0;
1317 }
1318
1319 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1320 {
1321         u64 mcg_cap = vcpu->arch.mcg_cap;
1322         unsigned bank_num = mcg_cap & 0xff;
1323
1324         switch (msr) {
1325         case MSR_IA32_MCG_STATUS:
1326                 vcpu->arch.mcg_status = data;
1327                 break;
1328         case MSR_IA32_MCG_CTL:
1329                 if (!(mcg_cap & MCG_CTL_P))
1330                         return 1;
1331                 if (data != 0 && data != ~(u64)0)
1332                         return -1;
1333                 vcpu->arch.mcg_ctl = data;
1334                 break;
1335         default:
1336                 if (msr >= MSR_IA32_MC0_CTL &&
1337                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1338                         u32 offset = msr - MSR_IA32_MC0_CTL;
1339                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1340                          * some Linux kernels though clear bit 10 in bank 4 to
1341                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1342                          * this to avoid an uncatched #GP in the guest
1343                          */
1344                         if ((offset & 0x3) == 0 &&
1345                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1346                                 return -1;
1347                         vcpu->arch.mce_banks[offset] = data;
1348                         break;
1349                 }
1350                 return 1;
1351         }
1352         return 0;
1353 }
1354
1355 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1356 {
1357         struct kvm *kvm = vcpu->kvm;
1358         int lm = is_long_mode(vcpu);
1359         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1360                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1361         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1362                 : kvm->arch.xen_hvm_config.blob_size_32;
1363         u32 page_num = data & ~PAGE_MASK;
1364         u64 page_addr = data & PAGE_MASK;
1365         u8 *page;
1366         int r;
1367
1368         r = -E2BIG;
1369         if (page_num >= blob_size)
1370                 goto out;
1371         r = -ENOMEM;
1372         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1373         if (IS_ERR(page)) {
1374                 r = PTR_ERR(page);
1375                 goto out;
1376         }
1377         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1378                 goto out_free;
1379         r = 0;
1380 out_free:
1381         kfree(page);
1382 out:
1383         return r;
1384 }
1385
1386 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1387 {
1388         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1389 }
1390
1391 static bool kvm_hv_msr_partition_wide(u32 msr)
1392 {
1393         bool r = false;
1394         switch (msr) {
1395         case HV_X64_MSR_GUEST_OS_ID:
1396         case HV_X64_MSR_HYPERCALL:
1397                 r = true;
1398                 break;
1399         }
1400
1401         return r;
1402 }
1403
1404 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1405 {
1406         struct kvm *kvm = vcpu->kvm;
1407
1408         switch (msr) {
1409         case HV_X64_MSR_GUEST_OS_ID:
1410                 kvm->arch.hv_guest_os_id = data;
1411                 /* setting guest os id to zero disables hypercall page */
1412                 if (!kvm->arch.hv_guest_os_id)
1413                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1414                 break;
1415         case HV_X64_MSR_HYPERCALL: {
1416                 u64 gfn;
1417                 unsigned long addr;
1418                 u8 instructions[4];
1419
1420                 /* if guest os id is not set hypercall should remain disabled */
1421                 if (!kvm->arch.hv_guest_os_id)
1422                         break;
1423                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1424                         kvm->arch.hv_hypercall = data;
1425                         break;
1426                 }
1427                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1428                 addr = gfn_to_hva(kvm, gfn);
1429                 if (kvm_is_error_hva(addr))
1430                         return 1;
1431                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1432                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1433                 if (__copy_to_user((void __user *)addr, instructions, 4))
1434                         return 1;
1435                 kvm->arch.hv_hypercall = data;
1436                 break;
1437         }
1438         default:
1439                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1440                           "data 0x%llx\n", msr, data);
1441                 return 1;
1442         }
1443         return 0;
1444 }
1445
1446 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1447 {
1448         switch (msr) {
1449         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1450                 unsigned long addr;
1451
1452                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1453                         vcpu->arch.hv_vapic = data;
1454                         break;
1455                 }
1456                 addr = gfn_to_hva(vcpu->kvm, data >>
1457                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1458                 if (kvm_is_error_hva(addr))
1459                         return 1;
1460                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1461                         return 1;
1462                 vcpu->arch.hv_vapic = data;
1463                 break;
1464         }
1465         case HV_X64_MSR_EOI:
1466                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1467         case HV_X64_MSR_ICR:
1468                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1469         case HV_X64_MSR_TPR:
1470                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1471         default:
1472                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1473                           "data 0x%llx\n", msr, data);
1474                 return 1;
1475         }
1476
1477         return 0;
1478 }
1479
1480 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1481 {
1482         gpa_t gpa = data & ~0x3f;
1483
1484         /* Bits 2:5 are resrved, Should be zero */
1485         if (data & 0x3c)
1486                 return 1;
1487
1488         vcpu->arch.apf.msr_val = data;
1489
1490         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1491                 kvm_clear_async_pf_completion_queue(vcpu);
1492                 kvm_async_pf_hash_reset(vcpu);
1493                 return 0;
1494         }
1495
1496         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1497                 return 1;
1498
1499         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1500         kvm_async_pf_wakeup_all(vcpu);
1501         return 0;
1502 }
1503
1504 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1505 {
1506         if (vcpu->arch.time_page) {
1507                 kvm_release_page_dirty(vcpu->arch.time_page);
1508                 vcpu->arch.time_page = NULL;
1509         }
1510 }
1511
1512 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1513 {
1514         u64 delta;
1515
1516         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1517                 return;
1518
1519         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1520         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1521         vcpu->arch.st.accum_steal = delta;
1522 }
1523
1524 static void record_steal_time(struct kvm_vcpu *vcpu)
1525 {
1526         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1527                 return;
1528
1529         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1530                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1531                 return;
1532
1533         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1534         vcpu->arch.st.steal.version += 2;
1535         vcpu->arch.st.accum_steal = 0;
1536
1537         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1538                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1539 }
1540
1541 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1542 {
1543         bool pr = false;
1544
1545         switch (msr) {
1546         case MSR_EFER:
1547                 return set_efer(vcpu, data);
1548         case MSR_K7_HWCR:
1549                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1550                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1551                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1552                 if (data != 0) {
1553                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1554                                 data);
1555                         return 1;
1556                 }
1557                 break;
1558         case MSR_FAM10H_MMIO_CONF_BASE:
1559                 if (data != 0) {
1560                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1561                                 "0x%llx\n", data);
1562                         return 1;
1563                 }
1564                 break;
1565         case MSR_AMD64_NB_CFG:
1566                 break;
1567         case MSR_IA32_DEBUGCTLMSR:
1568                 if (!data) {
1569                         /* We support the non-activated case already */
1570                         break;
1571                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1572                         /* Values other than LBR and BTF are vendor-specific,
1573                            thus reserved and should throw a #GP */
1574                         return 1;
1575                 }
1576                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1577                         __func__, data);
1578                 break;
1579         case MSR_IA32_UCODE_REV:
1580         case MSR_IA32_UCODE_WRITE:
1581         case MSR_VM_HSAVE_PA:
1582         case MSR_AMD64_PATCH_LOADER:
1583                 break;
1584         case 0x200 ... 0x2ff:
1585                 return set_msr_mtrr(vcpu, msr, data);
1586         case MSR_IA32_APICBASE:
1587                 kvm_set_apic_base(vcpu, data);
1588                 break;
1589         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1590                 return kvm_x2apic_msr_write(vcpu, msr, data);
1591         case MSR_IA32_TSCDEADLINE:
1592                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1593                 break;
1594         case MSR_IA32_MISC_ENABLE:
1595                 vcpu->arch.ia32_misc_enable_msr = data;
1596                 break;
1597         case MSR_KVM_WALL_CLOCK_NEW:
1598         case MSR_KVM_WALL_CLOCK:
1599                 vcpu->kvm->arch.wall_clock = data;
1600                 kvm_write_wall_clock(vcpu->kvm, data);
1601                 break;
1602         case MSR_KVM_SYSTEM_TIME_NEW:
1603         case MSR_KVM_SYSTEM_TIME: {
1604                 kvmclock_reset(vcpu);
1605
1606                 vcpu->arch.time = data;
1607                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1608
1609                 /* we verify if the enable bit is set... */
1610                 if (!(data & 1))
1611                         break;
1612
1613                 /* ...but clean it before doing the actual write */
1614                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1615
1616                 vcpu->arch.time_page =
1617                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1618
1619                 if (is_error_page(vcpu->arch.time_page)) {
1620                         kvm_release_page_clean(vcpu->arch.time_page);
1621                         vcpu->arch.time_page = NULL;
1622                 }
1623                 break;
1624         }
1625         case MSR_KVM_ASYNC_PF_EN:
1626                 if (kvm_pv_enable_async_pf(vcpu, data))
1627                         return 1;
1628                 break;
1629         case MSR_KVM_STEAL_TIME:
1630
1631                 if (unlikely(!sched_info_on()))
1632                         return 1;
1633
1634                 if (data & KVM_STEAL_RESERVED_MASK)
1635                         return 1;
1636
1637                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1638                                                         data & KVM_STEAL_VALID_BITS))
1639                         return 1;
1640
1641                 vcpu->arch.st.msr_val = data;
1642
1643                 if (!(data & KVM_MSR_ENABLED))
1644                         break;
1645
1646                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1647
1648                 preempt_disable();
1649                 accumulate_steal_time(vcpu);
1650                 preempt_enable();
1651
1652                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1653
1654                 break;
1655
1656         case MSR_IA32_MCG_CTL:
1657         case MSR_IA32_MCG_STATUS:
1658         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1659                 return set_msr_mce(vcpu, msr, data);
1660
1661         /* Performance counters are not protected by a CPUID bit,
1662          * so we should check all of them in the generic path for the sake of
1663          * cross vendor migration.
1664          * Writing a zero into the event select MSRs disables them,
1665          * which we perfectly emulate ;-). Any other value should be at least
1666          * reported, some guests depend on them.
1667          */
1668         case MSR_K7_EVNTSEL0:
1669         case MSR_K7_EVNTSEL1:
1670         case MSR_K7_EVNTSEL2:
1671         case MSR_K7_EVNTSEL3:
1672                 if (data != 0)
1673                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1674                                 "0x%x data 0x%llx\n", msr, data);
1675                 break;
1676         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1677          * so we ignore writes to make it happy.
1678          */
1679         case MSR_K7_PERFCTR0:
1680         case MSR_K7_PERFCTR1:
1681         case MSR_K7_PERFCTR2:
1682         case MSR_K7_PERFCTR3:
1683                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1684                         "0x%x data 0x%llx\n", msr, data);
1685                 break;
1686         case MSR_P6_PERFCTR0:
1687         case MSR_P6_PERFCTR1:
1688                 pr = true;
1689         case MSR_P6_EVNTSEL0:
1690         case MSR_P6_EVNTSEL1:
1691                 if (kvm_pmu_msr(vcpu, msr))
1692                         return kvm_pmu_set_msr(vcpu, msr, data);
1693
1694                 if (pr || data != 0)
1695                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1696                                 "0x%x data 0x%llx\n", msr, data);
1697                 break;
1698         case MSR_K7_CLK_CTL:
1699                 /*
1700                  * Ignore all writes to this no longer documented MSR.
1701                  * Writes are only relevant for old K7 processors,
1702                  * all pre-dating SVM, but a recommended workaround from
1703                  * AMD for these chips. It is possible to speicify the
1704                  * affected processor models on the command line, hence
1705                  * the need to ignore the workaround.
1706                  */
1707                 break;
1708         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1709                 if (kvm_hv_msr_partition_wide(msr)) {
1710                         int r;
1711                         mutex_lock(&vcpu->kvm->lock);
1712                         r = set_msr_hyperv_pw(vcpu, msr, data);
1713                         mutex_unlock(&vcpu->kvm->lock);
1714                         return r;
1715                 } else
1716                         return set_msr_hyperv(vcpu, msr, data);
1717                 break;
1718         case MSR_IA32_BBL_CR_CTL3:
1719                 /* Drop writes to this legacy MSR -- see rdmsr
1720                  * counterpart for further detail.
1721                  */
1722                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1723                 break;
1724         case MSR_AMD64_OSVW_ID_LENGTH:
1725                 if (!guest_cpuid_has_osvw(vcpu))
1726                         return 1;
1727                 vcpu->arch.osvw.length = data;
1728                 break;
1729         case MSR_AMD64_OSVW_STATUS:
1730                 if (!guest_cpuid_has_osvw(vcpu))
1731                         return 1;
1732                 vcpu->arch.osvw.status = data;
1733                 break;
1734         default:
1735                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1736                         return xen_hvm_config(vcpu, data);
1737                 if (kvm_pmu_msr(vcpu, msr))
1738                         return kvm_pmu_set_msr(vcpu, msr, data);
1739                 if (!ignore_msrs) {
1740                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1741                                 msr, data);
1742                         return 1;
1743                 } else {
1744                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1745                                 msr, data);
1746                         break;
1747                 }
1748         }
1749         return 0;
1750 }
1751 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1752
1753
1754 /*
1755  * Reads an msr value (of 'msr_index') into 'pdata'.
1756  * Returns 0 on success, non-0 otherwise.
1757  * Assumes vcpu_load() was already called.
1758  */
1759 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1760 {
1761         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1762 }
1763
1764 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1765 {
1766         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1767
1768         if (!msr_mtrr_valid(msr))
1769                 return 1;
1770
1771         if (msr == MSR_MTRRdefType)
1772                 *pdata = vcpu->arch.mtrr_state.def_type +
1773                          (vcpu->arch.mtrr_state.enabled << 10);
1774         else if (msr == MSR_MTRRfix64K_00000)
1775                 *pdata = p[0];
1776         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1777                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1778         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1779                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1780         else if (msr == MSR_IA32_CR_PAT)
1781                 *pdata = vcpu->arch.pat;
1782         else {  /* Variable MTRRs */
1783                 int idx, is_mtrr_mask;
1784                 u64 *pt;
1785
1786                 idx = (msr - 0x200) / 2;
1787                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1788                 if (!is_mtrr_mask)
1789                         pt =
1790                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1791                 else
1792                         pt =
1793                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1794                 *pdata = *pt;
1795         }
1796
1797         return 0;
1798 }
1799
1800 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1801 {
1802         u64 data;
1803         u64 mcg_cap = vcpu->arch.mcg_cap;
1804         unsigned bank_num = mcg_cap & 0xff;
1805
1806         switch (msr) {
1807         case MSR_IA32_P5_MC_ADDR:
1808         case MSR_IA32_P5_MC_TYPE:
1809                 data = 0;
1810                 break;
1811         case MSR_IA32_MCG_CAP:
1812                 data = vcpu->arch.mcg_cap;
1813                 break;
1814         case MSR_IA32_MCG_CTL:
1815                 if (!(mcg_cap & MCG_CTL_P))
1816                         return 1;
1817                 data = vcpu->arch.mcg_ctl;
1818                 break;
1819         case MSR_IA32_MCG_STATUS:
1820                 data = vcpu->arch.mcg_status;
1821                 break;
1822         default:
1823                 if (msr >= MSR_IA32_MC0_CTL &&
1824                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1825                         u32 offset = msr - MSR_IA32_MC0_CTL;
1826                         data = vcpu->arch.mce_banks[offset];
1827                         break;
1828                 }
1829                 return 1;
1830         }
1831         *pdata = data;
1832         return 0;
1833 }
1834
1835 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1836 {
1837         u64 data = 0;
1838         struct kvm *kvm = vcpu->kvm;
1839
1840         switch (msr) {
1841         case HV_X64_MSR_GUEST_OS_ID:
1842                 data = kvm->arch.hv_guest_os_id;
1843                 break;
1844         case HV_X64_MSR_HYPERCALL:
1845                 data = kvm->arch.hv_hypercall;
1846                 break;
1847         default:
1848                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1849                 return 1;
1850         }
1851
1852         *pdata = data;
1853         return 0;
1854 }
1855
1856 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1857 {
1858         u64 data = 0;
1859
1860         switch (msr) {
1861         case HV_X64_MSR_VP_INDEX: {
1862                 int r;
1863                 struct kvm_vcpu *v;
1864                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1865                         if (v == vcpu)
1866                                 data = r;
1867                 break;
1868         }
1869         case HV_X64_MSR_EOI:
1870                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1871         case HV_X64_MSR_ICR:
1872                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1873         case HV_X64_MSR_TPR:
1874                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1875         case HV_X64_MSR_APIC_ASSIST_PAGE:
1876                 data = vcpu->arch.hv_vapic;
1877                 break;
1878         default:
1879                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1880                 return 1;
1881         }
1882         *pdata = data;
1883         return 0;
1884 }
1885
1886 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1887 {
1888         u64 data;
1889
1890         switch (msr) {
1891         case MSR_IA32_PLATFORM_ID:
1892         case MSR_IA32_EBL_CR_POWERON:
1893         case MSR_IA32_DEBUGCTLMSR:
1894         case MSR_IA32_LASTBRANCHFROMIP:
1895         case MSR_IA32_LASTBRANCHTOIP:
1896         case MSR_IA32_LASTINTFROMIP:
1897         case MSR_IA32_LASTINTTOIP:
1898         case MSR_K8_SYSCFG:
1899         case MSR_K7_HWCR:
1900         case MSR_VM_HSAVE_PA:
1901         case MSR_K7_EVNTSEL0:
1902         case MSR_K7_PERFCTR0:
1903         case MSR_K8_INT_PENDING_MSG:
1904         case MSR_AMD64_NB_CFG:
1905         case MSR_FAM10H_MMIO_CONF_BASE:
1906                 data = 0;
1907                 break;
1908         case MSR_P6_PERFCTR0:
1909         case MSR_P6_PERFCTR1:
1910         case MSR_P6_EVNTSEL0:
1911         case MSR_P6_EVNTSEL1:
1912                 if (kvm_pmu_msr(vcpu, msr))
1913                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1914                 data = 0;
1915                 break;
1916         case MSR_IA32_UCODE_REV:
1917                 data = 0x100000000ULL;
1918                 break;
1919         case MSR_MTRRcap:
1920                 data = 0x500 | KVM_NR_VAR_MTRR;
1921                 break;
1922         case 0x200 ... 0x2ff:
1923                 return get_msr_mtrr(vcpu, msr, pdata);
1924         case 0xcd: /* fsb frequency */
1925                 data = 3;
1926                 break;
1927                 /*
1928                  * MSR_EBC_FREQUENCY_ID
1929                  * Conservative value valid for even the basic CPU models.
1930                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1931                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1932                  * and 266MHz for model 3, or 4. Set Core Clock
1933                  * Frequency to System Bus Frequency Ratio to 1 (bits
1934                  * 31:24) even though these are only valid for CPU
1935                  * models > 2, however guests may end up dividing or
1936                  * multiplying by zero otherwise.
1937                  */
1938         case MSR_EBC_FREQUENCY_ID:
1939                 data = 1 << 24;
1940                 break;
1941         case MSR_IA32_APICBASE:
1942                 data = kvm_get_apic_base(vcpu);
1943                 break;
1944         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1945                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1946                 break;
1947         case MSR_IA32_TSCDEADLINE:
1948                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1949                 break;
1950         case MSR_IA32_MISC_ENABLE:
1951                 data = vcpu->arch.ia32_misc_enable_msr;
1952                 break;
1953         case MSR_IA32_PERF_STATUS:
1954                 /* TSC increment by tick */
1955                 data = 1000ULL;
1956                 /* CPU multiplier */
1957                 data |= (((uint64_t)4ULL) << 40);
1958                 break;
1959         case MSR_EFER:
1960                 data = vcpu->arch.efer;
1961                 break;
1962         case MSR_KVM_WALL_CLOCK:
1963         case MSR_KVM_WALL_CLOCK_NEW:
1964                 data = vcpu->kvm->arch.wall_clock;
1965                 break;
1966         case MSR_KVM_SYSTEM_TIME:
1967         case MSR_KVM_SYSTEM_TIME_NEW:
1968                 data = vcpu->arch.time;
1969                 break;
1970         case MSR_KVM_ASYNC_PF_EN:
1971                 data = vcpu->arch.apf.msr_val;
1972                 break;
1973         case MSR_KVM_STEAL_TIME:
1974                 data = vcpu->arch.st.msr_val;
1975                 break;
1976         case MSR_IA32_P5_MC_ADDR:
1977         case MSR_IA32_P5_MC_TYPE:
1978         case MSR_IA32_MCG_CAP:
1979         case MSR_IA32_MCG_CTL:
1980         case MSR_IA32_MCG_STATUS:
1981         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1982                 return get_msr_mce(vcpu, msr, pdata);
1983         case MSR_K7_CLK_CTL:
1984                 /*
1985                  * Provide expected ramp-up count for K7. All other
1986                  * are set to zero, indicating minimum divisors for
1987                  * every field.
1988                  *
1989                  * This prevents guest kernels on AMD host with CPU
1990                  * type 6, model 8 and higher from exploding due to
1991                  * the rdmsr failing.
1992                  */
1993                 data = 0x20000000;
1994                 break;
1995         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1996                 if (kvm_hv_msr_partition_wide(msr)) {
1997                         int r;
1998                         mutex_lock(&vcpu->kvm->lock);
1999                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2000                         mutex_unlock(&vcpu->kvm->lock);
2001                         return r;
2002                 } else
2003                         return get_msr_hyperv(vcpu, msr, pdata);
2004                 break;
2005         case MSR_IA32_BBL_CR_CTL3:
2006                 /* This legacy MSR exists but isn't fully documented in current
2007                  * silicon.  It is however accessed by winxp in very narrow
2008                  * scenarios where it sets bit #19, itself documented as
2009                  * a "reserved" bit.  Best effort attempt to source coherent
2010                  * read data here should the balance of the register be
2011                  * interpreted by the guest:
2012                  *
2013                  * L2 cache control register 3: 64GB range, 256KB size,
2014                  * enabled, latency 0x1, configured
2015                  */
2016                 data = 0xbe702111;
2017                 break;
2018         case MSR_AMD64_OSVW_ID_LENGTH:
2019                 if (!guest_cpuid_has_osvw(vcpu))
2020                         return 1;
2021                 data = vcpu->arch.osvw.length;
2022                 break;
2023         case MSR_AMD64_OSVW_STATUS:
2024                 if (!guest_cpuid_has_osvw(vcpu))
2025                         return 1;
2026                 data = vcpu->arch.osvw.status;
2027                 break;
2028         default:
2029                 if (kvm_pmu_msr(vcpu, msr))
2030                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2031                 if (!ignore_msrs) {
2032                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2033                         return 1;
2034                 } else {
2035                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2036                         data = 0;
2037                 }
2038                 break;
2039         }
2040         *pdata = data;
2041         return 0;
2042 }
2043 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2044
2045 /*
2046  * Read or write a bunch of msrs. All parameters are kernel addresses.
2047  *
2048  * @return number of msrs set successfully.
2049  */
2050 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2051                     struct kvm_msr_entry *entries,
2052                     int (*do_msr)(struct kvm_vcpu *vcpu,
2053                                   unsigned index, u64 *data))
2054 {
2055         int i, idx;
2056
2057         idx = srcu_read_lock(&vcpu->kvm->srcu);
2058         for (i = 0; i < msrs->nmsrs; ++i)
2059                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2060                         break;
2061         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2062
2063         return i;
2064 }
2065
2066 /*
2067  * Read or write a bunch of msrs. Parameters are user addresses.
2068  *
2069  * @return number of msrs set successfully.
2070  */
2071 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2072                   int (*do_msr)(struct kvm_vcpu *vcpu,
2073                                 unsigned index, u64 *data),
2074                   int writeback)
2075 {
2076         struct kvm_msrs msrs;
2077         struct kvm_msr_entry *entries;
2078         int r, n;
2079         unsigned size;
2080
2081         r = -EFAULT;
2082         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2083                 goto out;
2084
2085         r = -E2BIG;
2086         if (msrs.nmsrs >= MAX_IO_MSRS)
2087                 goto out;
2088
2089         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2090         entries = memdup_user(user_msrs->entries, size);
2091         if (IS_ERR(entries)) {
2092                 r = PTR_ERR(entries);
2093                 goto out;
2094         }
2095
2096         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2097         if (r < 0)
2098                 goto out_free;
2099
2100         r = -EFAULT;
2101         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2102                 goto out_free;
2103
2104         r = n;
2105
2106 out_free:
2107         kfree(entries);
2108 out:
2109         return r;
2110 }
2111
2112 int kvm_dev_ioctl_check_extension(long ext)
2113 {
2114         int r;
2115
2116         switch (ext) {
2117         case KVM_CAP_IRQCHIP:
2118         case KVM_CAP_HLT:
2119         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2120         case KVM_CAP_SET_TSS_ADDR:
2121         case KVM_CAP_EXT_CPUID:
2122         case KVM_CAP_CLOCKSOURCE:
2123         case KVM_CAP_PIT:
2124         case KVM_CAP_NOP_IO_DELAY:
2125         case KVM_CAP_MP_STATE:
2126         case KVM_CAP_SYNC_MMU:
2127         case KVM_CAP_USER_NMI:
2128         case KVM_CAP_REINJECT_CONTROL:
2129         case KVM_CAP_IRQ_INJECT_STATUS:
2130         case KVM_CAP_ASSIGN_DEV_IRQ:
2131         case KVM_CAP_IRQFD:
2132         case KVM_CAP_IOEVENTFD:
2133         case KVM_CAP_PIT2:
2134         case KVM_CAP_PIT_STATE2:
2135         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2136         case KVM_CAP_XEN_HVM:
2137         case KVM_CAP_ADJUST_CLOCK:
2138         case KVM_CAP_VCPU_EVENTS:
2139         case KVM_CAP_HYPERV:
2140         case KVM_CAP_HYPERV_VAPIC:
2141         case KVM_CAP_HYPERV_SPIN:
2142         case KVM_CAP_PCI_SEGMENT:
2143         case KVM_CAP_DEBUGREGS:
2144         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2145         case KVM_CAP_XSAVE:
2146         case KVM_CAP_ASYNC_PF:
2147         case KVM_CAP_GET_TSC_KHZ:
2148         case KVM_CAP_PCI_2_3:
2149                 r = 1;
2150                 break;
2151         case KVM_CAP_COALESCED_MMIO:
2152                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2153                 break;
2154         case KVM_CAP_VAPIC:
2155                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2156                 break;
2157         case KVM_CAP_NR_VCPUS:
2158                 r = KVM_SOFT_MAX_VCPUS;
2159                 break;
2160         case KVM_CAP_MAX_VCPUS:
2161                 r = KVM_MAX_VCPUS;
2162                 break;
2163         case KVM_CAP_NR_MEMSLOTS:
2164                 r = KVM_MEMORY_SLOTS;
2165                 break;
2166         case KVM_CAP_PV_MMU:    /* obsolete */
2167                 r = 0;
2168                 break;
2169         case KVM_CAP_IOMMU:
2170                 r = iommu_present(&pci_bus_type);
2171                 break;
2172         case KVM_CAP_MCE:
2173                 r = KVM_MAX_MCE_BANKS;
2174                 break;
2175         case KVM_CAP_XCRS:
2176                 r = cpu_has_xsave;
2177                 break;
2178         case KVM_CAP_TSC_CONTROL:
2179                 r = kvm_has_tsc_control;
2180                 break;
2181         case KVM_CAP_TSC_DEADLINE_TIMER:
2182                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2183                 break;
2184         default:
2185                 r = 0;
2186                 break;
2187         }
2188         return r;
2189
2190 }
2191
2192 long kvm_arch_dev_ioctl(struct file *filp,
2193                         unsigned int ioctl, unsigned long arg)
2194 {
2195         void __user *argp = (void __user *)arg;
2196         long r;
2197
2198         switch (ioctl) {
2199         case KVM_GET_MSR_INDEX_LIST: {
2200                 struct kvm_msr_list __user *user_msr_list = argp;
2201                 struct kvm_msr_list msr_list;
2202                 unsigned n;
2203
2204                 r = -EFAULT;
2205                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2206                         goto out;
2207                 n = msr_list.nmsrs;
2208                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2209                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2210                         goto out;
2211                 r = -E2BIG;
2212                 if (n < msr_list.nmsrs)
2213                         goto out;
2214                 r = -EFAULT;
2215                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2216                                  num_msrs_to_save * sizeof(u32)))
2217                         goto out;
2218                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2219                                  &emulated_msrs,
2220                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2221                         goto out;
2222                 r = 0;
2223                 break;
2224         }
2225         case KVM_GET_SUPPORTED_CPUID: {
2226                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2227                 struct kvm_cpuid2 cpuid;
2228
2229                 r = -EFAULT;
2230                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2231                         goto out;
2232                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2233                                                       cpuid_arg->entries);
2234                 if (r)
2235                         goto out;
2236
2237                 r = -EFAULT;
2238                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2239                         goto out;
2240                 r = 0;
2241                 break;
2242         }
2243         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2244                 u64 mce_cap;
2245
2246                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2247                 r = -EFAULT;
2248                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2249                         goto out;
2250                 r = 0;
2251                 break;
2252         }
2253         default:
2254                 r = -EINVAL;
2255         }
2256 out:
2257         return r;
2258 }
2259
2260 static void wbinvd_ipi(void *garbage)
2261 {
2262         wbinvd();
2263 }
2264
2265 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2266 {
2267         return vcpu->kvm->arch.iommu_domain &&
2268                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2269 }
2270
2271 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2272 {
2273         /* Address WBINVD may be executed by guest */
2274         if (need_emulate_wbinvd(vcpu)) {
2275                 if (kvm_x86_ops->has_wbinvd_exit())
2276                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2277                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2278                         smp_call_function_single(vcpu->cpu,
2279                                         wbinvd_ipi, NULL, 1);
2280         }
2281
2282         kvm_x86_ops->vcpu_load(vcpu, cpu);
2283
2284         /* Apply any externally detected TSC adjustments (due to suspend) */
2285         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2286                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2287                 vcpu->arch.tsc_offset_adjustment = 0;
2288                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2289         }
2290
2291         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2292                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2293                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2294                 if (tsc_delta < 0)
2295                         mark_tsc_unstable("KVM discovered backwards TSC");
2296                 if (check_tsc_unstable()) {
2297                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2298                                                 vcpu->arch.last_guest_tsc);
2299                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2300                         vcpu->arch.tsc_catchup = 1;
2301                 }
2302                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2303                 if (vcpu->cpu != cpu)
2304                         kvm_migrate_timers(vcpu);
2305                 vcpu->cpu = cpu;
2306         }
2307
2308         accumulate_steal_time(vcpu);
2309         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2310 }
2311
2312 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2313 {
2314         kvm_x86_ops->vcpu_put(vcpu);
2315         kvm_put_guest_fpu(vcpu);
2316         vcpu->arch.last_host_tsc = native_read_tsc();
2317 }
2318
2319 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2320                                     struct kvm_lapic_state *s)
2321 {
2322         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2323
2324         return 0;
2325 }
2326
2327 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2328                                     struct kvm_lapic_state *s)
2329 {
2330         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2331         kvm_apic_post_state_restore(vcpu);
2332         update_cr8_intercept(vcpu);
2333
2334         return 0;
2335 }
2336
2337 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2338                                     struct kvm_interrupt *irq)
2339 {
2340         if (irq->irq < 0 || irq->irq >= 256)
2341                 return -EINVAL;
2342         if (irqchip_in_kernel(vcpu->kvm))
2343                 return -ENXIO;
2344
2345         kvm_queue_interrupt(vcpu, irq->irq, false);
2346         kvm_make_request(KVM_REQ_EVENT, vcpu);
2347
2348         return 0;
2349 }
2350
2351 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2352 {
2353         kvm_inject_nmi(vcpu);
2354
2355         return 0;
2356 }
2357
2358 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2359                                            struct kvm_tpr_access_ctl *tac)
2360 {
2361         if (tac->flags)
2362                 return -EINVAL;
2363         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2364         return 0;
2365 }
2366
2367 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2368                                         u64 mcg_cap)
2369 {
2370         int r;
2371         unsigned bank_num = mcg_cap & 0xff, bank;
2372
2373         r = -EINVAL;
2374         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2375                 goto out;
2376         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2377                 goto out;
2378         r = 0;
2379         vcpu->arch.mcg_cap = mcg_cap;
2380         /* Init IA32_MCG_CTL to all 1s */
2381         if (mcg_cap & MCG_CTL_P)
2382                 vcpu->arch.mcg_ctl = ~(u64)0;
2383         /* Init IA32_MCi_CTL to all 1s */
2384         for (bank = 0; bank < bank_num; bank++)
2385                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2386 out:
2387         return r;
2388 }
2389
2390 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2391                                       struct kvm_x86_mce *mce)
2392 {
2393         u64 mcg_cap = vcpu->arch.mcg_cap;
2394         unsigned bank_num = mcg_cap & 0xff;
2395         u64 *banks = vcpu->arch.mce_banks;
2396
2397         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2398                 return -EINVAL;
2399         /*
2400          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2401          * reporting is disabled
2402          */
2403         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2404             vcpu->arch.mcg_ctl != ~(u64)0)
2405                 return 0;
2406         banks += 4 * mce->bank;
2407         /*
2408          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2409          * reporting is disabled for the bank
2410          */
2411         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2412                 return 0;
2413         if (mce->status & MCI_STATUS_UC) {
2414                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2415                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2416                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2417                         return 0;
2418                 }
2419                 if (banks[1] & MCI_STATUS_VAL)
2420                         mce->status |= MCI_STATUS_OVER;
2421                 banks[2] = mce->addr;
2422                 banks[3] = mce->misc;
2423                 vcpu->arch.mcg_status = mce->mcg_status;
2424                 banks[1] = mce->status;
2425                 kvm_queue_exception(vcpu, MC_VECTOR);
2426         } else if (!(banks[1] & MCI_STATUS_VAL)
2427                    || !(banks[1] & MCI_STATUS_UC)) {
2428                 if (banks[1] & MCI_STATUS_VAL)
2429                         mce->status |= MCI_STATUS_OVER;
2430                 banks[2] = mce->addr;
2431                 banks[3] = mce->misc;
2432                 banks[1] = mce->status;
2433         } else
2434                 banks[1] |= MCI_STATUS_OVER;
2435         return 0;
2436 }
2437
2438 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2439                                                struct kvm_vcpu_events *events)
2440 {
2441         process_nmi(vcpu);
2442         events->exception.injected =
2443                 vcpu->arch.exception.pending &&
2444                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2445         events->exception.nr = vcpu->arch.exception.nr;
2446         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2447         events->exception.pad = 0;
2448         events->exception.error_code = vcpu->arch.exception.error_code;
2449
2450         events->interrupt.injected =
2451                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2452         events->interrupt.nr = vcpu->arch.interrupt.nr;
2453         events->interrupt.soft = 0;
2454         events->interrupt.shadow =
2455                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2456                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2457
2458         events->nmi.injected = vcpu->arch.nmi_injected;
2459         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2460         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2461         events->nmi.pad = 0;
2462
2463         events->sipi_vector = vcpu->arch.sipi_vector;
2464
2465         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2466                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2467                          | KVM_VCPUEVENT_VALID_SHADOW);
2468         memset(&events->reserved, 0, sizeof(events->reserved));
2469 }
2470
2471 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2472                                               struct kvm_vcpu_events *events)
2473 {
2474         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2475                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2476                               | KVM_VCPUEVENT_VALID_SHADOW))
2477                 return -EINVAL;
2478
2479         process_nmi(vcpu);
2480         vcpu->arch.exception.pending = events->exception.injected;
2481         vcpu->arch.exception.nr = events->exception.nr;
2482         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2483         vcpu->arch.exception.error_code = events->exception.error_code;
2484
2485         vcpu->arch.interrupt.pending = events->interrupt.injected;
2486         vcpu->arch.interrupt.nr = events->interrupt.nr;
2487         vcpu->arch.interrupt.soft = events->interrupt.soft;
2488         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2489                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2490                                                   events->interrupt.shadow);
2491
2492         vcpu->arch.nmi_injected = events->nmi.injected;
2493         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2494                 vcpu->arch.nmi_pending = events->nmi.pending;
2495         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2496
2497         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2498                 vcpu->arch.sipi_vector = events->sipi_vector;
2499
2500         kvm_make_request(KVM_REQ_EVENT, vcpu);
2501
2502         return 0;
2503 }
2504
2505 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2506                                              struct kvm_debugregs *dbgregs)
2507 {
2508         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2509         dbgregs->dr6 = vcpu->arch.dr6;
2510         dbgregs->dr7 = vcpu->arch.dr7;
2511         dbgregs->flags = 0;
2512         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2513 }
2514
2515 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2516                                             struct kvm_debugregs *dbgregs)
2517 {
2518         if (dbgregs->flags)
2519                 return -EINVAL;
2520
2521         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2522         vcpu->arch.dr6 = dbgregs->dr6;
2523         vcpu->arch.dr7 = dbgregs->dr7;
2524
2525         return 0;
2526 }
2527
2528 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2529                                          struct kvm_xsave *guest_xsave)
2530 {
2531         if (cpu_has_xsave)
2532                 memcpy(guest_xsave->region,
2533                         &vcpu->arch.guest_fpu.state->xsave,
2534                         xstate_size);
2535         else {
2536                 memcpy(guest_xsave->region,
2537                         &vcpu->arch.guest_fpu.state->fxsave,
2538                         sizeof(struct i387_fxsave_struct));
2539                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2540                         XSTATE_FPSSE;
2541         }
2542 }
2543
2544 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2545                                         struct kvm_xsave *guest_xsave)
2546 {
2547         u64 xstate_bv =
2548                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2549
2550         if (cpu_has_xsave)
2551                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2552                         guest_xsave->region, xstate_size);
2553         else {
2554                 if (xstate_bv & ~XSTATE_FPSSE)
2555                         return -EINVAL;
2556                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2557                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2558         }
2559         return 0;
2560 }
2561
2562 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2563                                         struct kvm_xcrs *guest_xcrs)
2564 {
2565         if (!cpu_has_xsave) {
2566                 guest_xcrs->nr_xcrs = 0;
2567                 return;
2568         }
2569
2570         guest_xcrs->nr_xcrs = 1;
2571         guest_xcrs->flags = 0;
2572         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2573         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2574 }
2575
2576 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2577                                        struct kvm_xcrs *guest_xcrs)
2578 {
2579         int i, r = 0;
2580
2581         if (!cpu_has_xsave)
2582                 return -EINVAL;
2583
2584         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2585                 return -EINVAL;
2586
2587         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2588                 /* Only support XCR0 currently */
2589                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2590                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2591                                 guest_xcrs->xcrs[0].value);
2592                         break;
2593                 }
2594         if (r)
2595                 r = -EINVAL;
2596         return r;
2597 }
2598
2599 long kvm_arch_vcpu_ioctl(struct file *filp,
2600                          unsigned int ioctl, unsigned long arg)
2601 {
2602         struct kvm_vcpu *vcpu = filp->private_data;
2603         void __user *argp = (void __user *)arg;
2604         int r;
2605         union {
2606                 struct kvm_lapic_state *lapic;
2607                 struct kvm_xsave *xsave;
2608                 struct kvm_xcrs *xcrs;
2609                 void *buffer;
2610         } u;
2611
2612         u.buffer = NULL;
2613         switch (ioctl) {
2614         case KVM_GET_LAPIC: {
2615                 r = -EINVAL;
2616                 if (!vcpu->arch.apic)
2617                         goto out;
2618                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2619
2620                 r = -ENOMEM;
2621                 if (!u.lapic)
2622                         goto out;
2623                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2624                 if (r)
2625                         goto out;
2626                 r = -EFAULT;
2627                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2628                         goto out;
2629                 r = 0;
2630                 break;
2631         }
2632         case KVM_SET_LAPIC: {
2633                 r = -EINVAL;
2634                 if (!vcpu->arch.apic)
2635                         goto out;
2636                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2637                 if (IS_ERR(u.lapic)) {
2638                         r = PTR_ERR(u.lapic);
2639                         goto out;
2640                 }
2641
2642                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2643                 if (r)
2644                         goto out;
2645                 r = 0;
2646                 break;
2647         }
2648         case KVM_INTERRUPT: {
2649                 struct kvm_interrupt irq;
2650
2651                 r = -EFAULT;
2652                 if (copy_from_user(&irq, argp, sizeof irq))
2653                         goto out;
2654                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2655                 if (r)
2656                         goto out;
2657                 r = 0;
2658                 break;
2659         }
2660         case KVM_NMI: {
2661                 r = kvm_vcpu_ioctl_nmi(vcpu);
2662                 if (r)
2663                         goto out;
2664                 r = 0;
2665                 break;
2666         }
2667         case KVM_SET_CPUID: {
2668                 struct kvm_cpuid __user *cpuid_arg = argp;
2669                 struct kvm_cpuid cpuid;
2670
2671                 r = -EFAULT;
2672                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2673                         goto out;
2674                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2675                 if (r)
2676                         goto out;
2677                 break;
2678         }
2679         case KVM_SET_CPUID2: {
2680                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2681                 struct kvm_cpuid2 cpuid;
2682
2683                 r = -EFAULT;
2684                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2685                         goto out;
2686                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2687                                               cpuid_arg->entries);
2688                 if (r)
2689                         goto out;
2690                 break;
2691         }
2692         case KVM_GET_CPUID2: {
2693                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2694                 struct kvm_cpuid2 cpuid;
2695
2696                 r = -EFAULT;
2697                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2698                         goto out;
2699                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2700                                               cpuid_arg->entries);
2701                 if (r)
2702                         goto out;
2703                 r = -EFAULT;
2704                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2705                         goto out;
2706                 r = 0;
2707                 break;
2708         }
2709         case KVM_GET_MSRS:
2710                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2711                 break;
2712         case KVM_SET_MSRS:
2713                 r = msr_io(vcpu, argp, do_set_msr, 0);
2714                 break;
2715         case KVM_TPR_ACCESS_REPORTING: {
2716                 struct kvm_tpr_access_ctl tac;
2717
2718                 r = -EFAULT;
2719                 if (copy_from_user(&tac, argp, sizeof tac))
2720                         goto out;
2721                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2722                 if (r)
2723                         goto out;
2724                 r = -EFAULT;
2725                 if (copy_to_user(argp, &tac, sizeof tac))
2726                         goto out;
2727                 r = 0;
2728                 break;
2729         };
2730         case KVM_SET_VAPIC_ADDR: {
2731                 struct kvm_vapic_addr va;
2732
2733                 r = -EINVAL;
2734                 if (!irqchip_in_kernel(vcpu->kvm))
2735                         goto out;
2736                 r = -EFAULT;
2737                 if (copy_from_user(&va, argp, sizeof va))
2738                         goto out;
2739                 r = 0;
2740                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2741                 break;
2742         }
2743         case KVM_X86_SETUP_MCE: {
2744                 u64 mcg_cap;
2745
2746                 r = -EFAULT;
2747                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2748                         goto out;
2749                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2750                 break;
2751         }
2752         case KVM_X86_SET_MCE: {
2753                 struct kvm_x86_mce mce;
2754
2755                 r = -EFAULT;
2756                 if (copy_from_user(&mce, argp, sizeof mce))
2757                         goto out;
2758                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2759                 break;
2760         }
2761         case KVM_GET_VCPU_EVENTS: {
2762                 struct kvm_vcpu_events events;
2763
2764                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2765
2766                 r = -EFAULT;
2767                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2768                         break;
2769                 r = 0;
2770                 break;
2771         }
2772         case KVM_SET_VCPU_EVENTS: {
2773                 struct kvm_vcpu_events events;
2774
2775                 r = -EFAULT;
2776                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2777                         break;
2778
2779                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2780                 break;
2781         }
2782         case KVM_GET_DEBUGREGS: {
2783                 struct kvm_debugregs dbgregs;
2784
2785                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2786
2787                 r = -EFAULT;
2788                 if (copy_to_user(argp, &dbgregs,
2789                                  sizeof(struct kvm_debugregs)))
2790                         break;
2791                 r = 0;
2792                 break;
2793         }
2794         case KVM_SET_DEBUGREGS: {
2795                 struct kvm_debugregs dbgregs;
2796
2797                 r = -EFAULT;
2798                 if (copy_from_user(&dbgregs, argp,
2799                                    sizeof(struct kvm_debugregs)))
2800                         break;
2801
2802                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2803                 break;
2804         }
2805         case KVM_GET_XSAVE: {
2806                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2807                 r = -ENOMEM;
2808                 if (!u.xsave)
2809                         break;
2810
2811                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2812
2813                 r = -EFAULT;
2814                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2815                         break;
2816                 r = 0;
2817                 break;
2818         }
2819         case KVM_SET_XSAVE: {
2820                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2821                 if (IS_ERR(u.xsave)) {
2822                         r = PTR_ERR(u.xsave);
2823                         goto out;
2824                 }
2825
2826                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2827                 break;
2828         }
2829         case KVM_GET_XCRS: {
2830                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2831                 r = -ENOMEM;
2832                 if (!u.xcrs)
2833                         break;
2834
2835                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2836
2837                 r = -EFAULT;
2838                 if (copy_to_user(argp, u.xcrs,
2839                                  sizeof(struct kvm_xcrs)))
2840                         break;
2841                 r = 0;
2842                 break;
2843         }
2844         case KVM_SET_XCRS: {
2845                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2846                 if (IS_ERR(u.xcrs)) {
2847                         r = PTR_ERR(u.xcrs);
2848                         goto out;
2849                 }
2850
2851                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2852                 break;
2853         }
2854         case KVM_SET_TSC_KHZ: {
2855                 u32 user_tsc_khz;
2856
2857                 r = -EINVAL;
2858                 user_tsc_khz = (u32)arg;
2859
2860                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2861                         goto out;
2862
2863                 if (user_tsc_khz == 0)
2864                         user_tsc_khz = tsc_khz;
2865
2866                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2867
2868                 r = 0;
2869                 goto out;
2870         }
2871         case KVM_GET_TSC_KHZ: {
2872                 r = vcpu->arch.virtual_tsc_khz;
2873                 goto out;
2874         }
2875         default:
2876                 r = -EINVAL;
2877         }
2878 out:
2879         kfree(u.buffer);
2880         return r;
2881 }
2882
2883 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2884 {
2885         return VM_FAULT_SIGBUS;
2886 }
2887
2888 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2889 {
2890         int ret;
2891
2892         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2893                 return -1;
2894         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2895         return ret;
2896 }
2897
2898 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2899                                               u64 ident_addr)
2900 {
2901         kvm->arch.ept_identity_map_addr = ident_addr;
2902         return 0;
2903 }
2904
2905 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2906                                           u32 kvm_nr_mmu_pages)
2907 {
2908         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2909                 return -EINVAL;
2910
2911         mutex_lock(&kvm->slots_lock);
2912         spin_lock(&kvm->mmu_lock);
2913
2914         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2915         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2916
2917         spin_unlock(&kvm->mmu_lock);
2918         mutex_unlock(&kvm->slots_lock);
2919         return 0;
2920 }
2921
2922 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2923 {
2924         return kvm->arch.n_max_mmu_pages;
2925 }
2926
2927 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2928 {
2929         int r;
2930
2931         r = 0;
2932         switch (chip->chip_id) {
2933         case KVM_IRQCHIP_PIC_MASTER:
2934                 memcpy(&chip->chip.pic,
2935                         &pic_irqchip(kvm)->pics[0],
2936                         sizeof(struct kvm_pic_state));
2937                 break;
2938         case KVM_IRQCHIP_PIC_SLAVE:
2939                 memcpy(&chip->chip.pic,
2940                         &pic_irqchip(kvm)->pics[1],
2941                         sizeof(struct kvm_pic_state));
2942                 break;
2943         case KVM_IRQCHIP_IOAPIC:
2944                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2945                 break;
2946         default:
2947                 r = -EINVAL;
2948                 break;
2949         }
2950         return r;
2951 }
2952
2953 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2954 {
2955         int r;
2956
2957         r = 0;
2958         switch (chip->chip_id) {
2959         case KVM_IRQCHIP_PIC_MASTER:
2960                 spin_lock(&pic_irqchip(kvm)->lock);
2961                 memcpy(&pic_irqchip(kvm)->pics[0],
2962                         &chip->chip.pic,
2963                         sizeof(struct kvm_pic_state));
2964                 spin_unlock(&pic_irqchip(kvm)->lock);
2965                 break;
2966         case KVM_IRQCHIP_PIC_SLAVE:
2967                 spin_lock(&pic_irqchip(kvm)->lock);
2968                 memcpy(&pic_irqchip(kvm)->pics[1],
2969                         &chip->chip.pic,
2970                         sizeof(struct kvm_pic_state));
2971                 spin_unlock(&pic_irqchip(kvm)->lock);
2972                 break;
2973         case KVM_IRQCHIP_IOAPIC:
2974                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2975                 break;
2976         default:
2977                 r = -EINVAL;
2978                 break;
2979         }
2980         kvm_pic_update_irq(pic_irqchip(kvm));
2981         return r;
2982 }
2983
2984 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2985 {
2986         int r = 0;
2987
2988         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2989         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2990         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2991         return r;
2992 }
2993
2994 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2995 {
2996         int r = 0;
2997
2998         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2999         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3000         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3001         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3002         return r;
3003 }
3004
3005 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3006 {
3007         int r = 0;
3008
3009         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3010         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3011                 sizeof(ps->channels));
3012         ps->flags = kvm->arch.vpit->pit_state.flags;
3013         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3014         memset(&ps->reserved, 0, sizeof(ps->reserved));
3015         return r;
3016 }
3017
3018 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3019 {
3020         int r = 0, start = 0;
3021         u32 prev_legacy, cur_legacy;
3022         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3023         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3024         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3025         if (!prev_legacy && cur_legacy)
3026                 start = 1;
3027         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3028                sizeof(kvm->arch.vpit->pit_state.channels));
3029         kvm->arch.vpit->pit_state.flags = ps->flags;
3030         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3031         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3032         return r;
3033 }
3034
3035 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3036                                  struct kvm_reinject_control *control)
3037 {
3038         if (!kvm->arch.vpit)
3039                 return -ENXIO;
3040         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3041         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3042         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3043         return 0;
3044 }
3045
3046 /**
3047  * write_protect_slot - write protect a slot for dirty logging
3048  * @kvm: the kvm instance
3049  * @memslot: the slot we protect
3050  * @dirty_bitmap: the bitmap indicating which pages are dirty
3051  * @nr_dirty_pages: the number of dirty pages
3052  *
3053  * We have two ways to find all sptes to protect:
3054  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3055  *    checks ones that have a spte mapping a page in the slot.
3056  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3057  *
3058  * Generally speaking, if there are not so many dirty pages compared to the
3059  * number of shadow pages, we should use the latter.
3060  *
3061  * Note that letting others write into a page marked dirty in the old bitmap
3062  * by using the remaining tlb entry is not a problem.  That page will become
3063  * write protected again when we flush the tlb and then be reported dirty to
3064  * the user space by copying the old bitmap.
3065  */
3066 static void write_protect_slot(struct kvm *kvm,
3067                                struct kvm_memory_slot *memslot,
3068                                unsigned long *dirty_bitmap,
3069                                unsigned long nr_dirty_pages)
3070 {
3071         spin_lock(&kvm->mmu_lock);
3072
3073         /* Not many dirty pages compared to # of shadow pages. */
3074         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3075                 unsigned long gfn_offset;
3076
3077                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3078                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3079
3080                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3081                 }
3082                 kvm_flush_remote_tlbs(kvm);
3083         } else
3084                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3085
3086         spin_unlock(&kvm->mmu_lock);
3087 }
3088
3089 /*
3090  * Get (and clear) the dirty memory log for a memory slot.
3091  */
3092 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3093                                       struct kvm_dirty_log *log)
3094 {
3095         int r;
3096         struct kvm_memory_slot *memslot;
3097         unsigned long n, nr_dirty_pages;
3098
3099         mutex_lock(&kvm->slots_lock);
3100
3101         r = -EINVAL;
3102         if (log->slot >= KVM_MEMORY_SLOTS)
3103                 goto out;
3104
3105         memslot = id_to_memslot(kvm->memslots, log->slot);
3106         r = -ENOENT;
3107         if (!memslot->dirty_bitmap)
3108                 goto out;
3109
3110         n = kvm_dirty_bitmap_bytes(memslot);
3111         nr_dirty_pages = memslot->nr_dirty_pages;
3112
3113         /* If nothing is dirty, don't bother messing with page tables. */
3114         if (nr_dirty_pages) {
3115                 struct kvm_memslots *slots, *old_slots;
3116                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3117
3118                 dirty_bitmap = memslot->dirty_bitmap;
3119                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3120                 if (dirty_bitmap == dirty_bitmap_head)
3121                         dirty_bitmap_head += n / sizeof(long);
3122                 memset(dirty_bitmap_head, 0, n);
3123
3124                 r = -ENOMEM;
3125                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3126                 if (!slots)
3127                         goto out;
3128
3129                 memslot = id_to_memslot(slots, log->slot);
3130                 memslot->nr_dirty_pages = 0;
3131                 memslot->dirty_bitmap = dirty_bitmap_head;
3132                 update_memslots(slots, NULL);
3133
3134                 old_slots = kvm->memslots;
3135                 rcu_assign_pointer(kvm->memslots, slots);
3136                 synchronize_srcu_expedited(&kvm->srcu);
3137                 kfree(old_slots);
3138
3139                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3140
3141                 r = -EFAULT;
3142                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3143                         goto out;
3144         } else {
3145                 r = -EFAULT;
3146                 if (clear_user(log->dirty_bitmap, n))
3147                         goto out;
3148         }
3149
3150         r = 0;
3151 out:
3152         mutex_unlock(&kvm->slots_lock);
3153         return r;
3154 }
3155
3156 long kvm_arch_vm_ioctl(struct file *filp,
3157                        unsigned int ioctl, unsigned long arg)
3158 {
3159         struct kvm *kvm = filp->private_data;
3160         void __user *argp = (void __user *)arg;
3161         int r = -ENOTTY;
3162         /*
3163          * This union makes it completely explicit to gcc-3.x
3164          * that these two variables' stack usage should be
3165          * combined, not added together.
3166          */
3167         union {
3168                 struct kvm_pit_state ps;
3169                 struct kvm_pit_state2 ps2;
3170                 struct kvm_pit_config pit_config;
3171         } u;
3172
3173         switch (ioctl) {
3174         case KVM_SET_TSS_ADDR:
3175                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3176                 if (r < 0)
3177                         goto out;
3178                 break;
3179         case KVM_SET_IDENTITY_MAP_ADDR: {
3180                 u64 ident_addr;
3181
3182                 r = -EFAULT;
3183                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3184                         goto out;
3185                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3186                 if (r < 0)
3187                         goto out;
3188                 break;
3189         }
3190         case KVM_SET_NR_MMU_PAGES:
3191                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3192                 if (r)
3193                         goto out;
3194                 break;
3195         case KVM_GET_NR_MMU_PAGES:
3196                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3197                 break;
3198         case KVM_CREATE_IRQCHIP: {
3199                 struct kvm_pic *vpic;
3200
3201                 mutex_lock(&kvm->lock);
3202                 r = -EEXIST;
3203                 if (kvm->arch.vpic)
3204                         goto create_irqchip_unlock;
3205                 r = -EINVAL;
3206                 if (atomic_read(&kvm->online_vcpus))
3207                         goto create_irqchip_unlock;
3208                 r = -ENOMEM;
3209                 vpic = kvm_create_pic(kvm);
3210                 if (vpic) {
3211                         r = kvm_ioapic_init(kvm);
3212                         if (r) {
3213                                 mutex_lock(&kvm->slots_lock);
3214                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3215                                                           &vpic->dev_master);
3216                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3217                                                           &vpic->dev_slave);
3218                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3219                                                           &vpic->dev_eclr);
3220                                 mutex_unlock(&kvm->slots_lock);
3221                                 kfree(vpic);
3222                                 goto create_irqchip_unlock;
3223                         }
3224                 } else
3225                         goto create_irqchip_unlock;
3226                 smp_wmb();
3227                 kvm->arch.vpic = vpic;
3228                 smp_wmb();
3229                 r = kvm_setup_default_irq_routing(kvm);
3230                 if (r) {
3231                         mutex_lock(&kvm->slots_lock);
3232                         mutex_lock(&kvm->irq_lock);
3233                         kvm_ioapic_destroy(kvm);
3234                         kvm_destroy_pic(kvm);
3235                         mutex_unlock(&kvm->irq_lock);
3236                         mutex_unlock(&kvm->slots_lock);
3237                 }
3238         create_irqchip_unlock:
3239                 mutex_unlock(&kvm->lock);
3240                 break;
3241         }
3242         case KVM_CREATE_PIT:
3243                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3244                 goto create_pit;
3245         case KVM_CREATE_PIT2:
3246                 r = -EFAULT;
3247                 if (copy_from_user(&u.pit_config, argp,
3248                                    sizeof(struct kvm_pit_config)))
3249                         goto out;
3250         create_pit:
3251                 mutex_lock(&kvm->slots_lock);
3252                 r = -EEXIST;
3253                 if (kvm->arch.vpit)
3254                         goto create_pit_unlock;
3255                 r = -ENOMEM;
3256                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3257                 if (kvm->arch.vpit)
3258                         r = 0;
3259         create_pit_unlock:
3260                 mutex_unlock(&kvm->slots_lock);
3261                 break;
3262         case KVM_IRQ_LINE_STATUS:
3263         case KVM_IRQ_LINE: {
3264                 struct kvm_irq_level irq_event;
3265
3266                 r = -EFAULT;
3267                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3268                         goto out;
3269                 r = -ENXIO;
3270                 if (irqchip_in_kernel(kvm)) {
3271                         __s32 status;
3272                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3273                                         irq_event.irq, irq_event.level);
3274                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3275                                 r = -EFAULT;
3276                                 irq_event.status = status;
3277                                 if (copy_to_user(argp, &irq_event,
3278                                                         sizeof irq_event))
3279                                         goto out;
3280                         }
3281                         r = 0;
3282                 }
3283                 break;
3284         }
3285         case KVM_GET_IRQCHIP: {
3286                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3287                 struct kvm_irqchip *chip;
3288
3289                 chip = memdup_user(argp, sizeof(*chip));
3290                 if (IS_ERR(chip)) {
3291                         r = PTR_ERR(chip);
3292                         goto out;
3293                 }
3294
3295                 r = -ENXIO;
3296                 if (!irqchip_in_kernel(kvm))
3297                         goto get_irqchip_out;
3298                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3299                 if (r)
3300                         goto get_irqchip_out;
3301                 r = -EFAULT;
3302                 if (copy_to_user(argp, chip, sizeof *chip))
3303                         goto get_irqchip_out;
3304                 r = 0;
3305         get_irqchip_out:
3306                 kfree(chip);
3307                 if (r)
3308                         goto out;
3309                 break;
3310         }
3311         case KVM_SET_IRQCHIP: {
3312                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3313                 struct kvm_irqchip *chip;
3314
3315                 chip = memdup_user(argp, sizeof(*chip));
3316                 if (IS_ERR(chip)) {
3317                         r = PTR_ERR(chip);
3318                         goto out;
3319                 }
3320
3321                 r = -ENXIO;
3322                 if (!irqchip_in_kernel(kvm))
3323                         goto set_irqchip_out;
3324                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3325                 if (r)
3326                         goto set_irqchip_out;
3327                 r = 0;
3328         set_irqchip_out:
3329                 kfree(chip);
3330                 if (r)
3331                         goto out;
3332                 break;
3333         }
3334         case KVM_GET_PIT: {
3335                 r = -EFAULT;
3336                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3337                         goto out;
3338                 r = -ENXIO;
3339                 if (!kvm->arch.vpit)
3340                         goto out;
3341                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3342                 if (r)
3343                         goto out;
3344                 r = -EFAULT;
3345                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3346                         goto out;
3347                 r = 0;
3348                 break;
3349         }
3350         case KVM_SET_PIT: {
3351                 r = -EFAULT;
3352                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3353                         goto out;
3354                 r = -ENXIO;
3355                 if (!kvm->arch.vpit)
3356                         goto out;
3357                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3358                 if (r)
3359                         goto out;
3360                 r = 0;
3361                 break;
3362         }
3363         case KVM_GET_PIT2: {
3364                 r = -ENXIO;
3365                 if (!kvm->arch.vpit)
3366                         goto out;
3367                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3368                 if (r)
3369                         goto out;
3370                 r = -EFAULT;
3371                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3372                         goto out;
3373                 r = 0;
3374                 break;
3375         }
3376         case KVM_SET_PIT2: {
3377                 r = -EFAULT;
3378                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3379                         goto out;
3380                 r = -ENXIO;
3381                 if (!kvm->arch.vpit)
3382                         goto out;
3383                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3384                 if (r)
3385                         goto out;
3386                 r = 0;
3387                 break;
3388         }
3389         case KVM_REINJECT_CONTROL: {
3390                 struct kvm_reinject_control control;
3391                 r =  -EFAULT;
3392                 if (copy_from_user(&control, argp, sizeof(control)))
3393                         goto out;
3394                 r = kvm_vm_ioctl_reinject(kvm, &control);
3395                 if (r)
3396                         goto out;
3397                 r = 0;
3398                 break;
3399         }
3400         case KVM_XEN_HVM_CONFIG: {
3401                 r = -EFAULT;
3402                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3403                                    sizeof(struct kvm_xen_hvm_config)))
3404                         goto out;
3405                 r = -EINVAL;
3406                 if (kvm->arch.xen_hvm_config.flags)
3407                         goto out;
3408                 r = 0;
3409                 break;
3410         }
3411         case KVM_SET_CLOCK: {
3412                 struct kvm_clock_data user_ns;
3413                 u64 now_ns;
3414                 s64 delta;
3415
3416                 r = -EFAULT;
3417                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3418                         goto out;
3419
3420                 r = -EINVAL;
3421                 if (user_ns.flags)
3422                         goto out;
3423
3424                 r = 0;
3425                 local_irq_disable();
3426                 now_ns = get_kernel_ns();
3427                 delta = user_ns.clock - now_ns;
3428                 local_irq_enable();
3429                 kvm->arch.kvmclock_offset = delta;
3430                 break;
3431         }
3432         case KVM_GET_CLOCK: {
3433                 struct kvm_clock_data user_ns;
3434                 u64 now_ns;
3435
3436                 local_irq_disable();
3437                 now_ns = get_kernel_ns();
3438                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3439                 local_irq_enable();
3440                 user_ns.flags = 0;
3441                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3442
3443                 r = -EFAULT;
3444                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3445                         goto out;
3446                 r = 0;
3447                 break;
3448         }
3449
3450         default:
3451                 ;
3452         }
3453 out:
3454         return r;
3455 }
3456
3457 static void kvm_init_msr_list(void)
3458 {
3459         u32 dummy[2];
3460         unsigned i, j;
3461
3462         /* skip the first msrs in the list. KVM-specific */
3463         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3464                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3465                         continue;
3466                 if (j < i)
3467                         msrs_to_save[j] = msrs_to_save[i];
3468                 j++;
3469         }
3470         num_msrs_to_save = j;
3471 }
3472
3473 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3474                            const void *v)
3475 {
3476         int handled = 0;
3477         int n;
3478
3479         do {
3480                 n = min(len, 8);
3481                 if (!(vcpu->arch.apic &&
3482                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3483                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3484                         break;
3485                 handled += n;
3486                 addr += n;
3487                 len -= n;
3488                 v += n;
3489         } while (len);
3490
3491         return handled;
3492 }
3493
3494 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3495 {
3496         int handled = 0;
3497         int n;
3498
3499         do {
3500                 n = min(len, 8);
3501                 if (!(vcpu->arch.apic &&
3502                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3503                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3504                         break;
3505                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3506                 handled += n;
3507                 addr += n;
3508                 len -= n;
3509                 v += n;
3510         } while (len);
3511
3512         return handled;
3513 }
3514
3515 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3516                         struct kvm_segment *var, int seg)
3517 {
3518         kvm_x86_ops->set_segment(vcpu, var, seg);
3519 }
3520
3521 void kvm_get_segment(struct kvm_vcpu *vcpu,
3522                      struct kvm_segment *var, int seg)
3523 {
3524         kvm_x86_ops->get_segment(vcpu, var, seg);
3525 }
3526
3527 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3528 {
3529         gpa_t t_gpa;
3530         struct x86_exception exception;
3531
3532         BUG_ON(!mmu_is_nested(vcpu));
3533
3534         /* NPT walks are always user-walks */
3535         access |= PFERR_USER_MASK;
3536         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3537
3538         return t_gpa;
3539 }
3540
3541 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3542                               struct x86_exception *exception)
3543 {
3544         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3545         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3546 }
3547
3548  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3549                                 struct x86_exception *exception)
3550 {
3551         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3552         access |= PFERR_FETCH_MASK;
3553         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3554 }
3555
3556 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3557                                struct x86_exception *exception)
3558 {
3559         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3560         access |= PFERR_WRITE_MASK;
3561         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3562 }
3563
3564 /* uses this to access any guest's mapped memory without checking CPL */
3565 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3566                                 struct x86_exception *exception)
3567 {
3568         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3569 }
3570
3571 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3572                                       struct kvm_vcpu *vcpu, u32 access,
3573                                       struct x86_exception *exception)
3574 {
3575         void *data = val;
3576         int r = X86EMUL_CONTINUE;
3577
3578         while (bytes) {
3579                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3580                                                             exception);
3581                 unsigned offset = addr & (PAGE_SIZE-1);
3582                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3583                 int ret;
3584
3585                 if (gpa == UNMAPPED_GVA)
3586                         return X86EMUL_PROPAGATE_FAULT;
3587                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3588                 if (ret < 0) {
3589                         r = X86EMUL_IO_NEEDED;
3590                         goto out;
3591                 }
3592
3593                 bytes -= toread;
3594                 data += toread;
3595                 addr += toread;
3596         }
3597 out:
3598         return r;
3599 }
3600
3601 /* used for instruction fetching */
3602 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3603                                 gva_t addr, void *val, unsigned int bytes,
3604                                 struct x86_exception *exception)
3605 {
3606         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3607         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3608
3609         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3610                                           access | PFERR_FETCH_MASK,
3611                                           exception);
3612 }
3613
3614 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3615                                gva_t addr, void *val, unsigned int bytes,
3616                                struct x86_exception *exception)
3617 {
3618         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3619         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3620
3621         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3622                                           exception);
3623 }
3624 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3625
3626 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3627                                       gva_t addr, void *val, unsigned int bytes,
3628                                       struct x86_exception *exception)
3629 {
3630         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3631         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3632 }
3633
3634 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3635                                        gva_t addr, void *val,
3636                                        unsigned int bytes,
3637                                        struct x86_exception *exception)
3638 {
3639         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3640         void *data = val;
3641         int r = X86EMUL_CONTINUE;
3642
3643         while (bytes) {
3644                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3645                                                              PFERR_WRITE_MASK,
3646                                                              exception);
3647                 unsigned offset = addr & (PAGE_SIZE-1);
3648                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3649                 int ret;
3650
3651                 if (gpa == UNMAPPED_GVA)
3652                         return X86EMUL_PROPAGATE_FAULT;
3653                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3654                 if (ret < 0) {
3655                         r = X86EMUL_IO_NEEDED;
3656                         goto out;
3657                 }
3658
3659                 bytes -= towrite;
3660                 data += towrite;
3661                 addr += towrite;
3662         }
3663 out:
3664         return r;
3665 }
3666 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3667
3668 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3669                                 gpa_t *gpa, struct x86_exception *exception,
3670                                 bool write)
3671 {
3672         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3673
3674         if (vcpu_match_mmio_gva(vcpu, gva) &&
3675                   check_write_user_access(vcpu, write, access,
3676                   vcpu->arch.access)) {
3677                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3678                                         (gva & (PAGE_SIZE - 1));
3679                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3680                 return 1;
3681         }
3682
3683         if (write)
3684                 access |= PFERR_WRITE_MASK;
3685
3686         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3687
3688         if (*gpa == UNMAPPED_GVA)
3689                 return -1;
3690
3691         /* For APIC access vmexit */
3692         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3693                 return 1;
3694
3695         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3696                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3697                 return 1;
3698         }
3699
3700         return 0;
3701 }
3702
3703 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3704                         const void *val, int bytes)
3705 {
3706         int ret;
3707
3708         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3709         if (ret < 0)
3710                 return 0;
3711         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3712         return 1;
3713 }
3714
3715 struct read_write_emulator_ops {
3716         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3717                                   int bytes);
3718         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3719                                   void *val, int bytes);
3720         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3721                                int bytes, void *val);
3722         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3723                                     void *val, int bytes);
3724         bool write;
3725 };
3726
3727 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3728 {
3729         if (vcpu->mmio_read_completed) {
3730                 memcpy(val, vcpu->mmio_data, bytes);
3731                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3732                                vcpu->mmio_phys_addr, *(u64 *)val);
3733                 vcpu->mmio_read_completed = 0;
3734                 return 1;
3735         }
3736
3737         return 0;
3738 }
3739
3740 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3741                         void *val, int bytes)
3742 {
3743         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3744 }
3745
3746 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3747                          void *val, int bytes)
3748 {
3749         return emulator_write_phys(vcpu, gpa, val, bytes);
3750 }
3751
3752 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3753 {
3754         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3755         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3756 }
3757
3758 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3759                           void *val, int bytes)
3760 {
3761         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3762         return X86EMUL_IO_NEEDED;
3763 }
3764
3765 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3766                            void *val, int bytes)
3767 {
3768         memcpy(vcpu->mmio_data, val, bytes);
3769         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3770         return X86EMUL_CONTINUE;
3771 }
3772
3773 static struct read_write_emulator_ops read_emultor = {
3774         .read_write_prepare = read_prepare,
3775         .read_write_emulate = read_emulate,
3776         .read_write_mmio = vcpu_mmio_read,
3777         .read_write_exit_mmio = read_exit_mmio,
3778 };
3779
3780 static struct read_write_emulator_ops write_emultor = {
3781         .read_write_emulate = write_emulate,
3782         .read_write_mmio = write_mmio,
3783         .read_write_exit_mmio = write_exit_mmio,
3784         .write = true,
3785 };
3786
3787 static int emulator_read_write_onepage(unsigned long addr, void *val,
3788                                        unsigned int bytes,
3789                                        struct x86_exception *exception,
3790                                        struct kvm_vcpu *vcpu,
3791                                        struct read_write_emulator_ops *ops)
3792 {
3793         gpa_t gpa;
3794         int handled, ret;
3795         bool write = ops->write;
3796
3797         if (ops->read_write_prepare &&
3798                   ops->read_write_prepare(vcpu, val, bytes))
3799                 return X86EMUL_CONTINUE;
3800
3801         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3802
3803         if (ret < 0)
3804                 return X86EMUL_PROPAGATE_FAULT;
3805
3806         /* For APIC access vmexit */
3807         if (ret)
3808                 goto mmio;
3809
3810         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3811                 return X86EMUL_CONTINUE;
3812
3813 mmio:
3814         /*
3815          * Is this MMIO handled locally?
3816          */
3817         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3818         if (handled == bytes)
3819                 return X86EMUL_CONTINUE;
3820
3821         gpa += handled;
3822         bytes -= handled;
3823         val += handled;
3824
3825         vcpu->mmio_needed = 1;
3826         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3827         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3828         vcpu->mmio_size = bytes;
3829         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3830         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3831         vcpu->mmio_index = 0;
3832
3833         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3834 }
3835
3836 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3837                         void *val, unsigned int bytes,
3838                         struct x86_exception *exception,
3839                         struct read_write_emulator_ops *ops)
3840 {
3841         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3842
3843         /* Crossing a page boundary? */
3844         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3845                 int rc, now;
3846
3847                 now = -addr & ~PAGE_MASK;
3848                 rc = emulator_read_write_onepage(addr, val, now, exception,
3849                                                  vcpu, ops);
3850
3851                 if (rc != X86EMUL_CONTINUE)
3852                         return rc;
3853                 addr += now;
3854                 val += now;
3855                 bytes -= now;
3856         }
3857
3858         return emulator_read_write_onepage(addr, val, bytes, exception,
3859                                            vcpu, ops);
3860 }
3861
3862 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3863                                   unsigned long addr,
3864                                   void *val,
3865                                   unsigned int bytes,
3866                                   struct x86_exception *exception)
3867 {
3868         return emulator_read_write(ctxt, addr, val, bytes,
3869                                    exception, &read_emultor);
3870 }
3871
3872 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3873                             unsigned long addr,
3874                             const void *val,
3875                             unsigned int bytes,
3876                             struct x86_exception *exception)
3877 {
3878         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3879                                    exception, &write_emultor);
3880 }
3881
3882 #define CMPXCHG_TYPE(t, ptr, old, new) \
3883         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3884
3885 #ifdef CONFIG_X86_64
3886 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3887 #else
3888 #  define CMPXCHG64(ptr, old, new) \
3889         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3890 #endif
3891
3892 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3893                                      unsigned long addr,
3894                                      const void *old,
3895                                      const void *new,
3896                                      unsigned int bytes,
3897                                      struct x86_exception *exception)
3898 {
3899         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3900         gpa_t gpa;
3901         struct page *page;
3902         char *kaddr;
3903         bool exchanged;
3904
3905         /* guests cmpxchg8b have to be emulated atomically */
3906         if (bytes > 8 || (bytes & (bytes - 1)))
3907                 goto emul_write;
3908
3909         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3910
3911         if (gpa == UNMAPPED_GVA ||
3912             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3913                 goto emul_write;
3914
3915         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3916                 goto emul_write;
3917
3918         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3919         if (is_error_page(page)) {
3920                 kvm_release_page_clean(page);
3921                 goto emul_write;
3922         }
3923
3924         kaddr = kmap_atomic(page, KM_USER0);
3925         kaddr += offset_in_page(gpa);
3926         switch (bytes) {
3927         case 1:
3928                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3929                 break;
3930         case 2:
3931                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3932                 break;
3933         case 4:
3934                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3935                 break;
3936         case 8:
3937                 exchanged = CMPXCHG64(kaddr, old, new);
3938                 break;
3939         default:
3940                 BUG();
3941         }
3942         kunmap_atomic(kaddr, KM_USER0);
3943         kvm_release_page_dirty(page);
3944
3945         if (!exchanged)
3946                 return X86EMUL_CMPXCHG_FAILED;
3947
3948         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3949
3950         return X86EMUL_CONTINUE;
3951
3952 emul_write:
3953         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3954
3955         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3956 }
3957
3958 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3959 {
3960         /* TODO: String I/O for in kernel device */
3961         int r;
3962
3963         if (vcpu->arch.pio.in)
3964                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3965                                     vcpu->arch.pio.size, pd);
3966         else
3967                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3968                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3969                                      pd);
3970         return r;
3971 }
3972
3973 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3974                                unsigned short port, void *val,
3975                                unsigned int count, bool in)
3976 {
3977         trace_kvm_pio(!in, port, size, count);
3978
3979         vcpu->arch.pio.port = port;
3980         vcpu->arch.pio.in = in;
3981         vcpu->arch.pio.count  = count;
3982         vcpu->arch.pio.size = size;
3983
3984         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3985                 vcpu->arch.pio.count = 0;
3986                 return 1;
3987         }
3988
3989         vcpu->run->exit_reason = KVM_EXIT_IO;
3990         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3991         vcpu->run->io.size = size;
3992         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3993         vcpu->run->io.count = count;
3994         vcpu->run->io.port = port;
3995
3996         return 0;
3997 }
3998
3999 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4000                                     int size, unsigned short port, void *val,
4001                                     unsigned int count)
4002 {
4003         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4004         int ret;
4005
4006         if (vcpu->arch.pio.count)
4007                 goto data_avail;
4008
4009         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4010         if (ret) {
4011 data_avail:
4012                 memcpy(val, vcpu->arch.pio_data, size * count);
4013                 vcpu->arch.pio.count = 0;
4014                 return 1;
4015         }
4016
4017         return 0;
4018 }
4019
4020 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4021                                      int size, unsigned short port,
4022                                      const void *val, unsigned int count)
4023 {
4024         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4025
4026         memcpy(vcpu->arch.pio_data, val, size * count);
4027         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4028 }
4029
4030 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4031 {
4032         return kvm_x86_ops->get_segment_base(vcpu, seg);
4033 }
4034
4035 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4036 {
4037         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4038 }
4039
4040 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4041 {
4042         if (!need_emulate_wbinvd(vcpu))
4043                 return X86EMUL_CONTINUE;
4044
4045         if (kvm_x86_ops->has_wbinvd_exit()) {
4046                 int cpu = get_cpu();
4047
4048                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4049                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4050                                 wbinvd_ipi, NULL, 1);
4051                 put_cpu();
4052                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4053         } else
4054                 wbinvd();
4055         return X86EMUL_CONTINUE;
4056 }
4057 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4058
4059 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4060 {
4061         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4062 }
4063
4064 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4065 {
4066         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4067 }
4068
4069 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4070 {
4071
4072         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4073 }
4074
4075 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4076 {
4077         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4078 }
4079
4080 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4081 {
4082         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4083         unsigned long value;
4084
4085         switch (cr) {
4086         case 0:
4087                 value = kvm_read_cr0(vcpu);
4088                 break;
4089         case 2:
4090                 value = vcpu->arch.cr2;
4091                 break;
4092         case 3:
4093                 value = kvm_read_cr3(vcpu);
4094                 break;
4095         case 4:
4096                 value = kvm_read_cr4(vcpu);
4097                 break;
4098         case 8:
4099                 value = kvm_get_cr8(vcpu);
4100                 break;
4101         default:
4102                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4103                 return 0;
4104         }
4105
4106         return value;
4107 }
4108
4109 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4110 {
4111         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4112         int res = 0;
4113
4114         switch (cr) {
4115         case 0:
4116                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4117                 break;
4118         case 2:
4119                 vcpu->arch.cr2 = val;
4120                 break;
4121         case 3:
4122                 res = kvm_set_cr3(vcpu, val);
4123                 break;
4124         case 4:
4125                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4126                 break;
4127         case 8:
4128                 res = kvm_set_cr8(vcpu, val);
4129                 break;
4130         default:
4131                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4132                 res = -1;
4133         }
4134
4135         return res;
4136 }
4137
4138 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4139 {
4140         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4141 }
4142
4143 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4144 {
4145         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4146 }
4147
4148 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4149 {
4150         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4151 }
4152
4153 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4154 {
4155         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4156 }
4157
4158 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4159 {
4160         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4161 }
4162
4163 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4164 {
4165         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4166 }
4167
4168 static unsigned long emulator_get_cached_segment_base(
4169         struct x86_emulate_ctxt *ctxt, int seg)
4170 {
4171         return get_segment_base(emul_to_vcpu(ctxt), seg);
4172 }
4173
4174 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4175                                  struct desc_struct *desc, u32 *base3,
4176                                  int seg)
4177 {
4178         struct kvm_segment var;
4179
4180         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4181         *selector = var.selector;
4182
4183         if (var.unusable)
4184                 return false;
4185
4186         if (var.g)
4187                 var.limit >>= 12;
4188         set_desc_limit(desc, var.limit);
4189         set_desc_base(desc, (unsigned long)var.base);
4190 #ifdef CONFIG_X86_64
4191         if (base3)
4192                 *base3 = var.base >> 32;
4193 #endif
4194         desc->type = var.type;
4195         desc->s = var.s;
4196         desc->dpl = var.dpl;
4197         desc->p = var.present;
4198         desc->avl = var.avl;
4199         desc->l = var.l;
4200         desc->d = var.db;
4201         desc->g = var.g;
4202
4203         return true;
4204 }
4205
4206 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4207                                  struct desc_struct *desc, u32 base3,
4208                                  int seg)
4209 {
4210         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4211         struct kvm_segment var;
4212
4213         var.selector = selector;
4214         var.base = get_desc_base(desc);
4215 #ifdef CONFIG_X86_64
4216         var.base |= ((u64)base3) << 32;
4217 #endif
4218         var.limit = get_desc_limit(desc);
4219         if (desc->g)
4220                 var.limit = (var.limit << 12) | 0xfff;
4221         var.type = desc->type;
4222         var.present = desc->p;
4223         var.dpl = desc->dpl;
4224         var.db = desc->d;
4225         var.s = desc->s;
4226         var.l = desc->l;
4227         var.g = desc->g;
4228         var.avl = desc->avl;
4229         var.present = desc->p;
4230         var.unusable = !var.present;
4231         var.padding = 0;
4232
4233         kvm_set_segment(vcpu, &var, seg);
4234         return;
4235 }
4236
4237 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4238                             u32 msr_index, u64 *pdata)
4239 {
4240         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4241 }
4242
4243 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4244                             u32 msr_index, u64 data)
4245 {
4246         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4247 }
4248
4249 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4250                              u32 pmc, u64 *pdata)
4251 {
4252         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4253 }
4254
4255 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4256 {
4257         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4258 }
4259
4260 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4261 {
4262         preempt_disable();
4263         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4264         /*
4265          * CR0.TS may reference the host fpu state, not the guest fpu state,
4266          * so it may be clear at this point.
4267          */
4268         clts();
4269 }
4270
4271 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4272 {
4273         preempt_enable();
4274 }
4275
4276 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4277                               struct x86_instruction_info *info,
4278                               enum x86_intercept_stage stage)
4279 {
4280         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4281 }
4282
4283 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4284                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4285 {
4286         struct kvm_cpuid_entry2 *cpuid = NULL;
4287
4288         if (eax && ecx)
4289                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4290                                             *eax, *ecx);
4291
4292         if (cpuid) {
4293                 *eax = cpuid->eax;
4294                 *ecx = cpuid->ecx;
4295                 if (ebx)
4296                         *ebx = cpuid->ebx;
4297                 if (edx)
4298                         *edx = cpuid->edx;
4299                 return true;
4300         }
4301
4302         return false;
4303 }
4304
4305 static struct x86_emulate_ops emulate_ops = {
4306         .read_std            = kvm_read_guest_virt_system,
4307         .write_std           = kvm_write_guest_virt_system,
4308         .fetch               = kvm_fetch_guest_virt,
4309         .read_emulated       = emulator_read_emulated,
4310         .write_emulated      = emulator_write_emulated,
4311         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4312         .invlpg              = emulator_invlpg,
4313         .pio_in_emulated     = emulator_pio_in_emulated,
4314         .pio_out_emulated    = emulator_pio_out_emulated,
4315         .get_segment         = emulator_get_segment,
4316         .set_segment         = emulator_set_segment,
4317         .get_cached_segment_base = emulator_get_cached_segment_base,
4318         .get_gdt             = emulator_get_gdt,
4319         .get_idt             = emulator_get_idt,
4320         .set_gdt             = emulator_set_gdt,
4321         .set_idt             = emulator_set_idt,
4322         .get_cr              = emulator_get_cr,
4323         .set_cr              = emulator_set_cr,
4324         .set_rflags          = emulator_set_rflags,
4325         .cpl                 = emulator_get_cpl,
4326         .get_dr              = emulator_get_dr,
4327         .set_dr              = emulator_set_dr,
4328         .set_msr             = emulator_set_msr,
4329         .get_msr             = emulator_get_msr,
4330         .read_pmc            = emulator_read_pmc,
4331         .halt                = emulator_halt,
4332         .wbinvd              = emulator_wbinvd,
4333         .fix_hypercall       = emulator_fix_hypercall,
4334         .get_fpu             = emulator_get_fpu,
4335         .put_fpu             = emulator_put_fpu,
4336         .intercept           = emulator_intercept,
4337         .get_cpuid           = emulator_get_cpuid,
4338 };
4339
4340 static void cache_all_regs(struct kvm_vcpu *vcpu)
4341 {
4342         kvm_register_read(vcpu, VCPU_REGS_RAX);
4343         kvm_register_read(vcpu, VCPU_REGS_RSP);
4344         kvm_register_read(vcpu, VCPU_REGS_RIP);
4345         vcpu->arch.regs_dirty = ~0;
4346 }
4347
4348 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4349 {
4350         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4351         /*
4352          * an sti; sti; sequence only disable interrupts for the first
4353          * instruction. So, if the last instruction, be it emulated or
4354          * not, left the system with the INT_STI flag enabled, it
4355          * means that the last instruction is an sti. We should not
4356          * leave the flag on in this case. The same goes for mov ss
4357          */
4358         if (!(int_shadow & mask))
4359                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4360 }
4361
4362 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4363 {
4364         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4365         if (ctxt->exception.vector == PF_VECTOR)
4366                 kvm_propagate_fault(vcpu, &ctxt->exception);
4367         else if (ctxt->exception.error_code_valid)
4368                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4369                                       ctxt->exception.error_code);
4370         else
4371                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4372 }
4373
4374 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4375                               const unsigned long *regs)
4376 {
4377         memset(&ctxt->twobyte, 0,
4378                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4379         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4380
4381         ctxt->fetch.start = 0;
4382         ctxt->fetch.end = 0;
4383         ctxt->io_read.pos = 0;
4384         ctxt->io_read.end = 0;
4385         ctxt->mem_read.pos = 0;
4386         ctxt->mem_read.end = 0;
4387 }
4388
4389 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4390 {
4391         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4392         int cs_db, cs_l;
4393
4394         /*
4395          * TODO: fix emulate.c to use guest_read/write_register
4396          * instead of direct ->regs accesses, can save hundred cycles
4397          * on Intel for instructions that don't read/change RSP, for
4398          * for example.
4399          */
4400         cache_all_regs(vcpu);
4401
4402         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4403
4404         ctxt->eflags = kvm_get_rflags(vcpu);
4405         ctxt->eip = kvm_rip_read(vcpu);
4406         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4407                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4408                      cs_l                               ? X86EMUL_MODE_PROT64 :
4409                      cs_db                              ? X86EMUL_MODE_PROT32 :
4410                                                           X86EMUL_MODE_PROT16;
4411         ctxt->guest_mode = is_guest_mode(vcpu);
4412
4413         init_decode_cache(ctxt, vcpu->arch.regs);
4414         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4415 }
4416
4417 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4418 {
4419         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4420         int ret;
4421
4422         init_emulate_ctxt(vcpu);
4423
4424         ctxt->op_bytes = 2;
4425         ctxt->ad_bytes = 2;
4426         ctxt->_eip = ctxt->eip + inc_eip;
4427         ret = emulate_int_real(ctxt, irq);
4428
4429         if (ret != X86EMUL_CONTINUE)
4430                 return EMULATE_FAIL;
4431
4432         ctxt->eip = ctxt->_eip;
4433         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4434         kvm_rip_write(vcpu, ctxt->eip);
4435         kvm_set_rflags(vcpu, ctxt->eflags);
4436
4437         if (irq == NMI_VECTOR)
4438                 vcpu->arch.nmi_pending = 0;
4439         else
4440                 vcpu->arch.interrupt.pending = false;
4441
4442         return EMULATE_DONE;
4443 }
4444 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4445
4446 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4447 {
4448         int r = EMULATE_DONE;
4449
4450         ++vcpu->stat.insn_emulation_fail;
4451         trace_kvm_emulate_insn_failed(vcpu);
4452         if (!is_guest_mode(vcpu)) {
4453                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4454                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4455                 vcpu->run->internal.ndata = 0;
4456                 r = EMULATE_FAIL;
4457         }
4458         kvm_queue_exception(vcpu, UD_VECTOR);
4459
4460         return r;
4461 }
4462
4463 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4464 {
4465         gpa_t gpa;
4466
4467         if (tdp_enabled)
4468                 return false;
4469
4470         /*
4471          * if emulation was due to access to shadowed page table
4472          * and it failed try to unshadow page and re-entetr the
4473          * guest to let CPU execute the instruction.
4474          */
4475         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4476                 return true;
4477
4478         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4479
4480         if (gpa == UNMAPPED_GVA)
4481                 return true; /* let cpu generate fault */
4482
4483         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4484                 return true;
4485
4486         return false;
4487 }
4488
4489 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4490                               unsigned long cr2,  int emulation_type)
4491 {
4492         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4493         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4494
4495         last_retry_eip = vcpu->arch.last_retry_eip;
4496         last_retry_addr = vcpu->arch.last_retry_addr;
4497
4498         /*
4499          * If the emulation is caused by #PF and it is non-page_table
4500          * writing instruction, it means the VM-EXIT is caused by shadow
4501          * page protected, we can zap the shadow page and retry this
4502          * instruction directly.
4503          *
4504          * Note: if the guest uses a non-page-table modifying instruction
4505          * on the PDE that points to the instruction, then we will unmap
4506          * the instruction and go to an infinite loop. So, we cache the
4507          * last retried eip and the last fault address, if we meet the eip
4508          * and the address again, we can break out of the potential infinite
4509          * loop.
4510          */
4511         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4512
4513         if (!(emulation_type & EMULTYPE_RETRY))
4514                 return false;
4515
4516         if (x86_page_table_writing_insn(ctxt))
4517                 return false;
4518
4519         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4520                 return false;
4521
4522         vcpu->arch.last_retry_eip = ctxt->eip;
4523         vcpu->arch.last_retry_addr = cr2;
4524
4525         if (!vcpu->arch.mmu.direct_map)
4526                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4527
4528         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4529
4530         return true;
4531 }
4532
4533 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4534                             unsigned long cr2,
4535                             int emulation_type,
4536                             void *insn,
4537                             int insn_len)
4538 {
4539         int r;
4540         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4541         bool writeback = true;
4542
4543         kvm_clear_exception_queue(vcpu);
4544
4545         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4546                 init_emulate_ctxt(vcpu);
4547                 ctxt->interruptibility = 0;
4548                 ctxt->have_exception = false;
4549                 ctxt->perm_ok = false;
4550
4551                 ctxt->only_vendor_specific_insn
4552                         = emulation_type & EMULTYPE_TRAP_UD;
4553
4554                 r = x86_decode_insn(ctxt, insn, insn_len);
4555
4556                 trace_kvm_emulate_insn_start(vcpu);
4557                 ++vcpu->stat.insn_emulation;
4558                 if (r != EMULATION_OK)  {
4559                         if (emulation_type & EMULTYPE_TRAP_UD)
4560                                 return EMULATE_FAIL;
4561                         if (reexecute_instruction(vcpu, cr2))
4562                                 return EMULATE_DONE;
4563                         if (emulation_type & EMULTYPE_SKIP)
4564                                 return EMULATE_FAIL;
4565                         return handle_emulation_failure(vcpu);
4566                 }
4567         }
4568
4569         if (emulation_type & EMULTYPE_SKIP) {
4570                 kvm_rip_write(vcpu, ctxt->_eip);
4571                 return EMULATE_DONE;
4572         }
4573
4574         if (retry_instruction(ctxt, cr2, emulation_type))
4575                 return EMULATE_DONE;
4576
4577         /* this is needed for vmware backdoor interface to work since it
4578            changes registers values  during IO operation */
4579         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4580                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4581                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4582         }
4583
4584 restart:
4585         r = x86_emulate_insn(ctxt);
4586
4587         if (r == EMULATION_INTERCEPTED)
4588                 return EMULATE_DONE;
4589
4590         if (r == EMULATION_FAILED) {
4591                 if (reexecute_instruction(vcpu, cr2))
4592                         return EMULATE_DONE;
4593
4594                 return handle_emulation_failure(vcpu);
4595         }
4596
4597         if (ctxt->have_exception) {
4598                 inject_emulated_exception(vcpu);
4599                 r = EMULATE_DONE;
4600         } else if (vcpu->arch.pio.count) {
4601                 if (!vcpu->arch.pio.in)
4602                         vcpu->arch.pio.count = 0;
4603                 else
4604                         writeback = false;
4605                 r = EMULATE_DO_MMIO;
4606         } else if (vcpu->mmio_needed) {
4607                 if (!vcpu->mmio_is_write)
4608                         writeback = false;
4609                 r = EMULATE_DO_MMIO;
4610         } else if (r == EMULATION_RESTART)
4611                 goto restart;
4612         else
4613                 r = EMULATE_DONE;
4614
4615         if (writeback) {
4616                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4617                 kvm_set_rflags(vcpu, ctxt->eflags);
4618                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4619                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4620                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4621                 kvm_rip_write(vcpu, ctxt->eip);
4622         } else
4623                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4624
4625         return r;
4626 }
4627 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4628
4629 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4630 {
4631         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4632         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4633                                             size, port, &val, 1);
4634         /* do not return to emulator after return from userspace */
4635         vcpu->arch.pio.count = 0;
4636         return ret;
4637 }
4638 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4639
4640 static void tsc_bad(void *info)
4641 {
4642         __this_cpu_write(cpu_tsc_khz, 0);
4643 }
4644
4645 static void tsc_khz_changed(void *data)
4646 {
4647         struct cpufreq_freqs *freq = data;
4648         unsigned long khz = 0;
4649
4650         if (data)
4651                 khz = freq->new;
4652         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4653                 khz = cpufreq_quick_get(raw_smp_processor_id());
4654         if (!khz)
4655                 khz = tsc_khz;
4656         __this_cpu_write(cpu_tsc_khz, khz);
4657 }
4658
4659 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4660                                      void *data)
4661 {
4662         struct cpufreq_freqs *freq = data;
4663         struct kvm *kvm;
4664         struct kvm_vcpu *vcpu;
4665         int i, send_ipi = 0;
4666
4667         /*
4668          * We allow guests to temporarily run on slowing clocks,
4669          * provided we notify them after, or to run on accelerating
4670          * clocks, provided we notify them before.  Thus time never
4671          * goes backwards.
4672          *
4673          * However, we have a problem.  We can't atomically update
4674          * the frequency of a given CPU from this function; it is
4675          * merely a notifier, which can be called from any CPU.
4676          * Changing the TSC frequency at arbitrary points in time
4677          * requires a recomputation of local variables related to
4678          * the TSC for each VCPU.  We must flag these local variables
4679          * to be updated and be sure the update takes place with the
4680          * new frequency before any guests proceed.
4681          *
4682          * Unfortunately, the combination of hotplug CPU and frequency
4683          * change creates an intractable locking scenario; the order
4684          * of when these callouts happen is undefined with respect to
4685          * CPU hotplug, and they can race with each other.  As such,
4686          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4687          * undefined; you can actually have a CPU frequency change take
4688          * place in between the computation of X and the setting of the
4689          * variable.  To protect against this problem, all updates of
4690          * the per_cpu tsc_khz variable are done in an interrupt
4691          * protected IPI, and all callers wishing to update the value
4692          * must wait for a synchronous IPI to complete (which is trivial
4693          * if the caller is on the CPU already).  This establishes the
4694          * necessary total order on variable updates.
4695          *
4696          * Note that because a guest time update may take place
4697          * anytime after the setting of the VCPU's request bit, the
4698          * correct TSC value must be set before the request.  However,
4699          * to ensure the update actually makes it to any guest which
4700          * starts running in hardware virtualization between the set
4701          * and the acquisition of the spinlock, we must also ping the
4702          * CPU after setting the request bit.
4703          *
4704          */
4705
4706         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4707                 return 0;
4708         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4709                 return 0;
4710
4711         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4712
4713         raw_spin_lock(&kvm_lock);
4714         list_for_each_entry(kvm, &vm_list, vm_list) {
4715                 kvm_for_each_vcpu(i, vcpu, kvm) {
4716                         if (vcpu->cpu != freq->cpu)
4717                                 continue;
4718                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4719                         if (vcpu->cpu != smp_processor_id())
4720                                 send_ipi = 1;
4721                 }
4722         }
4723         raw_spin_unlock(&kvm_lock);
4724
4725         if (freq->old < freq->new && send_ipi) {
4726                 /*
4727                  * We upscale the frequency.  Must make the guest
4728                  * doesn't see old kvmclock values while running with
4729                  * the new frequency, otherwise we risk the guest sees
4730                  * time go backwards.
4731                  *
4732                  * In case we update the frequency for another cpu
4733                  * (which might be in guest context) send an interrupt
4734                  * to kick the cpu out of guest context.  Next time
4735                  * guest context is entered kvmclock will be updated,
4736                  * so the guest will not see stale values.
4737                  */
4738                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4739         }
4740         return 0;
4741 }
4742
4743 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4744         .notifier_call  = kvmclock_cpufreq_notifier
4745 };
4746
4747 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4748                                         unsigned long action, void *hcpu)
4749 {
4750         unsigned int cpu = (unsigned long)hcpu;
4751
4752         switch (action) {
4753                 case CPU_ONLINE:
4754                 case CPU_DOWN_FAILED:
4755                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4756                         break;
4757                 case CPU_DOWN_PREPARE:
4758                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4759                         break;
4760         }
4761         return NOTIFY_OK;
4762 }
4763
4764 static struct notifier_block kvmclock_cpu_notifier_block = {
4765         .notifier_call  = kvmclock_cpu_notifier,
4766         .priority = -INT_MAX
4767 };
4768
4769 static void kvm_timer_init(void)
4770 {
4771         int cpu;
4772
4773         max_tsc_khz = tsc_khz;
4774         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4775         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4776 #ifdef CONFIG_CPU_FREQ
4777                 struct cpufreq_policy policy;
4778                 memset(&policy, 0, sizeof(policy));
4779                 cpu = get_cpu();
4780                 cpufreq_get_policy(&policy, cpu);
4781                 if (policy.cpuinfo.max_freq)
4782                         max_tsc_khz = policy.cpuinfo.max_freq;
4783                 put_cpu();
4784 #endif
4785                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4786                                           CPUFREQ_TRANSITION_NOTIFIER);
4787         }
4788         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4789         for_each_online_cpu(cpu)
4790                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4791 }
4792
4793 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4794
4795 int kvm_is_in_guest(void)
4796 {
4797         return __this_cpu_read(current_vcpu) != NULL;
4798 }
4799
4800 static int kvm_is_user_mode(void)
4801 {
4802         int user_mode = 3;
4803
4804         if (__this_cpu_read(current_vcpu))
4805                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4806
4807         return user_mode != 0;
4808 }
4809
4810 static unsigned long kvm_get_guest_ip(void)
4811 {
4812         unsigned long ip = 0;
4813
4814         if (__this_cpu_read(current_vcpu))
4815                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4816
4817         return ip;
4818 }
4819
4820 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4821         .is_in_guest            = kvm_is_in_guest,
4822         .is_user_mode           = kvm_is_user_mode,
4823         .get_guest_ip           = kvm_get_guest_ip,
4824 };
4825
4826 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4827 {
4828         __this_cpu_write(current_vcpu, vcpu);
4829 }
4830 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4831
4832 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4833 {
4834         __this_cpu_write(current_vcpu, NULL);
4835 }
4836 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4837
4838 static void kvm_set_mmio_spte_mask(void)
4839 {
4840         u64 mask;
4841         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4842
4843         /*
4844          * Set the reserved bits and the present bit of an paging-structure
4845          * entry to generate page fault with PFER.RSV = 1.
4846          */
4847         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4848         mask |= 1ull;
4849
4850 #ifdef CONFIG_X86_64
4851         /*
4852          * If reserved bit is not supported, clear the present bit to disable
4853          * mmio page fault.
4854          */
4855         if (maxphyaddr == 52)
4856                 mask &= ~1ull;
4857 #endif
4858
4859         kvm_mmu_set_mmio_spte_mask(mask);
4860 }
4861
4862 int kvm_arch_init(void *opaque)
4863 {
4864         int r;
4865         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4866
4867         if (kvm_x86_ops) {
4868                 printk(KERN_ERR "kvm: already loaded the other module\n");
4869                 r = -EEXIST;
4870                 goto out;
4871         }
4872
4873         if (!ops->cpu_has_kvm_support()) {
4874                 printk(KERN_ERR "kvm: no hardware support\n");
4875                 r = -EOPNOTSUPP;
4876                 goto out;
4877         }
4878         if (ops->disabled_by_bios()) {
4879                 printk(KERN_ERR "kvm: disabled by bios\n");
4880                 r = -EOPNOTSUPP;
4881                 goto out;
4882         }
4883
4884         r = kvm_mmu_module_init();
4885         if (r)
4886                 goto out;
4887
4888         kvm_set_mmio_spte_mask();
4889         kvm_init_msr_list();
4890
4891         kvm_x86_ops = ops;
4892         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4893                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4894
4895         kvm_timer_init();
4896
4897         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4898
4899         if (cpu_has_xsave)
4900                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4901
4902         return 0;
4903
4904 out:
4905         return r;
4906 }
4907
4908 void kvm_arch_exit(void)
4909 {
4910         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4911
4912         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4913                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4914                                             CPUFREQ_TRANSITION_NOTIFIER);
4915         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4916         kvm_x86_ops = NULL;
4917         kvm_mmu_module_exit();
4918 }
4919
4920 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4921 {
4922         ++vcpu->stat.halt_exits;
4923         if (irqchip_in_kernel(vcpu->kvm)) {
4924                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4925                 return 1;
4926         } else {
4927                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4928                 return 0;
4929         }
4930 }
4931 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4932
4933 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4934 {
4935         u64 param, ingpa, outgpa, ret;
4936         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4937         bool fast, longmode;
4938         int cs_db, cs_l;
4939
4940         /*
4941          * hypercall generates UD from non zero cpl and real mode
4942          * per HYPER-V spec
4943          */
4944         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4945                 kvm_queue_exception(vcpu, UD_VECTOR);
4946                 return 0;
4947         }
4948
4949         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4950         longmode = is_long_mode(vcpu) && cs_l == 1;
4951
4952         if (!longmode) {
4953                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4954                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4955                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4956                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4957                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4958                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4959         }
4960 #ifdef CONFIG_X86_64
4961         else {
4962                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4963                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4964                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4965         }
4966 #endif
4967
4968         code = param & 0xffff;
4969         fast = (param >> 16) & 0x1;
4970         rep_cnt = (param >> 32) & 0xfff;
4971         rep_idx = (param >> 48) & 0xfff;
4972
4973         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4974
4975         switch (code) {
4976         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4977                 kvm_vcpu_on_spin(vcpu);
4978                 break;
4979         default:
4980                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4981                 break;
4982         }
4983
4984         ret = res | (((u64)rep_done & 0xfff) << 32);
4985         if (longmode) {
4986                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4987         } else {
4988                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4989                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4990         }
4991
4992         return 1;
4993 }
4994
4995 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4996 {
4997         unsigned long nr, a0, a1, a2, a3, ret;
4998         int r = 1;
4999
5000         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5001                 return kvm_hv_hypercall(vcpu);
5002
5003         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5004         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5005         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5006         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5007         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5008
5009         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5010
5011         if (!is_long_mode(vcpu)) {
5012                 nr &= 0xFFFFFFFF;
5013                 a0 &= 0xFFFFFFFF;
5014                 a1 &= 0xFFFFFFFF;
5015                 a2 &= 0xFFFFFFFF;
5016                 a3 &= 0xFFFFFFFF;
5017         }
5018
5019         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5020                 ret = -KVM_EPERM;
5021                 goto out;
5022         }
5023
5024         switch (nr) {
5025         case KVM_HC_VAPIC_POLL_IRQ:
5026                 ret = 0;
5027                 break;
5028         default:
5029                 ret = -KVM_ENOSYS;
5030                 break;
5031         }
5032 out:
5033         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5034         ++vcpu->stat.hypercalls;
5035         return r;
5036 }
5037 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5038
5039 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5040 {
5041         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5042         char instruction[3];
5043         unsigned long rip = kvm_rip_read(vcpu);
5044
5045         /*
5046          * Blow out the MMU to ensure that no other VCPU has an active mapping
5047          * to ensure that the updated hypercall appears atomically across all
5048          * VCPUs.
5049          */
5050         kvm_mmu_zap_all(vcpu->kvm);
5051
5052         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5053
5054         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5055 }
5056
5057 /*
5058  * Check if userspace requested an interrupt window, and that the
5059  * interrupt window is open.
5060  *
5061  * No need to exit to userspace if we already have an interrupt queued.
5062  */
5063 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5064 {
5065         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5066                 vcpu->run->request_interrupt_window &&
5067                 kvm_arch_interrupt_allowed(vcpu));
5068 }
5069
5070 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5071 {
5072         struct kvm_run *kvm_run = vcpu->run;
5073
5074         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5075         kvm_run->cr8 = kvm_get_cr8(vcpu);
5076         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5077         if (irqchip_in_kernel(vcpu->kvm))
5078                 kvm_run->ready_for_interrupt_injection = 1;
5079         else
5080                 kvm_run->ready_for_interrupt_injection =
5081                         kvm_arch_interrupt_allowed(vcpu) &&
5082                         !kvm_cpu_has_interrupt(vcpu) &&
5083                         !kvm_event_needs_reinjection(vcpu);
5084 }
5085
5086 static void vapic_enter(struct kvm_vcpu *vcpu)
5087 {
5088         struct kvm_lapic *apic = vcpu->arch.apic;
5089         struct page *page;
5090
5091         if (!apic || !apic->vapic_addr)
5092                 return;
5093
5094         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5095
5096         vcpu->arch.apic->vapic_page = page;
5097 }
5098
5099 static void vapic_exit(struct kvm_vcpu *vcpu)
5100 {
5101         struct kvm_lapic *apic = vcpu->arch.apic;
5102         int idx;
5103
5104         if (!apic || !apic->vapic_addr)
5105                 return;
5106
5107         idx = srcu_read_lock(&vcpu->kvm->srcu);
5108         kvm_release_page_dirty(apic->vapic_page);
5109         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5110         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5111 }
5112
5113 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5114 {
5115         int max_irr, tpr;
5116
5117         if (!kvm_x86_ops->update_cr8_intercept)
5118                 return;
5119
5120         if (!vcpu->arch.apic)
5121                 return;
5122
5123         if (!vcpu->arch.apic->vapic_addr)
5124                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5125         else
5126                 max_irr = -1;
5127
5128         if (max_irr != -1)
5129                 max_irr >>= 4;
5130
5131         tpr = kvm_lapic_get_cr8(vcpu);
5132
5133         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5134 }
5135
5136 static void inject_pending_event(struct kvm_vcpu *vcpu)
5137 {
5138         /* try to reinject previous events if any */
5139         if (vcpu->arch.exception.pending) {
5140                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5141                                         vcpu->arch.exception.has_error_code,
5142                                         vcpu->arch.exception.error_code);
5143                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5144                                           vcpu->arch.exception.has_error_code,
5145                                           vcpu->arch.exception.error_code,
5146                                           vcpu->arch.exception.reinject);
5147                 return;
5148         }
5149
5150         if (vcpu->arch.nmi_injected) {
5151                 kvm_x86_ops->set_nmi(vcpu);
5152                 return;
5153         }
5154
5155         if (vcpu->arch.interrupt.pending) {
5156                 kvm_x86_ops->set_irq(vcpu);
5157                 return;
5158         }
5159
5160         /* try to inject new event if pending */
5161         if (vcpu->arch.nmi_pending) {
5162                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5163                         --vcpu->arch.nmi_pending;
5164                         vcpu->arch.nmi_injected = true;
5165                         kvm_x86_ops->set_nmi(vcpu);
5166                 }
5167         } else if (kvm_cpu_has_interrupt(vcpu)) {
5168                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5169                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5170                                             false);
5171                         kvm_x86_ops->set_irq(vcpu);
5172                 }
5173         }
5174 }
5175
5176 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5177 {
5178         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5179                         !vcpu->guest_xcr0_loaded) {
5180                 /* kvm_set_xcr() also depends on this */
5181                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5182                 vcpu->guest_xcr0_loaded = 1;
5183         }
5184 }
5185
5186 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5187 {
5188         if (vcpu->guest_xcr0_loaded) {
5189                 if (vcpu->arch.xcr0 != host_xcr0)
5190                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5191                 vcpu->guest_xcr0_loaded = 0;
5192         }
5193 }
5194
5195 static void process_nmi(struct kvm_vcpu *vcpu)
5196 {
5197         unsigned limit = 2;
5198
5199         /*
5200          * x86 is limited to one NMI running, and one NMI pending after it.
5201          * If an NMI is already in progress, limit further NMIs to just one.
5202          * Otherwise, allow two (and we'll inject the first one immediately).
5203          */
5204         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5205                 limit = 1;
5206
5207         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5208         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5209         kvm_make_request(KVM_REQ_EVENT, vcpu);
5210 }
5211
5212 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5213 {
5214         int r;
5215         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5216                 vcpu->run->request_interrupt_window;
5217         bool req_immediate_exit = 0;
5218
5219         if (vcpu->requests) {
5220                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5221                         kvm_mmu_unload(vcpu);
5222                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5223                         __kvm_migrate_timers(vcpu);
5224                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5225                         r = kvm_guest_time_update(vcpu);
5226                         if (unlikely(r))
5227                                 goto out;
5228                 }
5229                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5230                         kvm_mmu_sync_roots(vcpu);
5231                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5232                         kvm_x86_ops->tlb_flush(vcpu);
5233                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5234                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5235                         r = 0;
5236                         goto out;
5237                 }
5238                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5239                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5240                         r = 0;
5241                         goto out;
5242                 }
5243                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5244                         vcpu->fpu_active = 0;
5245                         kvm_x86_ops->fpu_deactivate(vcpu);
5246                 }
5247                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5248                         /* Page is swapped out. Do synthetic halt */
5249                         vcpu->arch.apf.halted = true;
5250                         r = 1;
5251                         goto out;
5252                 }
5253                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5254                         record_steal_time(vcpu);
5255                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5256                         process_nmi(vcpu);
5257                 req_immediate_exit =
5258                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5259                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5260                         kvm_handle_pmu_event(vcpu);
5261                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5262                         kvm_deliver_pmi(vcpu);
5263         }
5264
5265         r = kvm_mmu_reload(vcpu);
5266         if (unlikely(r))
5267                 goto out;
5268
5269         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5270                 inject_pending_event(vcpu);
5271
5272                 /* enable NMI/IRQ window open exits if needed */
5273                 if (vcpu->arch.nmi_pending)
5274                         kvm_x86_ops->enable_nmi_window(vcpu);
5275                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5276                         kvm_x86_ops->enable_irq_window(vcpu);
5277
5278                 if (kvm_lapic_enabled(vcpu)) {
5279                         update_cr8_intercept(vcpu);
5280                         kvm_lapic_sync_to_vapic(vcpu);
5281                 }
5282         }
5283
5284         preempt_disable();
5285
5286         kvm_x86_ops->prepare_guest_switch(vcpu);
5287         if (vcpu->fpu_active)
5288                 kvm_load_guest_fpu(vcpu);
5289         kvm_load_guest_xcr0(vcpu);
5290
5291         vcpu->mode = IN_GUEST_MODE;
5292
5293         /* We should set ->mode before check ->requests,
5294          * see the comment in make_all_cpus_request.
5295          */
5296         smp_mb();
5297
5298         local_irq_disable();
5299
5300         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5301             || need_resched() || signal_pending(current)) {
5302                 vcpu->mode = OUTSIDE_GUEST_MODE;
5303                 smp_wmb();
5304                 local_irq_enable();
5305                 preempt_enable();
5306                 kvm_x86_ops->cancel_injection(vcpu);
5307                 r = 1;
5308                 goto out;
5309         }
5310
5311         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5312
5313         if (req_immediate_exit)
5314                 smp_send_reschedule(vcpu->cpu);
5315
5316         kvm_guest_enter();
5317
5318         if (unlikely(vcpu->arch.switch_db_regs)) {
5319                 set_debugreg(0, 7);
5320                 set_debugreg(vcpu->arch.eff_db[0], 0);
5321                 set_debugreg(vcpu->arch.eff_db[1], 1);
5322                 set_debugreg(vcpu->arch.eff_db[2], 2);
5323                 set_debugreg(vcpu->arch.eff_db[3], 3);
5324         }
5325
5326         trace_kvm_entry(vcpu->vcpu_id);
5327         kvm_x86_ops->run(vcpu);
5328
5329         /*
5330          * If the guest has used debug registers, at least dr7
5331          * will be disabled while returning to the host.
5332          * If we don't have active breakpoints in the host, we don't
5333          * care about the messed up debug address registers. But if
5334          * we have some of them active, restore the old state.
5335          */
5336         if (hw_breakpoint_active())
5337                 hw_breakpoint_restore();
5338
5339         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5340
5341         vcpu->mode = OUTSIDE_GUEST_MODE;
5342         smp_wmb();
5343         local_irq_enable();
5344
5345         ++vcpu->stat.exits;
5346
5347         /*
5348          * We must have an instruction between local_irq_enable() and
5349          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5350          * the interrupt shadow.  The stat.exits increment will do nicely.
5351          * But we need to prevent reordering, hence this barrier():
5352          */
5353         barrier();
5354
5355         kvm_guest_exit();
5356
5357         preempt_enable();
5358
5359         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5360
5361         /*
5362          * Profile KVM exit RIPs:
5363          */
5364         if (unlikely(prof_on == KVM_PROFILING)) {
5365                 unsigned long rip = kvm_rip_read(vcpu);
5366                 profile_hit(KVM_PROFILING, (void *)rip);
5367         }
5368
5369         if (unlikely(vcpu->arch.tsc_always_catchup))
5370                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5371
5372         kvm_lapic_sync_from_vapic(vcpu);
5373
5374         r = kvm_x86_ops->handle_exit(vcpu);
5375 out:
5376         return r;
5377 }
5378
5379
5380 static int __vcpu_run(struct kvm_vcpu *vcpu)
5381 {
5382         int r;
5383         struct kvm *kvm = vcpu->kvm;
5384
5385         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5386                 pr_debug("vcpu %d received sipi with vector # %x\n",
5387                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5388                 kvm_lapic_reset(vcpu);
5389                 r = kvm_arch_vcpu_reset(vcpu);
5390                 if (r)
5391                         return r;
5392                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5393         }
5394
5395         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5396         vapic_enter(vcpu);
5397
5398         r = 1;
5399         while (r > 0) {
5400                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5401                     !vcpu->arch.apf.halted)
5402                         r = vcpu_enter_guest(vcpu);
5403                 else {
5404                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5405                         kvm_vcpu_block(vcpu);
5406                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5407                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5408                         {
5409                                 switch(vcpu->arch.mp_state) {
5410                                 case KVM_MP_STATE_HALTED:
5411                                         vcpu->arch.mp_state =
5412                                                 KVM_MP_STATE_RUNNABLE;
5413                                 case KVM_MP_STATE_RUNNABLE:
5414                                         vcpu->arch.apf.halted = false;
5415                                         break;
5416                                 case KVM_MP_STATE_SIPI_RECEIVED:
5417                                 default:
5418                                         r = -EINTR;
5419                                         break;
5420                                 }
5421                         }
5422                 }
5423
5424                 if (r <= 0)
5425                         break;
5426
5427                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5428                 if (kvm_cpu_has_pending_timer(vcpu))
5429                         kvm_inject_pending_timer_irqs(vcpu);
5430
5431                 if (dm_request_for_irq_injection(vcpu)) {
5432                         r = -EINTR;
5433                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5434                         ++vcpu->stat.request_irq_exits;
5435                 }
5436
5437                 kvm_check_async_pf_completion(vcpu);
5438
5439                 if (signal_pending(current)) {
5440                         r = -EINTR;
5441                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5442                         ++vcpu->stat.signal_exits;
5443                 }
5444                 if (need_resched()) {
5445                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5446                         kvm_resched(vcpu);
5447                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5448                 }
5449         }
5450
5451         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5452
5453         vapic_exit(vcpu);
5454
5455         return r;
5456 }
5457
5458 static int complete_mmio(struct kvm_vcpu *vcpu)
5459 {
5460         struct kvm_run *run = vcpu->run;
5461         int r;
5462
5463         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5464                 return 1;
5465
5466         if (vcpu->mmio_needed) {
5467                 vcpu->mmio_needed = 0;
5468                 if (!vcpu->mmio_is_write)
5469                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5470                                run->mmio.data, 8);
5471                 vcpu->mmio_index += 8;
5472                 if (vcpu->mmio_index < vcpu->mmio_size) {
5473                         run->exit_reason = KVM_EXIT_MMIO;
5474                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5475                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5476                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5477                         run->mmio.is_write = vcpu->mmio_is_write;
5478                         vcpu->mmio_needed = 1;
5479                         return 0;
5480                 }
5481                 if (vcpu->mmio_is_write)
5482                         return 1;
5483                 vcpu->mmio_read_completed = 1;
5484         }
5485         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5486         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5487         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5488         if (r != EMULATE_DONE)
5489                 return 0;
5490         return 1;
5491 }
5492
5493 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5494 {
5495         int r;
5496         sigset_t sigsaved;
5497
5498         if (!tsk_used_math(current) && init_fpu(current))
5499                 return -ENOMEM;
5500
5501         if (vcpu->sigset_active)
5502                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5503
5504         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5505                 kvm_vcpu_block(vcpu);
5506                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5507                 r = -EAGAIN;
5508                 goto out;
5509         }
5510
5511         /* re-sync apic's tpr */
5512         if (!irqchip_in_kernel(vcpu->kvm)) {
5513                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5514                         r = -EINVAL;
5515                         goto out;
5516                 }
5517         }
5518
5519         r = complete_mmio(vcpu);
5520         if (r <= 0)
5521                 goto out;
5522
5523         r = __vcpu_run(vcpu);
5524
5525 out:
5526         post_kvm_run_save(vcpu);
5527         if (vcpu->sigset_active)
5528                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5529
5530         return r;
5531 }
5532
5533 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5534 {
5535         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5536                 /*
5537                  * We are here if userspace calls get_regs() in the middle of
5538                  * instruction emulation. Registers state needs to be copied
5539                  * back from emulation context to vcpu. Usrapace shouldn't do
5540                  * that usually, but some bad designed PV devices (vmware
5541                  * backdoor interface) need this to work
5542                  */
5543                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5544                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5545                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5546         }
5547         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5548         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5549         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5550         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5551         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5552         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5553         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5554         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5555 #ifdef CONFIG_X86_64
5556         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5557         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5558         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5559         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5560         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5561         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5562         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5563         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5564 #endif
5565
5566         regs->rip = kvm_rip_read(vcpu);
5567         regs->rflags = kvm_get_rflags(vcpu);
5568
5569         return 0;
5570 }
5571
5572 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5573 {
5574         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5575         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5576
5577         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5578         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5579         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5580         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5581         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5582         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5583         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5584         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5585 #ifdef CONFIG_X86_64
5586         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5587         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5588         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5589         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5590         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5591         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5592         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5593         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5594 #endif
5595
5596         kvm_rip_write(vcpu, regs->rip);
5597         kvm_set_rflags(vcpu, regs->rflags);
5598
5599         vcpu->arch.exception.pending = false;
5600
5601         kvm_make_request(KVM_REQ_EVENT, vcpu);
5602
5603         return 0;
5604 }
5605
5606 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5607 {
5608         struct kvm_segment cs;
5609
5610         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5611         *db = cs.db;
5612         *l = cs.l;
5613 }
5614 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5615
5616 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5617                                   struct kvm_sregs *sregs)
5618 {
5619         struct desc_ptr dt;
5620
5621         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5622         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5623         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5624         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5625         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5626         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5627
5628         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5629         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5630
5631         kvm_x86_ops->get_idt(vcpu, &dt);
5632         sregs->idt.limit = dt.size;
5633         sregs->idt.base = dt.address;
5634         kvm_x86_ops->get_gdt(vcpu, &dt);
5635         sregs->gdt.limit = dt.size;
5636         sregs->gdt.base = dt.address;
5637
5638         sregs->cr0 = kvm_read_cr0(vcpu);
5639         sregs->cr2 = vcpu->arch.cr2;
5640         sregs->cr3 = kvm_read_cr3(vcpu);
5641         sregs->cr4 = kvm_read_cr4(vcpu);
5642         sregs->cr8 = kvm_get_cr8(vcpu);
5643         sregs->efer = vcpu->arch.efer;
5644         sregs->apic_base = kvm_get_apic_base(vcpu);
5645
5646         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5647
5648         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5649                 set_bit(vcpu->arch.interrupt.nr,
5650                         (unsigned long *)sregs->interrupt_bitmap);
5651
5652         return 0;
5653 }
5654
5655 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5656                                     struct kvm_mp_state *mp_state)
5657 {
5658         mp_state->mp_state = vcpu->arch.mp_state;
5659         return 0;
5660 }
5661
5662 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5663                                     struct kvm_mp_state *mp_state)
5664 {
5665         vcpu->arch.mp_state = mp_state->mp_state;
5666         kvm_make_request(KVM_REQ_EVENT, vcpu);
5667         return 0;
5668 }
5669
5670 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
5671                     int reason, bool has_error_code, u32 error_code)
5672 {
5673         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5674         int ret;
5675
5676         init_emulate_ctxt(vcpu);
5677
5678         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
5679                                    has_error_code, error_code);
5680
5681         if (ret)
5682                 return EMULATE_FAIL;
5683
5684         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5685         kvm_rip_write(vcpu, ctxt->eip);
5686         kvm_set_rflags(vcpu, ctxt->eflags);
5687         kvm_make_request(KVM_REQ_EVENT, vcpu);
5688         return EMULATE_DONE;
5689 }
5690 EXPORT_SYMBOL_GPL(kvm_task_switch);
5691
5692 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5693                                   struct kvm_sregs *sregs)
5694 {
5695         int mmu_reset_needed = 0;
5696         int pending_vec, max_bits, idx;
5697         struct desc_ptr dt;
5698
5699         dt.size = sregs->idt.limit;
5700         dt.address = sregs->idt.base;
5701         kvm_x86_ops->set_idt(vcpu, &dt);
5702         dt.size = sregs->gdt.limit;
5703         dt.address = sregs->gdt.base;
5704         kvm_x86_ops->set_gdt(vcpu, &dt);
5705
5706         vcpu->arch.cr2 = sregs->cr2;
5707         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5708         vcpu->arch.cr3 = sregs->cr3;
5709         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5710
5711         kvm_set_cr8(vcpu, sregs->cr8);
5712
5713         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5714         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5715         kvm_set_apic_base(vcpu, sregs->apic_base);
5716
5717         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5718         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5719         vcpu->arch.cr0 = sregs->cr0;
5720
5721         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5722         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5723         if (sregs->cr4 & X86_CR4_OSXSAVE)
5724                 kvm_update_cpuid(vcpu);
5725
5726         idx = srcu_read_lock(&vcpu->kvm->srcu);
5727         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5728                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5729                 mmu_reset_needed = 1;
5730         }
5731         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5732
5733         if (mmu_reset_needed)
5734                 kvm_mmu_reset_context(vcpu);
5735
5736         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5737         pending_vec = find_first_bit(
5738                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5739         if (pending_vec < max_bits) {
5740                 kvm_queue_interrupt(vcpu, pending_vec, false);
5741                 pr_debug("Set back pending irq %d\n", pending_vec);
5742         }
5743
5744         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5745         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5746         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5747         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5748         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5749         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5750
5751         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5752         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5753
5754         update_cr8_intercept(vcpu);
5755
5756         /* Older userspace won't unhalt the vcpu on reset. */
5757         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5758             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5759             !is_protmode(vcpu))
5760                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5761
5762         kvm_make_request(KVM_REQ_EVENT, vcpu);
5763
5764         return 0;
5765 }
5766
5767 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5768                                         struct kvm_guest_debug *dbg)
5769 {
5770         unsigned long rflags;
5771         int i, r;
5772
5773         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5774                 r = -EBUSY;
5775                 if (vcpu->arch.exception.pending)
5776                         goto out;
5777                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5778                         kvm_queue_exception(vcpu, DB_VECTOR);
5779                 else
5780                         kvm_queue_exception(vcpu, BP_VECTOR);
5781         }
5782
5783         /*
5784          * Read rflags as long as potentially injected trace flags are still
5785          * filtered out.
5786          */
5787         rflags = kvm_get_rflags(vcpu);
5788
5789         vcpu->guest_debug = dbg->control;
5790         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5791                 vcpu->guest_debug = 0;
5792
5793         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5794                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5795                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5796                 vcpu->arch.switch_db_regs =
5797                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5798         } else {
5799                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5800                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5801                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5802         }
5803
5804         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5805                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5806                         get_segment_base(vcpu, VCPU_SREG_CS);
5807
5808         /*
5809          * Trigger an rflags update that will inject or remove the trace
5810          * flags.
5811          */
5812         kvm_set_rflags(vcpu, rflags);
5813
5814         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5815
5816         r = 0;
5817
5818 out:
5819
5820         return r;
5821 }
5822
5823 /*
5824  * Translate a guest virtual address to a guest physical address.
5825  */
5826 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5827                                     struct kvm_translation *tr)
5828 {
5829         unsigned long vaddr = tr->linear_address;
5830         gpa_t gpa;
5831         int idx;
5832
5833         idx = srcu_read_lock(&vcpu->kvm->srcu);
5834         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5835         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5836         tr->physical_address = gpa;
5837         tr->valid = gpa != UNMAPPED_GVA;
5838         tr->writeable = 1;
5839         tr->usermode = 0;
5840
5841         return 0;
5842 }
5843
5844 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5845 {
5846         struct i387_fxsave_struct *fxsave =
5847                         &vcpu->arch.guest_fpu.state->fxsave;
5848
5849         memcpy(fpu->fpr, fxsave->st_space, 128);
5850         fpu->fcw = fxsave->cwd;
5851         fpu->fsw = fxsave->swd;
5852         fpu->ftwx = fxsave->twd;
5853         fpu->last_opcode = fxsave->fop;
5854         fpu->last_ip = fxsave->rip;
5855         fpu->last_dp = fxsave->rdp;
5856         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5857
5858         return 0;
5859 }
5860
5861 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5862 {
5863         struct i387_fxsave_struct *fxsave =
5864                         &vcpu->arch.guest_fpu.state->fxsave;
5865
5866         memcpy(fxsave->st_space, fpu->fpr, 128);
5867         fxsave->cwd = fpu->fcw;
5868         fxsave->swd = fpu->fsw;
5869         fxsave->twd = fpu->ftwx;
5870         fxsave->fop = fpu->last_opcode;
5871         fxsave->rip = fpu->last_ip;
5872         fxsave->rdp = fpu->last_dp;
5873         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5874
5875         return 0;
5876 }
5877
5878 int fx_init(struct kvm_vcpu *vcpu)
5879 {
5880         int err;
5881
5882         err = fpu_alloc(&vcpu->arch.guest_fpu);
5883         if (err)
5884                 return err;
5885
5886         fpu_finit(&vcpu->arch.guest_fpu);
5887
5888         /*
5889          * Ensure guest xcr0 is valid for loading
5890          */
5891         vcpu->arch.xcr0 = XSTATE_FP;
5892
5893         vcpu->arch.cr0 |= X86_CR0_ET;
5894
5895         return 0;
5896 }
5897 EXPORT_SYMBOL_GPL(fx_init);
5898
5899 static void fx_free(struct kvm_vcpu *vcpu)
5900 {
5901         fpu_free(&vcpu->arch.guest_fpu);
5902 }
5903
5904 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5905 {
5906         if (vcpu->guest_fpu_loaded)
5907                 return;
5908
5909         /*
5910          * Restore all possible states in the guest,
5911          * and assume host would use all available bits.
5912          * Guest xcr0 would be loaded later.
5913          */
5914         kvm_put_guest_xcr0(vcpu);
5915         vcpu->guest_fpu_loaded = 1;
5916         unlazy_fpu(current);
5917         fpu_restore_checking(&vcpu->arch.guest_fpu);
5918         trace_kvm_fpu(1);
5919 }
5920
5921 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5922 {
5923         kvm_put_guest_xcr0(vcpu);
5924
5925         if (!vcpu->guest_fpu_loaded)
5926                 return;
5927
5928         vcpu->guest_fpu_loaded = 0;
5929         fpu_save_init(&vcpu->arch.guest_fpu);
5930         ++vcpu->stat.fpu_reload;
5931         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5932         trace_kvm_fpu(0);
5933 }
5934
5935 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5936 {
5937         kvmclock_reset(vcpu);
5938
5939         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5940         fx_free(vcpu);
5941         kvm_x86_ops->vcpu_free(vcpu);
5942 }
5943
5944 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5945                                                 unsigned int id)
5946 {
5947         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5948                 printk_once(KERN_WARNING
5949                 "kvm: SMP vm created on host with unstable TSC; "
5950                 "guest TSC will not be reliable\n");
5951         return kvm_x86_ops->vcpu_create(kvm, id);
5952 }
5953
5954 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5955 {
5956         int r;
5957
5958         vcpu->arch.mtrr_state.have_fixed = 1;
5959         vcpu_load(vcpu);
5960         r = kvm_arch_vcpu_reset(vcpu);
5961         if (r == 0)
5962                 r = kvm_mmu_setup(vcpu);
5963         vcpu_put(vcpu);
5964
5965         return r;
5966 }
5967
5968 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5969 {
5970         vcpu->arch.apf.msr_val = 0;
5971
5972         vcpu_load(vcpu);
5973         kvm_mmu_unload(vcpu);
5974         vcpu_put(vcpu);
5975
5976         fx_free(vcpu);
5977         kvm_x86_ops->vcpu_free(vcpu);
5978 }
5979
5980 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5981 {
5982         atomic_set(&vcpu->arch.nmi_queued, 0);
5983         vcpu->arch.nmi_pending = 0;
5984         vcpu->arch.nmi_injected = false;
5985
5986         vcpu->arch.switch_db_regs = 0;
5987         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5988         vcpu->arch.dr6 = DR6_FIXED_1;
5989         vcpu->arch.dr7 = DR7_FIXED_1;
5990
5991         kvm_make_request(KVM_REQ_EVENT, vcpu);
5992         vcpu->arch.apf.msr_val = 0;
5993         vcpu->arch.st.msr_val = 0;
5994
5995         kvmclock_reset(vcpu);
5996
5997         kvm_clear_async_pf_completion_queue(vcpu);
5998         kvm_async_pf_hash_reset(vcpu);
5999         vcpu->arch.apf.halted = false;
6000
6001         kvm_pmu_reset(vcpu);
6002
6003         return kvm_x86_ops->vcpu_reset(vcpu);
6004 }
6005
6006 int kvm_arch_hardware_enable(void *garbage)
6007 {
6008         struct kvm *kvm;
6009         struct kvm_vcpu *vcpu;
6010         int i;
6011         int ret;
6012         u64 local_tsc;
6013         u64 max_tsc = 0;
6014         bool stable, backwards_tsc = false;
6015
6016         kvm_shared_msr_cpu_online();
6017         ret = kvm_x86_ops->hardware_enable(garbage);
6018         if (ret != 0)
6019                 return ret;
6020
6021         local_tsc = native_read_tsc();
6022         stable = !check_tsc_unstable();
6023         list_for_each_entry(kvm, &vm_list, vm_list) {
6024                 kvm_for_each_vcpu(i, vcpu, kvm) {
6025                         if (!stable && vcpu->cpu == smp_processor_id())
6026                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6027                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6028                                 backwards_tsc = true;
6029                                 if (vcpu->arch.last_host_tsc > max_tsc)
6030                                         max_tsc = vcpu->arch.last_host_tsc;
6031                         }
6032                 }
6033         }
6034
6035         /*
6036          * Sometimes, even reliable TSCs go backwards.  This happens on
6037          * platforms that reset TSC during suspend or hibernate actions, but
6038          * maintain synchronization.  We must compensate.  Fortunately, we can
6039          * detect that condition here, which happens early in CPU bringup,
6040          * before any KVM threads can be running.  Unfortunately, we can't
6041          * bring the TSCs fully up to date with real time, as we aren't yet far
6042          * enough into CPU bringup that we know how much real time has actually
6043          * elapsed; our helper function, get_kernel_ns() will be using boot
6044          * variables that haven't been updated yet.
6045          *
6046          * So we simply find the maximum observed TSC above, then record the
6047          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6048          * the adjustment will be applied.  Note that we accumulate
6049          * adjustments, in case multiple suspend cycles happen before some VCPU
6050          * gets a chance to run again.  In the event that no KVM threads get a
6051          * chance to run, we will miss the entire elapsed period, as we'll have
6052          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6053          * loose cycle time.  This isn't too big a deal, since the loss will be
6054          * uniform across all VCPUs (not to mention the scenario is extremely
6055          * unlikely). It is possible that a second hibernate recovery happens
6056          * much faster than a first, causing the observed TSC here to be
6057          * smaller; this would require additional padding adjustment, which is
6058          * why we set last_host_tsc to the local tsc observed here.
6059          *
6060          * N.B. - this code below runs only on platforms with reliable TSC,
6061          * as that is the only way backwards_tsc is set above.  Also note
6062          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6063          * have the same delta_cyc adjustment applied if backwards_tsc
6064          * is detected.  Note further, this adjustment is only done once,
6065          * as we reset last_host_tsc on all VCPUs to stop this from being
6066          * called multiple times (one for each physical CPU bringup).
6067          *
6068          * Platforms with unnreliable TSCs don't have to deal with this, they
6069          * will be compensated by the logic in vcpu_load, which sets the TSC to
6070          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6071          * guarantee that they stay in perfect synchronization.
6072          */
6073         if (backwards_tsc) {
6074                 u64 delta_cyc = max_tsc - local_tsc;
6075                 list_for_each_entry(kvm, &vm_list, vm_list) {
6076                         kvm_for_each_vcpu(i, vcpu, kvm) {
6077                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6078                                 vcpu->arch.last_host_tsc = local_tsc;
6079                         }
6080
6081                         /*
6082                          * We have to disable TSC offset matching.. if you were
6083                          * booting a VM while issuing an S4 host suspend....
6084                          * you may have some problem.  Solving this issue is
6085                          * left as an exercise to the reader.
6086                          */
6087                         kvm->arch.last_tsc_nsec = 0;
6088                         kvm->arch.last_tsc_write = 0;
6089                 }
6090
6091         }
6092         return 0;
6093 }
6094
6095 void kvm_arch_hardware_disable(void *garbage)
6096 {
6097         kvm_x86_ops->hardware_disable(garbage);
6098         drop_user_return_notifiers(garbage);
6099 }
6100
6101 int kvm_arch_hardware_setup(void)
6102 {
6103         return kvm_x86_ops->hardware_setup();
6104 }
6105
6106 void kvm_arch_hardware_unsetup(void)
6107 {
6108         kvm_x86_ops->hardware_unsetup();
6109 }
6110
6111 void kvm_arch_check_processor_compat(void *rtn)
6112 {
6113         kvm_x86_ops->check_processor_compatibility(rtn);
6114 }
6115
6116 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6117 {
6118         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6119 }
6120
6121 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6122 {
6123         struct page *page;
6124         struct kvm *kvm;
6125         int r;
6126
6127         BUG_ON(vcpu->kvm == NULL);
6128         kvm = vcpu->kvm;
6129
6130         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6131         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6132                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6133         else
6134                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6135
6136         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6137         if (!page) {
6138                 r = -ENOMEM;
6139                 goto fail;
6140         }
6141         vcpu->arch.pio_data = page_address(page);
6142
6143         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6144
6145         r = kvm_mmu_create(vcpu);
6146         if (r < 0)
6147                 goto fail_free_pio_data;
6148
6149         if (irqchip_in_kernel(kvm)) {
6150                 r = kvm_create_lapic(vcpu);
6151                 if (r < 0)
6152                         goto fail_mmu_destroy;
6153         }
6154
6155         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6156                                        GFP_KERNEL);
6157         if (!vcpu->arch.mce_banks) {
6158                 r = -ENOMEM;
6159                 goto fail_free_lapic;
6160         }
6161         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6162
6163         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6164                 goto fail_free_mce_banks;
6165
6166         kvm_async_pf_hash_reset(vcpu);
6167         kvm_pmu_init(vcpu);
6168
6169         return 0;
6170 fail_free_mce_banks:
6171         kfree(vcpu->arch.mce_banks);
6172 fail_free_lapic:
6173         kvm_free_lapic(vcpu);
6174 fail_mmu_destroy:
6175         kvm_mmu_destroy(vcpu);
6176 fail_free_pio_data:
6177         free_page((unsigned long)vcpu->arch.pio_data);
6178 fail:
6179         return r;
6180 }
6181
6182 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6183 {
6184         int idx;
6185
6186         kvm_pmu_destroy(vcpu);
6187         kfree(vcpu->arch.mce_banks);
6188         kvm_free_lapic(vcpu);
6189         idx = srcu_read_lock(&vcpu->kvm->srcu);
6190         kvm_mmu_destroy(vcpu);
6191         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6192         free_page((unsigned long)vcpu->arch.pio_data);
6193 }
6194
6195 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6196 {
6197         if (type)
6198                 return -EINVAL;
6199
6200         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6201         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6202
6203         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6204         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6205
6206         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6207
6208         return 0;
6209 }
6210
6211 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6212 {
6213         vcpu_load(vcpu);
6214         kvm_mmu_unload(vcpu);
6215         vcpu_put(vcpu);
6216 }
6217
6218 static void kvm_free_vcpus(struct kvm *kvm)
6219 {
6220         unsigned int i;
6221         struct kvm_vcpu *vcpu;
6222
6223         /*
6224          * Unpin any mmu pages first.
6225          */
6226         kvm_for_each_vcpu(i, vcpu, kvm) {
6227                 kvm_clear_async_pf_completion_queue(vcpu);
6228                 kvm_unload_vcpu_mmu(vcpu);
6229         }
6230         kvm_for_each_vcpu(i, vcpu, kvm)
6231                 kvm_arch_vcpu_free(vcpu);
6232
6233         mutex_lock(&kvm->lock);
6234         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6235                 kvm->vcpus[i] = NULL;
6236
6237         atomic_set(&kvm->online_vcpus, 0);
6238         mutex_unlock(&kvm->lock);
6239 }
6240
6241 void kvm_arch_sync_events(struct kvm *kvm)
6242 {
6243         kvm_free_all_assigned_devices(kvm);
6244         kvm_free_pit(kvm);
6245 }
6246
6247 void kvm_arch_destroy_vm(struct kvm *kvm)
6248 {
6249         kvm_iommu_unmap_guest(kvm);
6250         kfree(kvm->arch.vpic);
6251         kfree(kvm->arch.vioapic);
6252         kvm_free_vcpus(kvm);
6253         if (kvm->arch.apic_access_page)
6254                 put_page(kvm->arch.apic_access_page);
6255         if (kvm->arch.ept_identity_pagetable)
6256                 put_page(kvm->arch.ept_identity_pagetable);
6257 }
6258
6259 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6260                            struct kvm_memory_slot *dont)
6261 {
6262         int i;
6263
6264         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6265                 if (!dont || free->arch.lpage_info[i] != dont->arch.lpage_info[i]) {
6266                         vfree(free->arch.lpage_info[i]);
6267                         free->arch.lpage_info[i] = NULL;
6268                 }
6269         }
6270 }
6271
6272 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6273 {
6274         int i;
6275
6276         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6277                 unsigned long ugfn;
6278                 int lpages;
6279                 int level = i + 2;
6280
6281                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6282                                       slot->base_gfn, level) + 1;
6283
6284                 slot->arch.lpage_info[i] =
6285                         vzalloc(lpages * sizeof(*slot->arch.lpage_info[i]));
6286                 if (!slot->arch.lpage_info[i])
6287                         goto out_free;
6288
6289                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6290                         slot->arch.lpage_info[i][0].write_count = 1;
6291                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6292                         slot->arch.lpage_info[i][lpages - 1].write_count = 1;
6293                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6294                 /*
6295                  * If the gfn and userspace address are not aligned wrt each
6296                  * other, or if explicitly asked to, disable large page
6297                  * support for this slot
6298                  */
6299                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6300                     !kvm_largepages_enabled()) {
6301                         unsigned long j;
6302
6303                         for (j = 0; j < lpages; ++j)
6304                                 slot->arch.lpage_info[i][j].write_count = 1;
6305                 }
6306         }
6307
6308         return 0;
6309
6310 out_free:
6311         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6312                 vfree(slot->arch.lpage_info[i]);
6313                 slot->arch.lpage_info[i] = NULL;
6314         }
6315         return -ENOMEM;
6316 }
6317
6318 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6319                                 struct kvm_memory_slot *memslot,
6320                                 struct kvm_memory_slot old,
6321                                 struct kvm_userspace_memory_region *mem,
6322                                 int user_alloc)
6323 {
6324         int npages = memslot->npages;
6325         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6326
6327         /* Prevent internal slot pages from being moved by fork()/COW. */
6328         if (memslot->id >= KVM_MEMORY_SLOTS)
6329                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6330
6331         /*To keep backward compatibility with older userspace,
6332          *x86 needs to hanlde !user_alloc case.
6333          */
6334         if (!user_alloc) {
6335                 if (npages && !old.rmap) {
6336                         unsigned long userspace_addr;
6337
6338                         down_write(&current->mm->mmap_sem);
6339                         userspace_addr = do_mmap(NULL, 0,
6340                                                  npages * PAGE_SIZE,
6341                                                  PROT_READ | PROT_WRITE,
6342                                                  map_flags,
6343                                                  0);
6344                         up_write(&current->mm->mmap_sem);
6345
6346                         if (IS_ERR((void *)userspace_addr))
6347                                 return PTR_ERR((void *)userspace_addr);
6348
6349                         memslot->userspace_addr = userspace_addr;
6350                 }
6351         }
6352
6353
6354         return 0;
6355 }
6356
6357 void kvm_arch_commit_memory_region(struct kvm *kvm,
6358                                 struct kvm_userspace_memory_region *mem,
6359                                 struct kvm_memory_slot old,
6360                                 int user_alloc)
6361 {
6362
6363         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6364
6365         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6366                 int ret;
6367
6368                 down_write(&current->mm->mmap_sem);
6369                 ret = do_munmap(current->mm, old.userspace_addr,
6370                                 old.npages * PAGE_SIZE);
6371                 up_write(&current->mm->mmap_sem);
6372                 if (ret < 0)
6373                         printk(KERN_WARNING
6374                                "kvm_vm_ioctl_set_memory_region: "
6375                                "failed to munmap memory\n");
6376         }
6377
6378         if (!kvm->arch.n_requested_mmu_pages)
6379                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6380
6381         spin_lock(&kvm->mmu_lock);
6382         if (nr_mmu_pages)
6383                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6384         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6385         spin_unlock(&kvm->mmu_lock);
6386 }
6387
6388 void kvm_arch_flush_shadow(struct kvm *kvm)
6389 {
6390         kvm_mmu_zap_all(kvm);
6391         kvm_reload_remote_mmus(kvm);
6392 }
6393
6394 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6395 {
6396         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6397                 !vcpu->arch.apf.halted)
6398                 || !list_empty_careful(&vcpu->async_pf.done)
6399                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6400                 || atomic_read(&vcpu->arch.nmi_queued) ||
6401                 (kvm_arch_interrupt_allowed(vcpu) &&
6402                  kvm_cpu_has_interrupt(vcpu));
6403 }
6404
6405 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6406 {
6407         int me;
6408         int cpu = vcpu->cpu;
6409
6410         if (waitqueue_active(&vcpu->wq)) {
6411                 wake_up_interruptible(&vcpu->wq);
6412                 ++vcpu->stat.halt_wakeup;
6413         }
6414
6415         me = get_cpu();
6416         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6417                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6418                         smp_send_reschedule(cpu);
6419         put_cpu();
6420 }
6421
6422 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6423 {
6424         return kvm_x86_ops->interrupt_allowed(vcpu);
6425 }
6426
6427 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6428 {
6429         unsigned long current_rip = kvm_rip_read(vcpu) +
6430                 get_segment_base(vcpu, VCPU_SREG_CS);
6431
6432         return current_rip == linear_rip;
6433 }
6434 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6435
6436 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6437 {
6438         unsigned long rflags;
6439
6440         rflags = kvm_x86_ops->get_rflags(vcpu);
6441         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6442                 rflags &= ~X86_EFLAGS_TF;
6443         return rflags;
6444 }
6445 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6446
6447 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6448 {
6449         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6450             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6451                 rflags |= X86_EFLAGS_TF;
6452         kvm_x86_ops->set_rflags(vcpu, rflags);
6453         kvm_make_request(KVM_REQ_EVENT, vcpu);
6454 }
6455 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6456
6457 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6458 {
6459         int r;
6460
6461         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6462               is_error_page(work->page))
6463                 return;
6464
6465         r = kvm_mmu_reload(vcpu);
6466         if (unlikely(r))
6467                 return;
6468
6469         if (!vcpu->arch.mmu.direct_map &&
6470               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6471                 return;
6472
6473         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6474 }
6475
6476 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6477 {
6478         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6479 }
6480
6481 static inline u32 kvm_async_pf_next_probe(u32 key)
6482 {
6483         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6484 }
6485
6486 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6487 {
6488         u32 key = kvm_async_pf_hash_fn(gfn);
6489
6490         while (vcpu->arch.apf.gfns[key] != ~0)
6491                 key = kvm_async_pf_next_probe(key);
6492
6493         vcpu->arch.apf.gfns[key] = gfn;
6494 }
6495
6496 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6497 {
6498         int i;
6499         u32 key = kvm_async_pf_hash_fn(gfn);
6500
6501         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6502                      (vcpu->arch.apf.gfns[key] != gfn &&
6503                       vcpu->arch.apf.gfns[key] != ~0); i++)
6504                 key = kvm_async_pf_next_probe(key);
6505
6506         return key;
6507 }
6508
6509 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6510 {
6511         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6512 }
6513
6514 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6515 {
6516         u32 i, j, k;
6517
6518         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6519         while (true) {
6520                 vcpu->arch.apf.gfns[i] = ~0;
6521                 do {
6522                         j = kvm_async_pf_next_probe(j);
6523                         if (vcpu->arch.apf.gfns[j] == ~0)
6524                                 return;
6525                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6526                         /*
6527                          * k lies cyclically in ]i,j]
6528                          * |    i.k.j |
6529                          * |....j i.k.| or  |.k..j i...|
6530                          */
6531                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6532                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6533                 i = j;
6534         }
6535 }
6536
6537 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6538 {
6539
6540         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6541                                       sizeof(val));
6542 }
6543
6544 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6545                                      struct kvm_async_pf *work)
6546 {
6547         struct x86_exception fault;
6548
6549         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6550         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6551
6552         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6553             (vcpu->arch.apf.send_user_only &&
6554              kvm_x86_ops->get_cpl(vcpu) == 0))
6555                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6556         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6557                 fault.vector = PF_VECTOR;
6558                 fault.error_code_valid = true;
6559                 fault.error_code = 0;
6560                 fault.nested_page_fault = false;
6561                 fault.address = work->arch.token;
6562                 kvm_inject_page_fault(vcpu, &fault);
6563         }
6564 }
6565
6566 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6567                                  struct kvm_async_pf *work)
6568 {
6569         struct x86_exception fault;
6570
6571         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6572         if (is_error_page(work->page))
6573                 work->arch.token = ~0; /* broadcast wakeup */
6574         else
6575                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6576
6577         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6578             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6579                 fault.vector = PF_VECTOR;
6580                 fault.error_code_valid = true;
6581                 fault.error_code = 0;
6582                 fault.nested_page_fault = false;
6583                 fault.address = work->arch.token;
6584                 kvm_inject_page_fault(vcpu, &fault);
6585         }
6586         vcpu->arch.apf.halted = false;
6587 }
6588
6589 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6590 {
6591         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6592                 return true;
6593         else
6594                 return !kvm_event_needs_reinjection(vcpu) &&
6595                         kvm_x86_ops->interrupt_allowed(vcpu);
6596 }
6597
6598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6603 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6604 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6605 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6606 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6607 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6608 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6609 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);