2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
51 #define CREATE_TRACE_POINTS
54 #include <asm/debugreg.h>
61 #include <asm/pvclock.h>
62 #include <asm/div64.h>
64 #define MAX_IO_MSRS 256
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
68 #define emul_to_vcpu(ctxt) \
69 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
72 * - enable syscall per default because its emulated by KVM
73 * - enable LME and LMA per default on 64 bit KVM
77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static void process_nmi(struct kvm_vcpu *vcpu);
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
94 bool kvm_has_tsc_control;
95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
96 u32 kvm_max_guest_tsc_khz;
97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
99 #define KVM_NR_SHARED_MSRS 16
101 struct kvm_shared_msrs_global {
103 u32 msrs[KVM_NR_SHARED_MSRS];
106 struct kvm_shared_msrs {
107 struct user_return_notifier urn;
109 struct kvm_shared_msr_values {
112 } values[KVM_NR_SHARED_MSRS];
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119 { "pf_fixed", VCPU_STAT(pf_fixed) },
120 { "pf_guest", VCPU_STAT(pf_guest) },
121 { "tlb_flush", VCPU_STAT(tlb_flush) },
122 { "invlpg", VCPU_STAT(invlpg) },
123 { "exits", VCPU_STAT(exits) },
124 { "io_exits", VCPU_STAT(io_exits) },
125 { "mmio_exits", VCPU_STAT(mmio_exits) },
126 { "signal_exits", VCPU_STAT(signal_exits) },
127 { "irq_window", VCPU_STAT(irq_window_exits) },
128 { "nmi_window", VCPU_STAT(nmi_window_exits) },
129 { "halt_exits", VCPU_STAT(halt_exits) },
130 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131 { "hypercalls", VCPU_STAT(hypercalls) },
132 { "request_irq", VCPU_STAT(request_irq_exits) },
133 { "irq_exits", VCPU_STAT(irq_exits) },
134 { "host_state_reload", VCPU_STAT(host_state_reload) },
135 { "efer_reload", VCPU_STAT(efer_reload) },
136 { "fpu_reload", VCPU_STAT(fpu_reload) },
137 { "insn_emulation", VCPU_STAT(insn_emulation) },
138 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139 { "irq_injections", VCPU_STAT(irq_injections) },
140 { "nmi_injections", VCPU_STAT(nmi_injections) },
141 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145 { "mmu_flooded", VM_STAT(mmu_flooded) },
146 { "mmu_recycled", VM_STAT(mmu_recycled) },
147 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148 { "mmu_unsync", VM_STAT(mmu_unsync) },
149 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150 { "largepages", VM_STAT(lpages) },
154 u64 __read_mostly host_xcr0;
156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
161 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
162 vcpu->arch.apf.gfns[i] = ~0;
165 static void kvm_on_user_return(struct user_return_notifier *urn)
168 struct kvm_shared_msrs *locals
169 = container_of(urn, struct kvm_shared_msrs, urn);
170 struct kvm_shared_msr_values *values;
172 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
173 values = &locals->values[slot];
174 if (values->host != values->curr) {
175 wrmsrl(shared_msrs_global.msrs[slot], values->host);
176 values->curr = values->host;
179 locals->registered = false;
180 user_return_notifier_unregister(urn);
183 static void shared_msr_update(unsigned slot, u32 msr)
185 struct kvm_shared_msrs *smsr;
188 smsr = &__get_cpu_var(shared_msrs);
189 /* only read, and nobody should modify it at this time,
190 * so don't need lock */
191 if (slot >= shared_msrs_global.nr) {
192 printk(KERN_ERR "kvm: invalid MSR slot!");
195 rdmsrl_safe(msr, &value);
196 smsr->values[slot].host = value;
197 smsr->values[slot].curr = value;
200 void kvm_define_shared_msr(unsigned slot, u32 msr)
202 if (slot >= shared_msrs_global.nr)
203 shared_msrs_global.nr = slot + 1;
204 shared_msrs_global.msrs[slot] = msr;
205 /* we need ensured the shared_msr_global have been updated */
208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
210 static void kvm_shared_msr_cpu_online(void)
214 for (i = 0; i < shared_msrs_global.nr; ++i)
215 shared_msr_update(i, shared_msrs_global.msrs[i]);
218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
220 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222 if (((value ^ smsr->values[slot].curr) & mask) == 0)
224 smsr->values[slot].curr = value;
225 wrmsrl(shared_msrs_global.msrs[slot], value);
226 if (!smsr->registered) {
227 smsr->urn.on_user_return = kvm_on_user_return;
228 user_return_notifier_register(&smsr->urn);
229 smsr->registered = true;
232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
234 static void drop_user_return_notifiers(void *ignore)
236 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
238 if (smsr->registered)
239 kvm_on_user_return(&smsr->urn);
242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
244 if (irqchip_in_kernel(vcpu->kvm))
245 return vcpu->arch.apic_base;
247 return vcpu->arch.apic_base;
249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
253 /* TODO: reserve bits check */
254 if (irqchip_in_kernel(vcpu->kvm))
255 kvm_lapic_set_base(vcpu, data);
257 vcpu->arch.apic_base = data;
259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
261 #define EXCPT_BENIGN 0
262 #define EXCPT_CONTRIBUTORY 1
265 static int exception_class(int vector)
275 return EXCPT_CONTRIBUTORY;
282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
283 unsigned nr, bool has_error, u32 error_code,
289 kvm_make_request(KVM_REQ_EVENT, vcpu);
291 if (!vcpu->arch.exception.pending) {
293 vcpu->arch.exception.pending = true;
294 vcpu->arch.exception.has_error_code = has_error;
295 vcpu->arch.exception.nr = nr;
296 vcpu->arch.exception.error_code = error_code;
297 vcpu->arch.exception.reinject = reinject;
301 /* to check exception */
302 prev_nr = vcpu->arch.exception.nr;
303 if (prev_nr == DF_VECTOR) {
304 /* triple fault -> shutdown */
305 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
308 class1 = exception_class(prev_nr);
309 class2 = exception_class(nr);
310 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
311 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
312 /* generate double fault per SDM Table 5-5 */
313 vcpu->arch.exception.pending = true;
314 vcpu->arch.exception.has_error_code = true;
315 vcpu->arch.exception.nr = DF_VECTOR;
316 vcpu->arch.exception.error_code = 0;
318 /* replace previous exception with a new one in a hope
319 that instruction re-execution will regenerate lost
324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 kvm_multiple_exception(vcpu, nr, false, 0, false);
328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
332 kvm_multiple_exception(vcpu, nr, false, 0, true);
334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
339 kvm_inject_gp(vcpu, 0);
341 kvm_x86_ops->skip_emulated_instruction(vcpu);
343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
347 ++vcpu->stat.pf_guest;
348 vcpu->arch.cr2 = fault->address;
349 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
355 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
356 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
358 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
363 atomic_inc(&vcpu->arch.nmi_queued);
364 kvm_make_request(KVM_REQ_NMI, vcpu);
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
370 kvm_multiple_exception(vcpu, nr, true, error_code, false);
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
376 kvm_multiple_exception(vcpu, nr, true, error_code, true);
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
381 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
382 * a #GP and return false.
384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
386 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
388 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
394 * This function will be used to read from the physical memory of the currently
395 * running guest. The difference to kvm_read_guest_page is that this function
396 * can read from guest physical or from the guest's guest physical memory.
398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
399 gfn_t ngfn, void *data, int offset, int len,
405 ngpa = gfn_to_gpa(ngfn);
406 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
407 if (real_gfn == UNMAPPED_GVA)
410 real_gfn = gpa_to_gfn(real_gfn);
412 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
417 void *data, int offset, int len, u32 access)
419 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
420 data, offset, len, access);
424 * Load the pae pdptrs. Return true is they are all valid.
426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
428 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
429 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
432 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
434 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
435 offset * sizeof(u64), sizeof(pdpte),
436 PFERR_USER_MASK|PFERR_WRITE_MASK);
441 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
442 if (is_present_gpte(pdpte[i]) &&
443 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
450 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
451 __set_bit(VCPU_EXREG_PDPTR,
452 (unsigned long *)&vcpu->arch.regs_avail);
453 __set_bit(VCPU_EXREG_PDPTR,
454 (unsigned long *)&vcpu->arch.regs_dirty);
459 EXPORT_SYMBOL_GPL(load_pdptrs);
461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
463 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
469 if (is_long_mode(vcpu) || !is_pae(vcpu))
472 if (!test_bit(VCPU_EXREG_PDPTR,
473 (unsigned long *)&vcpu->arch.regs_avail))
476 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
477 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
478 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
479 PFERR_USER_MASK | PFERR_WRITE_MASK);
482 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
490 unsigned long old_cr0 = kvm_read_cr0(vcpu);
491 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
492 X86_CR0_CD | X86_CR0_NW;
497 if (cr0 & 0xffffffff00000000UL)
501 cr0 &= ~CR0_RESERVED_BITS;
503 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
506 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
509 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
511 if ((vcpu->arch.efer & EFER_LME)) {
516 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
521 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
526 kvm_x86_ops->set_cr0(vcpu, cr0);
528 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
529 kvm_clear_async_pf_completion_queue(vcpu);
530 kvm_async_pf_hash_reset(vcpu);
533 if ((cr0 ^ old_cr0) & update_bits)
534 kvm_mmu_reset_context(vcpu);
537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
541 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
543 EXPORT_SYMBOL_GPL(kvm_lmsw);
545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
549 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
550 if (index != XCR_XFEATURE_ENABLED_MASK)
553 if (kvm_x86_ops->get_cpl(vcpu) != 0)
555 if (!(xcr0 & XSTATE_FP))
557 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
559 if (xcr0 & ~host_xcr0)
561 vcpu->arch.xcr0 = xcr0;
562 vcpu->guest_xcr0_loaded = 0;
566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
568 if (__kvm_set_xcr(vcpu, index, xcr)) {
569 kvm_inject_gp(vcpu, 0);
574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
578 unsigned long old_cr4 = kvm_read_cr4(vcpu);
579 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
580 X86_CR4_PAE | X86_CR4_SMEP;
581 if (cr4 & CR4_RESERVED_BITS)
584 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
587 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
590 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
593 if (is_long_mode(vcpu)) {
594 if (!(cr4 & X86_CR4_PAE))
596 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
597 && ((cr4 ^ old_cr4) & pdptr_bits)
598 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
602 if (kvm_x86_ops->set_cr4(vcpu, cr4))
605 if ((cr4 ^ old_cr4) & pdptr_bits)
606 kvm_mmu_reset_context(vcpu);
608 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
609 kvm_update_cpuid(vcpu);
613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
617 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
618 kvm_mmu_sync_roots(vcpu);
619 kvm_mmu_flush_tlb(vcpu);
623 if (is_long_mode(vcpu)) {
624 if (cr3 & CR3_L_MODE_RESERVED_BITS)
628 if (cr3 & CR3_PAE_RESERVED_BITS)
630 if (is_paging(vcpu) &&
631 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
635 * We don't check reserved bits in nonpae mode, because
636 * this isn't enforced, and VMware depends on this.
641 * Does the new cr3 value map to physical memory? (Note, we
642 * catch an invalid cr3 even in real-mode, because it would
643 * cause trouble later on when we turn on paging anyway.)
645 * A real CPU would silently accept an invalid cr3 and would
646 * attempt to use it - with largely undefined (and often hard
647 * to debug) behavior on the guest side.
649 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
651 vcpu->arch.cr3 = cr3;
652 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
653 vcpu->arch.mmu.new_cr3(vcpu);
656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
660 if (cr8 & CR8_RESERVED_BITS)
662 if (irqchip_in_kernel(vcpu->kvm))
663 kvm_lapic_set_tpr(vcpu, cr8);
665 vcpu->arch.cr8 = cr8;
668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
672 if (irqchip_in_kernel(vcpu->kvm))
673 return kvm_lapic_get_cr8(vcpu);
675 return vcpu->arch.cr8;
677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
683 vcpu->arch.db[dr] = val;
684 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
685 vcpu->arch.eff_db[dr] = val;
688 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
692 if (val & 0xffffffff00000000ULL)
694 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
697 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
701 if (val & 0xffffffff00000000ULL)
703 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
704 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
705 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
706 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
718 res = __kvm_set_dr(vcpu, dr, val);
720 kvm_queue_exception(vcpu, UD_VECTOR);
722 kvm_inject_gp(vcpu, 0);
726 EXPORT_SYMBOL_GPL(kvm_set_dr);
728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
732 *val = vcpu->arch.db[dr];
735 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
739 *val = vcpu->arch.dr6;
742 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
746 *val = vcpu->arch.dr7;
753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
755 if (_kvm_get_dr(vcpu, dr, val)) {
756 kvm_queue_exception(vcpu, UD_VECTOR);
761 EXPORT_SYMBOL_GPL(kvm_get_dr);
763 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
765 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
769 err = kvm_pmu_read_pmc(vcpu, ecx, &data);
772 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
773 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
776 EXPORT_SYMBOL_GPL(kvm_rdpmc);
779 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
780 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
782 * This list is modified at module load time to reflect the
783 * capabilities of the host cpu. This capabilities test skips MSRs that are
784 * kvm-specific. Those are put in the beginning of the list.
787 #define KVM_SAVE_MSRS_BEGIN 9
788 static u32 msrs_to_save[] = {
789 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
790 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
791 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
792 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
793 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
796 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
798 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
801 static unsigned num_msrs_to_save;
803 static u32 emulated_msrs[] = {
804 MSR_IA32_TSCDEADLINE,
805 MSR_IA32_MISC_ENABLE,
810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
812 u64 old_efer = vcpu->arch.efer;
814 if (efer & efer_reserved_bits)
818 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
821 if (efer & EFER_FFXSR) {
822 struct kvm_cpuid_entry2 *feat;
824 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
825 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
829 if (efer & EFER_SVME) {
830 struct kvm_cpuid_entry2 *feat;
832 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
833 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
838 efer |= vcpu->arch.efer & EFER_LMA;
840 kvm_x86_ops->set_efer(vcpu, efer);
842 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
844 /* Update reserved bits */
845 if ((efer ^ old_efer) & EFER_NX)
846 kvm_mmu_reset_context(vcpu);
851 void kvm_enable_efer_bits(u64 mask)
853 efer_reserved_bits &= ~mask;
855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
859 * Writes msr value into into the appropriate "register".
860 * Returns 0 on success, non-0 otherwise.
861 * Assumes vcpu_load() was already called.
863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
865 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
869 * Adapt set_msr() to msr_io()'s calling convention
871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
873 return kvm_set_msr(vcpu, index, *data);
876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
880 struct pvclock_wall_clock wc;
881 struct timespec boot;
886 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
891 ++version; /* first time write, random junk */
895 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
898 * The guest calculates current wall clock time by adding
899 * system time (updated by kvm_guest_time_update below) to the
900 * wall clock specified here. guest system time equals host
901 * system time for us, thus we must fill in host boot time here.
905 wc.sec = boot.tv_sec;
906 wc.nsec = boot.tv_nsec;
907 wc.version = version;
909 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
912 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
917 uint32_t quotient, remainder;
919 /* Don't try to replace with do_div(), this one calculates
920 * "(dividend << 32) / divisor" */
922 : "=a" (quotient), "=d" (remainder)
923 : "0" (0), "1" (dividend), "r" (divisor) );
927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
928 s8 *pshift, u32 *pmultiplier)
935 tps64 = base_khz * 1000LL;
936 scaled64 = scaled_khz * 1000LL;
937 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
942 tps32 = (uint32_t)tps64;
943 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
944 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
952 *pmultiplier = div_frac(scaled64, tps32);
954 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
955 __func__, base_khz, scaled_khz, shift, *pmultiplier);
958 static inline u64 get_kernel_ns(void)
962 WARN_ON(preemptible());
964 monotonic_to_bootbased(&ts);
965 return timespec_to_ns(&ts);
968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
969 unsigned long max_tsc_khz;
971 static inline int kvm_tsc_changes_freq(void)
974 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
975 cpufreq_quick_get(cpu) != 0;
980 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
982 if (vcpu->arch.virtual_tsc_khz)
983 return vcpu->arch.virtual_tsc_khz;
985 return __this_cpu_read(cpu_tsc_khz);
988 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
992 WARN_ON(preemptible());
993 if (kvm_tsc_changes_freq())
994 printk_once(KERN_WARNING
995 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
996 ret = nsec * vcpu_tsc_khz(vcpu);
997 do_div(ret, USEC_PER_SEC);
1001 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1003 /* Compute a scale to convert nanoseconds in TSC cycles */
1004 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1005 &vcpu->arch.tsc_catchup_shift,
1006 &vcpu->arch.tsc_catchup_mult);
1009 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1011 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1012 vcpu->arch.tsc_catchup_mult,
1013 vcpu->arch.tsc_catchup_shift);
1014 tsc += vcpu->arch.last_tsc_write;
1018 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1020 struct kvm *kvm = vcpu->kvm;
1021 u64 offset, ns, elapsed;
1022 unsigned long flags;
1025 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1026 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1027 ns = get_kernel_ns();
1028 elapsed = ns - kvm->arch.last_tsc_nsec;
1029 sdiff = data - kvm->arch.last_tsc_write;
1034 * Special case: close write to TSC within 5 seconds of
1035 * another CPU is interpreted as an attempt to synchronize
1036 * The 5 seconds is to accommodate host load / swapping as
1037 * well as any reset of TSC during the boot process.
1039 * In that case, for a reliable TSC, we can match TSC offsets,
1040 * or make a best guest using elapsed value.
1042 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1043 elapsed < 5ULL * NSEC_PER_SEC) {
1044 if (!check_tsc_unstable()) {
1045 offset = kvm->arch.last_tsc_offset;
1046 pr_debug("kvm: matched tsc offset for %llu\n", data);
1048 u64 delta = nsec_to_cycles(vcpu, elapsed);
1050 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1052 ns = kvm->arch.last_tsc_nsec;
1054 kvm->arch.last_tsc_nsec = ns;
1055 kvm->arch.last_tsc_write = data;
1056 kvm->arch.last_tsc_offset = offset;
1057 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1058 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1060 /* Reset of TSC must disable overshoot protection below */
1061 vcpu->arch.hv_clock.tsc_timestamp = 0;
1062 vcpu->arch.last_tsc_write = data;
1063 vcpu->arch.last_tsc_nsec = ns;
1065 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1067 static int kvm_guest_time_update(struct kvm_vcpu *v)
1069 unsigned long flags;
1070 struct kvm_vcpu_arch *vcpu = &v->arch;
1072 unsigned long this_tsc_khz;
1073 s64 kernel_ns, max_kernel_ns;
1076 /* Keep irq disabled to prevent changes to the clock */
1077 local_irq_save(flags);
1078 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1079 kernel_ns = get_kernel_ns();
1080 this_tsc_khz = vcpu_tsc_khz(v);
1081 if (unlikely(this_tsc_khz == 0)) {
1082 local_irq_restore(flags);
1083 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1088 * We may have to catch up the TSC to match elapsed wall clock
1089 * time for two reasons, even if kvmclock is used.
1090 * 1) CPU could have been running below the maximum TSC rate
1091 * 2) Broken TSC compensation resets the base at each VCPU
1092 * entry to avoid unknown leaps of TSC even when running
1093 * again on the same CPU. This may cause apparent elapsed
1094 * time to disappear, and the guest to stand still or run
1097 if (vcpu->tsc_catchup) {
1098 u64 tsc = compute_guest_tsc(v, kernel_ns);
1099 if (tsc > tsc_timestamp) {
1100 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1101 tsc_timestamp = tsc;
1105 local_irq_restore(flags);
1107 if (!vcpu->time_page)
1111 * Time as measured by the TSC may go backwards when resetting the base
1112 * tsc_timestamp. The reason for this is that the TSC resolution is
1113 * higher than the resolution of the other clock scales. Thus, many
1114 * possible measurments of the TSC correspond to one measurement of any
1115 * other clock, and so a spread of values is possible. This is not a
1116 * problem for the computation of the nanosecond clock; with TSC rates
1117 * around 1GHZ, there can only be a few cycles which correspond to one
1118 * nanosecond value, and any path through this code will inevitably
1119 * take longer than that. However, with the kernel_ns value itself,
1120 * the precision may be much lower, down to HZ granularity. If the
1121 * first sampling of TSC against kernel_ns ends in the low part of the
1122 * range, and the second in the high end of the range, we can get:
1124 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1126 * As the sampling errors potentially range in the thousands of cycles,
1127 * it is possible such a time value has already been observed by the
1128 * guest. To protect against this, we must compute the system time as
1129 * observed by the guest and ensure the new system time is greater.
1132 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1133 max_kernel_ns = vcpu->last_guest_tsc -
1134 vcpu->hv_clock.tsc_timestamp;
1135 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1136 vcpu->hv_clock.tsc_to_system_mul,
1137 vcpu->hv_clock.tsc_shift);
1138 max_kernel_ns += vcpu->last_kernel_ns;
1141 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1142 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1143 &vcpu->hv_clock.tsc_shift,
1144 &vcpu->hv_clock.tsc_to_system_mul);
1145 vcpu->hw_tsc_khz = this_tsc_khz;
1148 if (max_kernel_ns > kernel_ns)
1149 kernel_ns = max_kernel_ns;
1151 /* With all the info we got, fill in the values */
1152 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1153 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1154 vcpu->last_kernel_ns = kernel_ns;
1155 vcpu->last_guest_tsc = tsc_timestamp;
1156 vcpu->hv_clock.flags = 0;
1159 * The interface expects us to write an even number signaling that the
1160 * update is finished. Since the guest won't see the intermediate
1161 * state, we just increase by 2 at the end.
1163 vcpu->hv_clock.version += 2;
1165 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1167 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1168 sizeof(vcpu->hv_clock));
1170 kunmap_atomic(shared_kaddr, KM_USER0);
1172 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1176 static bool msr_mtrr_valid(unsigned msr)
1179 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1180 case MSR_MTRRfix64K_00000:
1181 case MSR_MTRRfix16K_80000:
1182 case MSR_MTRRfix16K_A0000:
1183 case MSR_MTRRfix4K_C0000:
1184 case MSR_MTRRfix4K_C8000:
1185 case MSR_MTRRfix4K_D0000:
1186 case MSR_MTRRfix4K_D8000:
1187 case MSR_MTRRfix4K_E0000:
1188 case MSR_MTRRfix4K_E8000:
1189 case MSR_MTRRfix4K_F0000:
1190 case MSR_MTRRfix4K_F8000:
1191 case MSR_MTRRdefType:
1192 case MSR_IA32_CR_PAT:
1200 static bool valid_pat_type(unsigned t)
1202 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1205 static bool valid_mtrr_type(unsigned t)
1207 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1210 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1214 if (!msr_mtrr_valid(msr))
1217 if (msr == MSR_IA32_CR_PAT) {
1218 for (i = 0; i < 8; i++)
1219 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1222 } else if (msr == MSR_MTRRdefType) {
1225 return valid_mtrr_type(data & 0xff);
1226 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1227 for (i = 0; i < 8 ; i++)
1228 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1233 /* variable MTRRs */
1234 return valid_mtrr_type(data & 0xff);
1237 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1239 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1241 if (!mtrr_valid(vcpu, msr, data))
1244 if (msr == MSR_MTRRdefType) {
1245 vcpu->arch.mtrr_state.def_type = data;
1246 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1247 } else if (msr == MSR_MTRRfix64K_00000)
1249 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1251 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1253 else if (msr == MSR_IA32_CR_PAT)
1254 vcpu->arch.pat = data;
1255 else { /* Variable MTRRs */
1256 int idx, is_mtrr_mask;
1259 idx = (msr - 0x200) / 2;
1260 is_mtrr_mask = msr - 0x200 - 2 * idx;
1263 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1266 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1270 kvm_mmu_reset_context(vcpu);
1274 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1276 u64 mcg_cap = vcpu->arch.mcg_cap;
1277 unsigned bank_num = mcg_cap & 0xff;
1280 case MSR_IA32_MCG_STATUS:
1281 vcpu->arch.mcg_status = data;
1283 case MSR_IA32_MCG_CTL:
1284 if (!(mcg_cap & MCG_CTL_P))
1286 if (data != 0 && data != ~(u64)0)
1288 vcpu->arch.mcg_ctl = data;
1291 if (msr >= MSR_IA32_MC0_CTL &&
1292 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1293 u32 offset = msr - MSR_IA32_MC0_CTL;
1294 /* only 0 or all 1s can be written to IA32_MCi_CTL
1295 * some Linux kernels though clear bit 10 in bank 4 to
1296 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1297 * this to avoid an uncatched #GP in the guest
1299 if ((offset & 0x3) == 0 &&
1300 data != 0 && (data | (1 << 10)) != ~(u64)0)
1302 vcpu->arch.mce_banks[offset] = data;
1310 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1312 struct kvm *kvm = vcpu->kvm;
1313 int lm = is_long_mode(vcpu);
1314 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1315 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1316 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1317 : kvm->arch.xen_hvm_config.blob_size_32;
1318 u32 page_num = data & ~PAGE_MASK;
1319 u64 page_addr = data & PAGE_MASK;
1324 if (page_num >= blob_size)
1327 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1332 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1343 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1350 case HV_X64_MSR_GUEST_OS_ID:
1351 case HV_X64_MSR_HYPERCALL:
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1361 struct kvm *kvm = vcpu->kvm;
1364 case HV_X64_MSR_GUEST_OS_ID:
1365 kvm->arch.hv_guest_os_id = data;
1366 /* setting guest os id to zero disables hypercall page */
1367 if (!kvm->arch.hv_guest_os_id)
1368 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1370 case HV_X64_MSR_HYPERCALL: {
1375 /* if guest os id is not set hypercall should remain disabled */
1376 if (!kvm->arch.hv_guest_os_id)
1378 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379 kvm->arch.hv_hypercall = data;
1382 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383 addr = gfn_to_hva(kvm, gfn);
1384 if (kvm_is_error_hva(addr))
1386 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388 if (__copy_to_user((void __user *)addr, instructions, 4))
1390 kvm->arch.hv_hypercall = data;
1394 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395 "data 0x%llx\n", msr, data);
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1404 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1407 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408 vcpu->arch.hv_vapic = data;
1411 addr = gfn_to_hva(vcpu->kvm, data >>
1412 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413 if (kvm_is_error_hva(addr))
1415 if (__clear_user((void __user *)addr, PAGE_SIZE))
1417 vcpu->arch.hv_vapic = data;
1420 case HV_X64_MSR_EOI:
1421 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422 case HV_X64_MSR_ICR:
1423 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424 case HV_X64_MSR_TPR:
1425 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1427 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428 "data 0x%llx\n", msr, data);
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1437 gpa_t gpa = data & ~0x3f;
1439 /* Bits 2:5 are resrved, Should be zero */
1443 vcpu->arch.apf.msr_val = data;
1445 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446 kvm_clear_async_pf_completion_queue(vcpu);
1447 kvm_async_pf_hash_reset(vcpu);
1451 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1454 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455 kvm_async_pf_wakeup_all(vcpu);
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1461 if (vcpu->arch.time_page) {
1462 kvm_release_page_dirty(vcpu->arch.time_page);
1463 vcpu->arch.time_page = NULL;
1467 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1471 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1474 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1475 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1476 vcpu->arch.st.accum_steal = delta;
1479 static void record_steal_time(struct kvm_vcpu *vcpu)
1481 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1484 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1485 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1488 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1489 vcpu->arch.st.steal.version += 2;
1490 vcpu->arch.st.accum_steal = 0;
1492 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1493 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1496 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1500 return set_efer(vcpu, data);
1502 data &= ~(u64)0x40; /* ignore flush filter disable */
1503 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1505 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1510 case MSR_FAM10H_MMIO_CONF_BASE:
1512 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1517 case MSR_AMD64_NB_CFG:
1519 case MSR_IA32_DEBUGCTLMSR:
1521 /* We support the non-activated case already */
1523 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1524 /* Values other than LBR and BTF are vendor-specific,
1525 thus reserved and should throw a #GP */
1528 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1531 case MSR_IA32_UCODE_REV:
1532 case MSR_IA32_UCODE_WRITE:
1533 case MSR_VM_HSAVE_PA:
1534 case MSR_AMD64_PATCH_LOADER:
1536 case 0x200 ... 0x2ff:
1537 return set_msr_mtrr(vcpu, msr, data);
1538 case MSR_IA32_APICBASE:
1539 kvm_set_apic_base(vcpu, data);
1541 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1542 return kvm_x2apic_msr_write(vcpu, msr, data);
1543 case MSR_IA32_TSCDEADLINE:
1544 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1546 case MSR_IA32_MISC_ENABLE:
1547 vcpu->arch.ia32_misc_enable_msr = data;
1549 case MSR_KVM_WALL_CLOCK_NEW:
1550 case MSR_KVM_WALL_CLOCK:
1551 vcpu->kvm->arch.wall_clock = data;
1552 kvm_write_wall_clock(vcpu->kvm, data);
1554 case MSR_KVM_SYSTEM_TIME_NEW:
1555 case MSR_KVM_SYSTEM_TIME: {
1556 kvmclock_reset(vcpu);
1558 vcpu->arch.time = data;
1559 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1561 /* we verify if the enable bit is set... */
1565 /* ...but clean it before doing the actual write */
1566 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1568 vcpu->arch.time_page =
1569 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1571 if (is_error_page(vcpu->arch.time_page)) {
1572 kvm_release_page_clean(vcpu->arch.time_page);
1573 vcpu->arch.time_page = NULL;
1577 case MSR_KVM_ASYNC_PF_EN:
1578 if (kvm_pv_enable_async_pf(vcpu, data))
1581 case MSR_KVM_STEAL_TIME:
1583 if (unlikely(!sched_info_on()))
1586 if (data & KVM_STEAL_RESERVED_MASK)
1589 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1590 data & KVM_STEAL_VALID_BITS))
1593 vcpu->arch.st.msr_val = data;
1595 if (!(data & KVM_MSR_ENABLED))
1598 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1601 accumulate_steal_time(vcpu);
1604 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1608 case MSR_IA32_MCG_CTL:
1609 case MSR_IA32_MCG_STATUS:
1610 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1611 return set_msr_mce(vcpu, msr, data);
1613 /* Performance counters are not protected by a CPUID bit,
1614 * so we should check all of them in the generic path for the sake of
1615 * cross vendor migration.
1616 * Writing a zero into the event select MSRs disables them,
1617 * which we perfectly emulate ;-). Any other value should be at least
1618 * reported, some guests depend on them.
1620 case MSR_K7_EVNTSEL0:
1621 case MSR_K7_EVNTSEL1:
1622 case MSR_K7_EVNTSEL2:
1623 case MSR_K7_EVNTSEL3:
1625 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1626 "0x%x data 0x%llx\n", msr, data);
1628 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1629 * so we ignore writes to make it happy.
1631 case MSR_K7_PERFCTR0:
1632 case MSR_K7_PERFCTR1:
1633 case MSR_K7_PERFCTR2:
1634 case MSR_K7_PERFCTR3:
1635 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1636 "0x%x data 0x%llx\n", msr, data);
1638 case MSR_K7_CLK_CTL:
1640 * Ignore all writes to this no longer documented MSR.
1641 * Writes are only relevant for old K7 processors,
1642 * all pre-dating SVM, but a recommended workaround from
1643 * AMD for these chips. It is possible to speicify the
1644 * affected processor models on the command line, hence
1645 * the need to ignore the workaround.
1648 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1649 if (kvm_hv_msr_partition_wide(msr)) {
1651 mutex_lock(&vcpu->kvm->lock);
1652 r = set_msr_hyperv_pw(vcpu, msr, data);
1653 mutex_unlock(&vcpu->kvm->lock);
1656 return set_msr_hyperv(vcpu, msr, data);
1658 case MSR_IA32_BBL_CR_CTL3:
1659 /* Drop writes to this legacy MSR -- see rdmsr
1660 * counterpart for further detail.
1662 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1665 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1666 return xen_hvm_config(vcpu, data);
1667 if (kvm_pmu_msr(vcpu, msr))
1668 return kvm_pmu_set_msr(vcpu, msr, data);
1670 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1674 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1681 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1685 * Reads an msr value (of 'msr_index') into 'pdata'.
1686 * Returns 0 on success, non-0 otherwise.
1687 * Assumes vcpu_load() was already called.
1689 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1691 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1694 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1696 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1698 if (!msr_mtrr_valid(msr))
1701 if (msr == MSR_MTRRdefType)
1702 *pdata = vcpu->arch.mtrr_state.def_type +
1703 (vcpu->arch.mtrr_state.enabled << 10);
1704 else if (msr == MSR_MTRRfix64K_00000)
1706 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1707 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1708 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1709 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1710 else if (msr == MSR_IA32_CR_PAT)
1711 *pdata = vcpu->arch.pat;
1712 else { /* Variable MTRRs */
1713 int idx, is_mtrr_mask;
1716 idx = (msr - 0x200) / 2;
1717 is_mtrr_mask = msr - 0x200 - 2 * idx;
1720 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1723 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1730 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1733 u64 mcg_cap = vcpu->arch.mcg_cap;
1734 unsigned bank_num = mcg_cap & 0xff;
1737 case MSR_IA32_P5_MC_ADDR:
1738 case MSR_IA32_P5_MC_TYPE:
1741 case MSR_IA32_MCG_CAP:
1742 data = vcpu->arch.mcg_cap;
1744 case MSR_IA32_MCG_CTL:
1745 if (!(mcg_cap & MCG_CTL_P))
1747 data = vcpu->arch.mcg_ctl;
1749 case MSR_IA32_MCG_STATUS:
1750 data = vcpu->arch.mcg_status;
1753 if (msr >= MSR_IA32_MC0_CTL &&
1754 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1755 u32 offset = msr - MSR_IA32_MC0_CTL;
1756 data = vcpu->arch.mce_banks[offset];
1765 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1768 struct kvm *kvm = vcpu->kvm;
1771 case HV_X64_MSR_GUEST_OS_ID:
1772 data = kvm->arch.hv_guest_os_id;
1774 case HV_X64_MSR_HYPERCALL:
1775 data = kvm->arch.hv_hypercall;
1778 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1786 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1791 case HV_X64_MSR_VP_INDEX: {
1794 kvm_for_each_vcpu(r, v, vcpu->kvm)
1799 case HV_X64_MSR_EOI:
1800 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1801 case HV_X64_MSR_ICR:
1802 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1803 case HV_X64_MSR_TPR:
1804 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1805 case HV_X64_MSR_APIC_ASSIST_PAGE:
1806 data = vcpu->arch.hv_vapic;
1809 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1816 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1821 case MSR_IA32_PLATFORM_ID:
1822 case MSR_IA32_EBL_CR_POWERON:
1823 case MSR_IA32_DEBUGCTLMSR:
1824 case MSR_IA32_LASTBRANCHFROMIP:
1825 case MSR_IA32_LASTBRANCHTOIP:
1826 case MSR_IA32_LASTINTFROMIP:
1827 case MSR_IA32_LASTINTTOIP:
1830 case MSR_VM_HSAVE_PA:
1831 case MSR_K7_EVNTSEL0:
1832 case MSR_K7_PERFCTR0:
1833 case MSR_K8_INT_PENDING_MSG:
1834 case MSR_AMD64_NB_CFG:
1835 case MSR_FAM10H_MMIO_CONF_BASE:
1838 case MSR_IA32_UCODE_REV:
1839 data = 0x100000000ULL;
1842 data = 0x500 | KVM_NR_VAR_MTRR;
1844 case 0x200 ... 0x2ff:
1845 return get_msr_mtrr(vcpu, msr, pdata);
1846 case 0xcd: /* fsb frequency */
1850 * MSR_EBC_FREQUENCY_ID
1851 * Conservative value valid for even the basic CPU models.
1852 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1853 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1854 * and 266MHz for model 3, or 4. Set Core Clock
1855 * Frequency to System Bus Frequency Ratio to 1 (bits
1856 * 31:24) even though these are only valid for CPU
1857 * models > 2, however guests may end up dividing or
1858 * multiplying by zero otherwise.
1860 case MSR_EBC_FREQUENCY_ID:
1863 case MSR_IA32_APICBASE:
1864 data = kvm_get_apic_base(vcpu);
1866 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1867 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1869 case MSR_IA32_TSCDEADLINE:
1870 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1872 case MSR_IA32_MISC_ENABLE:
1873 data = vcpu->arch.ia32_misc_enable_msr;
1875 case MSR_IA32_PERF_STATUS:
1876 /* TSC increment by tick */
1878 /* CPU multiplier */
1879 data |= (((uint64_t)4ULL) << 40);
1882 data = vcpu->arch.efer;
1884 case MSR_KVM_WALL_CLOCK:
1885 case MSR_KVM_WALL_CLOCK_NEW:
1886 data = vcpu->kvm->arch.wall_clock;
1888 case MSR_KVM_SYSTEM_TIME:
1889 case MSR_KVM_SYSTEM_TIME_NEW:
1890 data = vcpu->arch.time;
1892 case MSR_KVM_ASYNC_PF_EN:
1893 data = vcpu->arch.apf.msr_val;
1895 case MSR_KVM_STEAL_TIME:
1896 data = vcpu->arch.st.msr_val;
1898 case MSR_IA32_P5_MC_ADDR:
1899 case MSR_IA32_P5_MC_TYPE:
1900 case MSR_IA32_MCG_CAP:
1901 case MSR_IA32_MCG_CTL:
1902 case MSR_IA32_MCG_STATUS:
1903 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1904 return get_msr_mce(vcpu, msr, pdata);
1905 case MSR_K7_CLK_CTL:
1907 * Provide expected ramp-up count for K7. All other
1908 * are set to zero, indicating minimum divisors for
1911 * This prevents guest kernels on AMD host with CPU
1912 * type 6, model 8 and higher from exploding due to
1913 * the rdmsr failing.
1917 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1918 if (kvm_hv_msr_partition_wide(msr)) {
1920 mutex_lock(&vcpu->kvm->lock);
1921 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1922 mutex_unlock(&vcpu->kvm->lock);
1925 return get_msr_hyperv(vcpu, msr, pdata);
1927 case MSR_IA32_BBL_CR_CTL3:
1928 /* This legacy MSR exists but isn't fully documented in current
1929 * silicon. It is however accessed by winxp in very narrow
1930 * scenarios where it sets bit #19, itself documented as
1931 * a "reserved" bit. Best effort attempt to source coherent
1932 * read data here should the balance of the register be
1933 * interpreted by the guest:
1935 * L2 cache control register 3: 64GB range, 256KB size,
1936 * enabled, latency 0x1, configured
1941 if (kvm_pmu_msr(vcpu, msr))
1942 return kvm_pmu_get_msr(vcpu, msr, pdata);
1944 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1947 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1955 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1958 * Read or write a bunch of msrs. All parameters are kernel addresses.
1960 * @return number of msrs set successfully.
1962 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1963 struct kvm_msr_entry *entries,
1964 int (*do_msr)(struct kvm_vcpu *vcpu,
1965 unsigned index, u64 *data))
1969 idx = srcu_read_lock(&vcpu->kvm->srcu);
1970 for (i = 0; i < msrs->nmsrs; ++i)
1971 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1973 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1979 * Read or write a bunch of msrs. Parameters are user addresses.
1981 * @return number of msrs set successfully.
1983 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1984 int (*do_msr)(struct kvm_vcpu *vcpu,
1985 unsigned index, u64 *data),
1988 struct kvm_msrs msrs;
1989 struct kvm_msr_entry *entries;
1994 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1998 if (msrs.nmsrs >= MAX_IO_MSRS)
2001 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2002 entries = memdup_user(user_msrs->entries, size);
2003 if (IS_ERR(entries)) {
2004 r = PTR_ERR(entries);
2008 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2013 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2024 int kvm_dev_ioctl_check_extension(long ext)
2029 case KVM_CAP_IRQCHIP:
2031 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2032 case KVM_CAP_SET_TSS_ADDR:
2033 case KVM_CAP_EXT_CPUID:
2034 case KVM_CAP_CLOCKSOURCE:
2036 case KVM_CAP_NOP_IO_DELAY:
2037 case KVM_CAP_MP_STATE:
2038 case KVM_CAP_SYNC_MMU:
2039 case KVM_CAP_USER_NMI:
2040 case KVM_CAP_REINJECT_CONTROL:
2041 case KVM_CAP_IRQ_INJECT_STATUS:
2042 case KVM_CAP_ASSIGN_DEV_IRQ:
2044 case KVM_CAP_IOEVENTFD:
2046 case KVM_CAP_PIT_STATE2:
2047 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2048 case KVM_CAP_XEN_HVM:
2049 case KVM_CAP_ADJUST_CLOCK:
2050 case KVM_CAP_VCPU_EVENTS:
2051 case KVM_CAP_HYPERV:
2052 case KVM_CAP_HYPERV_VAPIC:
2053 case KVM_CAP_HYPERV_SPIN:
2054 case KVM_CAP_PCI_SEGMENT:
2055 case KVM_CAP_DEBUGREGS:
2056 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2058 case KVM_CAP_ASYNC_PF:
2059 case KVM_CAP_GET_TSC_KHZ:
2062 case KVM_CAP_COALESCED_MMIO:
2063 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2066 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2068 case KVM_CAP_NR_VCPUS:
2069 r = KVM_SOFT_MAX_VCPUS;
2071 case KVM_CAP_MAX_VCPUS:
2074 case KVM_CAP_NR_MEMSLOTS:
2075 r = KVM_MEMORY_SLOTS;
2077 case KVM_CAP_PV_MMU: /* obsolete */
2081 r = iommu_present(&pci_bus_type);
2084 r = KVM_MAX_MCE_BANKS;
2089 case KVM_CAP_TSC_CONTROL:
2090 r = kvm_has_tsc_control;
2092 case KVM_CAP_TSC_DEADLINE_TIMER:
2093 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2103 long kvm_arch_dev_ioctl(struct file *filp,
2104 unsigned int ioctl, unsigned long arg)
2106 void __user *argp = (void __user *)arg;
2110 case KVM_GET_MSR_INDEX_LIST: {
2111 struct kvm_msr_list __user *user_msr_list = argp;
2112 struct kvm_msr_list msr_list;
2116 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2119 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2120 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2123 if (n < msr_list.nmsrs)
2126 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2127 num_msrs_to_save * sizeof(u32)))
2129 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2131 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2136 case KVM_GET_SUPPORTED_CPUID: {
2137 struct kvm_cpuid2 __user *cpuid_arg = argp;
2138 struct kvm_cpuid2 cpuid;
2141 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2143 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2144 cpuid_arg->entries);
2149 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2154 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2157 mce_cap = KVM_MCE_CAP_SUPPORTED;
2159 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2171 static void wbinvd_ipi(void *garbage)
2176 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2178 return vcpu->kvm->arch.iommu_domain &&
2179 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2182 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2184 /* Address WBINVD may be executed by guest */
2185 if (need_emulate_wbinvd(vcpu)) {
2186 if (kvm_x86_ops->has_wbinvd_exit())
2187 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2188 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2189 smp_call_function_single(vcpu->cpu,
2190 wbinvd_ipi, NULL, 1);
2193 kvm_x86_ops->vcpu_load(vcpu, cpu);
2194 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2195 /* Make sure TSC doesn't go backwards */
2199 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2200 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2201 tsc - vcpu->arch.last_guest_tsc;
2204 mark_tsc_unstable("KVM discovered backwards TSC");
2205 if (check_tsc_unstable()) {
2206 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2207 vcpu->arch.tsc_catchup = 1;
2209 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2210 if (vcpu->cpu != cpu)
2211 kvm_migrate_timers(vcpu);
2215 accumulate_steal_time(vcpu);
2216 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2219 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2221 kvm_x86_ops->vcpu_put(vcpu);
2222 kvm_put_guest_fpu(vcpu);
2223 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2226 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2227 struct kvm_lapic_state *s)
2229 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2234 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2235 struct kvm_lapic_state *s)
2237 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2238 kvm_apic_post_state_restore(vcpu);
2239 update_cr8_intercept(vcpu);
2244 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2245 struct kvm_interrupt *irq)
2247 if (irq->irq < 0 || irq->irq >= 256)
2249 if (irqchip_in_kernel(vcpu->kvm))
2252 kvm_queue_interrupt(vcpu, irq->irq, false);
2253 kvm_make_request(KVM_REQ_EVENT, vcpu);
2258 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2260 kvm_inject_nmi(vcpu);
2265 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2266 struct kvm_tpr_access_ctl *tac)
2270 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2274 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2278 unsigned bank_num = mcg_cap & 0xff, bank;
2281 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2283 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2286 vcpu->arch.mcg_cap = mcg_cap;
2287 /* Init IA32_MCG_CTL to all 1s */
2288 if (mcg_cap & MCG_CTL_P)
2289 vcpu->arch.mcg_ctl = ~(u64)0;
2290 /* Init IA32_MCi_CTL to all 1s */
2291 for (bank = 0; bank < bank_num; bank++)
2292 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2297 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2298 struct kvm_x86_mce *mce)
2300 u64 mcg_cap = vcpu->arch.mcg_cap;
2301 unsigned bank_num = mcg_cap & 0xff;
2302 u64 *banks = vcpu->arch.mce_banks;
2304 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2307 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2308 * reporting is disabled
2310 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2311 vcpu->arch.mcg_ctl != ~(u64)0)
2313 banks += 4 * mce->bank;
2315 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2316 * reporting is disabled for the bank
2318 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2320 if (mce->status & MCI_STATUS_UC) {
2321 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2322 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2323 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2326 if (banks[1] & MCI_STATUS_VAL)
2327 mce->status |= MCI_STATUS_OVER;
2328 banks[2] = mce->addr;
2329 banks[3] = mce->misc;
2330 vcpu->arch.mcg_status = mce->mcg_status;
2331 banks[1] = mce->status;
2332 kvm_queue_exception(vcpu, MC_VECTOR);
2333 } else if (!(banks[1] & MCI_STATUS_VAL)
2334 || !(banks[1] & MCI_STATUS_UC)) {
2335 if (banks[1] & MCI_STATUS_VAL)
2336 mce->status |= MCI_STATUS_OVER;
2337 banks[2] = mce->addr;
2338 banks[3] = mce->misc;
2339 banks[1] = mce->status;
2341 banks[1] |= MCI_STATUS_OVER;
2345 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2346 struct kvm_vcpu_events *events)
2349 events->exception.injected =
2350 vcpu->arch.exception.pending &&
2351 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2352 events->exception.nr = vcpu->arch.exception.nr;
2353 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2354 events->exception.pad = 0;
2355 events->exception.error_code = vcpu->arch.exception.error_code;
2357 events->interrupt.injected =
2358 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2359 events->interrupt.nr = vcpu->arch.interrupt.nr;
2360 events->interrupt.soft = 0;
2361 events->interrupt.shadow =
2362 kvm_x86_ops->get_interrupt_shadow(vcpu,
2363 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2365 events->nmi.injected = vcpu->arch.nmi_injected;
2366 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2367 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2368 events->nmi.pad = 0;
2370 events->sipi_vector = vcpu->arch.sipi_vector;
2372 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2373 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2374 | KVM_VCPUEVENT_VALID_SHADOW);
2375 memset(&events->reserved, 0, sizeof(events->reserved));
2378 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2379 struct kvm_vcpu_events *events)
2381 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2382 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2383 | KVM_VCPUEVENT_VALID_SHADOW))
2387 vcpu->arch.exception.pending = events->exception.injected;
2388 vcpu->arch.exception.nr = events->exception.nr;
2389 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2390 vcpu->arch.exception.error_code = events->exception.error_code;
2392 vcpu->arch.interrupt.pending = events->interrupt.injected;
2393 vcpu->arch.interrupt.nr = events->interrupt.nr;
2394 vcpu->arch.interrupt.soft = events->interrupt.soft;
2395 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2396 kvm_x86_ops->set_interrupt_shadow(vcpu,
2397 events->interrupt.shadow);
2399 vcpu->arch.nmi_injected = events->nmi.injected;
2400 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2401 vcpu->arch.nmi_pending = events->nmi.pending;
2402 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2404 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2405 vcpu->arch.sipi_vector = events->sipi_vector;
2407 kvm_make_request(KVM_REQ_EVENT, vcpu);
2412 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2413 struct kvm_debugregs *dbgregs)
2415 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2416 dbgregs->dr6 = vcpu->arch.dr6;
2417 dbgregs->dr7 = vcpu->arch.dr7;
2419 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2422 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2423 struct kvm_debugregs *dbgregs)
2428 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2429 vcpu->arch.dr6 = dbgregs->dr6;
2430 vcpu->arch.dr7 = dbgregs->dr7;
2435 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2436 struct kvm_xsave *guest_xsave)
2439 memcpy(guest_xsave->region,
2440 &vcpu->arch.guest_fpu.state->xsave,
2443 memcpy(guest_xsave->region,
2444 &vcpu->arch.guest_fpu.state->fxsave,
2445 sizeof(struct i387_fxsave_struct));
2446 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2451 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2452 struct kvm_xsave *guest_xsave)
2455 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2458 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2459 guest_xsave->region, xstate_size);
2461 if (xstate_bv & ~XSTATE_FPSSE)
2463 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2464 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2469 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2470 struct kvm_xcrs *guest_xcrs)
2472 if (!cpu_has_xsave) {
2473 guest_xcrs->nr_xcrs = 0;
2477 guest_xcrs->nr_xcrs = 1;
2478 guest_xcrs->flags = 0;
2479 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2480 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2483 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2484 struct kvm_xcrs *guest_xcrs)
2491 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2494 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2495 /* Only support XCR0 currently */
2496 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2497 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2498 guest_xcrs->xcrs[0].value);
2506 long kvm_arch_vcpu_ioctl(struct file *filp,
2507 unsigned int ioctl, unsigned long arg)
2509 struct kvm_vcpu *vcpu = filp->private_data;
2510 void __user *argp = (void __user *)arg;
2513 struct kvm_lapic_state *lapic;
2514 struct kvm_xsave *xsave;
2515 struct kvm_xcrs *xcrs;
2521 case KVM_GET_LAPIC: {
2523 if (!vcpu->arch.apic)
2525 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2530 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2534 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2539 case KVM_SET_LAPIC: {
2541 if (!vcpu->arch.apic)
2543 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2544 if (IS_ERR(u.lapic)) {
2545 r = PTR_ERR(u.lapic);
2549 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2555 case KVM_INTERRUPT: {
2556 struct kvm_interrupt irq;
2559 if (copy_from_user(&irq, argp, sizeof irq))
2561 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2568 r = kvm_vcpu_ioctl_nmi(vcpu);
2574 case KVM_SET_CPUID: {
2575 struct kvm_cpuid __user *cpuid_arg = argp;
2576 struct kvm_cpuid cpuid;
2579 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2581 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2586 case KVM_SET_CPUID2: {
2587 struct kvm_cpuid2 __user *cpuid_arg = argp;
2588 struct kvm_cpuid2 cpuid;
2591 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2593 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2594 cpuid_arg->entries);
2599 case KVM_GET_CPUID2: {
2600 struct kvm_cpuid2 __user *cpuid_arg = argp;
2601 struct kvm_cpuid2 cpuid;
2604 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2606 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2607 cpuid_arg->entries);
2611 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2617 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2620 r = msr_io(vcpu, argp, do_set_msr, 0);
2622 case KVM_TPR_ACCESS_REPORTING: {
2623 struct kvm_tpr_access_ctl tac;
2626 if (copy_from_user(&tac, argp, sizeof tac))
2628 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2632 if (copy_to_user(argp, &tac, sizeof tac))
2637 case KVM_SET_VAPIC_ADDR: {
2638 struct kvm_vapic_addr va;
2641 if (!irqchip_in_kernel(vcpu->kvm))
2644 if (copy_from_user(&va, argp, sizeof va))
2647 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2650 case KVM_X86_SETUP_MCE: {
2654 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2656 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2659 case KVM_X86_SET_MCE: {
2660 struct kvm_x86_mce mce;
2663 if (copy_from_user(&mce, argp, sizeof mce))
2665 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2668 case KVM_GET_VCPU_EVENTS: {
2669 struct kvm_vcpu_events events;
2671 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2674 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2679 case KVM_SET_VCPU_EVENTS: {
2680 struct kvm_vcpu_events events;
2683 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2686 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2689 case KVM_GET_DEBUGREGS: {
2690 struct kvm_debugregs dbgregs;
2692 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2695 if (copy_to_user(argp, &dbgregs,
2696 sizeof(struct kvm_debugregs)))
2701 case KVM_SET_DEBUGREGS: {
2702 struct kvm_debugregs dbgregs;
2705 if (copy_from_user(&dbgregs, argp,
2706 sizeof(struct kvm_debugregs)))
2709 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2712 case KVM_GET_XSAVE: {
2713 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2718 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2721 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2726 case KVM_SET_XSAVE: {
2727 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2728 if (IS_ERR(u.xsave)) {
2729 r = PTR_ERR(u.xsave);
2733 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2736 case KVM_GET_XCRS: {
2737 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2742 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2745 if (copy_to_user(argp, u.xcrs,
2746 sizeof(struct kvm_xcrs)))
2751 case KVM_SET_XCRS: {
2752 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2753 if (IS_ERR(u.xcrs)) {
2754 r = PTR_ERR(u.xcrs);
2758 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2761 case KVM_SET_TSC_KHZ: {
2765 if (!kvm_has_tsc_control)
2768 user_tsc_khz = (u32)arg;
2770 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2773 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2778 case KVM_GET_TSC_KHZ: {
2780 if (check_tsc_unstable())
2783 r = vcpu_tsc_khz(vcpu);
2795 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2799 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2801 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2805 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2808 kvm->arch.ept_identity_map_addr = ident_addr;
2812 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2813 u32 kvm_nr_mmu_pages)
2815 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2818 mutex_lock(&kvm->slots_lock);
2819 spin_lock(&kvm->mmu_lock);
2821 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2822 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2824 spin_unlock(&kvm->mmu_lock);
2825 mutex_unlock(&kvm->slots_lock);
2829 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2831 return kvm->arch.n_max_mmu_pages;
2834 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2839 switch (chip->chip_id) {
2840 case KVM_IRQCHIP_PIC_MASTER:
2841 memcpy(&chip->chip.pic,
2842 &pic_irqchip(kvm)->pics[0],
2843 sizeof(struct kvm_pic_state));
2845 case KVM_IRQCHIP_PIC_SLAVE:
2846 memcpy(&chip->chip.pic,
2847 &pic_irqchip(kvm)->pics[1],
2848 sizeof(struct kvm_pic_state));
2850 case KVM_IRQCHIP_IOAPIC:
2851 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2860 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2865 switch (chip->chip_id) {
2866 case KVM_IRQCHIP_PIC_MASTER:
2867 spin_lock(&pic_irqchip(kvm)->lock);
2868 memcpy(&pic_irqchip(kvm)->pics[0],
2870 sizeof(struct kvm_pic_state));
2871 spin_unlock(&pic_irqchip(kvm)->lock);
2873 case KVM_IRQCHIP_PIC_SLAVE:
2874 spin_lock(&pic_irqchip(kvm)->lock);
2875 memcpy(&pic_irqchip(kvm)->pics[1],
2877 sizeof(struct kvm_pic_state));
2878 spin_unlock(&pic_irqchip(kvm)->lock);
2880 case KVM_IRQCHIP_IOAPIC:
2881 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2887 kvm_pic_update_irq(pic_irqchip(kvm));
2891 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2895 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2896 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2897 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2901 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2905 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2906 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2907 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2908 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2912 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2916 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2917 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2918 sizeof(ps->channels));
2919 ps->flags = kvm->arch.vpit->pit_state.flags;
2920 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2921 memset(&ps->reserved, 0, sizeof(ps->reserved));
2925 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2927 int r = 0, start = 0;
2928 u32 prev_legacy, cur_legacy;
2929 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2930 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2931 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2932 if (!prev_legacy && cur_legacy)
2934 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2935 sizeof(kvm->arch.vpit->pit_state.channels));
2936 kvm->arch.vpit->pit_state.flags = ps->flags;
2937 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2938 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2942 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2943 struct kvm_reinject_control *control)
2945 if (!kvm->arch.vpit)
2947 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2948 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2949 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2954 * write_protect_slot - write protect a slot for dirty logging
2955 * @kvm: the kvm instance
2956 * @memslot: the slot we protect
2957 * @dirty_bitmap: the bitmap indicating which pages are dirty
2958 * @nr_dirty_pages: the number of dirty pages
2960 * We have two ways to find all sptes to protect:
2961 * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2962 * checks ones that have a spte mapping a page in the slot.
2963 * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2965 * Generally speaking, if there are not so many dirty pages compared to the
2966 * number of shadow pages, we should use the latter.
2968 * Note that letting others write into a page marked dirty in the old bitmap
2969 * by using the remaining tlb entry is not a problem. That page will become
2970 * write protected again when we flush the tlb and then be reported dirty to
2971 * the user space by copying the old bitmap.
2973 static void write_protect_slot(struct kvm *kvm,
2974 struct kvm_memory_slot *memslot,
2975 unsigned long *dirty_bitmap,
2976 unsigned long nr_dirty_pages)
2978 /* Not many dirty pages compared to # of shadow pages. */
2979 if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
2980 unsigned long gfn_offset;
2982 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
2983 unsigned long gfn = memslot->base_gfn + gfn_offset;
2985 spin_lock(&kvm->mmu_lock);
2986 kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
2987 spin_unlock(&kvm->mmu_lock);
2989 kvm_flush_remote_tlbs(kvm);
2991 spin_lock(&kvm->mmu_lock);
2992 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
2993 spin_unlock(&kvm->mmu_lock);
2998 * Get (and clear) the dirty memory log for a memory slot.
3000 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3001 struct kvm_dirty_log *log)
3004 struct kvm_memory_slot *memslot;
3005 unsigned long n, nr_dirty_pages;
3007 mutex_lock(&kvm->slots_lock);
3010 if (log->slot >= KVM_MEMORY_SLOTS)
3013 memslot = id_to_memslot(kvm->memslots, log->slot);
3015 if (!memslot->dirty_bitmap)
3018 n = kvm_dirty_bitmap_bytes(memslot);
3019 nr_dirty_pages = memslot->nr_dirty_pages;
3021 /* If nothing is dirty, don't bother messing with page tables. */
3022 if (nr_dirty_pages) {
3023 struct kvm_memslots *slots, *old_slots;
3024 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3026 dirty_bitmap = memslot->dirty_bitmap;
3027 dirty_bitmap_head = memslot->dirty_bitmap_head;
3028 if (dirty_bitmap == dirty_bitmap_head)
3029 dirty_bitmap_head += n / sizeof(long);
3030 memset(dirty_bitmap_head, 0, n);
3033 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3037 memslot = id_to_memslot(slots, log->slot);
3038 memslot->nr_dirty_pages = 0;
3039 memslot->dirty_bitmap = dirty_bitmap_head;
3040 update_memslots(slots, NULL);
3042 old_slots = kvm->memslots;
3043 rcu_assign_pointer(kvm->memslots, slots);
3044 synchronize_srcu_expedited(&kvm->srcu);
3047 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3050 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3054 if (clear_user(log->dirty_bitmap, n))
3060 mutex_unlock(&kvm->slots_lock);
3064 long kvm_arch_vm_ioctl(struct file *filp,
3065 unsigned int ioctl, unsigned long arg)
3067 struct kvm *kvm = filp->private_data;
3068 void __user *argp = (void __user *)arg;
3071 * This union makes it completely explicit to gcc-3.x
3072 * that these two variables' stack usage should be
3073 * combined, not added together.
3076 struct kvm_pit_state ps;
3077 struct kvm_pit_state2 ps2;
3078 struct kvm_pit_config pit_config;
3082 case KVM_SET_TSS_ADDR:
3083 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3087 case KVM_SET_IDENTITY_MAP_ADDR: {
3091 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3093 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3098 case KVM_SET_NR_MMU_PAGES:
3099 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3103 case KVM_GET_NR_MMU_PAGES:
3104 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3106 case KVM_CREATE_IRQCHIP: {
3107 struct kvm_pic *vpic;
3109 mutex_lock(&kvm->lock);
3112 goto create_irqchip_unlock;
3114 vpic = kvm_create_pic(kvm);
3116 r = kvm_ioapic_init(kvm);
3118 mutex_lock(&kvm->slots_lock);
3119 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3121 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3123 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3125 mutex_unlock(&kvm->slots_lock);
3127 goto create_irqchip_unlock;
3130 goto create_irqchip_unlock;
3132 kvm->arch.vpic = vpic;
3134 r = kvm_setup_default_irq_routing(kvm);
3136 mutex_lock(&kvm->slots_lock);
3137 mutex_lock(&kvm->irq_lock);
3138 kvm_ioapic_destroy(kvm);
3139 kvm_destroy_pic(kvm);
3140 mutex_unlock(&kvm->irq_lock);
3141 mutex_unlock(&kvm->slots_lock);
3143 create_irqchip_unlock:
3144 mutex_unlock(&kvm->lock);
3147 case KVM_CREATE_PIT:
3148 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3150 case KVM_CREATE_PIT2:
3152 if (copy_from_user(&u.pit_config, argp,
3153 sizeof(struct kvm_pit_config)))
3156 mutex_lock(&kvm->slots_lock);
3159 goto create_pit_unlock;
3161 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3165 mutex_unlock(&kvm->slots_lock);
3167 case KVM_IRQ_LINE_STATUS:
3168 case KVM_IRQ_LINE: {
3169 struct kvm_irq_level irq_event;
3172 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3175 if (irqchip_in_kernel(kvm)) {
3177 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3178 irq_event.irq, irq_event.level);
3179 if (ioctl == KVM_IRQ_LINE_STATUS) {
3181 irq_event.status = status;
3182 if (copy_to_user(argp, &irq_event,
3190 case KVM_GET_IRQCHIP: {
3191 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3192 struct kvm_irqchip *chip;
3194 chip = memdup_user(argp, sizeof(*chip));
3201 if (!irqchip_in_kernel(kvm))
3202 goto get_irqchip_out;
3203 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3205 goto get_irqchip_out;
3207 if (copy_to_user(argp, chip, sizeof *chip))
3208 goto get_irqchip_out;
3216 case KVM_SET_IRQCHIP: {
3217 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3218 struct kvm_irqchip *chip;
3220 chip = memdup_user(argp, sizeof(*chip));
3227 if (!irqchip_in_kernel(kvm))
3228 goto set_irqchip_out;
3229 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3231 goto set_irqchip_out;
3241 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3244 if (!kvm->arch.vpit)
3246 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3250 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3257 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3260 if (!kvm->arch.vpit)
3262 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3268 case KVM_GET_PIT2: {
3270 if (!kvm->arch.vpit)
3272 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3276 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3281 case KVM_SET_PIT2: {
3283 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3286 if (!kvm->arch.vpit)
3288 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3294 case KVM_REINJECT_CONTROL: {
3295 struct kvm_reinject_control control;
3297 if (copy_from_user(&control, argp, sizeof(control)))
3299 r = kvm_vm_ioctl_reinject(kvm, &control);
3305 case KVM_XEN_HVM_CONFIG: {
3307 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3308 sizeof(struct kvm_xen_hvm_config)))
3311 if (kvm->arch.xen_hvm_config.flags)
3316 case KVM_SET_CLOCK: {
3317 struct kvm_clock_data user_ns;
3322 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3330 local_irq_disable();
3331 now_ns = get_kernel_ns();
3332 delta = user_ns.clock - now_ns;
3334 kvm->arch.kvmclock_offset = delta;
3337 case KVM_GET_CLOCK: {
3338 struct kvm_clock_data user_ns;
3341 local_irq_disable();
3342 now_ns = get_kernel_ns();
3343 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3346 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3349 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3362 static void kvm_init_msr_list(void)
3367 /* skip the first msrs in the list. KVM-specific */
3368 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3369 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3372 msrs_to_save[j] = msrs_to_save[i];
3375 num_msrs_to_save = j;
3378 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3386 if (!(vcpu->arch.apic &&
3387 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3388 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3399 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3406 if (!(vcpu->arch.apic &&
3407 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3408 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3410 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3420 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3421 struct kvm_segment *var, int seg)
3423 kvm_x86_ops->set_segment(vcpu, var, seg);
3426 void kvm_get_segment(struct kvm_vcpu *vcpu,
3427 struct kvm_segment *var, int seg)
3429 kvm_x86_ops->get_segment(vcpu, var, seg);
3432 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3435 struct x86_exception exception;
3437 BUG_ON(!mmu_is_nested(vcpu));
3439 /* NPT walks are always user-walks */
3440 access |= PFERR_USER_MASK;
3441 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3446 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3447 struct x86_exception *exception)
3449 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3450 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3453 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3454 struct x86_exception *exception)
3456 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3457 access |= PFERR_FETCH_MASK;
3458 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3461 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3462 struct x86_exception *exception)
3464 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3465 access |= PFERR_WRITE_MASK;
3466 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3469 /* uses this to access any guest's mapped memory without checking CPL */
3470 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3471 struct x86_exception *exception)
3473 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3476 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3477 struct kvm_vcpu *vcpu, u32 access,
3478 struct x86_exception *exception)
3481 int r = X86EMUL_CONTINUE;
3484 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3486 unsigned offset = addr & (PAGE_SIZE-1);
3487 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3490 if (gpa == UNMAPPED_GVA)
3491 return X86EMUL_PROPAGATE_FAULT;
3492 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3494 r = X86EMUL_IO_NEEDED;
3506 /* used for instruction fetching */
3507 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3508 gva_t addr, void *val, unsigned int bytes,
3509 struct x86_exception *exception)
3511 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3512 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3514 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3515 access | PFERR_FETCH_MASK,
3519 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3520 gva_t addr, void *val, unsigned int bytes,
3521 struct x86_exception *exception)
3523 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3524 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3526 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3529 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3531 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3532 gva_t addr, void *val, unsigned int bytes,
3533 struct x86_exception *exception)
3535 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3536 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3539 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3540 gva_t addr, void *val,
3542 struct x86_exception *exception)
3544 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3546 int r = X86EMUL_CONTINUE;
3549 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3552 unsigned offset = addr & (PAGE_SIZE-1);
3553 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3556 if (gpa == UNMAPPED_GVA)
3557 return X86EMUL_PROPAGATE_FAULT;
3558 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3560 r = X86EMUL_IO_NEEDED;
3571 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3573 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3574 gpa_t *gpa, struct x86_exception *exception,
3577 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3579 if (vcpu_match_mmio_gva(vcpu, gva) &&
3580 check_write_user_access(vcpu, write, access,
3581 vcpu->arch.access)) {
3582 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3583 (gva & (PAGE_SIZE - 1));
3584 trace_vcpu_match_mmio(gva, *gpa, write, false);
3589 access |= PFERR_WRITE_MASK;
3591 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3593 if (*gpa == UNMAPPED_GVA)
3596 /* For APIC access vmexit */
3597 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3600 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3601 trace_vcpu_match_mmio(gva, *gpa, write, true);
3608 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3609 const void *val, int bytes)
3613 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3616 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3620 struct read_write_emulator_ops {
3621 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3623 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3624 void *val, int bytes);
3625 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3626 int bytes, void *val);
3627 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3628 void *val, int bytes);
3632 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3634 if (vcpu->mmio_read_completed) {
3635 memcpy(val, vcpu->mmio_data, bytes);
3636 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3637 vcpu->mmio_phys_addr, *(u64 *)val);
3638 vcpu->mmio_read_completed = 0;
3645 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3646 void *val, int bytes)
3648 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3651 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3652 void *val, int bytes)
3654 return emulator_write_phys(vcpu, gpa, val, bytes);
3657 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3659 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3660 return vcpu_mmio_write(vcpu, gpa, bytes, val);
3663 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3664 void *val, int bytes)
3666 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3667 return X86EMUL_IO_NEEDED;
3670 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3671 void *val, int bytes)
3673 memcpy(vcpu->mmio_data, val, bytes);
3674 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3675 return X86EMUL_CONTINUE;
3678 static struct read_write_emulator_ops read_emultor = {
3679 .read_write_prepare = read_prepare,
3680 .read_write_emulate = read_emulate,
3681 .read_write_mmio = vcpu_mmio_read,
3682 .read_write_exit_mmio = read_exit_mmio,
3685 static struct read_write_emulator_ops write_emultor = {
3686 .read_write_emulate = write_emulate,
3687 .read_write_mmio = write_mmio,
3688 .read_write_exit_mmio = write_exit_mmio,
3692 static int emulator_read_write_onepage(unsigned long addr, void *val,
3694 struct x86_exception *exception,
3695 struct kvm_vcpu *vcpu,
3696 struct read_write_emulator_ops *ops)
3700 bool write = ops->write;
3702 if (ops->read_write_prepare &&
3703 ops->read_write_prepare(vcpu, val, bytes))
3704 return X86EMUL_CONTINUE;
3706 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3709 return X86EMUL_PROPAGATE_FAULT;
3711 /* For APIC access vmexit */
3715 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3716 return X86EMUL_CONTINUE;
3720 * Is this MMIO handled locally?
3722 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3723 if (handled == bytes)
3724 return X86EMUL_CONTINUE;
3730 vcpu->mmio_needed = 1;
3731 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3732 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3733 vcpu->mmio_size = bytes;
3734 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3735 vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3736 vcpu->mmio_index = 0;
3738 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3741 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3742 void *val, unsigned int bytes,
3743 struct x86_exception *exception,
3744 struct read_write_emulator_ops *ops)
3746 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3748 /* Crossing a page boundary? */
3749 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3752 now = -addr & ~PAGE_MASK;
3753 rc = emulator_read_write_onepage(addr, val, now, exception,
3756 if (rc != X86EMUL_CONTINUE)
3763 return emulator_read_write_onepage(addr, val, bytes, exception,
3767 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3771 struct x86_exception *exception)
3773 return emulator_read_write(ctxt, addr, val, bytes,
3774 exception, &read_emultor);
3777 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3781 struct x86_exception *exception)
3783 return emulator_read_write(ctxt, addr, (void *)val, bytes,
3784 exception, &write_emultor);
3787 #define CMPXCHG_TYPE(t, ptr, old, new) \
3788 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3790 #ifdef CONFIG_X86_64
3791 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3793 # define CMPXCHG64(ptr, old, new) \
3794 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3797 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3802 struct x86_exception *exception)
3804 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3810 /* guests cmpxchg8b have to be emulated atomically */
3811 if (bytes > 8 || (bytes & (bytes - 1)))
3814 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3816 if (gpa == UNMAPPED_GVA ||
3817 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3820 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3823 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3824 if (is_error_page(page)) {
3825 kvm_release_page_clean(page);
3829 kaddr = kmap_atomic(page, KM_USER0);
3830 kaddr += offset_in_page(gpa);
3833 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3836 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3839 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3842 exchanged = CMPXCHG64(kaddr, old, new);
3847 kunmap_atomic(kaddr, KM_USER0);
3848 kvm_release_page_dirty(page);
3851 return X86EMUL_CMPXCHG_FAILED;
3853 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3855 return X86EMUL_CONTINUE;
3858 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3860 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3863 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3865 /* TODO: String I/O for in kernel device */
3868 if (vcpu->arch.pio.in)
3869 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3870 vcpu->arch.pio.size, pd);
3872 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3873 vcpu->arch.pio.port, vcpu->arch.pio.size,
3878 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3879 unsigned short port, void *val,
3880 unsigned int count, bool in)
3882 trace_kvm_pio(!in, port, size, count);
3884 vcpu->arch.pio.port = port;
3885 vcpu->arch.pio.in = in;
3886 vcpu->arch.pio.count = count;
3887 vcpu->arch.pio.size = size;
3889 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3890 vcpu->arch.pio.count = 0;
3894 vcpu->run->exit_reason = KVM_EXIT_IO;
3895 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3896 vcpu->run->io.size = size;
3897 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3898 vcpu->run->io.count = count;
3899 vcpu->run->io.port = port;
3904 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3905 int size, unsigned short port, void *val,
3908 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3911 if (vcpu->arch.pio.count)
3914 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3917 memcpy(val, vcpu->arch.pio_data, size * count);
3918 vcpu->arch.pio.count = 0;
3925 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3926 int size, unsigned short port,
3927 const void *val, unsigned int count)
3929 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3931 memcpy(vcpu->arch.pio_data, val, size * count);
3932 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3935 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3937 return kvm_x86_ops->get_segment_base(vcpu, seg);
3940 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3942 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3945 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3947 if (!need_emulate_wbinvd(vcpu))
3948 return X86EMUL_CONTINUE;
3950 if (kvm_x86_ops->has_wbinvd_exit()) {
3951 int cpu = get_cpu();
3953 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3954 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3955 wbinvd_ipi, NULL, 1);
3957 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3960 return X86EMUL_CONTINUE;
3962 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3964 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3966 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3969 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3971 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3974 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3977 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
3980 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3982 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3985 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
3987 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3988 unsigned long value;
3992 value = kvm_read_cr0(vcpu);
3995 value = vcpu->arch.cr2;
3998 value = kvm_read_cr3(vcpu);
4001 value = kvm_read_cr4(vcpu);
4004 value = kvm_get_cr8(vcpu);
4007 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4014 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4016 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4021 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4024 vcpu->arch.cr2 = val;
4027 res = kvm_set_cr3(vcpu, val);
4030 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4033 res = kvm_set_cr8(vcpu, val);
4036 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4043 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4045 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4048 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4050 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4053 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4055 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4058 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4060 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4063 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4065 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4068 static unsigned long emulator_get_cached_segment_base(
4069 struct x86_emulate_ctxt *ctxt, int seg)
4071 return get_segment_base(emul_to_vcpu(ctxt), seg);
4074 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4075 struct desc_struct *desc, u32 *base3,
4078 struct kvm_segment var;
4080 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4081 *selector = var.selector;
4088 set_desc_limit(desc, var.limit);
4089 set_desc_base(desc, (unsigned long)var.base);
4090 #ifdef CONFIG_X86_64
4092 *base3 = var.base >> 32;
4094 desc->type = var.type;
4096 desc->dpl = var.dpl;
4097 desc->p = var.present;
4098 desc->avl = var.avl;
4106 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4107 struct desc_struct *desc, u32 base3,
4110 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4111 struct kvm_segment var;
4113 var.selector = selector;
4114 var.base = get_desc_base(desc);
4115 #ifdef CONFIG_X86_64
4116 var.base |= ((u64)base3) << 32;
4118 var.limit = get_desc_limit(desc);
4120 var.limit = (var.limit << 12) | 0xfff;
4121 var.type = desc->type;
4122 var.present = desc->p;
4123 var.dpl = desc->dpl;
4128 var.avl = desc->avl;
4129 var.present = desc->p;
4130 var.unusable = !var.present;
4133 kvm_set_segment(vcpu, &var, seg);
4137 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4138 u32 msr_index, u64 *pdata)
4140 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4143 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4144 u32 msr_index, u64 data)
4146 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4149 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4151 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4154 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4157 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4159 * CR0.TS may reference the host fpu state, not the guest fpu state,
4160 * so it may be clear at this point.
4165 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4170 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4171 struct x86_instruction_info *info,
4172 enum x86_intercept_stage stage)
4174 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4177 static struct x86_emulate_ops emulate_ops = {
4178 .read_std = kvm_read_guest_virt_system,
4179 .write_std = kvm_write_guest_virt_system,
4180 .fetch = kvm_fetch_guest_virt,
4181 .read_emulated = emulator_read_emulated,
4182 .write_emulated = emulator_write_emulated,
4183 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4184 .invlpg = emulator_invlpg,
4185 .pio_in_emulated = emulator_pio_in_emulated,
4186 .pio_out_emulated = emulator_pio_out_emulated,
4187 .get_segment = emulator_get_segment,
4188 .set_segment = emulator_set_segment,
4189 .get_cached_segment_base = emulator_get_cached_segment_base,
4190 .get_gdt = emulator_get_gdt,
4191 .get_idt = emulator_get_idt,
4192 .set_gdt = emulator_set_gdt,
4193 .set_idt = emulator_set_idt,
4194 .get_cr = emulator_get_cr,
4195 .set_cr = emulator_set_cr,
4196 .cpl = emulator_get_cpl,
4197 .get_dr = emulator_get_dr,
4198 .set_dr = emulator_set_dr,
4199 .set_msr = emulator_set_msr,
4200 .get_msr = emulator_get_msr,
4201 .halt = emulator_halt,
4202 .wbinvd = emulator_wbinvd,
4203 .fix_hypercall = emulator_fix_hypercall,
4204 .get_fpu = emulator_get_fpu,
4205 .put_fpu = emulator_put_fpu,
4206 .intercept = emulator_intercept,
4209 static void cache_all_regs(struct kvm_vcpu *vcpu)
4211 kvm_register_read(vcpu, VCPU_REGS_RAX);
4212 kvm_register_read(vcpu, VCPU_REGS_RSP);
4213 kvm_register_read(vcpu, VCPU_REGS_RIP);
4214 vcpu->arch.regs_dirty = ~0;
4217 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4219 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4221 * an sti; sti; sequence only disable interrupts for the first
4222 * instruction. So, if the last instruction, be it emulated or
4223 * not, left the system with the INT_STI flag enabled, it
4224 * means that the last instruction is an sti. We should not
4225 * leave the flag on in this case. The same goes for mov ss
4227 if (!(int_shadow & mask))
4228 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4231 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4233 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4234 if (ctxt->exception.vector == PF_VECTOR)
4235 kvm_propagate_fault(vcpu, &ctxt->exception);
4236 else if (ctxt->exception.error_code_valid)
4237 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4238 ctxt->exception.error_code);
4240 kvm_queue_exception(vcpu, ctxt->exception.vector);
4243 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4244 const unsigned long *regs)
4246 memset(&ctxt->twobyte, 0,
4247 (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4248 memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4250 ctxt->fetch.start = 0;
4251 ctxt->fetch.end = 0;
4252 ctxt->io_read.pos = 0;
4253 ctxt->io_read.end = 0;
4254 ctxt->mem_read.pos = 0;
4255 ctxt->mem_read.end = 0;
4258 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4260 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4264 * TODO: fix emulate.c to use guest_read/write_register
4265 * instead of direct ->regs accesses, can save hundred cycles
4266 * on Intel for instructions that don't read/change RSP, for
4269 cache_all_regs(vcpu);
4271 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4273 ctxt->eflags = kvm_get_rflags(vcpu);
4274 ctxt->eip = kvm_rip_read(vcpu);
4275 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4276 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4277 cs_l ? X86EMUL_MODE_PROT64 :
4278 cs_db ? X86EMUL_MODE_PROT32 :
4279 X86EMUL_MODE_PROT16;
4280 ctxt->guest_mode = is_guest_mode(vcpu);
4282 init_decode_cache(ctxt, vcpu->arch.regs);
4283 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4286 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4288 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4291 init_emulate_ctxt(vcpu);
4295 ctxt->_eip = ctxt->eip + inc_eip;
4296 ret = emulate_int_real(ctxt, irq);
4298 if (ret != X86EMUL_CONTINUE)
4299 return EMULATE_FAIL;
4301 ctxt->eip = ctxt->_eip;
4302 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4303 kvm_rip_write(vcpu, ctxt->eip);
4304 kvm_set_rflags(vcpu, ctxt->eflags);
4306 if (irq == NMI_VECTOR)
4307 vcpu->arch.nmi_pending = 0;
4309 vcpu->arch.interrupt.pending = false;
4311 return EMULATE_DONE;
4313 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4315 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4317 int r = EMULATE_DONE;
4319 ++vcpu->stat.insn_emulation_fail;
4320 trace_kvm_emulate_insn_failed(vcpu);
4321 if (!is_guest_mode(vcpu)) {
4322 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4323 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4324 vcpu->run->internal.ndata = 0;
4327 kvm_queue_exception(vcpu, UD_VECTOR);
4332 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4340 * if emulation was due to access to shadowed page table
4341 * and it failed try to unshadow page and re-entetr the
4342 * guest to let CPU execute the instruction.
4344 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4347 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4349 if (gpa == UNMAPPED_GVA)
4350 return true; /* let cpu generate fault */
4352 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4358 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4359 unsigned long cr2, int emulation_type)
4361 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4362 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4364 last_retry_eip = vcpu->arch.last_retry_eip;
4365 last_retry_addr = vcpu->arch.last_retry_addr;
4368 * If the emulation is caused by #PF and it is non-page_table
4369 * writing instruction, it means the VM-EXIT is caused by shadow
4370 * page protected, we can zap the shadow page and retry this
4371 * instruction directly.
4373 * Note: if the guest uses a non-page-table modifying instruction
4374 * on the PDE that points to the instruction, then we will unmap
4375 * the instruction and go to an infinite loop. So, we cache the
4376 * last retried eip and the last fault address, if we meet the eip
4377 * and the address again, we can break out of the potential infinite
4380 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4382 if (!(emulation_type & EMULTYPE_RETRY))
4385 if (x86_page_table_writing_insn(ctxt))
4388 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4391 vcpu->arch.last_retry_eip = ctxt->eip;
4392 vcpu->arch.last_retry_addr = cr2;
4394 if (!vcpu->arch.mmu.direct_map)
4395 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4397 kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4402 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4409 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4410 bool writeback = true;
4412 kvm_clear_exception_queue(vcpu);
4414 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4415 init_emulate_ctxt(vcpu);
4416 ctxt->interruptibility = 0;
4417 ctxt->have_exception = false;
4418 ctxt->perm_ok = false;
4420 ctxt->only_vendor_specific_insn
4421 = emulation_type & EMULTYPE_TRAP_UD;
4423 r = x86_decode_insn(ctxt, insn, insn_len);
4425 trace_kvm_emulate_insn_start(vcpu);
4426 ++vcpu->stat.insn_emulation;
4427 if (r != EMULATION_OK) {
4428 if (emulation_type & EMULTYPE_TRAP_UD)
4429 return EMULATE_FAIL;
4430 if (reexecute_instruction(vcpu, cr2))
4431 return EMULATE_DONE;
4432 if (emulation_type & EMULTYPE_SKIP)
4433 return EMULATE_FAIL;
4434 return handle_emulation_failure(vcpu);
4438 if (emulation_type & EMULTYPE_SKIP) {
4439 kvm_rip_write(vcpu, ctxt->_eip);
4440 return EMULATE_DONE;
4443 if (retry_instruction(ctxt, cr2, emulation_type))
4444 return EMULATE_DONE;
4446 /* this is needed for vmware backdoor interface to work since it
4447 changes registers values during IO operation */
4448 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4449 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4450 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4454 r = x86_emulate_insn(ctxt);
4456 if (r == EMULATION_INTERCEPTED)
4457 return EMULATE_DONE;
4459 if (r == EMULATION_FAILED) {
4460 if (reexecute_instruction(vcpu, cr2))
4461 return EMULATE_DONE;
4463 return handle_emulation_failure(vcpu);
4466 if (ctxt->have_exception) {
4467 inject_emulated_exception(vcpu);
4469 } else if (vcpu->arch.pio.count) {
4470 if (!vcpu->arch.pio.in)
4471 vcpu->arch.pio.count = 0;
4474 r = EMULATE_DO_MMIO;
4475 } else if (vcpu->mmio_needed) {
4476 if (!vcpu->mmio_is_write)
4478 r = EMULATE_DO_MMIO;
4479 } else if (r == EMULATION_RESTART)
4485 toggle_interruptibility(vcpu, ctxt->interruptibility);
4486 kvm_set_rflags(vcpu, ctxt->eflags);
4487 kvm_make_request(KVM_REQ_EVENT, vcpu);
4488 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4489 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4490 kvm_rip_write(vcpu, ctxt->eip);
4492 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4496 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4498 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4500 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4501 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4502 size, port, &val, 1);
4503 /* do not return to emulator after return from userspace */
4504 vcpu->arch.pio.count = 0;
4507 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4509 static void tsc_bad(void *info)
4511 __this_cpu_write(cpu_tsc_khz, 0);
4514 static void tsc_khz_changed(void *data)
4516 struct cpufreq_freqs *freq = data;
4517 unsigned long khz = 0;
4521 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4522 khz = cpufreq_quick_get(raw_smp_processor_id());
4525 __this_cpu_write(cpu_tsc_khz, khz);
4528 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4531 struct cpufreq_freqs *freq = data;
4533 struct kvm_vcpu *vcpu;
4534 int i, send_ipi = 0;
4537 * We allow guests to temporarily run on slowing clocks,
4538 * provided we notify them after, or to run on accelerating
4539 * clocks, provided we notify them before. Thus time never
4542 * However, we have a problem. We can't atomically update
4543 * the frequency of a given CPU from this function; it is
4544 * merely a notifier, which can be called from any CPU.
4545 * Changing the TSC frequency at arbitrary points in time
4546 * requires a recomputation of local variables related to
4547 * the TSC for each VCPU. We must flag these local variables
4548 * to be updated and be sure the update takes place with the
4549 * new frequency before any guests proceed.
4551 * Unfortunately, the combination of hotplug CPU and frequency
4552 * change creates an intractable locking scenario; the order
4553 * of when these callouts happen is undefined with respect to
4554 * CPU hotplug, and they can race with each other. As such,
4555 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4556 * undefined; you can actually have a CPU frequency change take
4557 * place in between the computation of X and the setting of the
4558 * variable. To protect against this problem, all updates of
4559 * the per_cpu tsc_khz variable are done in an interrupt
4560 * protected IPI, and all callers wishing to update the value
4561 * must wait for a synchronous IPI to complete (which is trivial
4562 * if the caller is on the CPU already). This establishes the
4563 * necessary total order on variable updates.
4565 * Note that because a guest time update may take place
4566 * anytime after the setting of the VCPU's request bit, the
4567 * correct TSC value must be set before the request. However,
4568 * to ensure the update actually makes it to any guest which
4569 * starts running in hardware virtualization between the set
4570 * and the acquisition of the spinlock, we must also ping the
4571 * CPU after setting the request bit.
4575 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4577 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4580 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4582 raw_spin_lock(&kvm_lock);
4583 list_for_each_entry(kvm, &vm_list, vm_list) {
4584 kvm_for_each_vcpu(i, vcpu, kvm) {
4585 if (vcpu->cpu != freq->cpu)
4587 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4588 if (vcpu->cpu != smp_processor_id())
4592 raw_spin_unlock(&kvm_lock);
4594 if (freq->old < freq->new && send_ipi) {
4596 * We upscale the frequency. Must make the guest
4597 * doesn't see old kvmclock values while running with
4598 * the new frequency, otherwise we risk the guest sees
4599 * time go backwards.
4601 * In case we update the frequency for another cpu
4602 * (which might be in guest context) send an interrupt
4603 * to kick the cpu out of guest context. Next time
4604 * guest context is entered kvmclock will be updated,
4605 * so the guest will not see stale values.
4607 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4612 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4613 .notifier_call = kvmclock_cpufreq_notifier
4616 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4617 unsigned long action, void *hcpu)
4619 unsigned int cpu = (unsigned long)hcpu;
4623 case CPU_DOWN_FAILED:
4624 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4626 case CPU_DOWN_PREPARE:
4627 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4633 static struct notifier_block kvmclock_cpu_notifier_block = {
4634 .notifier_call = kvmclock_cpu_notifier,
4635 .priority = -INT_MAX
4638 static void kvm_timer_init(void)
4642 max_tsc_khz = tsc_khz;
4643 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4644 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4645 #ifdef CONFIG_CPU_FREQ
4646 struct cpufreq_policy policy;
4647 memset(&policy, 0, sizeof(policy));
4649 cpufreq_get_policy(&policy, cpu);
4650 if (policy.cpuinfo.max_freq)
4651 max_tsc_khz = policy.cpuinfo.max_freq;
4654 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4655 CPUFREQ_TRANSITION_NOTIFIER);
4657 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4658 for_each_online_cpu(cpu)
4659 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4662 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4664 int kvm_is_in_guest(void)
4666 return __this_cpu_read(current_vcpu) != NULL;
4669 static int kvm_is_user_mode(void)
4673 if (__this_cpu_read(current_vcpu))
4674 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4676 return user_mode != 0;
4679 static unsigned long kvm_get_guest_ip(void)
4681 unsigned long ip = 0;
4683 if (__this_cpu_read(current_vcpu))
4684 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4689 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4690 .is_in_guest = kvm_is_in_guest,
4691 .is_user_mode = kvm_is_user_mode,
4692 .get_guest_ip = kvm_get_guest_ip,
4695 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4697 __this_cpu_write(current_vcpu, vcpu);
4699 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4701 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4703 __this_cpu_write(current_vcpu, NULL);
4705 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4707 static void kvm_set_mmio_spte_mask(void)
4710 int maxphyaddr = boot_cpu_data.x86_phys_bits;
4713 * Set the reserved bits and the present bit of an paging-structure
4714 * entry to generate page fault with PFER.RSV = 1.
4716 mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4719 #ifdef CONFIG_X86_64
4721 * If reserved bit is not supported, clear the present bit to disable
4724 if (maxphyaddr == 52)
4728 kvm_mmu_set_mmio_spte_mask(mask);
4731 int kvm_arch_init(void *opaque)
4734 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4737 printk(KERN_ERR "kvm: already loaded the other module\n");
4742 if (!ops->cpu_has_kvm_support()) {
4743 printk(KERN_ERR "kvm: no hardware support\n");
4747 if (ops->disabled_by_bios()) {
4748 printk(KERN_ERR "kvm: disabled by bios\n");
4753 r = kvm_mmu_module_init();
4757 kvm_set_mmio_spte_mask();
4758 kvm_init_msr_list();
4761 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4762 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4766 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4769 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4777 void kvm_arch_exit(void)
4779 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4781 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4782 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4783 CPUFREQ_TRANSITION_NOTIFIER);
4784 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4786 kvm_mmu_module_exit();
4789 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4791 ++vcpu->stat.halt_exits;
4792 if (irqchip_in_kernel(vcpu->kvm)) {
4793 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4796 vcpu->run->exit_reason = KVM_EXIT_HLT;
4800 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4802 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4804 u64 param, ingpa, outgpa, ret;
4805 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4806 bool fast, longmode;
4810 * hypercall generates UD from non zero cpl and real mode
4813 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4814 kvm_queue_exception(vcpu, UD_VECTOR);
4818 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4819 longmode = is_long_mode(vcpu) && cs_l == 1;
4822 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4823 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4824 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4825 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4826 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4827 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4829 #ifdef CONFIG_X86_64
4831 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4832 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4833 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4837 code = param & 0xffff;
4838 fast = (param >> 16) & 0x1;
4839 rep_cnt = (param >> 32) & 0xfff;
4840 rep_idx = (param >> 48) & 0xfff;
4842 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4845 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4846 kvm_vcpu_on_spin(vcpu);
4849 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4853 ret = res | (((u64)rep_done & 0xfff) << 32);
4855 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4857 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4858 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4864 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4866 unsigned long nr, a0, a1, a2, a3, ret;
4869 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4870 return kvm_hv_hypercall(vcpu);
4872 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4873 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4874 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4875 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4876 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4878 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4880 if (!is_long_mode(vcpu)) {
4888 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4894 case KVM_HC_VAPIC_POLL_IRQ:
4902 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4903 ++vcpu->stat.hypercalls;
4906 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4908 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4910 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4911 char instruction[3];
4912 unsigned long rip = kvm_rip_read(vcpu);
4915 * Blow out the MMU to ensure that no other VCPU has an active mapping
4916 * to ensure that the updated hypercall appears atomically across all
4919 kvm_mmu_zap_all(vcpu->kvm);
4921 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4923 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4927 * Check if userspace requested an interrupt window, and that the
4928 * interrupt window is open.
4930 * No need to exit to userspace if we already have an interrupt queued.
4932 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4934 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4935 vcpu->run->request_interrupt_window &&
4936 kvm_arch_interrupt_allowed(vcpu));
4939 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4941 struct kvm_run *kvm_run = vcpu->run;
4943 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4944 kvm_run->cr8 = kvm_get_cr8(vcpu);
4945 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4946 if (irqchip_in_kernel(vcpu->kvm))
4947 kvm_run->ready_for_interrupt_injection = 1;
4949 kvm_run->ready_for_interrupt_injection =
4950 kvm_arch_interrupt_allowed(vcpu) &&
4951 !kvm_cpu_has_interrupt(vcpu) &&
4952 !kvm_event_needs_reinjection(vcpu);
4955 static void vapic_enter(struct kvm_vcpu *vcpu)
4957 struct kvm_lapic *apic = vcpu->arch.apic;
4960 if (!apic || !apic->vapic_addr)
4963 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4965 vcpu->arch.apic->vapic_page = page;
4968 static void vapic_exit(struct kvm_vcpu *vcpu)
4970 struct kvm_lapic *apic = vcpu->arch.apic;
4973 if (!apic || !apic->vapic_addr)
4976 idx = srcu_read_lock(&vcpu->kvm->srcu);
4977 kvm_release_page_dirty(apic->vapic_page);
4978 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4979 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4982 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4986 if (!kvm_x86_ops->update_cr8_intercept)
4989 if (!vcpu->arch.apic)
4992 if (!vcpu->arch.apic->vapic_addr)
4993 max_irr = kvm_lapic_find_highest_irr(vcpu);
5000 tpr = kvm_lapic_get_cr8(vcpu);
5002 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5005 static void inject_pending_event(struct kvm_vcpu *vcpu)
5007 /* try to reinject previous events if any */
5008 if (vcpu->arch.exception.pending) {
5009 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5010 vcpu->arch.exception.has_error_code,
5011 vcpu->arch.exception.error_code);
5012 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5013 vcpu->arch.exception.has_error_code,
5014 vcpu->arch.exception.error_code,
5015 vcpu->arch.exception.reinject);
5019 if (vcpu->arch.nmi_injected) {
5020 kvm_x86_ops->set_nmi(vcpu);
5024 if (vcpu->arch.interrupt.pending) {
5025 kvm_x86_ops->set_irq(vcpu);
5029 /* try to inject new event if pending */
5030 if (vcpu->arch.nmi_pending) {
5031 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5032 --vcpu->arch.nmi_pending;
5033 vcpu->arch.nmi_injected = true;
5034 kvm_x86_ops->set_nmi(vcpu);
5036 } else if (kvm_cpu_has_interrupt(vcpu)) {
5037 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5038 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5040 kvm_x86_ops->set_irq(vcpu);
5045 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5047 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5048 !vcpu->guest_xcr0_loaded) {
5049 /* kvm_set_xcr() also depends on this */
5050 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5051 vcpu->guest_xcr0_loaded = 1;
5055 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5057 if (vcpu->guest_xcr0_loaded) {
5058 if (vcpu->arch.xcr0 != host_xcr0)
5059 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5060 vcpu->guest_xcr0_loaded = 0;
5064 static void process_nmi(struct kvm_vcpu *vcpu)
5069 * x86 is limited to one NMI running, and one NMI pending after it.
5070 * If an NMI is already in progress, limit further NMIs to just one.
5071 * Otherwise, allow two (and we'll inject the first one immediately).
5073 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5076 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5077 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5078 kvm_make_request(KVM_REQ_EVENT, vcpu);
5081 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5084 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5085 vcpu->run->request_interrupt_window;
5086 bool req_immediate_exit = 0;
5088 if (vcpu->requests) {
5089 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5090 kvm_mmu_unload(vcpu);
5091 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5092 __kvm_migrate_timers(vcpu);
5093 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5094 r = kvm_guest_time_update(vcpu);
5098 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5099 kvm_mmu_sync_roots(vcpu);
5100 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5101 kvm_x86_ops->tlb_flush(vcpu);
5102 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5103 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5107 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5108 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5112 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5113 vcpu->fpu_active = 0;
5114 kvm_x86_ops->fpu_deactivate(vcpu);
5116 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5117 /* Page is swapped out. Do synthetic halt */
5118 vcpu->arch.apf.halted = true;
5122 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5123 record_steal_time(vcpu);
5124 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5126 req_immediate_exit =
5127 kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5128 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5129 kvm_handle_pmu_event(vcpu);
5130 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5131 kvm_deliver_pmi(vcpu);
5134 r = kvm_mmu_reload(vcpu);
5138 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5139 inject_pending_event(vcpu);
5141 /* enable NMI/IRQ window open exits if needed */
5142 if (vcpu->arch.nmi_pending)
5143 kvm_x86_ops->enable_nmi_window(vcpu);
5144 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5145 kvm_x86_ops->enable_irq_window(vcpu);
5147 if (kvm_lapic_enabled(vcpu)) {
5148 update_cr8_intercept(vcpu);
5149 kvm_lapic_sync_to_vapic(vcpu);
5155 kvm_x86_ops->prepare_guest_switch(vcpu);
5156 if (vcpu->fpu_active)
5157 kvm_load_guest_fpu(vcpu);
5158 kvm_load_guest_xcr0(vcpu);
5160 vcpu->mode = IN_GUEST_MODE;
5162 /* We should set ->mode before check ->requests,
5163 * see the comment in make_all_cpus_request.
5167 local_irq_disable();
5169 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5170 || need_resched() || signal_pending(current)) {
5171 vcpu->mode = OUTSIDE_GUEST_MODE;
5175 kvm_x86_ops->cancel_injection(vcpu);
5180 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5182 if (req_immediate_exit)
5183 smp_send_reschedule(vcpu->cpu);
5187 if (unlikely(vcpu->arch.switch_db_regs)) {
5189 set_debugreg(vcpu->arch.eff_db[0], 0);
5190 set_debugreg(vcpu->arch.eff_db[1], 1);
5191 set_debugreg(vcpu->arch.eff_db[2], 2);
5192 set_debugreg(vcpu->arch.eff_db[3], 3);
5195 trace_kvm_entry(vcpu->vcpu_id);
5196 kvm_x86_ops->run(vcpu);
5199 * If the guest has used debug registers, at least dr7
5200 * will be disabled while returning to the host.
5201 * If we don't have active breakpoints in the host, we don't
5202 * care about the messed up debug address registers. But if
5203 * we have some of them active, restore the old state.
5205 if (hw_breakpoint_active())
5206 hw_breakpoint_restore();
5208 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5210 vcpu->mode = OUTSIDE_GUEST_MODE;
5217 * We must have an instruction between local_irq_enable() and
5218 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5219 * the interrupt shadow. The stat.exits increment will do nicely.
5220 * But we need to prevent reordering, hence this barrier():
5228 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5231 * Profile KVM exit RIPs:
5233 if (unlikely(prof_on == KVM_PROFILING)) {
5234 unsigned long rip = kvm_rip_read(vcpu);
5235 profile_hit(KVM_PROFILING, (void *)rip);
5239 kvm_lapic_sync_from_vapic(vcpu);
5241 r = kvm_x86_ops->handle_exit(vcpu);
5247 static int __vcpu_run(struct kvm_vcpu *vcpu)
5250 struct kvm *kvm = vcpu->kvm;
5252 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5253 pr_debug("vcpu %d received sipi with vector # %x\n",
5254 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5255 kvm_lapic_reset(vcpu);
5256 r = kvm_arch_vcpu_reset(vcpu);
5259 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5262 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5267 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5268 !vcpu->arch.apf.halted)
5269 r = vcpu_enter_guest(vcpu);
5271 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5272 kvm_vcpu_block(vcpu);
5273 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5274 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5276 switch(vcpu->arch.mp_state) {
5277 case KVM_MP_STATE_HALTED:
5278 vcpu->arch.mp_state =
5279 KVM_MP_STATE_RUNNABLE;
5280 case KVM_MP_STATE_RUNNABLE:
5281 vcpu->arch.apf.halted = false;
5283 case KVM_MP_STATE_SIPI_RECEIVED:
5294 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5295 if (kvm_cpu_has_pending_timer(vcpu))
5296 kvm_inject_pending_timer_irqs(vcpu);
5298 if (dm_request_for_irq_injection(vcpu)) {
5300 vcpu->run->exit_reason = KVM_EXIT_INTR;
5301 ++vcpu->stat.request_irq_exits;
5304 kvm_check_async_pf_completion(vcpu);
5306 if (signal_pending(current)) {
5308 vcpu->run->exit_reason = KVM_EXIT_INTR;
5309 ++vcpu->stat.signal_exits;
5311 if (need_resched()) {
5312 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5314 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5318 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5325 static int complete_mmio(struct kvm_vcpu *vcpu)
5327 struct kvm_run *run = vcpu->run;
5330 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5333 if (vcpu->mmio_needed) {
5334 vcpu->mmio_needed = 0;
5335 if (!vcpu->mmio_is_write)
5336 memcpy(vcpu->mmio_data + vcpu->mmio_index,
5338 vcpu->mmio_index += 8;
5339 if (vcpu->mmio_index < vcpu->mmio_size) {
5340 run->exit_reason = KVM_EXIT_MMIO;
5341 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5342 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5343 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5344 run->mmio.is_write = vcpu->mmio_is_write;
5345 vcpu->mmio_needed = 1;
5348 if (vcpu->mmio_is_write)
5350 vcpu->mmio_read_completed = 1;
5352 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5353 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5354 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5355 if (r != EMULATE_DONE)
5360 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5365 if (!tsk_used_math(current) && init_fpu(current))
5368 if (vcpu->sigset_active)
5369 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5371 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5372 kvm_vcpu_block(vcpu);
5373 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5378 /* re-sync apic's tpr */
5379 if (!irqchip_in_kernel(vcpu->kvm)) {
5380 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5386 r = complete_mmio(vcpu);
5390 r = __vcpu_run(vcpu);
5393 post_kvm_run_save(vcpu);
5394 if (vcpu->sigset_active)
5395 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5400 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5402 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5404 * We are here if userspace calls get_regs() in the middle of
5405 * instruction emulation. Registers state needs to be copied
5406 * back from emulation context to vcpu. Usrapace shouldn't do
5407 * that usually, but some bad designed PV devices (vmware
5408 * backdoor interface) need this to work
5410 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5411 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5412 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5414 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5415 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5416 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5417 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5418 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5419 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5420 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5421 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5422 #ifdef CONFIG_X86_64
5423 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5424 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5425 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5426 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5427 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5428 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5429 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5430 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5433 regs->rip = kvm_rip_read(vcpu);
5434 regs->rflags = kvm_get_rflags(vcpu);
5439 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5441 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5442 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5444 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5445 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5446 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5447 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5448 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5449 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5450 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5451 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5452 #ifdef CONFIG_X86_64
5453 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5454 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5455 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5456 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5457 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5458 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5459 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5460 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5463 kvm_rip_write(vcpu, regs->rip);
5464 kvm_set_rflags(vcpu, regs->rflags);
5466 vcpu->arch.exception.pending = false;
5468 kvm_make_request(KVM_REQ_EVENT, vcpu);
5473 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5475 struct kvm_segment cs;
5477 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5481 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5483 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5484 struct kvm_sregs *sregs)
5488 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5489 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5490 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5491 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5492 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5493 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5495 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5496 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5498 kvm_x86_ops->get_idt(vcpu, &dt);
5499 sregs->idt.limit = dt.size;
5500 sregs->idt.base = dt.address;
5501 kvm_x86_ops->get_gdt(vcpu, &dt);
5502 sregs->gdt.limit = dt.size;
5503 sregs->gdt.base = dt.address;
5505 sregs->cr0 = kvm_read_cr0(vcpu);
5506 sregs->cr2 = vcpu->arch.cr2;
5507 sregs->cr3 = kvm_read_cr3(vcpu);
5508 sregs->cr4 = kvm_read_cr4(vcpu);
5509 sregs->cr8 = kvm_get_cr8(vcpu);
5510 sregs->efer = vcpu->arch.efer;
5511 sregs->apic_base = kvm_get_apic_base(vcpu);
5513 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5515 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5516 set_bit(vcpu->arch.interrupt.nr,
5517 (unsigned long *)sregs->interrupt_bitmap);
5522 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5523 struct kvm_mp_state *mp_state)
5525 mp_state->mp_state = vcpu->arch.mp_state;
5529 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5530 struct kvm_mp_state *mp_state)
5532 vcpu->arch.mp_state = mp_state->mp_state;
5533 kvm_make_request(KVM_REQ_EVENT, vcpu);
5537 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5538 bool has_error_code, u32 error_code)
5540 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5543 init_emulate_ctxt(vcpu);
5545 ret = emulator_task_switch(ctxt, tss_selector, reason,
5546 has_error_code, error_code);
5549 return EMULATE_FAIL;
5551 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5552 kvm_rip_write(vcpu, ctxt->eip);
5553 kvm_set_rflags(vcpu, ctxt->eflags);
5554 kvm_make_request(KVM_REQ_EVENT, vcpu);
5555 return EMULATE_DONE;
5557 EXPORT_SYMBOL_GPL(kvm_task_switch);
5559 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5560 struct kvm_sregs *sregs)
5562 int mmu_reset_needed = 0;
5563 int pending_vec, max_bits, idx;
5566 dt.size = sregs->idt.limit;
5567 dt.address = sregs->idt.base;
5568 kvm_x86_ops->set_idt(vcpu, &dt);
5569 dt.size = sregs->gdt.limit;
5570 dt.address = sregs->gdt.base;
5571 kvm_x86_ops->set_gdt(vcpu, &dt);
5573 vcpu->arch.cr2 = sregs->cr2;
5574 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5575 vcpu->arch.cr3 = sregs->cr3;
5576 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5578 kvm_set_cr8(vcpu, sregs->cr8);
5580 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5581 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5582 kvm_set_apic_base(vcpu, sregs->apic_base);
5584 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5585 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5586 vcpu->arch.cr0 = sregs->cr0;
5588 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5589 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5590 if (sregs->cr4 & X86_CR4_OSXSAVE)
5591 kvm_update_cpuid(vcpu);
5593 idx = srcu_read_lock(&vcpu->kvm->srcu);
5594 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5595 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5596 mmu_reset_needed = 1;
5598 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5600 if (mmu_reset_needed)
5601 kvm_mmu_reset_context(vcpu);
5603 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5604 pending_vec = find_first_bit(
5605 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5606 if (pending_vec < max_bits) {
5607 kvm_queue_interrupt(vcpu, pending_vec, false);
5608 pr_debug("Set back pending irq %d\n", pending_vec);
5611 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5612 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5613 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5614 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5615 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5616 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5618 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5619 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5621 update_cr8_intercept(vcpu);
5623 /* Older userspace won't unhalt the vcpu on reset. */
5624 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5625 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5627 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5629 kvm_make_request(KVM_REQ_EVENT, vcpu);
5634 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5635 struct kvm_guest_debug *dbg)
5637 unsigned long rflags;
5640 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5642 if (vcpu->arch.exception.pending)
5644 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5645 kvm_queue_exception(vcpu, DB_VECTOR);
5647 kvm_queue_exception(vcpu, BP_VECTOR);
5651 * Read rflags as long as potentially injected trace flags are still
5654 rflags = kvm_get_rflags(vcpu);
5656 vcpu->guest_debug = dbg->control;
5657 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5658 vcpu->guest_debug = 0;
5660 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5661 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5662 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5663 vcpu->arch.switch_db_regs =
5664 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5666 for (i = 0; i < KVM_NR_DB_REGS; i++)
5667 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5668 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5671 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5672 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5673 get_segment_base(vcpu, VCPU_SREG_CS);
5676 * Trigger an rflags update that will inject or remove the trace
5679 kvm_set_rflags(vcpu, rflags);
5681 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5691 * Translate a guest virtual address to a guest physical address.
5693 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5694 struct kvm_translation *tr)
5696 unsigned long vaddr = tr->linear_address;
5700 idx = srcu_read_lock(&vcpu->kvm->srcu);
5701 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5702 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5703 tr->physical_address = gpa;
5704 tr->valid = gpa != UNMAPPED_GVA;
5711 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5713 struct i387_fxsave_struct *fxsave =
5714 &vcpu->arch.guest_fpu.state->fxsave;
5716 memcpy(fpu->fpr, fxsave->st_space, 128);
5717 fpu->fcw = fxsave->cwd;
5718 fpu->fsw = fxsave->swd;
5719 fpu->ftwx = fxsave->twd;
5720 fpu->last_opcode = fxsave->fop;
5721 fpu->last_ip = fxsave->rip;
5722 fpu->last_dp = fxsave->rdp;
5723 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5728 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5730 struct i387_fxsave_struct *fxsave =
5731 &vcpu->arch.guest_fpu.state->fxsave;
5733 memcpy(fxsave->st_space, fpu->fpr, 128);
5734 fxsave->cwd = fpu->fcw;
5735 fxsave->swd = fpu->fsw;
5736 fxsave->twd = fpu->ftwx;
5737 fxsave->fop = fpu->last_opcode;
5738 fxsave->rip = fpu->last_ip;
5739 fxsave->rdp = fpu->last_dp;
5740 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5745 int fx_init(struct kvm_vcpu *vcpu)
5749 err = fpu_alloc(&vcpu->arch.guest_fpu);
5753 fpu_finit(&vcpu->arch.guest_fpu);
5756 * Ensure guest xcr0 is valid for loading
5758 vcpu->arch.xcr0 = XSTATE_FP;
5760 vcpu->arch.cr0 |= X86_CR0_ET;
5764 EXPORT_SYMBOL_GPL(fx_init);
5766 static void fx_free(struct kvm_vcpu *vcpu)
5768 fpu_free(&vcpu->arch.guest_fpu);
5771 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5773 if (vcpu->guest_fpu_loaded)
5777 * Restore all possible states in the guest,
5778 * and assume host would use all available bits.
5779 * Guest xcr0 would be loaded later.
5781 kvm_put_guest_xcr0(vcpu);
5782 vcpu->guest_fpu_loaded = 1;
5783 unlazy_fpu(current);
5784 fpu_restore_checking(&vcpu->arch.guest_fpu);
5788 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5790 kvm_put_guest_xcr0(vcpu);
5792 if (!vcpu->guest_fpu_loaded)
5795 vcpu->guest_fpu_loaded = 0;
5796 fpu_save_init(&vcpu->arch.guest_fpu);
5797 ++vcpu->stat.fpu_reload;
5798 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5802 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5804 kvmclock_reset(vcpu);
5806 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5808 kvm_x86_ops->vcpu_free(vcpu);
5811 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5814 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5815 printk_once(KERN_WARNING
5816 "kvm: SMP vm created on host with unstable TSC; "
5817 "guest TSC will not be reliable\n");
5818 return kvm_x86_ops->vcpu_create(kvm, id);
5821 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5825 vcpu->arch.mtrr_state.have_fixed = 1;
5827 r = kvm_arch_vcpu_reset(vcpu);
5829 r = kvm_mmu_setup(vcpu);
5835 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5837 vcpu->arch.apf.msr_val = 0;
5840 kvm_mmu_unload(vcpu);
5844 kvm_x86_ops->vcpu_free(vcpu);
5847 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5849 atomic_set(&vcpu->arch.nmi_queued, 0);
5850 vcpu->arch.nmi_pending = 0;
5851 vcpu->arch.nmi_injected = false;
5853 vcpu->arch.switch_db_regs = 0;
5854 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5855 vcpu->arch.dr6 = DR6_FIXED_1;
5856 vcpu->arch.dr7 = DR7_FIXED_1;
5858 kvm_make_request(KVM_REQ_EVENT, vcpu);
5859 vcpu->arch.apf.msr_val = 0;
5860 vcpu->arch.st.msr_val = 0;
5862 kvmclock_reset(vcpu);
5864 kvm_clear_async_pf_completion_queue(vcpu);
5865 kvm_async_pf_hash_reset(vcpu);
5866 vcpu->arch.apf.halted = false;
5868 kvm_pmu_reset(vcpu);
5870 return kvm_x86_ops->vcpu_reset(vcpu);
5873 int kvm_arch_hardware_enable(void *garbage)
5876 struct kvm_vcpu *vcpu;
5879 kvm_shared_msr_cpu_online();
5880 list_for_each_entry(kvm, &vm_list, vm_list)
5881 kvm_for_each_vcpu(i, vcpu, kvm)
5882 if (vcpu->cpu == smp_processor_id())
5883 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5884 return kvm_x86_ops->hardware_enable(garbage);
5887 void kvm_arch_hardware_disable(void *garbage)
5889 kvm_x86_ops->hardware_disable(garbage);
5890 drop_user_return_notifiers(garbage);
5893 int kvm_arch_hardware_setup(void)
5895 return kvm_x86_ops->hardware_setup();
5898 void kvm_arch_hardware_unsetup(void)
5900 kvm_x86_ops->hardware_unsetup();
5903 void kvm_arch_check_processor_compat(void *rtn)
5905 kvm_x86_ops->check_processor_compatibility(rtn);
5908 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5914 BUG_ON(vcpu->kvm == NULL);
5917 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5918 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5919 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5921 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5923 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5928 vcpu->arch.pio_data = page_address(page);
5930 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5932 r = kvm_mmu_create(vcpu);
5934 goto fail_free_pio_data;
5936 if (irqchip_in_kernel(kvm)) {
5937 r = kvm_create_lapic(vcpu);
5939 goto fail_mmu_destroy;
5942 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5944 if (!vcpu->arch.mce_banks) {
5946 goto fail_free_lapic;
5948 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5950 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5951 goto fail_free_mce_banks;
5953 kvm_async_pf_hash_reset(vcpu);
5957 fail_free_mce_banks:
5958 kfree(vcpu->arch.mce_banks);
5960 kvm_free_lapic(vcpu);
5962 kvm_mmu_destroy(vcpu);
5964 free_page((unsigned long)vcpu->arch.pio_data);
5969 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5973 kvm_pmu_destroy(vcpu);
5974 kfree(vcpu->arch.mce_banks);
5975 kvm_free_lapic(vcpu);
5976 idx = srcu_read_lock(&vcpu->kvm->srcu);
5977 kvm_mmu_destroy(vcpu);
5978 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5979 free_page((unsigned long)vcpu->arch.pio_data);
5982 int kvm_arch_init_vm(struct kvm *kvm)
5984 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5985 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5987 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5988 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5990 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
5995 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5998 kvm_mmu_unload(vcpu);
6002 static void kvm_free_vcpus(struct kvm *kvm)
6005 struct kvm_vcpu *vcpu;
6008 * Unpin any mmu pages first.
6010 kvm_for_each_vcpu(i, vcpu, kvm) {
6011 kvm_clear_async_pf_completion_queue(vcpu);
6012 kvm_unload_vcpu_mmu(vcpu);
6014 kvm_for_each_vcpu(i, vcpu, kvm)
6015 kvm_arch_vcpu_free(vcpu);
6017 mutex_lock(&kvm->lock);
6018 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6019 kvm->vcpus[i] = NULL;
6021 atomic_set(&kvm->online_vcpus, 0);
6022 mutex_unlock(&kvm->lock);
6025 void kvm_arch_sync_events(struct kvm *kvm)
6027 kvm_free_all_assigned_devices(kvm);
6031 void kvm_arch_destroy_vm(struct kvm *kvm)
6033 kvm_iommu_unmap_guest(kvm);
6034 kfree(kvm->arch.vpic);
6035 kfree(kvm->arch.vioapic);
6036 kvm_free_vcpus(kvm);
6037 if (kvm->arch.apic_access_page)
6038 put_page(kvm->arch.apic_access_page);
6039 if (kvm->arch.ept_identity_pagetable)
6040 put_page(kvm->arch.ept_identity_pagetable);
6043 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6044 struct kvm_memory_slot *memslot,
6045 struct kvm_memory_slot old,
6046 struct kvm_userspace_memory_region *mem,
6049 int npages = memslot->npages;
6050 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6052 /* Prevent internal slot pages from being moved by fork()/COW. */
6053 if (memslot->id >= KVM_MEMORY_SLOTS)
6054 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6056 /*To keep backward compatibility with older userspace,
6057 *x86 needs to hanlde !user_alloc case.
6060 if (npages && !old.rmap) {
6061 unsigned long userspace_addr;
6063 down_write(¤t->mm->mmap_sem);
6064 userspace_addr = do_mmap(NULL, 0,
6066 PROT_READ | PROT_WRITE,
6069 up_write(¤t->mm->mmap_sem);
6071 if (IS_ERR((void *)userspace_addr))
6072 return PTR_ERR((void *)userspace_addr);
6074 memslot->userspace_addr = userspace_addr;
6082 void kvm_arch_commit_memory_region(struct kvm *kvm,
6083 struct kvm_userspace_memory_region *mem,
6084 struct kvm_memory_slot old,
6088 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6090 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6093 down_write(¤t->mm->mmap_sem);
6094 ret = do_munmap(current->mm, old.userspace_addr,
6095 old.npages * PAGE_SIZE);
6096 up_write(¤t->mm->mmap_sem);
6099 "kvm_vm_ioctl_set_memory_region: "
6100 "failed to munmap memory\n");
6103 if (!kvm->arch.n_requested_mmu_pages)
6104 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6106 spin_lock(&kvm->mmu_lock);
6108 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6109 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6110 spin_unlock(&kvm->mmu_lock);
6113 void kvm_arch_flush_shadow(struct kvm *kvm)
6115 kvm_mmu_zap_all(kvm);
6116 kvm_reload_remote_mmus(kvm);
6119 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6121 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6122 !vcpu->arch.apf.halted)
6123 || !list_empty_careful(&vcpu->async_pf.done)
6124 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6125 || atomic_read(&vcpu->arch.nmi_queued) ||
6126 (kvm_arch_interrupt_allowed(vcpu) &&
6127 kvm_cpu_has_interrupt(vcpu));
6130 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6133 int cpu = vcpu->cpu;
6135 if (waitqueue_active(&vcpu->wq)) {
6136 wake_up_interruptible(&vcpu->wq);
6137 ++vcpu->stat.halt_wakeup;
6141 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6142 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6143 smp_send_reschedule(cpu);
6147 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6149 return kvm_x86_ops->interrupt_allowed(vcpu);
6152 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6154 unsigned long current_rip = kvm_rip_read(vcpu) +
6155 get_segment_base(vcpu, VCPU_SREG_CS);
6157 return current_rip == linear_rip;
6159 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6161 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6163 unsigned long rflags;
6165 rflags = kvm_x86_ops->get_rflags(vcpu);
6166 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6167 rflags &= ~X86_EFLAGS_TF;
6170 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6172 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6174 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6175 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6176 rflags |= X86_EFLAGS_TF;
6177 kvm_x86_ops->set_rflags(vcpu, rflags);
6178 kvm_make_request(KVM_REQ_EVENT, vcpu);
6180 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6182 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6186 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6187 is_error_page(work->page))
6190 r = kvm_mmu_reload(vcpu);
6194 if (!vcpu->arch.mmu.direct_map &&
6195 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6198 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6201 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6203 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6206 static inline u32 kvm_async_pf_next_probe(u32 key)
6208 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6211 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6213 u32 key = kvm_async_pf_hash_fn(gfn);
6215 while (vcpu->arch.apf.gfns[key] != ~0)
6216 key = kvm_async_pf_next_probe(key);
6218 vcpu->arch.apf.gfns[key] = gfn;
6221 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6224 u32 key = kvm_async_pf_hash_fn(gfn);
6226 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6227 (vcpu->arch.apf.gfns[key] != gfn &&
6228 vcpu->arch.apf.gfns[key] != ~0); i++)
6229 key = kvm_async_pf_next_probe(key);
6234 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6236 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6239 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6243 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6245 vcpu->arch.apf.gfns[i] = ~0;
6247 j = kvm_async_pf_next_probe(j);
6248 if (vcpu->arch.apf.gfns[j] == ~0)
6250 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6252 * k lies cyclically in ]i,j]
6254 * |....j i.k.| or |.k..j i...|
6256 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6257 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6262 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6265 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6269 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6270 struct kvm_async_pf *work)
6272 struct x86_exception fault;
6274 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6275 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6277 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6278 (vcpu->arch.apf.send_user_only &&
6279 kvm_x86_ops->get_cpl(vcpu) == 0))
6280 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6281 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6282 fault.vector = PF_VECTOR;
6283 fault.error_code_valid = true;
6284 fault.error_code = 0;
6285 fault.nested_page_fault = false;
6286 fault.address = work->arch.token;
6287 kvm_inject_page_fault(vcpu, &fault);
6291 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6292 struct kvm_async_pf *work)
6294 struct x86_exception fault;
6296 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6297 if (is_error_page(work->page))
6298 work->arch.token = ~0; /* broadcast wakeup */
6300 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6302 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6303 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6304 fault.vector = PF_VECTOR;
6305 fault.error_code_valid = true;
6306 fault.error_code = 0;
6307 fault.nested_page_fault = false;
6308 fault.address = work->arch.token;
6309 kvm_inject_page_fault(vcpu, &fault);
6311 vcpu->arch.apf.halted = false;
6314 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6316 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6319 return !kvm_event_needs_reinjection(vcpu) &&
6320 kvm_x86_ops->interrupt_allowed(vcpu);
6323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);