2 * linux/arch/arm/mach-clps711x/core.c
4 * Core support for the CLPS711x-based machines.
6 * Copyright (C) 2001,2011 Deep Blue Solutions Ltd
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/sched.h>
29 #include <linux/timex.h>
31 #include <asm/sizes.h>
32 #include <mach/hardware.h>
35 #include <asm/pgtable.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/time.h>
39 #include <asm/hardware/clps7111.h>
40 #include <asm/system_misc.h>
43 * This maps the generic CLPS711x registers
45 static struct map_desc clps711x_io_desc[] __initdata = {
47 .virtual = CLPS7111_VIRT_BASE,
48 .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
54 void __init clps711x_map_io(void)
56 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
59 static void int1_mask(struct irq_data *d)
63 intmr1 = clps_readl(INTMR1);
64 intmr1 &= ~(1 << d->irq);
65 clps_writel(intmr1, INTMR1);
68 static void int1_ack(struct irq_data *d)
72 intmr1 = clps_readl(INTMR1);
73 intmr1 &= ~(1 << d->irq);
74 clps_writel(intmr1, INTMR1);
77 case IRQ_CSINT: clps_writel(0, COEOI); break;
78 case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
79 case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
80 case IRQ_RTCMI: clps_writel(0, RTCEOI); break;
81 case IRQ_TINT: clps_writel(0, TEOI); break;
82 case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
86 static void int1_unmask(struct irq_data *d)
90 intmr1 = clps_readl(INTMR1);
91 intmr1 |= 1 << d->irq;
92 clps_writel(intmr1, INTMR1);
95 static struct irq_chip int1_chip = {
97 .irq_mask = int1_mask,
98 .irq_unmask = int1_unmask,
101 static void int2_mask(struct irq_data *d)
105 intmr2 = clps_readl(INTMR2);
106 intmr2 &= ~(1 << (d->irq - 16));
107 clps_writel(intmr2, INTMR2);
110 static void int2_ack(struct irq_data *d)
114 intmr2 = clps_readl(INTMR2);
115 intmr2 &= ~(1 << (d->irq - 16));
116 clps_writel(intmr2, INTMR2);
119 case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
123 static void int2_unmask(struct irq_data *d)
127 intmr2 = clps_readl(INTMR2);
128 intmr2 |= 1 << (d->irq - 16);
129 clps_writel(intmr2, INTMR2);
132 static struct irq_chip int2_chip = {
134 .irq_mask = int2_mask,
135 .irq_unmask = int2_unmask,
138 void __init clps711x_init_irq(void)
142 for (i = 0; i < NR_IRQS; i++) {
143 if (INT1_IRQS & (1 << i)) {
144 irq_set_chip_and_handler(i, &int1_chip,
146 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
148 if (INT2_IRQS & (1 << i)) {
149 irq_set_chip_and_handler(i, &int2_chip,
151 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
158 clps_writel(0, INTMR1);
159 clps_writel(0, INTMR2);
162 * Clear down any pending interrupts
164 clps_writel(0, COEOI);
165 clps_writel(0, TC1EOI);
166 clps_writel(0, TC2EOI);
167 clps_writel(0, RTCEOI);
168 clps_writel(0, TEOI);
169 clps_writel(0, UMSEOI);
170 clps_writel(0, SYNCIO);
171 clps_writel(0, KBDEOI);
175 * gettimeoffset() returns time since last timer tick, in usecs.
177 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
178 * 'tick' is usecs per jiffy.
180 static unsigned long clps711x_gettimeoffset(void)
182 unsigned long hwticks;
183 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
184 return (hwticks * (tick_nsec / 1000)) / LATCH;
188 * IRQ handler for the timer
190 static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
196 static struct irqaction clps711x_timer_irq = {
197 .name = "CLPS711x Timer Tick",
198 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
199 .handler = p720t_timer_interrupt,
202 static void __init clps711x_timer_init(void)
207 syscon = clps_readl(SYSCON1);
208 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
209 clps_writel(syscon, SYSCON1);
211 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
213 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
216 tv.tv_sec = clps_readl(RTCDR);
217 do_settimeofday(&tv);
220 struct sys_timer clps711x_timer = {
221 .init = clps711x_timer_init,
222 .offset = clps711x_gettimeoffset,
225 void clps711x_restart(char mode, const char *cmd)
230 static void clps711x_idle(void)
232 clps_writel(1, HALT);
233 __asm__ __volatile__(
238 static int __init clps711x_idle_init(void)
240 arm_pm_idle = clps711x_idle;
244 arch_initcall(clps711x_idle_init);