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(parent: ef5fa0a) | patch
x86: unmask CPUID levels on Intel CPUs, fix
authorIngo Molnar <mingo@elte.hu>
Mon, 26 Jan 2009 03:30:41 +0000 (04:30 +0100)
committerIngo Molnar <mingo@elte.hu>
Mon, 26 Jan 2009 11:36:24 +0000 (12:36 +0100)
commit99fb4d349db7e7dacb2099c5cc320a9e2d31c1ef
tree62d62cb8f17962e9318177240c6154a4ca708077tree | snapshot
parentef5fa0ab24b87646c7bc98645acbb4b51fc2acd4commit | diff
x86: unmask CPUID levels on Intel CPUs, fix

Impact: fix boot hang on pre-model-15 Intel CPUs

rdmsrl_safe() does not work in very early bootup code yet, because we
dont have the pagefault handler installed yet so exception section
does not get parsed. rdmsr_safe() will just crash and hang the bootup.

So limit the MSR_IA32_MISC_ENABLE MSR read to those CPU types that
support it.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/intel.c diff | blob | history
Port of xen3.3 xenlinux code to Ubuntu Natty kernel