drm/i915: Fix fifo size for self-refresh watermark on 965G
authorZhao Yakui <yakui.zhao@intel.com>
Sat, 12 Jun 2010 06:32:24 +0000 (14:32 +0800)
committerEric Anholt <eric@anholt.net>
Mon, 2 Aug 2010 02:03:43 +0000 (19:03 -0700)
commit1b07e04e9cd443fc333f4036d129ba7c08d340c4
treed516dd5e3894b1268be266b9824e8ee74c101726
parentfa143215b11056b878875f87edac78a1cfb9d1c0
drm/i915: Fix fifo size for self-refresh watermark on 965G

The total self-refresh fifo entry size for display plane is 512
instead of 128 for 965G. Also fix WM value mask for 965G.

About 1.0W power can be saved on one T61 laptop after the self-refresh
watermark is configured correctly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c