[PATCH] ia64: Reduce TLB flushing during process migration
authorJack Steiner <steiner@sgi.com>
Mon, 12 Jul 2004 07:27:49 +0000 (00:27 -0700)
committerDavid Mosberger <davidm@tiger.hpl.hp.com>
Mon, 12 Jul 2004 07:27:49 +0000 (00:27 -0700)
commit48cd6783d73afae968acf1c36e7b4e149328d20b
tree81785d34f28b2afa710c6ec91d7af9aecee41b6a
parenteac9ee8eb9f1a46be51870207fa68ce169810ded
[PATCH] ia64: Reduce TLB flushing during process migration

This patch adds an architecture-specific callout after explicit
processor migrations.  The callout allows architectures (or platforms)
to update TLB specific information (ex., cpu_vm_mask).

Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: David Mosberger <davidm@hpl.hp.com>
Documentation/cachetlb.txt
arch/ia64/sn/kernel/sn2/sn2_smp.c
include/asm-generic/tlb.h
include/asm-ia64/machvec.h
include/asm-ia64/machvec_sn2.h
include/asm-ia64/tlb.h
kernel/sched.c