#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/smp.h>
-#include <asm/naca.h>
#include <asm/rtas.h>
#include <asm/xics.h>
#include <asm/hvcall.h>
static unsigned int default_server = 0xFF;
/* also referenced in smp.c... */
unsigned int default_distrib_server = 0;
+unsigned int interrupt_server_size = 8;
/*
* XICS only has a single IPI, so encode the messages per CPU
default_server = ireg[0];
default_distrib_server = ireg[i-1]; /* take last element */
}
+ ireg = (uint *)get_property(np,
+ "ibm,interrupt-server#-size", NULL);
+ if (ireg)
+ interrupt_server_size = *ireg;
break;
}
}
*/
static int __init xics_setup_i8259(void)
{
- if (naca->interrupt_controller == IC_PPC_XIC &&
+ if (ppc64_interrupt_controller == IC_PPC_XIC &&
xics_irq_8259_cascade != -1) {
if (request_irq(irq_offset_up(xics_irq_8259_cascade),
no_action, 0, "8259 cascade", NULL))
/* Interrupts are disabled. */
void xics_migrate_irqs_away(void)
{
- int set_indicator = rtas_token("set-indicator");
- const unsigned int giqs = 9005UL; /* Global Interrupt Queue Server */
- int status = 0;
+ int status;
unsigned int irq, virq, cpu = smp_processor_id();
- BUG_ON(set_indicator == RTAS_UNKNOWN_SERVICE);
-
/* Reject any interrupt that was queued to us... */
ops->cppr_info(cpu, 0);
iosync();
- /* Refuse any new interrupts... */
- rtas_call(set_indicator, 3, 1, &status, giqs,
- hard_smp_processor_id(), 0);
+ /* remove ourselves from the global interrupt queue */
+ status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
+ (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
WARN_ON(status != 0);
/* Allow IPIs again... */