#include <asm/iSeries/iSeries_irq.h>
#include <asm/iSeries/XmPciLpEvent.h>
-static unsigned int iSeries_startup_IRQ(unsigned int irq);
-static void iSeries_shutdown_IRQ(unsigned int irq);
-static void iSeries_enable_IRQ(unsigned int irq);
-static void iSeries_disable_IRQ(unsigned int irq);
-static void iSeries_end_IRQ(unsigned int irq);
-
-static hw_irq_controller iSeries_IRQ_handler = {
- .typename = "iSeries irq controller",
- .startup = iSeries_startup_IRQ,
- .shutdown = iSeries_shutdown_IRQ,
- .enable = iSeries_enable_IRQ,
- .disable = iSeries_disable_IRQ,
- .end = iSeries_end_IRQ
+
+hw_irq_controller iSeries_IRQ_handler = {
+ "iSeries irq controller",
+ iSeries_startup_IRQ, /* startup */
+ iSeries_shutdown_IRQ, /* shutdown */
+ iSeries_enable_IRQ, /* enable */
+ iSeries_disable_IRQ, /* disable */
+ NULL, /* ack */
+ iSeries_end_IRQ, /* end */
+ NULL /* set_affinity */
};
-void iSeries_init_irq_desc(irq_desc_t *desc)
-{
-}
-/* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c */
+struct iSeries_irqEntry {
+ u32 dsa;
+ struct iSeries_irqEntry* next;
+};
+
+struct iSeries_irqAnchor {
+ u8 valid : 1;
+ u8 reserved : 7;
+ u16 entryCount;
+ struct iSeries_irqEntry* head;
+};
+
+struct iSeries_irqAnchor iSeries_irqMap[NR_IRQS];
+
+void iSeries_init_irqMap(int irq);
+
+/* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c */
void __init iSeries_init_IRQ(void)
{
+ int i;
+ for (i = 0; i < NR_IRQS; i++) {
+ irq_desc[i].handler = &iSeries_IRQ_handler;
+ irq_desc[i].status = 0;
+ irq_desc[i].status |= IRQ_DISABLED;
+ irq_desc[i].depth = 1;
+ iSeries_init_irqMap(i);
+ }
/* Register PCI event handler and open an event path */
- PPCDBG(PPCDBG_BUSWALK,
- "Register PCI event handler and open an event path\n");
+ PPCDBG(PPCDBG_BUSWALK,"Register PCI event handler and open an event path\n");
XmPciLpEvent_init();
return;
}
-/*
- * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
- * It calculates the irq value for the slot.
- * Note that subBusNumber is always 0 (at the moment at least).
- */
-int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
- HvSubBusNumber subBusNumber, HvAgentId deviceId)
+/**********************************************************************
+ * Called by iSeries_init_IRQ
+ * Prevent IRQs 0 and 255 from being used. IRQ 0 appears in
+ * uninitialized devices. IRQ 255 appears in the PCI interrupt
+ * line register if a PCI error occurs,
+ *********************************************************************/
+void __init iSeries_init_irqMap(int irq)
{
- u8 idsel = (deviceId >> 4);
- u8 function = deviceId & 7;
-
- return ((busNumber - 1) << 6) + ((idsel - 1) << 3) + function + 1;
+ iSeries_irqMap[irq].valid = (irq == 0 || irq == 255)? 0 : 1;
+ iSeries_irqMap[irq].entryCount = 0;
+ iSeries_irqMap[irq].head = NULL;
}
-#define IRQ_TO_BUS(irq) (((((irq) - 1) >> 6) & 0xff) + 1)
-#define IRQ_TO_IDSEL(irq) (((((irq) - 1) >> 3) & 7) + 1)
-#define IRQ_TO_FUNC(irq) (((irq) - 1) & 7)
+/* This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot */
+/* It calculates the irq value for the slot. */
+int __init iSeries_allocate_IRQ(HvBusNumber busNumber, HvSubBusNumber subBusNumber, HvAgentId deviceId)
+{
+ u8 idsel = (deviceId >> 4);
+ u8 function = deviceId & 0x0F;
+ int irq = ((((busNumber-1)*16 + (idsel-1)*8 + function)*9/8) % 253) + 2;
+ return irq;
+}
-/*
- * This is called out of iSeries_scan_slot to assign the EADS slot
- * to its IRQ number
- */
-int __init iSeries_assign_IRQ(int irq, HvBusNumber busNumber,
- HvSubBusNumber subBusNumber, HvAgentId deviceId)
+/* This is called out of iSeries_scan_slot to assign the EADS slot to its IRQ number */
+int __init iSeries_assign_IRQ(int irq, HvBusNumber busNumber, HvSubBusNumber subBusNumber, HvAgentId deviceId)
{
- irq_desc_t *desc = get_real_irq_desc(irq);
+ int rc;
+ u32 dsa = (busNumber << 16) | (subBusNumber << 8) | deviceId;
+ struct iSeries_irqEntry* newEntry;
+ unsigned long flags;
- if (desc == NULL)
+ if (irq < 0 || irq >= NR_IRQS) {
return -1;
- desc->handler = &iSeries_IRQ_handler;
- return 0;
+ }
+ newEntry = kmalloc(sizeof(*newEntry), GFP_KERNEL);
+ if (newEntry == NULL) {
+ return -ENOMEM;
+ }
+ newEntry->dsa = dsa;
+ newEntry->next = NULL;
+ /********************************************************************
+ * Probably not necessary to lock the irq since allocation is only
+ * done during buswalk, but it should not hurt anything except a
+ * little performance to be smp safe.
+ *******************************************************************/
+ spin_lock_irqsave(&irq_desc[irq].lock, flags);
+
+ if (iSeries_irqMap[irq].valid) {
+ /* Push the new element onto the irq stack */
+ newEntry->next = iSeries_irqMap[irq].head;
+ iSeries_irqMap[irq].head = newEntry;
+ ++iSeries_irqMap[irq].entryCount;
+ rc = 0;
+ PPCDBG(PPCDBG_BUSWALK,"iSeries_assign_IRQ 0x%04X.%02X.%02X = 0x%04X\n",busNumber, subBusNumber, deviceId, irq);
+ }
+ else {
+ printk("PCI: Something is wrong with the iSeries_irqMap. \n");
+ kfree(newEntry);
+ rc = -1;
+ }
+ spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
+ return rc;
}
/* This is called by iSeries_activate_IRQs */
-static unsigned int iSeries_startup_IRQ(unsigned int irq)
+unsigned int iSeries_startup_IRQ(unsigned int irq)
{
- u32 bus, deviceId, function, mask;
- const u32 subBus = 0;
-
- bus = IRQ_TO_BUS(irq);
- function = IRQ_TO_FUNC(irq);
- deviceId = (IRQ_TO_IDSEL(irq) << 4) + function;
-
- /* Link the IRQ number to the bridge */
- HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
-
- /* Unmask bridge interrupts in the FISR */
- mask = 0x01010000 << function;
- HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
- PPCDBG(PPCDBG_BUSWALK, "iSeries_activate_IRQ 0x%02X.%02X.%02X Irq:0x%02X\n",
- bus, subBus, deviceId, irq);
+ struct iSeries_irqEntry* entry;
+ u32 bus, subBus, deviceId, function, mask;
+ for(entry=iSeries_irqMap[irq].head; entry!=NULL; entry=entry->next) {
+ bus = (entry->dsa >> 16) & 0xFFFF;
+ subBus = (entry->dsa >> 8) & 0xFF;
+ deviceId = entry->dsa & 0xFF;
+ function = deviceId & 0x0F;
+ /* Link the IRQ number to the bridge */
+ HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
+ /* Unmask bridge interrupts in the FISR */
+ mask = 0x01010000 << function;
+ HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
+ PPCDBG(PPCDBG_BUSWALK,"iSeries_activate_IRQ 0x%02X.%02X.%02X Irq:0x%02X\n",bus,subBus,deviceId,irq);
+ }
return 0;
}
-/*
- * This is called out of iSeries_fixup to activate interrupt
- * generation for usable slots
- */
+/* This is called out of iSeries_fixup to activate interrupt
+ * generation for usable slots */
void __init iSeries_activate_IRQs()
{
int irq;
unsigned long flags;
-
- for_each_irq (irq) {
- irq_desc_t *desc = get_irq_desc(irq);
-
- if (desc && desc->handler && desc->handler->startup) {
- spin_lock_irqsave(&desc->lock, flags);
- desc->handler->startup(irq);
- spin_unlock_irqrestore(&desc->lock, flags);
- }
+ for (irq=0; irq < NR_IRQS; irq++) {
+ spin_lock_irqsave(&irq_desc[irq].lock, flags);
+ irq_desc[irq].handler->startup(irq);
+ spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
}
}
/* this is not called anywhere currently */
-static void iSeries_shutdown_IRQ(unsigned int irq)
-{
- u32 bus, deviceId, function, mask;
- const u32 subBus = 0;
+void iSeries_shutdown_IRQ(unsigned int irq) {
+ struct iSeries_irqEntry* entry;
+ u32 bus, subBus, deviceId, function, mask;
/* irq should be locked by the caller */
- bus = IRQ_TO_BUS(irq);
- function = IRQ_TO_FUNC(irq);
- deviceId = (IRQ_TO_IDSEL(irq) << 4) + function;
- /* Invalidate the IRQ number in the bridge */
- HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
+ for (entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
+ bus = (entry->dsa >> 16) & 0xFFFF;
+ subBus = (entry->dsa >> 8) & 0xFF;
+ deviceId = entry->dsa & 0xFF;
+ function = deviceId & 0x0F;
+ /* Invalidate the IRQ number in the bridge */
+ HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
+ /* Mask bridge interrupts in the FISR */
+ mask = 0x01010000 << function;
+ HvCallPci_maskFisr(bus, subBus, deviceId, mask);
+ }
- /* Mask bridge interrupts in the FISR */
- mask = 0x01010000 << function;
- HvCallPci_maskFisr(bus, subBus, deviceId, mask);
}
-/*
+/***********************************************************
* This will be called by device drivers (via disable_IRQ)
* to disable INTA in the bridge interrupt status register.
- */
-static void iSeries_disable_IRQ(unsigned int irq)
+ ***********************************************************/
+void iSeries_disable_IRQ(unsigned int irq)
{
- u32 bus, deviceId, function, mask;
- const u32 subBus = 0;
+ struct iSeries_irqEntry* entry;
+ u32 bus, subBus, deviceId, mask;
/* The IRQ has already been locked by the caller */
- bus = IRQ_TO_BUS(irq);
- function = IRQ_TO_FUNC(irq);
- deviceId = (IRQ_TO_IDSEL(irq) << 4) + function;
-
- /* Mask secondary INTA */
- mask = 0x80000000;
- HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
- PPCDBG(PPCDBG_BUSWALK, "iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
- bus, subBus, deviceId, irq);
+
+ for (entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
+ bus = (entry->dsa >> 16) & 0xFFFF;
+ subBus = (entry->dsa >> 8) & 0xFF;
+ deviceId = entry->dsa & 0xFF;
+ /* Mask secondary INTA */
+ mask = 0x80000000;
+ HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
+ PPCDBG(PPCDBG_BUSWALK,"iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",bus,subBus,deviceId,irq);
+ }
}
-/*
+/***********************************************************
* This will be called by device drivers (via enable_IRQ)
* to enable INTA in the bridge interrupt status register.
- */
-static void iSeries_enable_IRQ(unsigned int irq)
+ ***********************************************************/
+void iSeries_enable_IRQ(unsigned int irq)
{
- u32 bus, deviceId, function, mask;
- const u32 subBus = 0;
+ struct iSeries_irqEntry* entry;
+ u32 bus, subBus, deviceId, mask;
/* The IRQ has already been locked by the caller */
- bus = IRQ_TO_BUS(irq);
- function = IRQ_TO_FUNC(irq);
- deviceId = (IRQ_TO_IDSEL(irq) << 4) + function;
-
- /* Unmask secondary INTA */
- mask = 0x80000000;
- HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
- PPCDBG(PPCDBG_BUSWALK, "iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
- bus, subBus, deviceId, irq);
+ for (entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
+ bus = (entry->dsa >> 16) & 0xFFFF;
+ subBus = (entry->dsa >> 8) & 0xFF;
+ deviceId = entry->dsa & 0xFF;
+ /* Unmask secondary INTA */
+ mask = 0x80000000;
+ HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
+ PPCDBG(PPCDBG_BUSWALK,"iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",bus,subBus,deviceId,irq);
+ }
}
-/*
- * Need to define this so ppc_irq_dispatch_handler will NOT call
- * enable_IRQ at the end of interrupt handling. However, this does
- * nothing because there is not enough information provided to do
- * the EOI HvCall. This is done by XmPciLpEvent.c
- */
-static void iSeries_end_IRQ(unsigned int irq)
+/* Need to define this so ppc_irq_dispatch_handler will NOT call
+ enable_IRQ at the end of interrupt handling. However, this
+ does nothing because there is not enough information provided
+ to do the EOI HvCall. This is done by XmPciLpEvent.c */
+void iSeries_end_IRQ(unsigned int irq)
{
}
+
projects / linux-flexiantxendom0-3.2.10.git / blobdiff