- patches.apparmor/remove_suid_new_case_in_2.6.22.diff: Merge fix.

[linux-flexiantxendom0-3.2.10.git] / arch / mips / cobalt / setup.c

diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 88d34f1..7abe45e 100644 (file)
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -10,28 +10,20 @@
  *
  */
 #include <linux/interrupt.h>
-#include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/pm.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
 
 #include <asm/bootinfo.h>
 #include <asm/time.h>
 #include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/processor.h>
 #include <asm/reboot.h>
 #include <asm/gt64120.h>
 
-#include <asm/mach-cobalt/cobalt.h>
+#include <cobalt.h>
 
 extern void cobalt_machine_restart(char *command);
 extern void cobalt_machine_halt(void);
 extern void cobalt_machine_power_off(void);
-extern void cobalt_early_console(void);
-
-int cobalt_board_id;
 
 const char *get_system_type(void)
 {
@@ -63,22 +55,6 @@ void __init plat_timer_setup(struct irqaction *irq)
        GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
 }
 
-extern struct pci_ops gt64111_pci_ops;
-
-static struct resource cobalt_mem_resource = {
-       .start  = GT_DEF_PCI0_MEM0_BASE,
-       .end    = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
-       .name   = "PCI memory",
-       .flags  = IORESOURCE_MEM
-};
-
-static struct resource cobalt_io_resource = {
-       .start  = 0x1000,
-       .end    = 0xffff,
-       .name   = "PCI I/O",
-       .flags  = IORESOURCE_IO
-};
-
 /*
  * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
  * keyboard conntroller is never used.
@@ -111,18 +87,8 @@ static struct resource cobalt_reserved_resources[] = {
        },
 };
 
-static struct pci_controller cobalt_pci_controller = {
-       .pci_ops        = &gt64111_pci_ops,
-       .mem_resource   = &cobalt_mem_resource,
-       .mem_offset     = 0,
-       .io_resource    = &cobalt_io_resource,
-       .io_offset      = 0 - GT_DEF_PCI0_IO_BASE,
-};
-
 void __init plat_mem_setup(void)
 {
-       static struct uart_port uart;
-       unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
        int i;
 
        _machine_restart = cobalt_machine_restart;
@@ -137,33 +103,6 @@ void __init plat_mem_setup(void)
        /* These resources have been reserved by VIA SuperI/O chip. */
        for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
                request_resource(&ioport_resource, cobalt_reserved_resources + i);
-
-        /* Read the cobalt id register out of the PCI config space */
-        PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
-        cobalt_board_id = GT_READ(GT_PCI0_CFGDATA_OFS);
-        cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
-        cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
-
-       printk("Cobalt board ID: %d\n", cobalt_board_id);
-
-#ifdef CONFIG_PCI
-       register_pci_controller(&cobalt_pci_controller);
-#endif
-
-       if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
-#ifdef CONFIG_SERIAL_8250
-               uart.line       = 0;
-               uart.type       = PORT_UNKNOWN;
-               uart.uartclk    = 18432000;
-               uart.irq        = COBALT_SERIAL_IRQ;
-               uart.flags      = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
-                                 UPF_SKIP_TEST;
-               uart.iotype     = UPIO_MEM;
-               uart.mapbase    = 0x1c800000;
-
-               early_serial_setup(&uart);
-#endif
-       }
 }
 
 /*