- Update Xen patches to 3.3-rc5 and c/s 1157.

[linux-flexiantxendom0-3.2.10.git] / arch / x86 / include / asm / acpi.h

diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 610001d..d39db8a 100644 (file)
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -31,6 +31,10 @@
 #include <asm/mpspec.h>
 #include <asm/trampoline.h>
 
+#ifdef CONFIG_XEN_PRIVILEGED_GUEST
+#include <xen/interface/platform.h>
+#endif
+
 #define COMPILER_DEPENDENT_INT64   long long
 #define COMPILER_DEPENDENT_UINT64  unsigned long long
 
@@ -115,7 +119,11 @@ static inline void acpi_disable_pci(void)
 }
 
 /* Low-level suspend routine. */
+#ifdef CONFIG_ACPI_PV_SLEEP
+#define acpi_suspend_lowlevel() acpi_enter_sleep_state(ACPI_STATE_S3)
+#else
 extern int acpi_suspend_lowlevel(void);
+#endif
 
 extern const unsigned char acpi_wakeup_code[];
 #define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code)))
@@ -123,11 +131,33 @@ extern const unsigned char acpi_wakeup_code[];
 /* early initialization routine */
 extern void acpi_reserve_wakeup_memory(void);
 
+#ifdef CONFIG_XEN_PRIVILEGED_GUEST
+static inline int acpi_notify_hypervisor_state(u8 sleep_state,
+                                              u32 pm1a_cnt_val,
+                                              u32 pm1b_cnt_val)
+{
+       struct xen_platform_op op = {
+               .cmd = XENPF_enter_acpi_sleep,
+               .interface_version = XENPF_INTERFACE_VERSION,
+               .u = {
+                       .enter_acpi_sleep = {
+                               .pm1a_cnt_val = pm1a_cnt_val,
+                               .pm1b_cnt_val = pm1b_cnt_val,
+                               .sleep_state = sleep_state,
+                       },
+               },
+       };
+
+       return HYPERVISOR_platform_op(&op);
+}
+#endif
+
 /*
  * Check if the CPU can handle C2 and deeper
  */
 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
 {
+#ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
        /*
         * Early models (<=5) of AMD Opterons are not supposed to go into
         * C2 state.
@@ -142,6 +172,7 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
        else if (amd_e400_c1e_detected)
                return 1;
        else
+#endif
                return max_cstate;
 }
 
@@ -181,7 +212,9 @@ static inline void disable_acpi(void) { }
 
 #endif /* !CONFIG_ACPI */
 
+#ifndef CONFIG_XEN
 #define ARCH_HAS_POWER_INIT    1
+#endif
 
 #ifdef CONFIG_ACPI_NUMA
 extern int acpi_numa;