- patches.suse/slab-handle-memoryless-nodes-v2a.patch: Refresh.

[linux-flexiantxendom0-3.2.10.git] / drivers / pci / setup-bus.c

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index bee524d..c48cd37 100644 (file)
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -71,53 +71,50 @@ static void pbus_assign_resources_sorted(const struct pci_bus *bus)
 void pci_setup_cardbus(struct pci_bus *bus)
 {
        struct pci_dev *bridge = bus->self;
+       struct resource *res;
        struct pci_bus_region region;
 
-       dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n",
-                pci_domain_nr(bus), bus->number);
+       dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n",
+                bus->secondary, bus->subordinate);
 
-       pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-       if (bus->resource[0]->flags & IORESOURCE_IO) {
+       res = bus->resource[0];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_IO) {
                /*
                 * The IO resource is allocated a range twice as large as it
                 * would normally need.  This allows us to set both IO regs.
                 */
-               dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                      (unsigned long)region.start,
-                      (unsigned long)region.end);
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
                                        region.start);
                pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
                                        region.end);
        }
 
-       pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-       if (bus->resource[1]->flags & IORESOURCE_IO) {
-               dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                      (unsigned long)region.start,
-                      (unsigned long)region.end);
+       res = bus->resource[1];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_IO) {
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
                                        region.start);
                pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
                                        region.end);
        }
 
-       pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-       if (bus->resource[2]->flags & IORESOURCE_MEM) {
-               dev_info(&bridge->dev, "  PREFETCH window: %#08lx-%#08lx\n",
-                      (unsigned long)region.start,
-                      (unsigned long)region.end);
+       res = bus->resource[2];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_MEM) {
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
                                        region.start);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
                                        region.end);
        }
 
-       pcibios_resource_to_bus(bridge, &region, bus->resource[3]);
-       if (bus->resource[3]->flags & IORESOURCE_MEM) {
-               dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                      (unsigned long)region.start,
-                      (unsigned long)region.end);
+       res = bus->resource[3];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_MEM) {
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
                                        region.start);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
@@ -140,33 +137,33 @@ EXPORT_SYMBOL(pci_setup_cardbus);
 static void pci_setup_bridge(struct pci_bus *bus)
 {
        struct pci_dev *bridge = bus->self;
+       struct resource *res;
        struct pci_bus_region region;
        u32 l, bu, lu, io_upper16;
 
        if (pci_is_enabled(bridge))
                return;
 
-       dev_info(&bridge->dev, "PCI bridge, secondary bus %04x:%02x\n",
-                pci_domain_nr(bus), bus->number);
+       dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n",
+                bus->secondary, bus->subordinate);
 
        /* Set up the top and bottom of the PCI I/O segment for this bus. */
-       pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-       if (bus->resource[0]->flags & IORESOURCE_IO) {
+       res = bus->resource[0];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_IO) {
                pci_read_config_dword(bridge, PCI_IO_BASE, &l);
                l &= 0xffff0000;
                l |= (region.start >> 8) & 0x00f0;
                l |= region.end & 0xf000;
                /* Set up upper 16 bits of I/O base/limit. */
                io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
-               dev_info(&bridge->dev, "  IO window: %#04lx-%#04lx\n",
-                   (unsigned long)region.start,
-                   (unsigned long)region.end);
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
        }
        else {
                /* Clear upper 16 bits of I/O base/limit. */
                io_upper16 = 0;
                l = 0x00f0;
-               dev_info(&bridge->dev, "  IO window: disabled\n");
+               dev_info(&bridge->dev, "  bridge window [io  disabled]\n");
        }
        /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
        pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
@@ -177,17 +174,16 @@ static void pci_setup_bridge(struct pci_bus *bus)
 
        /* Set up the top and bottom of the PCI Memory segment
           for this bus. */
-       pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-       if (bus->resource[1]->flags & IORESOURCE_MEM) {
+       res = bus->resource[1];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_MEM) {
                l = (region.start >> 16) & 0xfff0;
                l |= region.end & 0xfff00000;
-               dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                   (unsigned long)region.start,
-                   (unsigned long)region.end);
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
        }
        else {
                l = 0x0000fff0;
-               dev_info(&bridge->dev, "  MEM window: disabled\n");
+               dev_info(&bridge->dev, "  bridge window [mem disabled]\n");
        }
        pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
 
@@ -198,23 +194,20 @@ static void pci_setup_bridge(struct pci_bus *bus)
 
        /* Set up PREF base/limit. */
        bu = lu = 0;
-       pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-       if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
-               int width = 8;
+       res = bus->resource[2];
+       pcibios_resource_to_bus(bridge, &region, res);
+       if (res->flags & IORESOURCE_PREFETCH) {
                l = (region.start >> 16) & 0xfff0;
                l |= region.end & 0xfff00000;
-               if (bus->resource[2]->flags & IORESOURCE_MEM_64) {
+               if (res->flags & IORESOURCE_MEM_64) {
                        bu = upper_32_bits(region.start);
                        lu = upper_32_bits(region.end);
-                       width = 16;
                }
-               dev_info(&bridge->dev, "  PREFETCH window: %#0*llx-%#0*llx\n",
-                               width, (unsigned long long)region.start,
-                               width, (unsigned long long)region.end);
+               dev_info(&bridge->dev, "  bridge window %pR\n", res);
        }
        else {
                l = 0x0000fff0;
-               dev_info(&bridge->dev, "  PREFETCH window: disabled\n");
+               dev_info(&bridge->dev, "  bridge window [mem pref disabled]\n");
        }
        pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
 
@@ -338,8 +331,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
        size = (size & 0xff) + ((size & ~0xffUL) << 2);
 #endif
-       size = ALIGN(max(size + size1, pci_reserve_size_io(bus)), 4096);
+       size = ALIGN(size + size1, 4096);
        if (!size) {
+               if (b_res->start || b_res->end)
+                       dev_info(&bus->self->dev, "disabling bridge window "
+                                "%pR to [bus %02x-%02x] (unused)\n", b_res,
+                                bus->secondary, bus->subordinate);
                b_res->flags = 0;
                return;
        }
@@ -385,8 +382,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                        align = pci_resource_alignment(dev, r);
                        order = __ffs(align) - 20;
                        if (order > 11) {
-                               dev_warn(&dev->dev, "BAR %d bad alignment %llx: "
-                                        "%pR\n", i, (unsigned long long)align, r);
+                               dev_warn(&dev->dev, "disabling BAR %d: %pR "
+                                        "(bad alignment %#llx)\n", i, r,
+                                        (unsigned long long) align);
                                r->flags = 0;
                                continue;
                        }
@@ -418,9 +416,12 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                        min_align = align1 >> 1;
                align += aligns[order];
        }
-       size = ALIGN(max(size, (resource_size_t)pci_reserve_size_mem(bus)),
-                    min_align);
+       size = ALIGN(size, min_align);
        if (!size) {
+               if (b_res->start || b_res->end)
+                       dev_info(&bus->self->dev, "disabling bridge window "
+                                "%pR to [bus %02x-%02x] (unused)\n", b_res,
+                                bus->secondary, bus->subordinate);
                b_res->flags = 0;
                return 1;
        }
@@ -578,10 +579,7 @@ static void pci_bus_dump_res(struct pci_bus *bus)
                 if (!res || !res->end)
                         continue;
 
-               dev_printk(KERN_DEBUG, &bus->dev, "resource %d %s %pR\n", i,
-                          (res->flags & IORESOURCE_IO) ? "io: " :
-                           ((res->flags & IORESOURCE_PREFETCH)? "pref mem":"mem:"),
-                          res);
+               dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
         }
 }