#define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000
#define APIC_DEFAULT_PHYS_BASE 0xfee00000
-#ifndef CONFIG_XEN
+/*
+ * This is the IO-APIC register space as specified
+ * by Intel docs:
+ */
+#define IO_APIC_SLOT_SIZE 1024
#define APIC_ID 0x20
#define APIC_BASE_MSR 0x800
#define X2APIC_ENABLE (1UL << 10)
-#else /* CONFIG_XEN */
-
-enum {
- APIC_DEST_ALLBUT = 0x1,
- APIC_DEST_SELF,
- APIC_DEST_ALLINC
-};
-
-#endif /* CONFIG_XEN */
-
#ifdef CONFIG_X86_32
# define MAX_IO_APICS 64
#else
# define MAX_LOCAL_APIC 32768
#endif
-#ifndef CONFIG_XEN
-
/*
* All x86-64 systems are xAPIC compatible.
* In the following, "apicid" is a physical APIC ID.
#undef u32
-#endif /* CONFIG_XEN */
-
#ifdef CONFIG_X86_32
#define BAD_APICID 0xFFu
#else