- patches.suse/slab-handle-memoryless-nodes-v2a.patch: Refresh.

[linux-flexiantxendom0-3.2.10.git] / arch / arm / mach-ixp4xx / nslu2-pci.c

diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 4429b84..1eb5a90 100644 (file)
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -18,35 +18,38 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/irq.h>
-
 #include <asm/mach/pci.h>
 #include <asm/mach-types.h>
 
+#define MAX_DEV                3
+#define IRQ_LINES      3
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define INTA           11
+#define INTB           10
+#define INTC           9
+#define INTD           8
+
 void __init nslu2_pci_preinit(void)
 {
-       set_irq_type(IRQ_NSLU2_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_NSLU2_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
-       set_irq_type(IRQ_NSLU2_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
-
+       set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
 
 static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 {
-       static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = {
-               IRQ_NSLU2_PCI_INTA,
-               IRQ_NSLU2_PCI_INTB,
-               IRQ_NSLU2_PCI_INTC,
+       static int pci_irq_table[IRQ_LINES] = {
+               IXP4XX_GPIO_IRQ(INTA),
+               IXP4XX_GPIO_IRQ(INTB),
+               IXP4XX_GPIO_IRQ(INTC),
        };
 
-       int irq = -1;
-
-       if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
-               pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
-                       irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
-       }
+       if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
+               return pci_irq_table[(slot + pin - 2) % IRQ_LINES];
 
-       return irq;
+       return -1;
 }
 
 struct hw_pci __initdata nslu2_pci = {