#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
-extern inline void sema_init (struct semaphore *sem, int val)
+static inline void sema_init (struct semaphore *sem, int val)
{
*sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
}
* "down_failed" is a special asm handler that calls the C
* routine that actually waits. See arch/m68k/lib/semaphore.S
*/
-extern inline void down(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline void down(struct semaphore * sem)
{
+ register atomic_t *count asm("er0");
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%0, er0\n\t"
- "dec.l #1,er0\n\t"
- "mov.l er0,@%0\n\t"
+ "mov.l @%1, er1\n\t"
+ "dec.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
"bpl 1f\n\t"
- "ldc r4l,ccr\n\t"
- "mov.l %0,er0\n\t"
- "jsr @___down\n"
+ "ldc r3l,ccr\n\t"
+ "jsr @___down\n\t"
+ "bra 2f\n"
"1:\n\t"
- "ldc r4l,ccr"
- : /* no outputs */
- : "r" (&(sem->count))
- : "cc", "er0", "er1", "er2", "er3", "er4", "memory");
+ "ldc r3l,ccr\n"
+ "2:"
+ : "=m"(sem->count)
+ : "g" (count)
+ : "cc", "er1", "er2", "er3", "er4", "memory");
+}
+#endif
+#if defined(__H8300S__)
+static inline void down(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%1, er1\n\t"
+ "dec.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,exr\n\t"
+ "bpl 1f\n\t"
+ "jsr @___down\n"
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
}
+#endif
-extern inline int down_interruptible(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline int down_interruptible(struct semaphore * sem)
{
- register int ret __asm__("er0");
+ register atomic_t *count asm("er0");
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r1l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%1, er2\n\t"
+ "mov.l @%2, er2\n\t"
"dec.l #1,er2\n\t"
- "mov.l er2,@%1\n\t"
+ "mov.l er2,@%2\n\t"
"bpl 1f\n\t"
- "ldc r1l,ccr\n\t"
- "mov.l %1,er0\n\t"
+ "ldc r3l,ccr\n\t"
"jsr @___down_interruptible\n\t"
"bra 2f\n"
"1:\n\t"
- "ldc r1l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
+ "sub.l %0,%0\n"
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+ return (int)count;
+}
+#endif
+#if defined(__H8300S__)
+static inline int down_interruptible(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%2, er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
+ "ldc r3l,exr\n\t"
+ "bmi 1f\n\t"
"sub.l %0,%0\n\t"
- "2:\n\t"
- : "=r" (ret)
- : "r" (&(sem->count))
+ "bra 2f\n"
+ "1:\n\t"
+ "jsr @___down_interruptible\n"
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
: "cc", "er1", "er2", "er3", "memory");
- return ret;
+ return (int)count;
}
+#endif
-extern inline int down_trylock(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline int down_trylock(struct semaphore * sem)
{
- register int result;
+ register atomic_t *count asm("er0");
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%1,er0\n\t"
- "dec.l #1,er0\n\t"
- "mov.l er0,@%1\n\t"
+ "mov.l @%2,er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
"bpl 1f\n\t"
- "ldc r4l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
"jmp @3f\n"
"1:\n\t"
- "ldc r4l,ccr\n\t"
+ "ldc r3l,ccr\n\t"
"sub.l %0,%0\n"
- "2:\n"
- ".section .text.lock,\"ax\"\n"
- ".align 2\n"
+ LOCK_SECTION_START(".align 2\n\t")
"3:\n\t"
- "mov.l %1,er0\n\t"
- "jsr @___down_trylock\n"
- "mov.l er0,%0\n\t"
- "jmp @2b\n\t"
- ".previous"
- : "=r" (result)
- : "r" (&(sem->count))
- : "cc", "er0","er4", "memory");
- return result;
+ "jsr @___down_trylock\n\t"
+ "jmp @2f\n\t"
+ LOCK_SECTION_END
+ "2:"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er2", "er3", "memory");
+ return (int)count;
}
+#endif
+#if defined(__H8300S__)
+static inline int down_trylock(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%2,er2\n\t"
+ "dec.l #1,er2\n\t"
+ "mov.l er2,@%2\n\t"
+ "ldc r3l,exr\n\t"
+ "bpl 1f\n\t"
+ "jmp @3f\n"
+ "1:\n\t"
+ "sub.l %0,%0\n\t"
+ LOCK_SECTION_START(".align 2\n\t")
+ "3:\n\t"
+ "jsr @___down_trylock\n\t"
+ "jmp @2f\n\t"
+ LOCK_SECTION_END
+ "2:\n\t"
+ : "=r" (count),"=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+ return (int)count;
+}
+#endif
/*
* Note! This is subtle. We jump to wake people up only if
* The default case (no contention) will result in NO
* jumps for both down() and up().
*/
-extern inline void up(struct semaphore * sem)
+#if defined(__H8300H__)
+static inline void up(struct semaphore * sem)
{
+ register atomic_t *count asm("er0");
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
+ count = &(sem->count);
__asm__ __volatile__(
- "stc ccr,r4l\n\t"
+ "stc ccr,r3l\n\t"
"orc #0x80,ccr\n\t"
- "mov.l @%0,er0\n\t"
- "inc.l #1,er0\n\t"
- "mov.l er0,@%0\n\t"
- "bmi 1f\n\t"
- "bne 2f\n\t"
- "1:\n\t"
- "ldc r4l,ccr\n\t"
- "mov.l %0,er0\n\t"
+ "mov.l @%1,er1\n\t"
+ "inc.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,ccr\n\t"
+ "sub.l er2,er2\n\t"
+ "cmp.l er2,er1\n\t"
+ "bgt 1f\n\t"
"jsr @___up\n"
- "2:\n\t"
- "ldc r4l,ccr"
- : /* no outputs */
- : "r" (&(sem->count))
- : "cc", "er0", "er4", "memory");
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
}
+#endif
+#if defined(__H8300S__)
+static inline void up(struct semaphore * sem)
+{
+ register atomic_t *count asm("er0");
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ count = &(sem->count);
+ __asm__ __volatile__(
+ "stc exr,r3l\n\t"
+ "orc #0x07,exr\n\t"
+ "mov.l @%1,er1\n\t"
+ "inc.l #1,er1\n\t"
+ "mov.l er1,@%1\n\t"
+ "ldc r3l,exr\n\t"
+ "sub.l er2,er2\n\t"
+ "cmp.l er2,er1\n\t"
+ "bgt 1f\n\t"
+ "jsr @___up\n"
+ "1:"
+ : "=m"(sem->count)
+ : "r" (count)
+ : "cc", "er1", "er2", "er3", "memory");
+}
+#endif
#endif /* __ASSEMBLY__ */